JP2012059836A - Substrate for power module, method of manufacturing substrate for power module, and power module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a substrate for a power module capable of suppressing occurrence of waviness and wrinkle on the surface of a circuit layer during cold cycle load, and suppressing a thermal stress from acting on a junction interface between a ceramics substrate and the circuit layer, being excellent in thermal cycle reliability.SOLUTION: In a substrate 10 for a power module, a circuit layer 12 is joined to one surface of a ceramic substrate 11, with an electronic component mounted on the surface of the circuit layer 12. The circuit layer 12 is made from aluminum alloy of precipitation dispersion type in which precipitation particles are dispersed in parent phase of aluminum. Based on the observation with a scanning electron microscope of the cross section of the circuit layer 12, a precipitation deficient layer 12A of which the presence ratio of precipitation particles whose particle size is 0.1 μm or larger is less than 3% is formed at the junction interface portion of the circuit layer 12 with the ceramics substrate 11. On one surface side of the circuit layer 12, the presence ratio of precipitation particles whose particle size is 0.1 μm or larger is 3% or higher.

Description

  The present invention relates to a power module substrate having a circuit layer on which an electronic component such as a semiconductor element is mounted, a method for manufacturing the power module substrate, and a power module using the power module substrate.

Among semiconductor elements, a power element for supplying power has a relatively high calorific value, and as a substrate on which the power element is mounted, for example, on a ceramic substrate made of AlN (aluminum nitride), as shown in Patent Document 1, 2. Description of the Related Art A power module substrate in which an aluminum plate serving as a circuit layer is bonded via an Al—Si brazing material is widely used.
For example, as shown in Patent Document 2-4, a power module substrate is proposed in which an aluminum alloy member is bonded onto a ceramic substrate by a molten metal bonding method to form a circuit layer.
In such a power module substrate, a semiconductor element as a power element is mounted on a circuit layer via a solder layer and used as a power module.

  Here, in the above-mentioned power module, a cooling cycle is loaded during use. Then, the stress due to the difference in thermal expansion coefficient between the ceramic substrate and aluminum acts on the bonding interface between the ceramic substrate and the circuit layer, and there is a possibility that the bonding reliability is lowered. Therefore, conventionally, the circuit layer is made of aluminum having a relatively small deformation resistance such as 4N aluminum having a purity of 99.99% or more, and the thermal stress is absorbed by the deformation of the circuit layer, thereby improving the bonding reliability. I am trying.

JP 2005-328087 A JP 2002-329814 A JP 2005-252136 A JP 2007-092150 A

By the way, when the circuit layer is made of aluminum having a relatively low deformation resistance such as a purity of 99.99% or more (4N aluminum), undulations and wrinkles are generated on the surface of the circuit layer when a thermal cycle is applied. There was a problem such as. When waviness and wrinkles are generated on the surface of the circuit layer in this manner, the bonding with the electronic component such as a semiconductor element bonded through the solder layer becomes insufficient, and the reliability of the power module is lowered.
In particular, power modules have recently been reduced in size and thickness, and the usage environment has become harsh, and the amount of heat generated from electronic components such as semiconductor elements has increased. Therefore, undulations and wrinkles are more likely to occur on the surface of the circuit layer.

  The present invention has been made in view of the above-described circumstances, and can suppress the occurrence of waviness and wrinkles on the surface of the circuit layer during a thermal cycle load, and the bonding interface between the ceramic substrate and the circuit layer. An object of the present invention is to provide a power module substrate that can suppress the action of thermal stress on the substrate and has excellent cooling cycle reliability, a method for manufacturing the power module substrate, and a power module including the power module substrate. .

  In order to solve such problems and achieve the above-described object, the power module substrate of the present invention has a circuit layer bonded to one surface of a ceramic substrate, and an electronic component is formed on the surface of the circuit layer. A power module substrate to be mounted, wherein the circuit layer is made of a precipitation-dispersion type aluminum alloy in which precipitate particles are dispersed in an aluminum matrix, and a scanning electron in a cross section of the circuit layer. In the microscopic observation, a precipitate-deficient layer in which the abundance ratio of precipitate particles having a particle size of 0.1 μm or more is less than 3% is formed in the bonding interface portion with the ceramic substrate in the circuit layer, One surface side of the circuit layer is characterized in that the abundance ratio of precipitate particles having a particle diameter of 0.1 μm or more is 3% or more.

The particle diameter of the precipitate particles observed in the scanning electron microscope observation of the circuit layer cross section is assumed to be a reference precipitate particle having a particle diameter r having a circular cross section, and has the same area as this reference precipitate particle. Let r be the particle size of the precipitate particles.
The abundance ratio of precipitate particles is the area ratio when binarization separation processing is performed on particles that have been confirmed to contain elements constituting the precipitate particles by surface analysis or mapping of EPMA and other places. Calculate with

  According to the power module substrate of this configuration, the circuit layer is composed of a precipitation-dispersed aluminum alloy in which precipitate particles are dispersed in the aluminum matrix, and on one surface side of the circuit layer, Since the abundance ratio of precipitate particles having a particle size of 0.1 μm or more is 3% or more, one surface side portion of the circuit layer is strengthened by precipitation. Therefore, the deformation resistance of the one surface side portion of the circuit layer is increased, and it becomes possible to suppress the occurrence of swell and wrinkles during a cold cycle load. It should be noted that elements other than aluminum may be dissolved in the aluminum matrix.

  Further, in the circuit layer, a precipitate deficient layer in which the abundance ratio of precipitate particles having a particle size of 0.1 μm or more is less than 3% is formed at the bonding interface portion with the ceramic substrate. And the ceramic substrate are bonded satisfactorily. In addition, since the deformation resistance is reduced in the precipitate-deficient layer, the thermal stress caused by the difference in the thermal expansion coefficient between the ceramic substrate and the circuit layer can be relaxed by this precipitate-deficient layer, and the cooling cycle load can be reduced. The occurrence of cracks in the ceramic substrate at the time can be suppressed.

Here, it is preferable that the thickness of the precipitate deficient layer is set in a range of 2 μm or more and 50 μm or less from the bonding interface.
In this case, since the thickness of the precipitate-deficient layer from the bonding interface is 2 μm or more, the thermal stress caused by the difference in thermal expansion coefficient between the ceramic substrate and the circuit layer is reliably ensured by the precipitate-deficient layer. It is possible to improve the bonding reliability between the circuit layer and the ceramic substrate at the time of thermal cycle loading.
The thickness of the precipitate deficient layer is determined by the amount of molten metal in the molten metal region formed at the interface between the ceramic substrate and the circuit layer when the ceramic substrate and the aluminum plate to be the circuit layer are joined. The Therefore, when the thickness of the precipitate deficient layer from the bonding interface is 50 μm or less, the amount of molten metal in the molten metal region formed at the interface between the ceramic substrate and the aluminum plate serving as the circuit layer is As a result, it is possible to suppress the occurrence of stains caused by excess molten metal.

The precipitate particles preferably contain Fe and Mn.
In this case, the precipitate particles containing Fe and Mn can reliably increase the deformation resistance of one surface side portion of the circuit layer, and can suppress the occurrence of undulation and wrinkles during a cold cycle load. It becomes. Moreover, as an aluminum alloy which comprises a circuit layer, A3003 alloy etc. can be used, for example.

  The method for manufacturing a power module substrate of the present invention is a method for manufacturing a power module substrate in which a circuit layer is bonded to one surface of a ceramic substrate, and an electronic component is mounted on the surface of the circuit layer, As a metal plate for the circuit layer, an aluminum plate made of a precipitation-dispersed aluminum alloy in which precipitate particles are dispersed in an aluminum matrix is prepared, and this aluminum plate, a ceramic substrate, and a brazing material are used. A laminating step of laminating through, a heating step of pressurizing and heating the laminated aluminum plate and the ceramic substrate in a laminating direction, and forming a molten metal region at an interface between the aluminum plate and the ceramic substrate; By solidifying the molten metal region, the aluminum plate and the ceramic substrate are joined to form the circuit layer. A solidifying step to be formed, and an abundance ratio of precipitate particles having a particle size of 0.1 μm or more is formed at a bonding interface portion with the ceramic substrate in the circuit layer by the heating step and the solidifying step. It is characterized by forming a precipitate-deficient layer of less than%.

  According to the method for manufacturing a power module substrate having this configuration, in the heating step, the brazing material interposed at the interface between the aluminum plate serving as the circuit layer and the ceramic substrate is melted, so that the interface between the aluminum plate and the ceramic substrate is obtained. Since the molten metal region is formed and solidified in the solidification step, the circuit layer can be formed by joining the aluminum plate and the ceramic substrate. Further, since a molten metal region is formed in the heating process, the abundance ratio of precipitate particles having a particle size of 0.1 μm or more is set to less than 3% at the bonding interface portion with the ceramic substrate in the circuit layer. It is possible to form a precipitate-deficient layer. That is, in the heating step, the brazing material is melted and a part of the aluminum plate is also melted to form a molten metal region. At this time, precipitate particles in the aluminum plate are eluted into the molten metal region, and a precipitate-deficient layer is formed. Here, by adjusting the material and thickness of the brazing foil, the heating temperature and the heating time in the heating step, the amount of molten metal in the molten metal region changes, and the thickness of the precipitate-deficient layer is controlled.

  The power module substrate manufacturing method of the present invention is a method for manufacturing a power module substrate in which a circuit layer is bonded to one surface of a ceramic substrate, and an electronic component is mounted on the surface of the circuit layer. Then, an aluminum plate made of a precipitation-dispersed aluminum alloy in which precipitate particles are dispersed in an aluminum matrix is prepared as a metal plate to be a circuit layer, and a joining surface of the aluminum plate or a ceramic substrate is joined. A fixing step in which one or more additive elements selected from Si, Cu, Zn, Ge, Ag, Mg, Ca, Ga and Li are fixed to at least one of the surfaces to form a fixing layer; A lamination step of laminating the aluminum plate and the ceramic substrate through the fixing layer, and the laminated aluminum plate and the ceramic substrate. Pressing and heating in the layer direction to form a molten metal region at the interface between the aluminum plate and the ceramic substrate, and bonding the aluminum plate and the ceramic substrate by solidifying the molten metal region And a solidification step of forming the circuit layer, and a precipitate having a particle size of 0.1 μm or more is formed on the bonding interface portion of the circuit layer with the ceramic substrate by the heating step and the solidification step. It is characterized by forming a precipitate-deficient layer in which the abundance ratio of particles is less than 3%.

According to the method for manufacturing a power module substrate having this configuration, in the heating step, the molten metal region is formed by diffusing the additive element interposed at the interface between the aluminum plate serving as the circuit layer and the ceramic substrate to the circuit layer side. Since the molten metal region is solidified in the solidification step, the circuit layer can be formed by joining the aluminum plate and the ceramic substrate. Further, since a molten metal region is formed in the heating process, the abundance ratio of precipitate particles having a particle size of 0.1 μm or more is set to less than 3% at the bonding interface portion with the ceramic substrate in the circuit layer. It is possible to form a precipitate-deficient layer. That is, in the heating process, the additive element diffuses to the circuit layer side, so that a part of the aluminum plate is melted and a molten metal region is formed. At this time, precipitate particles in the aluminum plate are eluted into the molten metal region, and a precipitate-deficient layer is formed. Here, by adjusting the fixing amount of the additive element, the heating temperature and the heating time in the heating step, the amount of molten metal in the molten metal region changes, and the thickness of the precipitate-deficient layer is controlled.
In addition, one or more additive elements selected from Si, Cu, Zn, Ge, Ag, Mg, Ca, Ga, and Li are elements that lower the melting point of aluminum. A molten metal region can be formed at the interface between the aluminum plate and the ceramic substrate.

Here, in the fixing step, it is preferable to fix aluminum together with the additive element.
In this case, since the aluminum is fixed together with the additive element, the additive element can be securely fixed. In order to fix Al together with the additive element, the additive element and Al may be vapor-deposited simultaneously, or sputtering may be performed using an alloy of the additive element and Al as a target.

The fixing step fixes the additive element by plating, vapor deposition, CVD, sputtering, cold spray, or application of a paste or ink in which the powder containing the additive element is dispersed to form the fixing layer. It is preferable.
In this case, the additive element can be reliably fixed by plating, vapor deposition, CVD, sputtering, cold spray, or application of a paste or ink in which the powder containing the additive element is dispersed, and the above-described fixing layer is formed. be able to. In addition, it becomes possible to accurately adjust the amount of the additive element fixed.

A power module according to the present invention includes the power module substrate described above and an electronic component mounted on the power module substrate.
According to the power module of this configuration, the bonding strength between the ceramic substrate and the circuit layer is high, and no swell or wrinkle is generated on one surface of the circuit layer during the thermal cycle, and the circuit module is mounted on one surface of the circuit layer. The electronic component and the circuit layer thus formed can be reliably bonded. Therefore, even when the use environment is severe, it is possible to dramatically improve the reliability.

  According to the present invention, it is possible to suppress the occurrence of waviness and wrinkles on the surface of the circuit layer during a cold cycle load, and to suppress the application of thermal stress to the bonding interface between the ceramic substrate and the circuit layer. It is possible to provide a power module substrate having excellent cooling cycle reliability, a method for manufacturing the power module substrate, and a power module including the power module substrate.

It is a schematic explanatory drawing of the power module using the board | substrate for power modules which is the 1st Embodiment of this invention. It is explanatory drawing which shows the board | substrate for power modules which is the 1st Embodiment of this invention. It is a COMPO image by the scanning electron microscope of the circuit layer of the board | substrate for power modules which is the 1st Embodiment of this invention. It is a flowchart which shows the manufacturing method of the board | substrate for power modules which is the 1st Embodiment of this invention. It is explanatory drawing which shows the manufacturing method of the board | substrate for power modules which is the 1st Embodiment of this invention. It is explanatory drawing which shows the joining interface vicinity of the aluminum plate and ceramic substrate in FIG. It is a schematic explanatory drawing of the power module using the board | substrate for power modules which is the 2nd Embodiment of this invention. It is explanatory drawing which shows the board | substrate for power modules which is the 2nd Embodiment of this invention. It is explanatory drawing which shows the concentration distribution of the addition element of the circuit layer and metal layer of the board | substrate for power modules which is the 2nd Embodiment of this invention. It is a schematic diagram of the junction interface of the circuit layer and metal layer of a power module substrate which is the 2nd Embodiment of this invention, and a ceramic substrate. It is a flowchart which shows the manufacturing method of the board | substrate for power modules which is the 2nd Embodiment of this invention. It is explanatory drawing which shows the manufacturing method of the board | substrate for power modules which is the 2nd Embodiment of this invention. It is explanatory drawing which shows the joining interface vicinity of the aluminum plate and ceramic substrate in FIG.

Embodiments of the present invention will be described below with reference to the accompanying drawings.
FIG. 1 shows a power module 1 using a power module substrate 10 according to a first embodiment of the present invention.
The power module 1 includes a power module substrate 10 on which a circuit layer 12 is disposed, a semiconductor chip 3 bonded to the surface of the circuit layer 12 via a solder layer 2, and a heat sink 40. Here, the solder layer 2 is made of, for example, a Sn—Ag, Sn—In, or Sn—Ag—Cu solder material. In the present embodiment, a Ni plating layer (not shown) is provided between the circuit layer 12 and the solder layer 2.

  As shown in FIGS. 1 and 2, the power module substrate 10 includes a ceramic substrate 11 constituting an insulating layer and a circuit layer 12 disposed on one surface (the upper surface in FIGS. 1 and 2) of the ceramic substrate 11. And a metal layer 13 disposed on the other surface (the lower surface in FIGS. 1 and 2) of the ceramic substrate 11.

The ceramic substrate 11 prevents electrical connection between the circuit layer 12 and the metal layer 13, and is made of highly insulating Al ₂ O ₃ (alumina). In addition, the thickness of the ceramic substrate 11 is set within a range of 0.2 to 1.5 mm, and in this embodiment is set to 0.635 mm.

As shown in FIG. 5, the circuit layer 12 is formed by joining a conductive aluminum plate 22 to one surface of the ceramic substrate 11 (the upper surface in FIGS. 1, 2, and 5). .
As shown in FIG. 3, the circuit layer 12 is composed of a precipitate-dispersed aluminum alloy in which precipitate particles 12C are dispersed in an aluminum matrix. In this embodiment, the circuit layer 12 contains Fe and Mn. An aluminum plate 22 made of a rolled plate of an aluminum alloy (for example, A3003 alloy) in which precipitate particles are dispersed is formed by bonding to the ceramic substrate 11. Note that the thickness of the circuit layer 12 is set within a range of 0.1 to 1.5 mm, and is set to 0.6 mm in the present embodiment.

  As shown in FIG. 5, the metal layer 13 is formed by joining an aluminum plate 23 to the other surface (the lower surface in FIGS. 1, 2, and 5) of the ceramic substrate 11. In the present embodiment, the metal layer 13 is formed by joining an aluminum plate 23 made of a rolled plate of aluminum (so-called 4N aluminum) having a purity of 99.99% or more to the ceramic substrate 11. Note that the thickness of the metal layer 13 is set within a range of 0.1 to 1.5 mm, and is set to 0.6 mm in the present embodiment.

The heat sink 40 is for cooling the power module substrate 10 described above. As shown in FIG. 1, the heat sink 40 includes a top plate portion 41 and a flow path 42 for circulating a cooling medium (for example, cooling water). I have. The heat sink 40 (top plate portion 41) is preferably made of a material having good thermal conductivity, and is made of A6063 (aluminum alloy) in the present embodiment.
In the present embodiment, a buffer layer 15 made of aluminum, an aluminum alloy, or a composite material containing aluminum (for example, AlSiC) is provided between the top plate portion 41 of the heat sink 40 and the metal layer 13. .

Then, as shown in FIG. 2, the circuit layer 12 includes a precipitate deficient layer 12A disposed on the bonding interface side portion with the ceramic substrate 11, and a main body layer 12B laminated on the precipitate deficient layer 12A. I have.
Here, the thickness t from the bonding interface of the precipitate-deficient layer 12A is set in the range of 2 μm ≦ t ≦ 50 μm.
The main body layer 12B extends to one surface of the circuit layer 12 (that is, the mounting surface on which the semiconductor chip 3 is mounted).

  As a result of observing the cross section of the circuit layer 12 with a scanning electron microscope, as shown in FIG. 3, in the precipitate deficient layer 12 </ b> A disposed on the bonding interface 30 side portion with the ceramic substrate 11, the particle size is 0 The abundance ratio of precipitate particles 12C of 1 μm or more is less than 3%, and the abundance ratio of precipitate particles 12C having a particle diameter of 0.1 μm or more is 3% or more in the main body layer 12B. That is, the precipitate deficient layer 12A and the main body layer 12B are different in the dispersion state of the precipitate particles 12C having a particle diameter of 0.1 μm or more.

The particle diameter of the precipitate particles 12C observed in the scanning electron microscope observation of the cross section of the circuit layer 12 is assumed to be a reference precipitate particle having a particle diameter r having a circular cross section, and is equivalent to this reference precipitate particle. The particle size of the precipitate particles 12C having an area was defined as r.
In addition, the abundance ratio of the precipitate particles 12C was calculated by an area ratio when binarization separation processing was performed on particles that were confirmed to contain Fe and Mn by surface analysis or mapping of EPMA and other locations. .

  Below, the manufacturing method of the board | substrate 10 for power modules of the above-mentioned structure is demonstrated with reference to FIGS.

(Lamination process S01)
First, as shown in FIGS. 4 and 5, an aluminum plate 22 (A3003 alloy rolled plate) serving as the circuit layer 12 is formed on one surface side of the ceramic substrate 11 with a thickness of 5 to 50 μm (14 μm in this embodiment). The aluminum plate 23 (4N aluminum rolled plate) to be the metal layer 13 is laminated on the other surface side of the ceramic substrate 11 with a thickness of 5 to 50 μm (14 μm in this embodiment). Is laminated via a brazing filler metal foil 25.
In the present embodiment, the brazing material foils 24 and 25 are Al—Si based brazing materials (Al—7.5 mass% Si) containing Si that is a melting point lowering element.

(Heating step S02)
Next, the laminated body formed in the laminating step S01 is charged in a heating furnace in a state of being pressurized (pressure 1 to 35 kgf / cm ² ) in the laminating direction and heated. By this heating step S02, the brazing material foils 24, 25 and a part of the aluminum plates 22, 23 are melted, and as shown in FIG. 6, molten metal regions are respectively formed at the interfaces between the aluminum plates 22, 23 and the ceramic substrate 11. 26 and 27 are formed. Here, the heating temperature is 550 ° C. or more and 650 ° C. or less, and the heating time is 30 minutes or more and 180 minutes or less.
In the heating step S02, the brazing filler metal foil 24 is melted and a part of the aluminum plate 22 is also melted, so that a molten metal region 26 is formed. At this time, the precipitate particles 12C in the aluminum plate 22 are eluted into the molten metal region 26, and the above-described precipitate deficient layer 12A is formed.

(Coagulation step S03)
Next, the molten metal regions 26 and 27 are solidified by cooling the laminate, and the ceramic substrate 11 and the aluminum plates 22 and 23 are joined. At this time, the melting point lowering element (Si) contained in the brazing material foils 24 and 25 diffuses toward the aluminum plates 22 and 23 side.
In this manner, the aluminum plates 22 and 23 to be the circuit layer 12 and the metal layer 13 and the ceramic substrate 11 are joined, and the power module substrate 10 according to the present embodiment is manufactured.

  Then, the heat sink 40 is joined to the other surface side of the metal layer 13 of the power module substrate 10 via the buffer layer 15 by brazing or the like to form a power module substrate with a heat sink. Further, the power module 1 according to the present embodiment is produced by mounting the semiconductor chip 3 on the surface of the circuit layer 12 via the solder layer 2.

In the power module substrate 10 according to the present embodiment configured as described above, the circuit layer 12 has an aluminum plate 22 made of a precipitation-dispersed aluminum alloy in which precipitate particles are dispersed in an aluminum matrix. In one surface side of the circuit layer 12 (that is, the mounting surface on which the semiconductor chip 3 is mounted), the abundance ratio of the precipitate particles 12C having a particle diameter of 0.1 μm or more is 3 Since the main body layer 12 </ b> B having a ratio of at least% is provided, one surface side portion of the circuit layer 12 is precipitation strengthened.
Therefore, the deformation resistance of the one surface side portion of the circuit layer 12 is increased, and it is possible to suppress the occurrence of swell and wrinkles during a cold cycle load. Therefore, it is possible to greatly improve the bonding reliability between the semiconductor chip 3 mounted on one surface and the circuit layer 12.

  In addition, a precipitate deficient layer 12A in which the abundance ratio of the precipitate particles 12C having a particle size of 0.1 μm or more is less than 3% is formed at the bonding interface portion with the ceramic substrate 11 in the circuit layer 12. Thus, the circuit layer 12 and the ceramic substrate 11 are bonded satisfactorily. Further, in the precipitate deficient layer 12A, the amount of precipitate particles 12C dispersed is small and the deformation resistance is small, so that the thermal stress caused by the difference in thermal expansion coefficient between the ceramic substrate 11 and the circuit layer 12 is applied to the precipitate. It can be mitigated by the deficient layer 12A, and the generation of cracks in the ceramic substrate 11 during a cooling cycle load can be suppressed.

Furthermore, in this embodiment, since the thickness t from the bonding interface of the precipitate deficient layer 12A is t ≧ 2 μm, the thermal stress caused by the difference in the thermal expansion coefficient between the ceramic substrate 11 and the circuit layer 12 Can be reliably relaxed by the precipitate-deficient layer 12A, and the bonding reliability between the circuit layer 12 and the ceramic substrate 11 at the time of a cold cycle load can be improved.
The thickness of the precipitate deficient layer 12 </ b> A is determined by the amount of molten metal in the molten metal region 26 formed at the interface between the ceramic substrate 11 and the circuit layer 12. Therefore, by setting the thickness t from the bonding interface of the precipitate deficient layer 12A to t ≦ 50 μm, the melting in the molten metal region 26 formed at the interface between the ceramic substrate 11 and the aluminum plate 22 serving as the circuit layer 12 is achieved. The amount of metal will be suppressed, and the occurrence of stains due to excess molten metal can be suppressed.

  In the present embodiment, the circuit layer 12 is made of an aluminum alloy (for example, A3003 alloy) in which precipitate particles 12C containing Fe and Mn are dispersed. Deformation resistance can be reliably increased, and it is possible to suppress the occurrence of waviness and wrinkles during a cold cycle load.

  Further, according to the method for manufacturing the power module substrate 10 according to the present embodiment, the brazing material 24 interposed at the interface between the aluminum plate 22 to be the circuit layer 12 and the ceramic substrate 11 is melted in the heating step S02. By forming a molten metal region 26 at the interface between the aluminum plate 22 and the ceramic substrate 11 and melting the brazing material 25 interposed at the interface between the aluminum plate 23 to be the metal layer 13 and the ceramic substrate 11, aluminum Since the molten metal region 27 is formed at the interface between the plate 23 and the ceramic substrate 11 and these molten metal regions 26 and 27 are solidified in the solidification step S03, the aluminum plates 22 and 23 and the ceramic substrate 11 are joined. Thus, the power module substrate 10 according to the present embodiment is produced.

  Further, in the heating step S02, by forming a molten metal region 26 at the interface between the aluminum plate 22 and the ceramic substrate 11, a particle diameter of 0.1 μm or more is formed at the bonding interface portion of the circuit layer 12 with the ceramic substrate 11. It is possible to form the precipitate deficient layer 12A in which the abundance ratio of the precipitate particles 12C is less than 3%. Here, by adjusting the material and thickness of the brazing foil 24, the heating temperature and the heating time in the heating step S02, the amount of molten metal in the molten metal region 26 changes, and the thickness of the precipitate-deficient layer 12A is controlled. It becomes possible to do.

Next, a second embodiment of the present invention will be described with reference to FIGS.
The power module 101 includes a power module substrate 110 on which a circuit layer 112 is disposed, a semiconductor chip 3 bonded to the surface of the circuit layer 112 via a solder layer 2, and a heat sink 140. Here, the solder layer 2 is made of, for example, a Sn—Ag, Sn—In, or Sn—Ag—Cu solder material. In the present embodiment, a Ni plating layer (not shown) is provided between the circuit layer 112 and the solder layer 2.

The power module substrate 110 includes a ceramic substrate 111, a circuit layer 112 disposed on one surface of the ceramic substrate 111 (upper surface in FIG. 7), and the other surface (lower surface in FIG. 7) of the ceramic substrate 111. And a disposed metal layer 113.
The ceramic substrate 111 prevents electrical connection between the circuit layer 112 and the metal layer 113. In the present embodiment, the ceramic substrate 111 is made of highly insulating AlN (aluminum nitride). Further, the thickness of the ceramic substrate 111 is set in a range of 0.2 to 0.8 mm, and in this embodiment, is set to 0.635 mm.

As shown in FIG. 12, the circuit layer 112 is formed by bonding a conductive aluminum plate 122 to one surface of the ceramic substrate 111.
The circuit layer 112 is made of a precipitate-dispersed aluminum alloy in which precipitate particles are dispersed in an aluminum matrix. In this embodiment, aluminum in which precipitate particles containing Fe and Mn are dispersed. An aluminum plate 122 made of a rolled plate of an alloy (for example, A3003 alloy) is joined to the ceramic substrate 111. Note that the thickness of the circuit layer 112 is set within a range of 0.1 to 1.5 mm, and is set to 0.4 mm in the present embodiment.

  The metal layer 113 is formed by bonding an aluminum plate 123 to the other surface of the ceramic substrate 111. In the present embodiment, the metal layer 113 is formed by joining an aluminum plate 123 made of a rolled plate of aluminum (4N aluminum) having a purity of 99.99% or more to the ceramic substrate 111. In addition, the thickness of the metal layer 112 is set within a range of 0.1 to 5.0 mm, and is set to 2.0 mm in the present embodiment.

  The heat sink 140 is for cooling the power module substrate 110 described above. As shown in FIG. 7, the heat sink 140 includes a top plate portion 141 and a flow path 142 for circulating a cooling medium (for example, cooling water). I have. The heat sink 140 (top plate portion 141) is preferably made of a material having good thermal conductivity, and in this embodiment, is made of A6063 (aluminum alloy).

Then, as shown in FIG. 8, the circuit layer 112 includes a precipitate deficient layer 112A disposed on the bonding interface side portion with the ceramic substrate 111, and a main body layer 112B laminated on the precipitate deficient layer 112A. I have.
Here, the thickness t from the bonding interface of the precipitate deficient layer 112A is set in a range of 2 μm ≦ t ≦ 50 μm.
The main body layer 112B extends to one surface of the circuit layer 112 (that is, the mounting surface on which the semiconductor chip 3 is mounted).

  As a result of observing the cross section of the circuit layer 112 with a scanning electron microscope, in the precipitate deficient layer 112A disposed on the bonding interface side portion with the ceramic substrate 111, precipitate particles having a particle size of 0.1 μm or more are observed. The abundance ratio is less than 3%, and in the main body layer 112B, the abundance ratio of precipitate particles having a particle diameter of 0.1 μm or more is 3% or more. That is, the precipitate deficient layer 112A and the main body layer 112B are different in the dispersion state of the precipitate particles having a particle diameter of 0.1 μm or more.

The particle diameter of the precipitate particles observed by a scanning electron microscope for the cross section of the circuit layer 112 is assumed to be a reference precipitate particle having a particle diameter r having a circular cross section, and has an area equivalent to that of the reference precipitate particle. The particle size of the precipitate particles was r.
In addition, the abundance ratio of the precipitate particles was calculated as an area ratio when binarization separation processing was performed on particles that have been confirmed to contain Fe and Mn by surface analysis or mapping of EPMA and other locations.

In this embodiment, at the bonding interface 130 between the ceramic substrate 111, the circuit layer 112 (aluminum plate 122), and the metal layer 113 (aluminum plate 123), the circuit layer 112 (aluminum plate 122) and the metal layer 113 (aluminum). One or more additive elements selected from Si, Cu, Zn, Ge, Ag, Mg, Ca, Ga, and Li are dissolved in the plate 123).
In the vicinity of the bonding interface 130 between the circuit layer 112 and the metal layer 113, a concentration gradient layer 133 is formed in which the concentration of the additive element gradually decreases as the distance from the bonding interface 130 in the stacking direction is increased. Here, the total concentration of additive elements in the vicinity of the bonding interface 130 between the circuit layer 112 and the metal layer 113 is set within a range of 0.01 mass% or more and 5 mass% or less.

The concentration of the additive element in the vicinity of the bonding interface 130 between the circuit layer 112 and the metal layer 113 is an average value measured at 5 points from the bonding interface 130 by EPMA analysis (spot diameter 30 μm). Further, the graph of FIG. 9 is obtained by performing line analysis in the stacking direction in the central portion of the circuit layer 112 (aluminum plate 122) and the metal layer 113 (aluminum plate 123), and obtaining the concentration at the above-mentioned 50 μm position as a reference. It is.
Here, in this embodiment, Cu is used as an additive element, and the Cu concentration in the vicinity of the bonding interface 130 between the circuit layer 112 and the metal layer 113 is set to 0.01 mass% or more and 5 mass% or less.

  When the bonding interface 130 between the ceramic substrate 111 and the circuit layer 112 (aluminum plate 122) and the metal layer 113 (aluminum plate 123) is observed with a transmission electron microscope, as shown in FIG. An additive element high concentration portion 132 in which the additive element (Cu) is concentrated is formed. In the additive element high concentration portion 132, the additive element concentration (Cu concentration) is twice the additive element concentration (Cu concentration) in the circuit layer 112 (aluminum plate 122) and the metal layer 113 (aluminum plate 123). That's it. The thickness H of the additive element high concentration portion 132 is 4 nm or less.

  Note that, as shown in FIG. 10, the bonding interface 130 observed here is a lattice image of the ceramic substrate 111 and the interface side end of the lattice image of the circuit layer 112 (aluminum plate 122) and the metal layer 113 (aluminum plate 123). The reference plane S is the center between the end of the bonding interface side. The concentration (Cu concentration) of the additive element in the circuit layer 112 (aluminum plate 122) and the metal layer 113 (aluminum plate 123) is the same as that of the circuit layer 112 (aluminum plate 122) and the metal layer 113 (aluminum plate 123). Among these, it is the concentration (Cu concentration) of the additive element in a portion away from the bonding interface 130 by a certain distance (in this embodiment, 5 nm or more).

  The mass ratio of Al, additive element (Cu), O, and N when the bonding interface 130 is analyzed by energy dispersive X-ray analysis (EDS) is Al: additive element (Cu): O: N = It is set in the range of 50 to 90% by mass: 1 to 30% by mass: 1 to 10% by mass: 25% by mass or less. In addition, the spot diameter at the time of performing the analysis by EDS is 1 to 4 nm, the bonding interface 130 is measured at a plurality of points (for example, 20 points in the present embodiment), and the average value is calculated. Further, the bonding interface 130 between the crystal grain boundary of the aluminum plates 122 and 123 constituting the circuit layer 112 and the metal layer 113 and the ceramic substrate 111 is not a measurement target, and the aluminum plate 122 constituting the circuit layer 112 and the metal layer 113, Only the bonding interface 130 between the crystal grains 123 and the ceramic substrate 111 is set as a measurement target.

  The analytical value obtained by the energy dispersive X-ray analysis method in this specification is the energy dispersive X-ray fluorescence element analyzer NORAN manufactured by Thermo Fisher Scientific Co., Ltd. mounted on the electron microscope JEM-2010F manufactured by JEOL. The acceleration was performed at 200 kV using System7.

  Below, the manufacturing method of the board | substrate 110 for power modules of the above-mentioned structure is demonstrated with reference to FIGS.

(Fixing step S11)
First, as shown in FIGS. 11 and 12, sputtering is performed on the bonding surface of the aluminum plate 122 to be the circuit layer 112 with the ceramic substrate 111 and the bonding surface of the aluminum plate 123 to be the metal layer 113 with the ceramic substrate 111. One or more additive elements selected from Si, Cu, Zn, Ge, Ag, Mg, Ca, Ga and Li are fixed to form the fixed layers 124 and 125. At this time, the amount of added elements in the fixed layers 124 and 125 is set in the range of 0.01 mg / cm ^{2 to} 10 mg / cm ² .
In this embodiment, Cu is used as an additive element, and the additive element amount (Cu amount) in the fixed layers 124 and 125 is set to 0.08 mg / cm ² or more and 2.7 mg / cm ² or less.
Furthermore, in this embodiment, the fixing layer 126 is formed by fixing Cu to the joint surface of the aluminum plate 123 with the top plate portion 141 of the heat sink 140.

(Lamination process S12)
Next, the aluminum plate 122 is laminated on one surface side of the ceramic substrate 111, and the aluminum plate 123 is laminated on the other surface side of the ceramic substrate 111. At this time, as shown in FIG. 12, the aluminum plates 122 and 123 are laminated so that the surfaces on which the fixing layers 124 and 125 are formed face the ceramic substrate 111. That is, the fixing layers 124 and 125 are interposed between the aluminum plates 122 and 123 and the ceramic substrate 111.
Furthermore, in this embodiment, the top plate portion 141 is laminated on the other surface side of the aluminum plate 123 via the fixing layer 126.

(Heating step S13)
Next, the aluminum plate 122, the ceramic substrate 111, the aluminum plate 123, and the top plate portion 141 laminated in the lamination step S12 are pressed in the lamination direction (pressure 1 to 35 kgf / cm ² ) in the heating furnace. As shown in FIG. 13, the molten metal regions 127 and 128 are formed at the interfaces between the aluminum plates 122 and 123 and the ceramic substrate 111, respectively. In these molten metal regions 127 and 128, the Cu concentration in the vicinity of the fixing layers 124 and 125 of the aluminum plates 122 and 123 increases due to the diffusion of Cu in the fixing layers 124 and 125 toward the aluminum plates 122 and 123, so that the melting point is increased. It is formed by lowering. Similarly, the Cu of the fixing layer 126 diffuses toward the aluminum plate 123 and the top plate portion 141, so that a molten metal region is also formed at the interface between the aluminum plate 123 and the top plate portion 141.
In this heating step S13, the precipitate particles in the aluminum plate 122 are eluted into the molten metal region 127, and the above-described precipitate deficient layer 112A is formed.

(Coagulation step S14)
Next, the temperature is kept constant while the molten metal regions 127 and 128 are formed. Then, Cu in the molten metal regions 127 and 128 further diffuses toward the aluminum plates 122 and 123 side. As a result, the Cu concentration in the portions of the molten metal regions 127 and 128 gradually decreases and the melting point increases, and solidification proceeds while the temperature is kept constant. That is, the ceramic substrate 111 and the aluminum plates 122 and 123 are bonded by so-called isothermal diffusion bonding (Transient Liquid Phase Diffusion Bonding). After solidification progresses in this way, cooling is performed to room temperature.
Similarly, solidification proceeds as Cu in the molten metal region formed between the aluminum plate 123 and the top plate portion 141 diffuses toward the aluminum plate 123 and the top plate portion 141. become.

  In this manner, the aluminum plates 122 and 123 to be the circuit layer 112 and the metal layer 113 and the ceramic substrate 111 are bonded together, and the power module substrate 110 according to this embodiment is manufactured. Further, the aluminum plate 123 and the top plate portion 141 are joined together to constitute a power module with a heat sink. That is, in the present embodiment, the formation of the power module substrate 110 and the bonding of the heat sink 140 are performed simultaneously.

  In the power module substrate 110 and the power module 101 according to the present embodiment configured as described above, the circuit layer 112 includes precipitate particles in the aluminum matrix as in the first embodiment described above. The aluminum plate 122 made of a precipitation-dispersed aluminum alloy in which is dispersed is bonded, and the particle size is formed on one surface side of the circuit layer 112 (that is, the mounting surface on which the semiconductor chip 3 is mounted). Since the main body layer 112B in which the abundance ratio of the precipitate particles of 0.1 μm or more is 3% or more is provided, one surface side portion of the circuit layer 112 is strengthened by precipitation, and the thermal cycle It is possible to suppress the occurrence of swells and wrinkles during loading.

  In addition, since the precipitate deficient layer 112A in which the abundance ratio of precipitate particles having a particle size of 0.1 μm or more is less than 3% is formed in the bonding interface portion with the ceramic substrate 111 in the circuit layer 112, the ceramics Thermal stress caused by the difference in thermal expansion coefficient between the substrate 111 and the circuit layer 112 can be relieved by the precipitate-deficient layer 112A, and the occurrence of cracks in the ceramic substrate 111 during a cooling / heating cycle load can be suppressed. .

  Furthermore, at the bonding interface 130 between the circuit layer 112 and the metal layer 113 and the ceramic substrate 111, one or more of Si, Cu, Zn, Ge, Ag, Mg, Ca, Ga, and Li are used. The additive element is in solid solution, and in this embodiment, since Cu is dissolved as the additive element, the bonding interface 130 side portion between the circuit layer 112 and the metal layer 113 and the ceramic substrate 111 is solid solution strengthened. Thus, the breakage at the circuit layer 112 and the metal layer 113 can be prevented.

  Here, the concentration of the additive element in the vicinity of the bonding interface 130 (Cu concentration in the present embodiment) of the circuit layer 112 and the metal layer 113 is set within a range of 0.01% by mass or more and 5% by mass or less. It is possible to prevent the strength in the vicinity of the bonding interface 130 between the circuit layer 112 and the metal layer 113 from being excessively increased, and when the power module substrate 110 is subjected to a thermal cycle, the thermal stress is applied to the circuit layer 112 and the metal layer 113. And the occurrence of cracks in the ceramic substrate 111 can be suppressed.

  In addition, at the junction interface 130 between the circuit layer 112 and the metal layer 113 and the ceramic substrate 111, one or more of Si, Cu, Zn, Ge, Ag, Mg, Ca, Ga, and Li are used. Since the additive element high-concentration portion 132 in which the concentration of the additive element (Cu concentration in this embodiment) is twice or more the concentration of the additive element in the circuit layer 112 and the metal layer 113 is formed, the vicinity of the interface It is possible to improve the bonding strength between the circuit layer 112 and the metal layer 113 and the ceramic substrate 111 by the additive element atoms (Cu atoms) present in the substrate.

  Further, when the mass ratio of Al, additive element (Cu), and O analyzed by the energy dispersive X-ray analysis of the bonding interface 130 including the high concentration part 132 of the additive element is analyzed, Al, additive element (Cu), The mass ratio of O and N is set within a range of Al: addition element (Cu): O: N = 50 to 90 mass%: 1 to 30 mass%: 1 to 10 mass%: 25 mass% or less. Therefore, a reaction product of Al and the additive element (Cu) is not generated excessively, and the circuit layer 112 and the metal layer 113 and the ceramic substrate 111 can be bonded satisfactorily. In addition, the vicinity of the bonding interface 130 between the circuit layer 112 and the metal layer 113 is not strengthened more than necessary by this reactant, and it becomes possible to absorb the thermal stress without fail, and the ceramic substrate 111 at the time of the thermal cycle load. Generation of cracks can be suppressed.

  Further, according to the method for manufacturing the power module substrate 110 according to the present embodiment, in the heating step S13, the additive element (Cu) interposed in the interface between the aluminum plate 122 serving as the circuit layer 112 and the ceramic substrate 111 is used as the circuit. Since the molten metal region 127 is formed by diffusing to the layer 112 side, and the molten metal region 127 is solidified in the solidification step S14, the circuit layer 112 is formed by bonding the aluminum plate 122 and the ceramic substrate 111. Can be formed. Further, when the molten metal region 127 is formed in the heating step S13, the abundance ratio of precipitate particles having a particle size of 0.1 μm or more is less than 3% in the bonding interface 130 portion of the circuit layer 112 with the ceramic substrate 111. It is possible to form the precipitate-deficient layer 112A. That is, in the heating step S <b> 13, the additive element (Cu) diffuses toward the circuit layer 112, so that a part of the aluminum plate 122 is melted and a molten metal region 127 is formed. At this time, the precipitate particles in the aluminum plate 122 are eluted into the molten metal region 127, and the precipitate-deficient layer 112A is formed. Here, by adjusting the fixing amount of the additive element (Cu), the heating temperature and the heating time in the heating step S13, the molten metal amount in the molten metal region 127 changes, and the thickness of the precipitate deficient layer 112A is controlled. It becomes possible.

  In addition, one or more additive elements selected from Si, Cu, Zn, Ge, Ag, Mg, Ca, Ga, and Li are elements that lower the melting point of aluminum. The molten metal region 127 can be formed at the interface between the aluminum plate 122 and the ceramic substrate 111.

In addition, in the fixing step S11, since the additive element (Cu) is fixed by sputtering, the additive element (Cu) can be reliably disposed between the aluminum plate 122 and the ceramic substrate 111. And the ceramic substrate 111 can be reliably bonded. In addition, the amount of the additive element (Cu) fixed can be accurately adjusted, and the thickness of the precipitate deficient layer 112A can be controlled.

As mentioned above, although embodiment of this invention was described, this invention is not limited to this, It can change suitably in the range which does not deviate from the technical idea of the invention.
For example, the circuit layer has been described as being composed of a precipitation-dispersed aluminum alloy (A3003 alloy) in which the precipitate particles contain Fe and Mn. The circuit layer may be made of an aluminum alloy.

Also, as the ceramic _substrate, has been described by way of Al ₂ O 3, AlN example, it is not limited to this and may be another ceramic substrate, such as _Si 3 _{N 4.}
In the second embodiment, when AlN is used as the ceramic substrate, the mass of Al, additive elements (Cu), O, and N when the bonding interface is analyzed by energy dispersive X-ray analysis (EDS). Although the ratio has been described as being set within a range of Al: addition element (Cu): O: N = 50 to 90 mass%: 1 to 30 mass%: 1 to 10 mass%: 25 mass% or less. For example, when Al ₂ O ₃ is used as the ceramic substrate, the mass ratio of Al, additive element (Cu), and O is Al: additive element (Cu): O = 50 to 90 mass%: 1 to 30 mass. %: It is preferably set within a range of 45% by mass or less.

Here, if the mass ratio of the additive element atoms present at the bonding interface exceeds 30% by mass, a reaction product of Al and the additive element is excessively generated, and this reaction product may inhibit the bonding. is there. In addition, the vicinity of the bonding interface of the aluminum plate is strengthened more than necessary by this reaction product, and stress may act on the ceramic substrate during a thermal cycle load, and the ceramic substrate may be broken. On the other hand, if the mass ratio of the additive element atoms is less than 1% by mass, it may not be possible to sufficiently improve the bonding strength due to the additive element atoms.
From the above, it is preferable that the mass ratio of the additive element atoms at the bonding interface be in the range of 1 to 30% by mass.

  Further, in the fixing step, the additive element may be fixed together with Al. In this case, even an easily oxidizable element such as Ca and Li can be securely fixed. In order to fix Al together with the additive element, the additive element and Al may be vapor-deposited simultaneously, or sputtering may be performed using an alloy of the additive element and Al as a target.

  Further, the structure of the heat sink is not particularly limited, and heat sinks having various configurations can be used. For example, it may have corrugated fins, or may have radiating fins standing upright.

  A comparative experiment conducted to confirm the effectiveness of the present invention will be described.

(Invention Example 1)
First, on a ceramic substrate made of AlN having a thickness of 0.635 mm, an aluminum plate made of A3003 alloy having a thickness of 0.6 mm as a circuit layer, and an aluminum plate made of 4N aluminum having a thickness of 0.6 mm as a metal layer. Then, bonding was performed using an Al—Si based brazing material (Al—7.5 mass% Si) to produce a power module substrate.
The thickness of the brazing material foil was 14 μm, the pressing condition was 3.0 kgf / cm ² , the heating temperature was 625 ° C., the heating time was 30 minutes, and the heating atmosphere was vacuum.

(Invention Example 2)
A ceramic substrate made of AlN having a thickness of 0.635 mm, an aluminum plate made of A3003 alloy having a thickness of 0.6 mm as a circuit layer, and an aluminum plate made of 4N aluminum having a thickness of 0.6 mm as a metal layer, As in the second embodiment, the additive element was fixed and TLP bonded to produce a power module substrate.
Note that Cu was used as an additive element, the amount of Cu fixed was 0.9 mg / cm ² , the pressurization condition was 5.0 kgf / cm ² , the heating temperature was 610 ° C., the heating time (holding time) was 30 minutes, and the heating atmosphere was vacuumed It was.

(Comparative Example 1)
To a ceramic substrate made of AlN having a thickness of 0.635 mm, an aluminum plate made of 4N aluminum having a thickness of 0.6 mm as a circuit layer and an aluminum plate made of 4N aluminum having a thickness of 0.6 mm as a metal layer are made of Al. Bonding was performed using a -Si based brazing material (Al-7.5 mass% Si) to produce a power module substrate.
The thickness of the brazing material foil was 14 μm, the pressing condition was 3.0 kgf / cm ² , the heating temperature was 625 ° C., the heating time was 30 minutes, and the heating atmosphere was vacuum.

(Comparative Example 2)
A ceramic substrate made of AlN having a thickness of 0.635 mm is provided with an aluminum plate made of 4N aluminum having a thickness of 0.6 mm as a circuit layer and an aluminum plate made of 4N aluminum having a thickness of 0.6 mm as a metal layer. As in the second embodiment, the additive element was fixed and TLP bonded to produce a power module substrate.
Note that Cu was used as an additive element, the amount of Cu fixed was 0.9 mg / cm ² , the pressurization condition was 5.0 kgf / cm ² , the heating temperature was 610 ° C., the heating time (holding time) was 30 minutes, and the heating atmosphere was vacuumed It was.

And the thermal cycle test was implemented using these test pieces. Specifically, after repeating the cooling cycle (−45 ° C.-125 ° C.) 2000 times, the test piece was observed, and the undulation state on the surface of the circuit layer and the bonding rate between the ceramic substrate and the circuit layer were evaluated. The results are shown in Table 1.
As for the waviness, a cone having a spherical tip with a radius of 2 μm and a taper angle of 90 ° is used as a stylus, and the distance of 2.5 (mm / reference length) × 5 section is applied with a load of 4 mN and speed The surface was scanned at 1 mm / s to measure the average roughness curve, and the ten-point average roughness Rz (JIS B0601-1994) was calculated.
Moreover, the joining rate was computed with the following formula | equation. Here, “initial bonding area” is an area to be bonded before bonding.
Bonding rate = (initial bonding area-peeling area) / initial bonding area

Further, the thickness of the precipitate defect layer in the circuit layer and the average particle size of the precipitate were evaluated.
The thickness of the precipitate-deficient layer in this specification is the brightness of Adobe Photoshop CS2 (manufactured by Adobe Systems Incorporated), which is a cross section of the samples of Invention Examples 1 and 2 and Comparative Examples 1 and 2 observed with a scanning electron microscope. In the image or photograph analyzed using the contrast command, the average distance between the boundary of the image contrast generated near the precipitate closest to the ceramic substrate and the metal / ceramic interface was defined.
Also,

The brightness and contrast of the observed images and photographs were varied. Then, in the sample in which the precipitate deficient layer exists, a contrast boundary is observed between the precipitate deficient layer and the precipitate non-deficient layer. Therefore, in this specification, the distance between the contrast boundary and the metal / ceramic interface is defined as the thickness of the precipitate-deficient layer.
In addition, the average particle size of the precipitates in the present specification is as follows in a certain region of images and photographs obtained by observing the cross sections of the samples of Examples 1 and 2 and Comparative Examples 1 and 2 of the present invention with a scanning electron microscope. It was defined by the formula of
(Average particle size of the precipitate) = (A / B / π) ^0.5
A = (Area ratio of precipitate particles having a particle size of 0.1 μm or more in the observation region) × Area of observation region B = (Number of precipitate particles having a particle size of 0.1 μm or more present in the observation region)
π: Pi ratio

In Comparative Examples 1 and 2, undulation was confirmed on the surface of the circuit layer although the bonding rate was high.
On the other hand, in Examples 1 and 2 of the present invention in which the circuit layer was composed of the A3003 alloy, the undulation on the surface of the circuit layer was suppressed and the joining rate was high.
Moreover, in Invention Examples 1 and 2, it was confirmed that a precipitate-deficient layer was formed in the circuit layer.

1, 101 Power module 3 Semiconductor chip (electronic component)
10, 110 Power module substrate 11, 111 Ceramic substrate 12, 112 Circuit layer 12A, 112A Precipitate deficient layer 12C Precipitate particle 22, 122 Aluminum plate 23, 123 Aluminum plate 24 Brazing material foil 26 Molten metal region 124 Adhering layer 127 Molten metal area

Claims (8)

A power module substrate in which a circuit layer is bonded to one surface of a ceramic substrate, and an electronic component is mounted on the surface of the circuit layer,
The circuit layer is made of a precipitate-dispersed aluminum alloy in which precipitate particles are dispersed in an aluminum matrix,
In the scanning electron microscope observation of the cross section of the circuit layer, precipitation in which the abundance ratio of precipitate particles having a particle size of 0.1 μm or more is less than 3% at the bonding interface portion with the ceramic substrate in the circuit layer A deficiency layer is formed,
The power module substrate, wherein the presence ratio of precipitate particles having a particle size of 0.1 μm or more is set to 3% or more on one surface side of the circuit layer.   2. The power module substrate according to claim 1, wherein the precipitate-deficient layer has a thickness from the bonding interface set in a range of 2 μm to 50 μm.   The power module substrate according to claim 1, wherein the precipitate particles contain Fe and Mn. A method of manufacturing a power module substrate, wherein a circuit layer is bonded to one surface of a ceramic substrate, and an electronic component is mounted on the surface of the circuit layer,
As a metal plate for the circuit layer, an aluminum plate made of a precipitation-dispersed aluminum alloy in which precipitate particles are dispersed in an aluminum matrix is prepared, and this aluminum plate, a ceramic substrate, and a brazing material are used. A laminating process of laminating through,
Heating and pressing the laminated aluminum plate and the ceramic substrate in the laminating direction and forming a molten metal region at an interface between the aluminum plate and the ceramic substrate;
A solidification step of solidifying the molten metal region to form the circuit layer by joining the aluminum plate and the ceramic substrate;
By the heating step and the solidifying step, a precipitate-deficient layer in which the abundance ratio of precipitate particles having a particle size of 0.1 μm or more is less than 3% is formed at the bonding interface portion with the ceramic substrate in the circuit layer. A method for manufacturing a power module substrate. A method of manufacturing a power module substrate, wherein a circuit layer is bonded to one surface of a ceramic substrate, and an electronic component is mounted on the surface of the circuit layer,
As a metal plate to be a circuit layer, an aluminum plate made of a precipitation-dispersed aluminum alloy in which precipitate particles are dispersed in an aluminum matrix is prepared, and the bonding surface of the aluminum plate or the bonding surface of the ceramic substrate is prepared. An adhering step of adhering one or more additional elements selected from Si, Cu, Zn, Ge, Ag, Mg, Ca, Ga and Li to at least one of them to form an adhering layer;
A laminating step of laminating the aluminum plate and the ceramic substrate through the fixing layer,
Heating and pressing the laminated aluminum plate and the ceramic substrate in the laminating direction and forming a molten metal region at an interface between the aluminum plate and the ceramic substrate;
A solidification step of solidifying the molten metal region to form the circuit layer by joining the aluminum plate and the ceramic substrate;
By the heating step and the solidifying step, a precipitate-deficient layer in which the abundance ratio of precipitate particles having a particle size of 0.1 μm or more is less than 3% is formed at the bonding interface portion with the ceramic substrate in the circuit layer. A method for manufacturing a power module substrate.   6. The method for manufacturing a power module substrate according to claim 5, wherein in the fixing step, aluminum is fixed together with the additive element.   In the fixing step, the additional element is fixed by plating, vapor deposition, CVD, sputtering, cold spray, or application of a paste or ink in which powder containing the additional element is dispersed to form the fixed layer. The manufacturing method of the board | substrate for power modules of Claim 5 or Claim 6 characterized by the above-mentioned.   A power module comprising: the power module substrate according to any one of claims 1 to 3; and an electronic component mounted on a surface of the circuit layer.