JP2012059097A - Reference voltage generation circuit, and power supply device using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To generate a reference voltage which has no temperature dependence.SOLUTION: A reference voltage generation circuit includes two perfect depletion type SOI-MOSFETs, MN1, MN2, which have different threshold voltages each other due to differences only between film thicknesses of SOI layers. In the MN1, MN2, each source and each body are grounded, gates and drains are connected to constant current sources CCS1, CCS2 and input terminals of voltage follower circuits Amp1-1, Amp1-2, respectively, and first resistors R1-1, R1-2 and second resistors R2-1, R2-2 are connected in series to output terminals of the voltage follower circuits Amp1-1, Amp1-2, respectively. The second resistor R2-1 is grounded, and a terminal between the first resistor R1-1 and the second resistor R2-1 is connected to a non-inverting input terminal of a differential amplifier Amp2. The second resistor R2-2 is connected to an output terminal of the differential amplifier Amp2, and a terminal between the first resistor R1-2 and the second resistor R2-2 is connected to an inverting input terminal of the differential amplifier Amp2. An output voltage of the differential amplifier Amp2 is output as a reference voltage Vref.

Description

  The present invention relates to a reference voltage generation circuit and a power supply device using the reference voltage generation circuit.

  For example, a power supply device such as a constant voltage generation circuit (voltage regulator circuit) requires a reference voltage generation circuit to generate a constant output voltage regardless of the power supply voltage. That is, even if the power supply voltage VDD fluctuates, the output voltage fluctuation is compared with the reference voltage, and the driver transistor is controlled by the error amplifier, so that the output voltage is kept constant.

  As a commonly used reference voltage generation circuit, there is an ED type reference voltage generation circuit including an enhancement type MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and a depletion type MOSFET, and using the depletion type MOSFET as a current source (for example, Patent Documents) See 1, 2, 3).

  Since the reference voltage output from the ED type reference voltage generation circuit varies due to the temperature characteristics of the MOSFET, each channel size ratio (L / W) between the enhancement type MOSFET and the depletion type MOSFET can be changed. The temperature characteristic of the gain coefficient (β = μ · Cox · (W / L)) of the MOSFET is adjusted so that the reference voltage is constant regardless of the temperature.

  However, in the above method, the adjustable range is limited due to manufacturing variations of different types (enhancement type and depletion type) MOSFETs, and the temperature dependence of the reference voltage cannot always be made zero.

  An object of the present invention is to provide a reference voltage generation circuit capable of generating a reference voltage having no temperature dependence and a power supply device using the reference voltage generation circuit.

The reference voltage generating circuit according to the present invention includes two fully depleted SOI-MOSFETs having different threshold voltages from each other only in the SOI layer thickness.
Furthermore, the reference voltage generation circuit of the present invention is configured such that, for each fully depleted SOI-MOSFET, the source and body are grounded, the gate and drain are connected to a constant current source, and the gate and drain are connected to the input terminal of the voltage follower circuit. And a circuit in which a first resistor and a second resistor are connected in series to the output terminal of the voltage follower circuit. Here, the voltage follower circuit corresponding to one of the fully depleted SOI-MOSFETs, the first resistor, and the second resistor are the voltage follower circuit corresponding to the other fully depleted SOI-MOSFET, and the first resistor. 1 resistor and the second resistor have the same characteristics.
Further, the reference voltage generating circuit of the present invention grounds the terminal of the second resistor corresponding to the fully depleted SOI-MOSFET having a higher threshold voltage on the side opposite to the first resistor, and The terminal between the first resistor and the second resistor is connected to the non-inverting input terminal of the differential amplifier, and the second resistor corresponding to the fully depleted SOI-MOSFET having the lower threshold voltage is connected to the second resistor. A terminal opposite to one resistor is connected to the output terminal of the differential amplifier, and a terminal between the first resistor and the second resistor is connected to an inverting input terminal of the differential amplifier, The output voltage of the amplifier is output as a reference voltage.

  In a fully depleted SOI-MOSFET, since the spread of the depletion layer is limited due to the presence of the BOX layer, the amount of charge in the depletion layer depends on the thickness of the SOI layer. That is, the threshold voltage of the fully depleted SOI-MOSFET can be determined as shown in Equation (1).

  In equation (1), φms is the work function difference of the gate electrode, Qss is the interface state of the gate oxide film, Cox is the gate oxide film capacitance, 2φF is the curvature of the surface potential during strong inversion, q is the charge amount of electrons, Nd Is the impurity concentration of the channel region, and ts is the thickness of the SOI layer. From equation (1), it can be seen that the threshold voltage changes only by changing the SOI layer thickness ts. For this reason, it is possible to eliminate the temperature dependence by detecting the threshold voltage difference of the MOSFET obtained by changing only the SOI layer thickness and making the other manufacturing processes the same.

  In the reference voltage generating circuit of the present invention, if the first resistor and the second resistor have the same resistance value, the threshold voltage difference (ΔVth) between the two fully depleted SOI-MOSFETs is used as a reference voltage. Can be output. However, the resistance value R1 of the first resistor and the resistance value R2 of the second resistor may be different from each other. In this case, the output reference voltage Vref is Vref = (R2 / R1) (Vth1-Vth2).

  One aspect of a power supply device according to the present invention includes a divided resistor circuit for dividing an input voltage and supplying a divided voltage, a reference voltage generating circuit for supplying a reference voltage, and a divided voltage from the divided resistor circuit And a voltage detection circuit having a comparison circuit for comparing a reference voltage from the reference voltage generation circuit, the reference voltage generation circuit including the reference voltage generation circuit of the present invention. is there.

  Another aspect of the power supply device according to the present invention includes an output driver that controls output of an input voltage, a divided resistor circuit that divides the output voltage and supplies a divided voltage, and a reference voltage that supplies a reference voltage And a constant voltage generation circuit having a comparison circuit for comparing the divided voltage from the division resistance circuit with the reference voltage from the reference voltage generation circuit and controlling the operation of the output driver according to the comparison result. A power supply device provided with the reference voltage generation circuit of the present invention as the reference voltage generation circuit.

  Still another aspect of the power supply device according to the present invention is to charge and discharge a capacitor by charging and discharging a capacitor by switching operation of a built-in switch based on an oscillation output from an oscillation circuit that operates based on a reference voltage from a reference voltage generation circuit. Is a power supply device including a charge pump type DC / DC converter that supplies the reference voltage generation circuit of the present invention as the reference voltage generation circuit.

  Since the reference voltage generating circuit of the present invention outputs a voltage corresponding to the threshold voltage difference between two fully depleted SOI-MOSFETs having different threshold voltages only by the difference in the SOI layer thickness, as a reference voltage. A reference voltage having no temperature dependence can be generated.

  In the reference voltage generating circuit of the present invention, if the first resistor and the second resistor have the same resistance value, the threshold voltage difference (ΔVth) between the two fully depleted SOI-MOSFETs is output as the reference voltage. be able to.

  In one aspect of the power supply apparatus according to the present invention, in the power supply apparatus including a divided resistor circuit, a reference voltage generation circuit, and a voltage detection circuit having a comparison circuit for comparing the divided voltage and the reference voltage, the reference voltage generation is performed. Since the reference voltage generation circuit of the present invention is provided as a circuit, the voltage detection capability is stabilized and the accuracy is improved by the reference voltage generation circuit of the present invention in which the fluctuation of the reference voltage is small with respect to a temperature change. be able to.

  In another aspect of the power supply device according to the present invention, the output driver, the divided resistor circuit, the reference voltage generating circuit, and the divided voltage and the reference voltage are compared to control the operation of the output driver according to the comparison result. In the power supply apparatus having the constant voltage generation circuit having the comparison circuit, the reference voltage generation circuit of the present invention is provided as the reference voltage generation circuit. The reference voltage generating circuit of the invention can stabilize the output voltage and improve the accuracy.

  Still another aspect of the power supply device according to the present invention is to charge and discharge a capacitor by charging and discharging a capacitor by switching operation of a built-in switch based on an oscillation output from an oscillation circuit that operates based on a reference voltage from a reference voltage generation circuit. In the power supply device including the charge pump type DC / DC converter that supplies the reference voltage, the reference voltage generation circuit of the present invention is provided as the reference voltage generation circuit, so that the fluctuation of the reference voltage is small with respect to the temperature change. The reference voltage generation circuit of the present invention can stabilize the output voltage and improve the accuracy.

It is a circuit diagram for demonstrating one Example of a reference voltage generation circuit. It is a figure which shows the temperature dependence when setting to the reference voltage 0.37V in the reference voltage generation circuit of this invention. It is a schematic process sectional view for explaining an example of a process of forming regions having different SOI layer thicknesses on the same SOI substrate. It is a circuit diagram which shows one Example of a power supply device provided with the constant voltage generation circuit. It is a circuit diagram which shows one Example of a power supply device provided with the voltage detection circuit. It is a circuit diagram which shows one Example of the power supply device provided with the inverting type charge pump DC / DC converter.

FIG. 1 is a circuit diagram for explaining one embodiment of a reference voltage generating circuit.
Two fully depleted SOI-N channel MOSFETs MN1 and MN2 (hereinafter referred to as transistors MN1 and MN2) having different threshold voltages from each other only by the thickness of the SOI layer are provided. The film thickness of the SOI layer of the transistor MN1 is larger than the film thickness of the SOI layer of the transistor MN2. The threshold voltage Vth1 of the transistor MN1 is higher than the threshold voltage Vth2 of the transistor MN2. In this embodiment, the transistors MN1 and MN2 are grounded to eliminate threshold voltage fluctuations due to the substrate bias effect. The support substrate of the SOI substrate is grounded.

  For the transistor MN1, the source and body are grounded, the gate and drain are connected to the constant current source CCS1, and the gate and drain are connected to the input terminal of the voltage follower circuit Amp1-1. A first resistor R1-1 and a second resistor R2-1 are connected in series to the output terminal of the voltage follower circuit Amp1-1.

  As for the transistor MN2, the source and body are grounded, the gate and drain are connected to the constant current source CCS2, and the gate and drain are connected to the input terminals of the voltage follower circuit Amp1-2. A first resistor R1-2 and a second resistor R2-2 are connected in series to the output terminal of the voltage follower circuit Amp1-2.

  The voltage follower circuits Amp1-1 and 1-2 have the same characteristics. The first resistors R1-1 and R1-2 have the same characteristics. The second resistors R2-1 and R2-2 have the same characteristics. The constant current sources CCS1 and CCS2 are supplied with the power supply voltage VDD. The constant current sources CCS1 and CCS2 are composed of depletion type transistors, for example.

A terminal of the second resistor R2-1 opposite to the first resistor R1-1 is grounded. A terminal between the first resistor R1-1 and the second resistor R2-1 is connected to the non-inverting input terminal (+) of the differential amplifier Amp2.
The terminal of the second resistor R2-2 opposite to the first resistor R1-2 is connected to the output terminal of the differential amplifier Amp2. A terminal between the first resistor R1-2 and the second resistor R2-2 is connected to an inverting input terminal (−) of Amp2 of the differential amplifier.

The reference voltage generation circuit of this embodiment outputs the output voltage of the differential amplifier Amp2 as the reference voltage Vref.
In this embodiment, each MOS transistor other than the transistors MN1 and MN2 may operate in a fully depleted type or a partially depleted type.

The gate and drain of the transistor MN1 are short-circuited, and a constant current is supplied from the constant current source CCS1 provided between the drain and the power supply voltage VDD, whereby the threshold voltage Vth1 of the transistor MN1 is connected between the gate and source of the transistor MN1. Will occur. When this output voltage is input to the voltage follower circuit Amp1-1, the voltage follower circuit Amp1 outputs a threshold voltage Vth1.
Similarly, the threshold voltage Vth2 of the transistor MN2 is output from the voltage follower circuit Amp1-2 for the transistor MN2.

  The output of the voltage follower circuit Amp1 is divided by the first resistor R1-1 and the second resistor R2-1 and input to the non-inverting input terminal (+) of the differential amplifier Amp2. The output of the voltage follower circuit Amp1-2 is divided by the first resistor R1-2 and the second resistor R2-2 and input to the inverting input terminal (−) of the differential amplifier Amp2. Since the differential amplifier Amp3 operates so that the two input terminals have the same potential, the voltage between the resistors R1-1 and R2-1 and the voltage between the resistors R1-2 and R2-2 are equal. Output. That is, since no current flows into the differential amplifier Amp2, the current flowing through the first resistors R1-1 and R1-2 flows through the second resistors R2-1 and R2-2 as it is. If the resistance value R1 of the first resistors R1-1 and R1-2 and the resistance value R2 of the second resistors R2-1 and R2-2 are set to the same resistance value, the inverting input terminal (−) of the differential amplifier Amp2 is connected. A voltage corresponding to Vth2-Vth1 / 2 is applied to the connected first resistor R1-2, and a current corresponding thereto flows. Since the current flows to the second resistor R2-2 as it is, the threshold of the transistors MN1 and MN2 which is further stepped down from the voltage Vth1 / 2 by the voltage Vth2-Vth1 / 2 at the output terminal of the differential amplifier Amp2. A voltage of the value voltage difference (Vth1-Vth2 = ΔVth) is generated.

  At this time, for example, if the SOI layer thickness of the transistor MN1 is 600 Å and the SOI layer thickness of the transistor MN2 is 400 基準, the threshold voltage difference ΔVth is 0.1 to 0.4 V (volts). A degree is obtained. This value varies from about 0.1 V to about 0.4 V by adjusting the impurity concentration of the channel regions of the transistors NM1 and MN2 within a range in which the transistors NM1 and MN2 operate as fully depleted SOI-MOSFETs. On the other hand, the reference voltage generation circuit of the present invention detects the threshold voltage difference ΔVth and has no temperature dependence. Therefore, if the threshold voltage difference ΔVth is set to a certain value, A constant reference voltage Vref can always be obtained regardless of fluctuations in the power supply voltage.

FIG. 2 is a diagram showing the temperature dependency when the reference voltage generation circuit of the present invention is set to the reference voltage 0.37 V, which is obtained by calculation based on the equation (1). The left vertical axis indicates threshold voltages Vth1 and Vth2 (unit is V), the right vertical axis indicates threshold voltage difference ΔVth (unit is V), and the horizontal axis indicates temperature (unit is K (Kelvin)).
Although the threshold voltages Vth1 and Vth2 of the transistors NM1 and NM2 change due to temperature changes, the temperature characteristics of the transistors NM1 and NM2 are the same, so that the threshold voltages Vth1 and Vth2 change similarly according to temperature changes. . As a result, the threshold voltage difference ΔVth between the threshold voltages Vth1 and Vth2 becomes substantially constant regardless of the temperature change, and the reference voltage Vref that does not vary with the temperature change is obtained.

FIG. 3 is a schematic process cross-sectional view for explaining an example of a process of forming regions having different SOI layer thicknesses on the same SOI substrate. The numbers in parentheses in FIG. 3 correspond to steps (1) to (4) described below.
(1) A P-type SOI substrate is used in which the buried oxide film 2 is formed with a thickness of 3000 mm on the support substrate 1 and the P-type SOI layer 3 is further formed with a thickness of 700 mm.

(2) Thermal oxidation is performed to form a buffer oxide film 4 having a thickness of 100 mm on the surface of the SOI layer 3. A silicon nitride film 5 having a thickness of 300 mm is formed on the buffer oxide film 4 by CVD (chemical vapor deposition). The silicon nitride film 5 and the buffer oxide film 4 in the region where the film thickness of the SOI layer 3 is processed to be thinner are removed by photolithography and wet etching techniques. The etching here may be dry etching.

(3) Using the buffer oxide film 4 and the silicon nitride film 5 as a mask, the surface of the SOI layer 3 in a region not covered with the buffer oxide film 4 and the silicon nitride film 5 is subjected to wet oxidation, for example, at 1000 ° C. Then, a silicon oxide film 6 having a thickness of 400 mm is formed. At this time, the SOI layer 3 is oxidized by a thickness of 200 mm from the surface in the vertical direction.

(4) The entire surface of the silicon nitride film 5, the buffer oxide film 4 and the silicon oxide film 6 is removed by a wet etching technique. As a result, a region having an SOI layer thickness of 600 mm and a region having an SOI film thickness of 400 mm can be created separately.
Thereafter, the transistors MN1 and MN2 can be formed by forming a MOSFET in the same manner as a normal MOSFET manufacturing method.
Note that the process of forming regions having different SOI layer thicknesses on the same SOI substrate is not limited to the process described with reference to FIG. For example, it is possible to form regions with different SOI layer thicknesses on the same SOI substrate by thinning a part of the SOI layer by dry etching technology or wet etching technology.

  The reference voltage generation circuit of the present invention can be applied to, for example, a power supply device. Hereinafter, embodiments of the power supply device including the reference voltage generation circuit of the present invention will be described. However, the use of the reference voltage generation circuit of the present invention is not limited to the power supply device.

FIG. 4 is a circuit diagram showing an embodiment of a power supply device provided with a constant voltage generating circuit.
A constant voltage generation circuit 11 is provided in order to stably supply power from the DC power supply 7 to the load 9. The constant voltage generation circuit 11 includes an input terminal (Vbat) 13 to which the DC power supply 7 is connected, a reference voltage generation circuit (Vref) 15, a differential amplifier (comparison circuit) 17, and a P-channel MOS transistor (hereinafter referred to as an output driver). , Abbreviated as PMOS) 19, divided resistance elements R 1 and R 2, and an output terminal (Vout) 21. The reference voltage generation circuit 15 includes the reference voltage generation circuit of the present invention.

In the differential amplifier 17 of the constant voltage generation circuit 11, the output terminal is connected to the gate electrode of the PMOS 19, the reference voltage Vref is applied from the reference voltage generation circuit 15 to the inverting input terminal (−), and the non-inverting input terminal (+). A voltage obtained by dividing the output voltage Vout by the resistance elements R1 and R2 is applied to the output voltage Vout, and the division voltage of the resistance elements R1 and R2 is controlled to be equal to the reference voltage Vref.
In this embodiment, since the reference voltage generating circuit 15 of the present invention is provided as the reference voltage generating circuit 15, the reference voltage of the present invention is small in fluctuation of the reference voltage against external instability factors such as process fluctuation and temperature change. The generation circuit can stabilize the output voltage and improve the accuracy.

FIG. 5 is a circuit diagram showing an embodiment of a power supply device provided with a voltage detection circuit.
In the voltage detection circuit 23, reference numeral 17 denotes a differential amplifier. A reference voltage generation circuit 15 is connected to an inverting input terminal (−) of the voltage detection circuit 23, and a reference voltage Vref is applied. The voltage of the terminal to be measured input from the input terminal (Vsens) 25 is divided by the dividing resistance elements R1 and R2 and input to the non-inverting input terminal (+) of the differential amplifier 17. The output of the differential amplifier 17 is output to the outside through an output terminal (Vout) 27. The reference voltage generation circuit 15 includes the reference voltage generation circuit of the present invention.

In the voltage detection circuit 23, when the voltage of the terminal to be measured is high and the voltage divided by the dividing resistor elements R1 and R2 is higher than the reference voltage Vref, the output of the differential amplifier 17 is maintained at the H level and measured. When the voltage at the power terminal drops and the voltage divided by the dividing resistor elements R1 and R2 becomes equal to or lower than the reference voltage Vref, the output of the differential amplifier 17 becomes L level.
In this embodiment, since the reference voltage generating circuit 15 of the present invention is provided as the reference voltage generating circuit 15, the reference voltage of the present invention is small in fluctuation of the reference voltage against external instability factors such as process fluctuation and temperature change. The generation circuit can stabilize the voltage detection capability and improve the accuracy.

FIG. 6 is a circuit diagram showing an embodiment of a power supply device including an inverting charge pump DC / DC converter.
The circuit includes an input terminal (Vin) 29, an output terminal (Vout, inverted output) 31, a GND terminal (GND) 33, a pump capacity positive terminal (CP +) 35, and a pump capacity negative terminal (CP-) 37. It has been. An external component capacitor (not shown) is connected between the pump capacity positive side terminal 35 and the pump capacity negative side terminal 37.

Inside, a PMOS transistor 39 and an NMOS transistor 41 are sequentially provided between the input terminal 29 and the GND terminal 33. A pump capacitor positive side terminal 35 is connected between the PMOS transistor 39 and the NMOS transistor 41. A ground potential 43 is connected between the NMOS transistor 41 and the GND terminal 33.
NMOS transistors 45 and 47 are sequentially connected between the GND potential 43 and the output terminal 31. A pump capacity negative terminal 37 is connected between the NMOS transistors 45 and 47.

  An oscillation circuit that alternately oscillates a voltage (Vin voltage) having the same magnitude as that of the input terminal 29 and a voltage (GND voltage) having the same magnitude as that of the GND terminal 33 based on the reference voltage from the reference voltage generation circuit (Vref) 49. (OSC) 51 is provided. The reference voltage generation circuit 15 includes the reference voltage generation circuit of the present invention. The output terminal of the oscillation circuit 51 is directly connected to the gate electrodes of the NMOS transistors 41 and 47, is connected to the gate electrode of the NMOS transistor 45 via the inverter 53, and the inverter 53 and the gate electrode of the PMOS transistor 39 are connected to each other. 55 is connected.

  This inverting charge pump DC / DC converter applies a voltage to the gate electrodes of the four transistors 39, 41, 45, 47 through the oscillation circuit 51 to switch them, and the pump capacity positive side terminal 35 and the pump capacity negative side terminal 37 are switched. Current is passed by charging and discharging the capacitors connected in between, and an inverted voltage of the input voltage 29 is output to the output terminal 31.

When the GND voltage is generated from the oscillation circuit 51, the PMOS transistor 39 and the NMOS transistor 45 are turned on, and the other two NMOS transistors 41 and 47 are turned off. At this time, a charge is accumulated in the capacitor connected between the pump capacity positive terminal 35 and the pump capacity negative terminal 37.
When the Vin voltage is generated from the oscillation circuit 51, the PMOS transistor 39 and the NMOS transistor 45 are turned off, and the other two NMOS transistors 41 and 47 are turned on. At this time, the capacitor storing the electric charge is discharged, but since the output terminal 31 is set at a lower potential than the GND terminal 33, an inverted voltage from the charge accumulated in the input voltage is output from the output terminal 31.
By repeating the above operation, current continues to flow at the inverted voltage of the input voltage.

  In this embodiment, since the reference voltage generating circuit 15 of the present invention is provided as the reference voltage generating circuit 15, the reference voltage variation is small with respect to external instability factors such as process variations and temperature changes. The reference voltage generating circuit can stabilize the output voltage and improve the accuracy.

Although the embodiments of the present invention have been described above, the present invention is not limited to the embodiments, and various modifications can be made within the scope of the present invention described in the claims.
For example, although the above embodiment uses an N-channel MOS transistor as a fully depleted SOI-MOSFET, the fully-depleted SOI-MOSFET may be a P-channel MOS transistor.

  The present invention can be applied to a reference voltage generation circuit and an electronic circuit using the reference voltage generation circuit.

Amp1-1, 1-2 Voltage follower circuit Amp2 Differential amplifier CCS1, CCS2 Constant current source MN1 transistor (fully depleted SOI-MOSFET with higher threshold voltage)
MN2 transistor (fully depleted SOI-MOSFET with lower threshold voltage)
R1-1, R1-2 First resistor R2-1, R2-2 Second resistor Vref Reference voltage Vth1 Threshold voltage Vth2 of transistor MN1 Threshold voltage ΔVth of transistor MN2 Threshold of threshold voltages Vth1 and Vth2 Value voltage difference 7 DC power supply 9 Load 11 Constant voltage generation circuit 13 Input terminal 15 Reference voltage generation circuit 17 Operational amplifier 19 P-channel MOS transistor 21 Output terminal 23 Voltage detection circuit 25 Input terminal 27 Output terminal 29 Input terminal 31 Output terminal 33 GND Terminal 35 Pump capacity positive side terminal 37 Pump capacity negative side terminal 39 PMOS transistor 41, 45, 47 NMOS transistor 43 GND potential 49 Reference voltage generation circuit 51 Oscillation circuit 53, 55 Inverter Q1 NMOS depletion transistor Q2 NMOS enhancement transistor Star Q3 PMOS enhancement mode transistor Q4 PMOS depletion transistor R1, R2 dividing resistor element

Japanese Patent Publication No. 4-65546 JP 09-326469 A Japanese Patent Laid-Open No. 2005-340337

Claims (5)

Two fully depleted SOI-MOSFETs having different threshold voltages from each other only by the SOI layer thickness are provided,
For each fully depleted SOI-MOSFET, the source and body are grounded, the gate and drain are connected to a constant current source, the gate and drain are connected to the input terminal of the voltage follower circuit, and the output terminal of the voltage follower circuit A first resistor and a second resistor are connected in series to
The voltage follower circuit corresponding to one of the fully depleted SOI-MOSFETs, the first resistor and the second resistor are the voltage follower circuit corresponding to the other fully depleted SOI-MOSFET, the first resistor and Having the same characteristics as the second resistor,
The terminal opposite to the first resistor of the second resistor corresponding to the fully depleted SOI-MOSFET having a higher threshold voltage is grounded, and between the first resistor and the second resistor. Connect the terminal to the non-inverting input terminal of the differential amplifier,
A terminal opposite to the first resistor of the second resistor corresponding to the fully depleted SOI-MOSFET having a lower threshold voltage is connected to an output terminal of the differential amplifier, and the first resistor And a terminal between the second resistor and the inverting input terminal of the differential amplifier,
A reference voltage generation circuit that outputs an output voltage of the differential amplifier as a reference voltage.   The reference voltage generation circuit according to claim 1, wherein the first resistor and the second resistor have the same resistance value. A divided resistor circuit for dividing the input voltage to supply a divided voltage, a reference voltage generating circuit for supplying a reference voltage, a divided voltage from the divided resistor circuit, and a reference voltage from the reference voltage generating circuit In a power supply device equipped with a voltage detection circuit having a comparison circuit for comparison,
A power supply apparatus comprising the reference voltage generation circuit according to claim 1 as the reference voltage generation circuit. An output driver for controlling the output of the input voltage, a divided resistor circuit for dividing the output voltage and supplying a divided voltage, a reference voltage generating circuit for supplying a reference voltage, and a divided voltage from the divided resistor circuit In a power supply device comprising a constant voltage generation circuit having a comparison circuit for comparing the reference voltage from the reference voltage generation circuit and controlling the operation of the output driver according to the comparison result,
A power supply apparatus comprising the reference voltage generation circuit according to claim 1 as the reference voltage generation circuit. A charge pump type DC / DC converter is provided that allows current to flow by charging / discharging a capacitor by switching operation of a built-in switch based on an oscillation output from an oscillation circuit that operates based on a reference voltage from a reference voltage generation circuit. In power supply,
A power supply apparatus comprising the reference voltage generation circuit according to claim 1 as the reference voltage generation circuit.

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