JP2012054388A - Method of manufacturing thin film compound solar cell - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a thin film compound solar cell suitable for mass production in which a sacrificial layer can be etched in a short time, and a compound semiconductor layer is less susceptible to cracking.SOLUTION: The method of manufacturing a thin film compound solar cell includes a step for forming a sacrificial layer and a compound semiconductor layer having one or more pn junction on a substrate, a step for forming a back electrode on the compound semiconductor layer, a step for bonding a reinforcing material and a heat-shrinkable material onto the back electrode, a step for heating the heat-shrinkable material, a step for exposing the reinforcing material by removing the sacrificial layer by etching and peeling the heat-shrinkable material, a step for bonding a reinforcement base plate onto the reinforcing material, a step for removing an etching stop layer constituting the compound semiconductor layer, and a step for forming a surface electrode on a first contact layer. The heat-shrinkable material is a material that contracts in the center direction thereof when heat is applied thereto.

Description

  The present invention relates to a method for manufacturing a thin film compound solar cell, and particularly to a method for manufacturing a thin film compound solar cell having a compound semiconductor layer in which one or more pn junctions are formed.

  Conventional thin film compound solar cells are manufactured as shown in FIGS. FIGS. 10-14 is typical sectional drawing which shows each process of the manufacturing method of the conventional thin film compound solar cell.

  First, as shown in FIG. 10, an etching stop layer 104, a first contact layer 105, an emitter layer 106, a base layer 107, and a second contact layer 108 are stacked in this order on the substrate 101 as the compound semiconductor layer 120. . Of the layers formed in this way, the first contact layer 105, the emitter layer 106, the base layer 107, and the second contact layer 108 finally become layers constituting the solar cell.

  Next, as shown in FIG. 11, the back electrode 110 is formed on the entire surface of the second contact layer 108. Then, as shown in FIG. 12, a double-sided adhesive double-sided thermal foam sheet 114 is bonded onto the back electrode 110, and a glass substrate 115 is bonded as a reinforcing material.

  Then, as shown in FIG. 13, the substrate 101 and the etching stop layer 104 are removed by etching to expose the first contact layer 105. Next, by patterning the first contact layer 105, as shown in FIG. 14, a cell region is determined, and further mesa etching is performed to electrically isolate the cell. Finally, the surface electrode 116 is formed on the patterned first contact layer 105 to form a cell.

  As described above, the conventional method of manufacturing a thin film compound solar cell has a problem that the manufacturing cost increases as the thickness of the substrate increases because the substrate is removed by etching. As a technique for solving such a problem, there is a technique called epitaxial lift-off.

  The epitaxial lift-off means that a sacrificial layer made of AlAs is formed between the substrate and the compound semiconductor layer, and the sacrificial layer is removed by an etchant to divide the substrate and the compound semiconductor layer. For example, Patent Document 1, Patent Document 2, and Non-Patent Document 1 disclose a method of dividing a substrate and a compound semiconductor layer by epitaxial lift-off.

JP 2000-085662 A JP 2006-032784 A

J.J.Schermer et al .Physica Status Solid (a) 202.No4501-508 (2005)

  The epitaxial lift-off described in Patent Document 1 has a very narrow region for the etchant to penetrate the sacrificial layer made of AlAs. For this reason, as the etching of the sacrificial layer proceeds and reaches the center of the sacrificial layer, it becomes difficult for fresh etchants to reach the side surfaces of the sacrificial layer, and the etching rate becomes extremely slow particularly at the center of the wafer.

  Therefore, when the size of the wafer is increased, there is a problem that the time for dividing the substrate and the compound semiconductor layer is considerably increased. In addition, when the substrate once divided by the sacrificial layer comes into contact with the compound semiconductor layer, there is also a problem that the contacted portion adheres and cannot be peeled off.

  Non-Patent Document 1 discloses a technique for performing epitaxial lift-off after forcibly forming a gap at the interface of the sacrificial layer by attaching a film to the compound semiconductor layer and attaching a weight to the film. Yes. By attaching the weighted film to the compound semiconductor layer in this manner, the etchant can easily penetrate into the side surface of the sacrificial layer.

  However, the epitaxial lift-off of Non-Patent Document 1 has a problem that the compound semiconductor layer breaks when the sacrifice layer is etched. This is probably because the stress applied to the sacrificial layer increases as etching progresses. That is, the weight of the weight and the compound semiconductor layer is always constant before and after the etching, but the cross-sectional area of the sacrificial layer gradually decreases when it is removed from the side surface of the sacrificial layer by etching. It is inferred that the compound semiconductor layer is cracked when the perimeter stress gradually increases and the stress cannot be withstood.

  The epitaxial lift-off disclosed in Patent Document 2 also creates a gap in the sacrificial layer by the weight of the compound semiconductor layer, and soaks the etchant through the gap. However, for the same reason as in Non-Patent Document 1 described above, there is a problem that the compound semiconductor layer is easily broken.

  In addition, since the epitaxial lift-off in both Non-Patent Document 1 and Patent Document 2 requires etching with the compound semiconductor layer horizontal, a large area is required for mass production and is not suitable for mass production. It was.

  The present invention has been made in view of the current situation as described above, and the object of the present invention is that even a large-sized substrate can be etched in a short time without decreasing the etching rate of the sacrificial layer, And it is providing the manufacturing method of the thin film compound solar cell which a compound semiconductor layer cannot break easily, and is suitable for mass production.

  The method for manufacturing a thin film compound solar cell according to the present invention includes forming a compound semiconductor layer having a sacrificial layer and one or more pn junctions on a substrate, removing a side surface of the compound semiconductor layer by etching, and a compound semiconductor. Forming a back electrode on the layer; bonding a reinforcing material and a heat-shrinkable material on the back electrode; heating the heat-shrinkable material; and removing the sacrificial layer using etching. Peeling the substrate, peeling the heat-shrinkable material to expose the reinforcing material, bonding the reinforcing substrate on the reinforcing material, removing the etching stop layer constituting the compound semiconductor layer, Patterning a first contact layer constituting the compound semiconductor layer, and on the patterned first contact layer And forming a surface electrode, and a step of separating the reinforcing substrate, heat-shrinkable material, characterized in that it is a material which shrinks in the center direction when the application of heat.

  The heat-shrinkable material is a long film, preferably a material having a large shrinkage force in one direction in the plane, and more preferably a heat-shrinkable PET film. The heat-shrinkable material is preferably a material obtained by bonding materials having different thermal expansion coefficients via a double-sided adhesive.

  In the step of heating the heat-shrinkable material, the heating temperature is preferably 40 ° C. or higher and 100 ° C. or lower. Preferably, the method includes a step of firing the surface electrode after the step of peeling the reinforcing substrate.

  The present invention has a structure as described above, so that the etching rate of the sacrificial layer does not decrease, so that the etching can be performed in a short time, the compound semiconductor layer does not break, and the thin film compound solar cell suitable for mass production. A manufacturing method is provided.

It is typical sectional drawing which shows the state after forming a compound semiconductor layer on a board | substrate. It is typical sectional drawing which shows the state after removing a part of side surface of a compound semiconductor layer by an etching. It is typical sectional drawing which shows the state after forming a back surface electrode on the 2nd contact layer. It is typical sectional drawing which shows the state after bonding heat shrinkable material on a back surface electrode via a reinforcing material. It is typical sectional drawing which shows a state when the sacrificial layer is removed by etching. It is typical sectional drawing which shows the state after removing a sacrificial layer by an etching. It is typical sectional drawing which shows the state after peeling a heat-shrinkable material. It is typical sectional drawing which shows the state after bonding a reinforcement board | substrate on a reinforcing material. It is typical sectional drawing which shows the state after peeling a reinforcement board | substrate. It is typical sectional drawing which shows a part of process of the manufacturing method of the conventional thin film compound solar cell. It is typical sectional drawing which shows a part of process of the manufacturing method of the conventional thin film compound solar cell. It is typical sectional drawing which shows a part of process of the manufacturing method of the conventional thin film compound solar cell. It is typical sectional drawing which shows a part of process of the manufacturing method of the conventional thin film compound solar cell. It is typical sectional drawing which shows a part of process of the manufacturing method of the conventional thin film compound solar cell.

  Hereinafter, the manufacturing method of the thin film compound solar cell of this invention is demonstrated using drawing. In the drawings of the present invention, the same reference numerals represent the same or corresponding parts. In addition, dimensional relationships such as length, width, thickness, and depth are changed as appropriate for clarity and simplification of the drawings, and do not represent actual dimensional relationships.

<Method for Manufacturing Thin Film Compound Solar Cell>
The method for manufacturing a thin film compound solar cell of the present invention includes a step of forming a compound semiconductor layer 20 having a sacrificial layer 3 and one or more pn junctions on a substrate 1 (FIG. 1), and a side surface of the compound semiconductor layer 20 The step of removing by etching (FIG. 2), the step of forming the back electrode 10 on the compound semiconductor layer 20 (FIG. 3), and the step of bonding the reinforcing material 11 and the heat-shrinkable material 13 on the back electrode 10 (FIG. 4), heating the heat-shrinkable material 13, removing the sacrificial layer 3 by etching (FIG. 5), peeling the substrate 1 (FIG. 6), and heat-shrinkability Peeling the material 13 to expose the reinforcing material 11 (FIG. 7), attaching the reinforcing substrate 15 on the reinforcing material 11 (FIG. 8), and etching stop constituting the compound semiconductor layer 20 4, the step of patterning the first contact layer 5 constituting the compound semiconductor layer 20, the step of forming the surface electrode 16 on the patterned first contact layer 5, and the reinforcing substrate 15 are peeled off. And the step (FIG. 9), the heat-shrinkable material 13 is characterized by being a material that shrinks in the center direction when heat is applied.

  Etching of the sacrificial layer 3 can be performed efficiently by producing a thin-film compound solar cell using the steps as described above. That is, by applying the heat-shrinkable material 13 to the compound semiconductor layer 20 and heating it, the heat-shrinkable material 13 curls, and the compound semiconductor layer curls following this. By etching the sacrificial layer 3 in such a state, a force acts in the direction in which the interface of the sacrificial layer 3 spreads, and a new etchant is easily introduced into the side surface of the sacrificial layer 3. By introducing the etchant in this manner, the etching can proceed easily, and the time for removing the sacrificial layer 3 by the etching can be shortened.

  Since the manufacturing method of the present invention does not use the weight of the compound-granulated semiconductor layer or apply a weight as in the prior art, it does not apply excessive stress to the interface of the sacrificial layer, and thus peeled off from the substrate. The compound semiconductor layer is difficult to break. Below, each step which comprises the manufacturing method of the thin film compound solar cell of this invention is demonstrated, referring drawings.

(Step of forming a compound semiconductor layer)
FIG. 1 is a schematic cross-sectional view showing a state after a compound semiconductor layer is formed on a substrate. As shown in FIG. 1, a buffer layer 2, a sacrificial layer 3, an etching stop layer 4, and a first contact layer 5 are formed on a substrate 1 using metal organic chemical vapor deposition (MOCVD). , The emitter layer 6, the base layer 7, and the second contact layer 8 are grown in this order. Hereinafter, the etching stop layer 4, the first contact layer 5, the emitter layer 6, the base layer 7, and the second contact layer 8 are collectively referred to as “compound semiconductor layer 20”.

  Here, the board | substrate 1 in this invention becomes a base | substrate of the buffer layer 2 formed on it. For this reason, it is preferable that the substrate 1 has a lattice constant close to that of the buffer layer 2. Examples of such a substrate material include germanium (Ge) and gallium arsenide (GaAs).

  The sacrificial layer 3 in the present invention may be any semiconductor as long as it can be easily etched. Here, the “sacrificial layer” of the present invention is provided between the substrate and the compound semiconductor layer, and in order to divide the substrate and the compound semiconductor layer by removing the layer by etching or the like. It is provided. Examples of the semiconductor used for the sacrificial layer 3 include AlAs. Among these, when the sacrificial layer 3 made of AlAs is used, as an etchant for etching the sacrificial layer 3, it is preferable to use, for example, a hydrofluoric acid aqueous solution in which hydrofluoric acid and water are mixed at a ratio of 1:10. In a step described later, the sacrificial layer 3 is removed by etching, whereby the substrate 1 and the compound semiconductor layer 20 are separated.

  The etching stop layer 4 in the present invention protects each layer constituting the solar cell of the compound semiconductor layer 20 from being exposed to the etchant when the sacrificial layer 3 is etched. As a material constituting such an etching stop layer 4, for example, InGaP can be mentioned.

  The emitter layer 6 and the base layer 7 in the present invention form a pn junction structure in the configuration of the compound semiconductor layer 20. When this part is irradiated with sunlight, carriers are generated and current is generated.

(Step of removing the side surface of the compound semiconductor layer by etching)
FIG. 2 is a schematic cross-sectional view showing a state after part of the side surface of the compound semiconductor layer is removed by etching. By etching the side surface of the compound semiconductor layer 20 with an etching solution, a part of the surface of the sacrificial layer 3 is exposed as shown in FIG. Thus, by removing the side surface of the compound semiconductor layer 20 by etching, each solar cell is electrically separated, and the region of the solar cell is determined. Further, when the sacrificial layer 3 is exposed, the etching solution is easily transmitted to the sacrificial layer 3, and the sacrificial layer 3 is easily etched.

  Here, as a method of etching the side surface of the compound semiconductor layer 20, first, the protective film 9 is applied on the second contact layer 8, and the protective film 9 in a region slightly narrower than the compound semiconductor layer 20 is left by photolithography. There is a method of removing the other protective film 9. Then, the side surfaces of the compound semiconductor layer 20 can be etched by etching the compound semiconductor layer 20 other than the region masked by the protective film 9 with an etching solution, as shown in FIG. Thereafter, the protective film 9 is removed.

(Step of forming the back electrode)
FIG. 3 is a schematic cross-sectional view showing a state after the back electrode is formed on the second contact layer. As shown in FIG. 3, the back electrode 10 is formed on the second contact layer 8 by patterning the second contact layer 8 in a region not etched by the protective film 9 with a metal mask or the like and then depositing it. To do. Examples of the material used for the back electrode include Au / Ag and Ti / Pd / Ag. Here, “Au / Ag” means that an Au layer and an Ag layer are formed in this order from the second contact layer 8 side.

(Step of bonding heat shrinkable material)
FIG. 4 is a schematic cross-sectional view showing a state after a heat-shrinkable material is bonded onto the back electrode via a reinforcing material. As shown in FIG. 4, a reinforcing material 11 with an adhesive material is bonded onto the back electrode 10. Further, a peeling tape 12 that is easily peeled off when irradiated with UV is bonded onto the reinforcing material 11. Then, the heat shrinkable material 13 is bonded onto the release tape 12. The reinforcing material 11 and the heat shrinkable material 13 are formed on the back electrode 10 as described above. In addition, although the case where the peeling tape 12 was provided between the reinforcing material 11 and the heat-shrinkable material 13 was demonstrated, it is not necessary to necessarily provide a peeling tape in between.

  Here, as the heat-shrinkable material 13, it is preferable to use a long film. When using a long film shape, it is preferable that the material has a large shrinkage force in one direction in the plane. That is, when one direction in the plane of the long film is the vertical direction and the direction orthogonal to the vertical direction is the horizontal direction, it is preferable that the vertical shrinkage force and the horizontal shrinkage force are different. . By using the heat-shrinkable material 13 of such a material, it is possible to prevent the film from shrinking uniformly in all directions within the plane, and thus to suppress generation of wrinkles in the heat-shrinkable material 13 itself. can do. As a result, damage to the epi layer can be mitigated, and the heat-shrinkable material 13 can be curled at a low temperature without exposing the wafer to a high temperature.

  As such a heat-shrinkable material, it is preferable to use a polyethylene terephthalate (PET) film or a triacetyl cellulose (TAC) film. Among them, it is preferable to use a heat-shrinkable PET film from the viewpoint of cost. Here, the “heat-shrinkable PET film” is formed by stretching a PET film in one in-plane direction. When heat is applied to the heat-shrinkable PET film, the heat-shrinkable PET film is particularly shrunk in one direction in the plane.

  Further, from the viewpoint of facilitating curling when heat is applied to the heat-shrinkable material, materials obtained by bonding materials having different thermal expansion coefficients through a double-sided adhesive material may be used. In this case, a material having a high thermal expansion coefficient, that is, a material that easily expands when heat is applied is preferably provided on the compound semiconductor layer 20 side. As a result, when heat is applied to the heat-shrinkable material, a tensile stress can be generated in the direction in which the compound semiconductor layer 20 is peeled from the substrate 1, and the etching of the sacrificial layer 3 can be accelerated.

  When such a heat-shrinkable material uses a long film, the film thickness is preferably 15 μm or more and 150 μm or less, more preferably 50 μm or more and 100 μm or less. By using a film having such a thickness, it is possible to uniformly bond the film without mixing bubbles when the film is bonded.

(Step of heating the heat-shrinkable material)
As shown in FIG. 3, the heat-shrinkable material 13 is bonded together, and then put into an oven and heated. Thereby, the heat-shrinkable material 13 is shrunk by heat, and a tensile stress is generated toward the center direction of the compound semiconductor layer 20. Here, when the shrinkage force of the heat-shrinkable material 13 is large, the wafer is warped or the compound semiconductor layer 20 is peeled off without following the heat-shrinkable material 13. For this reason, it is preferable that the heat-shrinkable material 13 is heated to such a condition that the heat-shrinkable material 13 does not peel and the shrinkage force is large.

  From the viewpoint of increasing the shrinkage force without peeling off the heat-shrinkable material 13, it is preferable to heat to a temperature of 40 ° C. or higher and 100 ° C. or lower. For example, when using a PET film as the heat-shrinkable material 13, Heating to 60 ° C is preferred. If the temperature is less than 40 ° C., the heat-shrinkable material 13 is not sufficiently contracted, so that the etching rate is not sufficiently improved. Conversely, if the temperature exceeds 100 ° C., the adhesive material used for the tape is deteriorated. Arise.

(Step of peeling the substrate)
FIG. 5 is a schematic cross-sectional view showing a state when the sacrificial layer is removed by etching. As shown in FIG. 5, the compound semiconductor layer 20 to which the heat-shrinkable material 13 is attached is immersed in an etchant so that the sacrificial layer 3 is etched from the outside to the inside. As the etching of the sacrificial layer 3 proceeds and the compound semiconductor layer 20 moves away from the substrate 1, the heat-shrinkable material 13 contracts and the compound semiconductor layer 20 is easily curled. As the compound semiconductor layer 20 is curled in this manner, the etchant can easily touch the sacrificial layer 3, and the etching is accelerated and the compound semiconductor layer 20 is easily peeled from the substrate 1. As the etchant, as described above, it is preferable to use a hydrofluoric acid aqueous solution in which hydrofluoric acid and water are mixed at a ratio of 1:10.

  At this time, the etching rate of the sacrificial layer 3 increases as the temperature of the aqueous hydrofluoric acid solution increases. However, if the temperature of the etchant is increased too much, the heat-shrinkable material 13 and the reinforcing material 11 may be peeled off. The temperature is preferably about 40 ° C.

  FIG. 6 is a schematic cross-sectional view showing a state after the sacrificial layer is removed by etching. As shown in FIG. 6, when the etching of the sacrificial layer 3 is completed, the substrate 1 and the compound semiconductor layer 20 are separated.

(Step of exposing the reinforcing material)
FIG. 7 is a schematic cross-sectional view showing a state after the heat-shrinkable material is peeled off. By irradiating the peeling tape 12 of the wafer shown in FIG. 6 with UV, the heat-shrinkable material 13 is peeled together with the peeling tape 12 to expose the reinforcing material 11. At this time, as shown in FIG. 7, the wafer is composed of the compound semiconductor layer 20, the back electrode 10, and the reinforcing material 11.

(Step of attaching the reinforcing substrate)
FIG. 8 is a schematic cross-sectional view showing a state after a reinforcing substrate is bonded onto a reinforcing material. As shown in FIG. 8, the double-sided thermal foamed sheet 14 is attached to the reinforcing material 11 exposed as described above, and the reinforcing substrate 15 is further attached to the double-sided thermal foamed sheet 14. By sticking the reinforcing substrate 15 in this way, workability in the step of patterning the first contact layer 5 later can be improved. Here, for example, glass can be suitably used as the reinforcing substrate 15.

(Step of removing the etching stop layer)
After bonding the reinforcing substrate 15 as described above, the etching stop layer 4 shown in FIG. 8 is removed by etching. Thus, the first contact layer 5 is exposed so as to be easily patterned.

(Step of patterning the first contact layer)
Next, mesa etching is performed on the first contact layer 5, thereby patterning the first contact layer 5 into a certain pattern and electrically separating the solar cells. Such patterning of the first contact layer 5 is not limited to mesa etching, and a conventionally known method can be used.

(Step of forming surface electrode)
Then, a cell is formed by forming a surface electrode 16 on the patterned first contact layer 5. Here, examples of the material used for the surface electrode 16 include Ti / Pd / Ag.

(Step of peeling the reinforcing substrate)
FIG. 9 is a schematic cross-sectional view showing a state after the reinforcing substrate is peeled off. Finally, as shown in FIG. 9, the reinforcing material 11, the double-sided thermally foamed sheet 14, and the reinforcing substrate 15 are peeled off to produce the compound semiconductor solar cell of the present invention.

(Step of firing the surface electrode)
It is preferable to include a step of firing the surface electrode 16 after the step of peeling the reinforcing substrate 15. Here, the firing is preferably performed at 350 ° C. for 30 minutes, for example. By firing the surface electrode 16 under such conditions, the electrode resistance of the surface electrode 16 can be reduced.

  The method for producing a compound semiconductor solar cell of the present invention includes the steps as described above, so that even a large substrate can be etched in a short time without decreasing the etching rate of the sacrificial layer, and the compound The semiconductor layer is hard to break and is suitable for mass production.

  EXAMPLES Hereinafter, although an Example is given and this invention is demonstrated in detail, this invention is not limited to these.

(Step of forming a compound semiconductor layer)
In this embodiment, as shown in FIG. 1, on a substrate made of GaAs having a thickness of 400 μm, a buffer layer 2 made of AlGaAs using a MOCVD method, a sacrificial layer 3 made of AlAs having a thickness of 10 nm, and a compound semiconductor layer 20 was formed. Here, the compound semiconductor layer 20 includes an etching stop layer 4 made of InGaP, a first contact layer 5 made of GaAs, an emitter layer 6 and a base layer 7 made of InGaP, and a second contact layer 8 made of AlGaAs in this order. Formed. Here, the junction surface between the emitter layer 6 and the base layer 7 is a pn junction.

(Step of removing the side surface of the compound semiconductor layer by etching)
Next, as shown in FIG. 2, a protective film 9 as a resist material is applied to the surface of the second contact layer 8 of the compound semiconductor layer 20, and is slightly wider than the second contact layer 8 using photolithography. The protective film 9 is left only in the region, and the protective film 9 in other regions is removed. Then, the sacrificial layer 3 is exposed by etching the side surfaces of the compound semiconductor layer 20 other than the region masked by the protective film 9 with an etching solution.

(Step of forming the back electrode)
Next, as shown in FIG. 3, the second contact layer 8 is patterned with a metal mask or the like, and then an Au layer and an Ag layer are deposited in this order, whereby a thickness is formed on the second contact layer 8. A back electrode 10 made of 3 μm Au / Ag was formed.

(Step of bonding heat shrinkable material)
Next, as shown in FIG. 4, the reinforcing material 11 and the release tape 12 were bonded onto the back electrode 10. Here, as the reinforcing material 11, a thermal foam sheet (product name: thermal foam sheet (manufactured by Nitto Denko Corporation)) was used, and as the release tape 12, a UV photosensitive UV release tape was used. Then, a heat-shrinkable PET film having a thickness of 50 μm was bonded onto the release tape 12 as the heat-shrinkable material 13.

(Step of heating the heat-shrinkable material)
What bonded the heat-shrinkable material 13 above was put into oven, and was heated at 60 degreeC. As a result, the heat-shrinkable material 13 contracted by heat, and a tensile stress was applied toward the center of the compound semiconductor layer 20.

(Step of peeling the substrate)
Next, as shown in FIG. 5, the compound semiconductor layer 20 to which the heat-shrinkable material 13 was attached was immersed in an etchant. As the etchant, a hydrofluoric acid aqueous solution in which hydrofluoric acid and water were mixed at a ratio of 1:10 was used, and the etchant liquid temperature was set to 40 ° C. As the etching of the sacrificial layer 3 progressed, the curl of the compound semiconductor layer 20 became stronger, so that the etchant could touch the side surface of the sacrificial layer 3. Therefore, the sacrificial layer 3 was etched without decreasing the etching rate until the end.

(Step of exposing the reinforcing material)
Next, UV is irradiated to the peeling tape 12 shown in FIG. 6 to peel the heat-shrinkable material 13 together with the peeling tape 12, and the reinforcing material 11 is exposed to obtain a wafer having the shape shown in FIG. .

(Step of attaching the reinforcing substrate)
Then, as shown in FIG. 8, a double-sided thermal foam sheet 14 (product name: thermal foam sheet (manufactured by Nitto Denko Corporation)) is attached to the reinforcing material 11 exposed as described above, and further double-sided. A reinforcing substrate 15 (glass substrate) made of glass was bonded onto the thermal foam sheet 14.

(Step of removing the etching stop layer)
After bonding the reinforcing substrate 15 as described above, the etching stop layer 4 shown in FIG. 8 was removed by etching.

(Step of patterning the first contact layer)
Next, mesa etching was performed on the first contact layer 5, thereby patterning the first contact layer 5 into a certain pattern and electrically separating the solar cells.

(Step of forming surface electrode)
A cell was formed by forming a surface electrode 16 made of Ti / Pd / Ag on the patterned first contact layer 5.

(Step of peeling the reinforcing substrate)
And as FIG. 9 shows, the reinforcing material 11, the double-sided thermal foam sheet 14, and the reinforcement board | substrate 15 were peeled.

(Step of firing the surface electrode)
Finally, the surface electrode 16 was baked at 350 ° C. for 30 minutes. Thereby, the electrode resistance of the surface electrode 16 was reduced. Through the above steps, the compound semiconductor solar battery of the present invention was produced.

  The manufacturing method of the compound semiconductor solar cell of the present embodiment comprising the above steps can etch the sacrificial layer in a shorter time than the conventional compound semiconductor solar cell, and the compound semiconductor layer is less likely to break, and is suitable for mass production. It was.

  Although the embodiments and examples of the present invention have been described as described above, it is also planned from the beginning to appropriately combine the configurations of the above-described embodiments and examples.

  It should be understood that the embodiments and examples disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  1, 101 substrate, 2 buffer layer, 3 sacrificial layer, 4,104 etching stop layer, 5,105 contact layer, 6,106 emitter layer, 7,107 base layer, 8,108 contact layer, 9 protective film, 10, DESCRIPTION OF SYMBOLS 110 Back electrode, 11 Reinforcing material, 12 Release tape, 13 Heat-shrinkable material, 14,114 Double-sided thermal foam sheet, 15,115 Reinforced substrate, 16,116 Surface electrode, 20,120 Compound semiconductor layer, 115 Glass substrate.

Claims (6)

Forming a sacrificial layer and a compound semiconductor layer having one or more pn junctions on a substrate;
Removing a side surface of the compound semiconductor layer by etching;
Forming a back electrode on the compound semiconductor layer;
Bonding a reinforcing material and a heat shrinkable material on the back electrode;
Heating the heat shrinkable material;
Peeling the substrate by removing the sacrificial layer using etching;
Peeling the heat shrinkable material to expose the reinforcement;
Bonding a reinforcing substrate on the reinforcing material;
Removing an etching stop layer constituting the compound semiconductor layer;
Patterning a first contact layer constituting the compound semiconductor layer;
Forming a surface electrode on the patterned first contact layer;
Peeling the reinforcing substrate,
The said heat-shrinkable material is a manufacturing method of a thin film compound solar cell which is a material which shrinks in the center direction when heat is applied.   The method of manufacturing a thin film compound solar cell according to claim 1, wherein the heat-shrinkable material is a long film and has a large shrinkage force in one direction in the plane.   The said heat-shrinkable material is a manufacturing method of the thin film compound solar cell of Claim 1 or 2 which is a heat-shrinkable PET film.   The said heat-shrinkable material is a manufacturing method of a thin film compound solar cell in any one of Claims 1-3 in which the material from which a thermal expansion coefficient differs is bonded together through the double-sided adhesive.   The manufacturing method of the thin film compound solar cell according to any one of claims 1 to 4, wherein in the step of heating the heat-shrinkable material, the heating temperature is 40 ° C or higher and 100 ° C or lower.   The manufacturing method of the thin film compound solar cell in any one of Claims 1-5 including the step which bakes the said surface electrode after the step which peels off the said reinforcement board | substrate.

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