JP2012040368A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a fraudulent action improperly using a RAM clear operation of a game machine and to promptly activate a paying-out control board even after RAM clear.SOLUTION: When power is supplied while a RAM clear switch is kept pressed, RAM clear signals rise after the time Ta roughly and fall the time Ta after releasing a hand from the RAM clear switch. A hard random number is acquired at the fall and is defined as an initial value of a soft random number. Thus, the initial value is determined according to the period of pressing the RAM clear switch (delay time), and is not fixed. Consequently, the fraudulent action improperly using the RAM clear operation is prevented. Also, since a paying-out controller activates main processing without providing delay time after the end of security check, signals output by an activated main controller are received without omission.

Description

  The present invention relates to a gaming machine, and more particularly, to a gaming machine configured to store a gaming state in a nonvolatile manner and to restore the gaming state when the power is turned off based on the memory when the power is turned on. is there.

  In gaming machines called pachinko machines or pachislot machines, random numbers are generated internally, and whether or not the main control board determines whether the game is won or not is determined according to the value of a random number counter (hereinafter simply referred to as a random number) acquired at the time of starting winning or lever operation. ing. For example, in a pachinko machine, a random number is acquired at the time of starting winning, and if this value is a predetermined jackpot value (for example, 7), a jackpot game is generated. The random number counter is configured to generate a jackpot value with a predetermined probability, but is designed to generate a jackpot value aperiodically so as not to be shot. However, when the power is turned on, there are many gaming machines that generate a random number with an initial value unique to the random number counter, and in this case, the timing at which the jackpot value is generated can be known only for the first time. Abuse of this may result in a fraudulent act of attaching a fraudulent board to a gaming machine and aiming at a jackpot value by turning off and on the power.

  In order to prevent such fraud, Patent Document 1 waits until the value of the random number counter matches the identification number unique to the pachinko machine, so that the timing from when the power is turned on until the jackpot value is generated is set for each pachinko machine. It is changing.

JP 2005-040520 A

However, even in the invention described in Patent Document 1, once the identification number of the pachinko machine is specified, the identification number does not change. is there. There are many gaming machines in which the gaming state is stored in a nonvolatile manner in a RAM or the like, and when the power is turned off and then turned on again, the gaming state at the time of turning off the power is restored based on the RAM or the like. When the RAM clear operation is received, the random number is initialized, and the same fraud may be performed as described above.
When the RAM clear operation is performed, not only the RAM provided in the main control board, but also the RAM of the payout control board (in the pachinko machine, the circuit board that performs control for paying out the game ball to the player) is cleared. The payout control board drives the payout device based on the payout command signal received from the main control board and controls the payout operation (in the pachinko machine, pays out the game ball to the player). In addition to the command signal, it may be possible to receive a signal (for example, a signal for confirming that the payout control board is activated) from the main control board. It is also important to do.
SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object thereof is to prevent fraudulent acts by misusing the power on / off of a gaming machine, and to enable a payout control board to be activated quickly even after the RAM is cleared.

  The gaming machine according to claim 1 of the present invention, which has been made to solve the above-mentioned problems, includes first random number generating means for generating a first random number used for determining whether or not the game is successful, and at least whether the game is based on the first random number. Main control means for performing judgment control, a first RAM capable of storing data used for processing of the main control means in a nonvolatile manner, and a command from the main control means are valuable to the player of the gaming machine. A payout control means for controlling the payout of the carrier, a second RAM capable of holding data used in processing of the payout control means in a nonvolatile manner, and an operation for clearing the contents held in the first RAM and the second RAM In a gaming machine having a clear switch that is activated, the game machine is activated when power is supplied to the gaming machine, and it is determined whether or not the clear switch has been operated when the power is supplied. And when it is estimated that the clear switch has been operated by the estimating means, it is determined whether or not the clear switch has transitioned to a non-operated state, and it has been determined that the transition has been made to the state A non-operation signal output means for outputting a non-operation signal, and a second random number that is activated when the gaming machine is energized and generates a second random number independent of the first random number while being updated over time. When a non-operation signal is output by the random number generation means and the non-operation signal output means, a numerical value calculated based on the random number generated by the second random number generation means is set as an initial value of a random number used for the determination of success / failure When it is estimated by the initial value setting means and the estimation means that the clear switch has been operated, at least after the non-operation signal is output by the non-operation signal output means, When it is estimated that the clear switch is operated by the first RAM clearing means for clearing the data held in the first RAM and the estimating means, the non-operation signal is output by the non-operation signal output means. If it is estimated that the clear switch has not been operated by the second RAM clearing means for clearing the data held in the second RAM without waiting for the estimation means, the first RAM and the second RAM And a recovery means for recovering the gaming state of the gaming machine based on the stored data.

  According to the first embodiment of the present invention, in the gaming machine according to claim 1, the estimation means sets a RAM clear signal in advance when the clear switch is operated when the gaming machine is energized. RAM clear signal generation circuit for outputting time, and determination means for determining that the clear switch has been operated when the gaming machine is energized when the RAM clear signal is output by the RAM clear signal generation circuit It is characterized by comprising.

Reference Example 2 of the present invention is characterized in that, in the gaming machine of Reference Example 1, the non-operation signal is realized by stopping output of the RAM clear signal.
In Reference Example 3 of the present invention, in the gaming machine according to any one of Claim 1, Reference Example 1, and Reference Example 2, the non-operation signal output means transitions to a state where the clear switch is not operated. The non-operation signal is output after a predetermined time from the determination, and the predetermined time is at least the time required for the initial value setting means to operate normally after the gaming machine is energized. It is characterized by that.

In the gaming machine according to claim 1, in order to perform the RAM clear, the clear switch is operated from a state where the gaming machine is not energized and is energized as it is. Then, the estimation means estimates that “the clear switch was operated when energized”. Then, the non-operation signal output means determines whether or not a transition to a state in which the clear switch is not operated is made, and outputs a non-operation signal when it is determined that the transition to the state has been made. Then, the initial value setting means sets a numerical value calculated based on the second random number generated by the second random number generating means as the initial value of the first random number used for the determination. The second random number generator generates a second random number that is independent of the first random number while being updated over time. For this reason, the value of the second random number changes according to the time point when the non-operation signal is generated. Since the value calculated based on the value of the second random number is set as the initial value of the first random number, the first random number can be expected to be different every time the RAM is cleared. As a result, the timing at which the jackpot value is generated changes every time the RAM is cleared even in the same gaming machine, and the above-described fraudulent acts are extremely difficult.
Further, since the estimation means estimates whether or not the clear switch has been operated when energized, it is not necessary to constantly monitor whether or not the clear switch is operated even in a non-energized state. If the estimating means estimates that the clear switch has not been operated when energized, the restoration means uses the gaming state of the gaming machine based on the data held in the first RAM and the second RAM. Therefore, the value of the first random number is also restored to the value at the time of power-off, and it is still difficult to cheat.

  When the clear switch has been operated, both the first RAM that stores the data of the main control means and the second RAM that stores the data of the payout control device are cleared, but the timing is different. The data in the first RAM is cleared by the first RAM clearing means after the non-operation signal is output by the non-operation signal output means (not necessarily immediately after), and the data held in the second RAM is It is cleared by the second RAM clear means without waiting for the output. When the RAM is cleared, the process (main process) originally performed by each control unit can be appropriately executed only after the RAM is cleared. Accordingly, even in the payout control means, the payout control means can be activated at an earlier point in time than the configuration in which the RAM is cleared after the non-operation signal is output.

  In a computer system that constitutes the main control means and the payout control means, a security check is generally performed at the time of startup, but the payout control means pays a value carrier (a game ball for a pachinko machine, a medal for a revolving game machine). The main control means performs various processes such as the generation of random numbers, determination of success / failure determination, and output of commands to the payout control means (controlling overall game operations after winning, not described above). Is usually performed by the main control means). For this reason, the ROM of the main control means for storing these programs generally has a larger capacity than the ROM of the payout control means, and the security check takes longer than the payout control means. In addition to this security check, the main control means waits for the output of the non-operation signal as described above. Therefore, when the main process of the main control means is activated, there is a possibility that the main process of the payout control means has already been activated. Extremely high. Accordingly, the payout control means can steadily receive the signal transmitted from the main control means.

Note that the initial value of the first random number is not limited to the first value that can be output as the first random number. For example, a value called a seed (random number seed) generally used for generating a random number is also included in the initial value of the first random number. The set value is calculated from the value of the second random number, but this “calculation” includes an aspect in which the value of the second random number is used as it is. This is because the value when used as it is can be interpreted as a value obtained by adding 0 or 1 to the original value. A table in which the value of the second random number and the numerical value to be set as the initial value of the first random number corresponding thereto is prepared in advance, and this table can be referred to as “calculation” here. I will call it. In this aspect, the initial value of the first random number is set as the value calculated from the second random number by referring to the table.
In addition, as the “operation” for the clear switch, various modes can be considered depending on the type of the clear switch. If the clear switch is a push button that performs momentary operation, pressing is an operation, and if it is a slide switch, it is an operation to slide its knob in one direction. It is an operation to rotate one side. The operator who clears the RAM of the gaming machine of the present invention needs to stop the operation of the clear switch, which is based on a slide knob if the clear switch is a slide switch. In the case of a lever, it is a natural operation of rotating a lever rotated in one direction in the opposite direction. In particular, if the clear switch is a push button for a momentary operation, it is preferable because the non-operating state can be achieved simply by releasing the hand or finger from the button.

  In the gaming machine of Reference Example 1, an example of the configuration of the estimation means is shown. That is, the estimation means includes a RAM clear signal generation circuit and a determination means. The RAM clear signal generating circuit outputs a RAM clear signal for a predetermined time when the clear switch is operated when the game machine is energized (if the clear switch is not operated, the RAM clear signal is output). Is not output). When the RAM clear signal is output, the determination means determines that “the clear switch was operated when the game machine was energized”.

If the clear switch is operated from the state in which the gaming machine is not energized and energized as it is, the RAM clear signal generating circuit generates the RAM clear signal for a predetermined time. By detecting this, it can be determined that “when the gaming machine is energized, the clear switch was operated”. Since the RAM clear signal generation circuit can be easily configured with a timer circuit, a sequential circuit, or the like, it is always monitored by software or the like whether the clear switch is operated in the non-energized state of the gaming machine, or the clear switch rises. (Or falling, hereinafter represented by rising) need not be detected. Although the present invention is also a rise detection, it is a rise signal that is inevitably generated in the operation of the gaming machine called “energization to the gaming machine”, so that the clearing switch is turned on when the conduction state of the gaming machine is cut off. There is no need to separately prepare an energized state for detecting the presence or absence of the operation.
The “predetermined time” may be a time longer than the time required for the determination unit to detect the RAM clear signal, but is not necessarily a specific value such as several tens of ms. For example, it may be changed according to the value of the second random number, or as in Reference Example 2.

  In the gaming machine of Reference Example 2, the non-operation signal is realized by stopping the output of the RAM clear signal. On the other hand, the non-operation signal may be configured separately from the RAM clear signal, but in this case, a setting for the non-operation signal is required at the input port or the like. In this regard, according to the gaming machine described in the reference example 2, since the RAM clear signal is also used as the non-operation signal, it is only necessary to monitor the RAM clear signal. For example, the RAM clear signal may be turned on when the clear switch is operated when the gaming machine is energized, and the RAM clear signal may be turned off when the clear switch is not operated. Further, in order to ensure that the determination means detects that the clear switch has been operated, the RAM clear signal may be left on for a certain period of time (for example, 100 ms) from when the clear switch is not operated. . In this way, the determination means reliably detects the RAM clear signal, detects that the clear switch has transitioned to the non-operation state only by the RAM clear signal, and changes according to the time point when the transition to the non-operation state occurs. All of changing the initial value of one random number can be established. It is also conceivable to use Reference Example 3.

The non-operation signal output means of the gaming machine of Reference Example 3 outputs a non-operation signal after a predetermined time since it is determined that the clear switch has not been operated. This predetermined time is at least the time required for the initial value setting means to operate normally after the gaming machine is energized.
On the other hand, if the non-operation signal is output as soon as the clear switch is changed from the operated state to the non-operated state, the determination is made based on the second random number generated by the second random number generating means. Even if the initial value setting means tries to set the initial value of the first random number used for the determination, the initial value setting means itself may not be operating normally. This is because the operator may perform energization and non-operation on the clear switch almost simultaneously. In such a case, even if a non-operation signal is output, there is a possibility that the initial value setting means will not operate normally and the initial value may not be set properly because it is shortly after energization.

  In this regard, in the gaming machine of Reference Example 3, even when the clear switch is not operated, a non-operation signal is not output until the time required for the initial value setting means to operate normally has elapsed. . Therefore, when the non-operation signal is detected, the initial value setting means is operating normally, so that the initial value can be reliably set. “The time required for the initial value setting means to operate normally after the game machine is energized” refers to the entire time required for the initial value setting means to operate normally after being energized. Not. As described above, when the gaming machine is energized, various processes (not limited to those described above) such as determining whether or not the clear switch is operated and determining whether or not the operation has been stopped. Is performed before the operation of the initial value setting means. The time required for such various processes may be subtracted from “the total time required for the initial value setting means to operate normally after energization”.

Front view of gaming machine according to the present invention Front view of gaming machine gaming board Back view of gaming machine Electric machine block diagram Block diagram showing the detailed electrical configuration of the main part of the gaming machine Timing chart showing the operation of the gaming machine Front view of the power supply board of the gaming machine Flowchart of processing executed by the CPU of the main controller constituting the gaming machine when the power is turned on Flow chart of main processing executed by CPU of main control device Flow chart of initial value random number setting process executed by CPU of main controller A flowchart of processing executed by the CPU of the payout control device provided in the gaming machine when the power is turned on. (A) is a time chart showing an outline of processing performed when the RAM is cleared in the conventional main controller and the payout controller, and (b) is a diagram of the main controller and the payout controller when the RAM is cleared. The time chart which shows the outline of the process when waiting for the RAM clear signal to be turned off on both sides, (c) is the process when waiting for the RAM clear signal to be turned off only for the main controller when the RAM is cleared. Time chart showing the outline of

Hereinafter, preferred embodiments of the present invention will be described. The embodiments of the present invention are not limited to the following examples, and can take various forms belonging to the technical scope of the present invention, and the contents described in the respective examples are appropriately combined. It goes without saying that it is possible.
[Example 1]

  As shown in FIG. 1, a pachinko machine 50, which is a kind of ball game machine, has a structure in which each part of the configuration is held by an outer frame 51 that forms a vertically long fixed outer frame. A hinge 53 is provided on the left and upper sides of the outer frame 51, and an inner frame 70 shown in FIG. 3 is attached to the other side of the hinge 53. The inner frame 70 opens and closes with respect to the outer frame 51. It has a possible configuration. A plate glass 61 is detachably provided on the front frame 52, and the game board 1 shown in FIG. 2 is attached to the inner frame 70 at the back of the plate glass 61.

  Speakers 66 are provided on the upper left and right sides of the front frame 52 and on the lower left and right sides of the outer frame 51, and game sounds generated from the pachinko machine 50 are output to improve the player's preference. In addition, in order to improve the player's preference, a plurality of frame side decorative lamps 65 that emit light according to the gaming state are provided in the front frame 52. An upper plate 55 and a lower plate 63 are integrally formed below the front frame 52. A launching handle 64 is attached to the right side of the lower plate 63, and the launching device (not shown) is operated by rotating the firing handle 64 in the clockwise direction. Is fired toward the game board 1.

  On the left side of the lower plate 63, an effect button 67 that can be operated by the player is provided. The player operates the effect button 67 during a predetermined period and is displayed on the effect symbol display device 6 described later. The content of the game changes or the game sound output from the speaker 66 changes. The pachinko machine 50 is a so-called CR machine and includes a prepaid card unit (CR unit) 56 for reading and writing a prepaid card. The pachinko machine 50 includes a lending button 57 and a checkout button 58. And a CR settlement display device having a balance display 59.

  FIG. 2 is a front view of the game board 1 of the pachinko machine 50 according to the present embodiment. In addition, since the whole structure of this pachinko machine 50 is based on a well-known technique, illustration and description are abbreviate | omitted. As shown in FIG. 2, the game board 1 is provided with a substantially circular game area 3 surrounded by known guide rails 2a and 2b. A large number of game nails 4 are nailed in the game area 3.

A center case 5 is disposed at a substantially central portion of the game area 3. The center case 5 includes a warp entrance, a warp passage, a stage, and a window 5a that faces a screen 6a of a production symbol display device 6 (a liquid crystal display device that displays a pseudo symbol), as in the known case. Yes.
Above the window 5a, a dot matrix normal symbol display device 7 and a 7-segment first special symbol display device 9, a second special symbol display device 10 and a normal symbol hold storage display device 8 comprising four LEDs are installed. On the lower side, a first special symbol hold storage display device 18 and a second special symbol hold number display device 19 are installed.
A normal symbol operating gate 17 is arranged on the left side of the center case 5. Below the center case 5 is a composite winning device 13 in which the first start port 11 and the second start port 12 are unitized. Has been placed.

The first start port 11 is a so-called chucker and can always enter the ball.
The second starting port 12 is an electric tulip, and it opens and closes in the same manner as a known electric tulip. However, since the first starting port 11 is above, a game ball cannot be entered in the illustrated closed state. However, when the game ball hits the normal symbol lottery performed when the normal symbol operation gate 17 is passed and the normal symbol hitting is displayed on the normal symbol display device 7, the second start port 12 is opened and it is easy to enter the ball. become.

  An attacker-type large winning opening 14 is disposed below the composite winning device 13, and an out hole 15 is provided therebelow. In addition, a first left winning port 31 and a second left winning port 32 are provided on the left side of the composite winning device 13, and a first right winning port 33 and a second right winning port 34 are provided along the guide rail 2b on the right side. It has been. Note that the first left winning port 31, the second left winning port 32, the first right winning port 33, and the second right winning port 34 are normal winning ports in which the winning rate does not always change.

  As shown in FIG. 3, the inner frame 70 on which the above-described game board 1 is detachably attached is housed in the aforementioned outer frame 51 on the back surface of the pachinko machine 50. The inner frame 70 is provided with a ball tank 71, a tank rail 72, and a dispensing device 73 from above. With this configuration, if there is a winning game ball at the winning slot on the game board 1, a predetermined number of gaming balls can be discharged from the ball tank 71 via the tank rail 72 to the above-described upper plate 55 by the payout device 73. . Further, on the back side of the pachinko machine 50, a main control device 80, a payout control device 81, an effect symbol control device 82, a sub integrated control device 83, a launch control device 84, and a power supply board 85 are provided. The production symbol control device 82 and the sub integrated control device 83 correspond to the sub control device.

  The main control device 80, the production symbol control device 82, and the sub integrated control device 83 are provided on the game board 1, and the payout control device 81, the launch control device 84, and the power supply board 85 are provided on the inner frame 70. In FIG. 3, the launch control device 84 is not drawn, but the launch control device 84 is provided below the payout control device 81. Further, an external connection terminal 78 is provided on the right side of the ball tank 71, and a signal indicating a game state and a game result is sent from the external connection terminal 78 to a hall computer (not shown). Conventionally, the external connection terminal 78 for transmitting a signal to the hall computer includes a board (a terminal for outputting a signal output from the game board side to the hall computer) and a frame (the frame side (front frame). 52, a terminal for outputting a signal output from the inner frame 70 and the outer frame 51) to the hall computer). In this embodiment, the hall computer is connected via one external connection terminal 78. A signal indicating a game state and a game result is transmitted to.

  As shown in the block diagram of FIG. 4, the electrical configuration of the pachinko machine 50 is configured with a main controller 80 as a center. In this block diagram, a so-called relay board and power supply circuit for merely relaying signals are not described. Although not shown in detail, all of the main control device 80, the payout control device 81, the production symbol control device 82, and the sub integrated control device 83 include a CPU, a ROM, a RAM, an input port, an output port, and the like. However, in this embodiment, the launch controller 84 is not provided with a CPU, ROM, or RAM. However, the present invention is not limited to this, and the launch control device 84 may be provided with a CPU, ROM, RAM, and the like.

  The main controller 80 includes a first start port switch 11a that detects a game ball that has entered the first start port 11, a second start port switch 12a that detects a game ball that has entered the second start port 12, and a normal A normal symbol operation switch 17a for detecting a game ball that has entered the symbol operation gate 17, a count switch 14a for counting game balls that have entered the big winning port 14, a first left winning port 31, and a second left winning port 32 Detection signals such as a left winning port switch 31a for detecting a game ball that has entered the ball, a right winning port switch 33a for detecting a game ball that has entered the first right winning port 33, and the second right winning port 34 are input. .

The main control device 80 operates in accordance with the installed program, generates various commands related to the progress of the game based on the above-described detection signals and outputs them to the payout control device 81 and the sub integrated control device 83.
The main controller 80 also displays the first special symbol display device 9, the second special symbol display device 10, and the normal symbol display device 7 connected via the symbol display device relay terminal board 90, and the first special symbol hold. Control of lighting of the memory display device 18, the second special symbol hold number display device 19 and the normal symbol hold memory display device 8 is performed.

Further, the main controller 80 controls the opening / closing of the special winning opening 14 by controlling the special winning opening solenoid 14b, and controls the ordinary electric accessory solenoid (denoted as a general electric accessory solenoid in FIG. 4) 12b. Thus, the opening and closing of the second start port 12 is controlled.
The output signal from the main controller 80 is also output to the test signal terminal, and a management signal such as symbol variation and big hit is output to the external connection terminal 78 and sent to the hall main computer. The main control device 80 and the payout control device 81 can perform bidirectional communication.

  The payout control device 81 operates the payout motor 20 in accordance with a command sent from the main control device 80 and pays out a prize ball. In the present embodiment, the detection signal of the payout sensor 21 for counting game balls to be paid out as prize balls is input to the payout control device 81, and the payout control device 81 counts the prize balls. In addition, it is also conceivable to use a configuration in which the detection signal of the payout sensor 21 is input to the main control device 80 and the payout control device 81 and the main control device 80 and the payout control device 81 count the prize balls.

  The payout control device 81 receives signals from the glass frame opening switch 35, the inner frame opening switch 36, the full switch 22, and the ball break switch 23, and a signal indicating that the lower plate 63 is full by the full switch 22. And when a signal indicating that there are few or no game balls in the ball tank is input by the ball break switch 23, the payout motor 20 is stopped and the payout operation of the prize ball is stopped. Note that the full switch 22 and the ball break switch 23 are also configured to continue outputting signals until the state is cleared, and the payout control device 81 causes the payout motor 20 to stop being output. Restart the drive.

  Also, the payout control device 81 operates the payout motor 20 by communicating with the prepaid card unit via the game ball lending device connection terminal 24 and discharges the lending balls. The paid-out lending ball is detected by the payout sensor 21, and the detection signal is input to the payout control device 81. The game ball lending device connection terminal 24 is also connected to the checkout display board 25 so as to be capable of two-way communication. The checkout display board 25 requests a checkout button for paying out a game ball, and a checkout. A return button and a balance indicator are connected.

Also, the payout control device 81 transmits information relating to the winning ball, information indicating the open / closed state of the frame (inner frame, front frame), etc. to the hall computer via the external connection terminal 78, and also to the launch control device 84. Send a fire stop signal.
In this embodiment, the game balls are paid out. However, the game balls generated in accordance with winnings or the like may be stored without being paid out.

The launch control device 84 controls the launch motor 30 to launch the game ball into the game area 3. In addition to the payout control device 81, the launch control device 84 receives a rotation amount signal from the launch handle, a touch signal from the touch switch 28, and a launch stop signal from the launch stop switch 29.
The rotation amount signal is output when the player operates the launch handle, the touch signal is output when the player touches the launch handle, and the launch stop switch signal is generated when the player presses the launch stop switch 29. Is output. If the touch signal is not input to the launch control device 84, the game ball cannot be launched, and if the launch stop switch signal is input, the game ball cannot be launched even if the player touches the launch handle. It has become.

  The sub-integrated control device 83 corresponds to the sub-control device, receives data and commands transmitted from the main control device 80, distributes them to data for effect display control, sound control and lamp control, The display control command and the like are transmitted to the effect design control device 82, and the sound control and lamp control are distributed to each control part (function unit as a sound control device and a lamp control device) included in the display control command 82. Then, the function unit as the sound control device controls the sound output from the speaker by operating the sound LSI based on the data for sound control, and the function unit as the lamp control device is based on the data for lamp control. The various LED and lamp 26 are controlled by operating the lamp driver. In addition, an effect button 67 is connected to the sub integrated control device 83, and when the player operates the effect button 67, a signal is input to the sub integrated control device 83.

Bi-directional communication is possible between the sub integrated control device 83 and the production symbol control device 82.
The effect symbol control device 82 displays the effect symbol display based on the data and commands received from the sub integrated control device 83 (both those transmitted from the main control device 80 and those generated by the sub integrated control device 83). The device 6 is controlled to display an effect image such as a pseudo symbol on the screen 6a.

  FIG. 5 shows a power supply and signal system between the power supply board 85 and each part of the gaming machine including the main controller 80 and the payout controller 81. The power supply board 85 of each pachinko machine receives the AC 24V power provided on the pachinko parlor side via the power switch 671, and the power generation circuit 672 receives the main controller 81 and the payout control shown in the figure. Power is supplied to each part of the gaming machine including the device 81. The power switch 671 is of a type that maintains its state when turned on or off.

  The full-wave 24V output in the power generation circuit 672 is input to the power supply voltage monitoring circuit 673, and the reset signal generation circuit 674 outputs or cancels the reset signal based on the detection result of the presence / absence of the full-wave 24V output by the power supply voltage monitoring circuit 673. . That is, the power supply voltage monitoring circuit 673 determines that the full-wave 24V output is stopped if the non-output state higher than the predetermined reference voltage is maintained for a predetermined time, and the reset signal generation circuit 674 responds to the determination that the full-wave 24V output is stopped. Output a reset signal. On the other hand, when full wave 24V output is started, the reset signal is canceled. Here, the output of the reset signal is to output a low level signal, and the release is to change from the low level to the high level. Note that the reset signal is released after a delay time Ta from the time when the full-wave 24V output is detected.

  The output of the reset signal generation circuit 674 is output to the reset terminals of the CPUs 611 and 621 of the main controller 81 and the payout controller 81, respectively.

  A power failure signal generation circuit 675 is provided with the output of the power supply voltage monitoring circuit 673 as an input, and a power failure signal is output to the NMI terminals of the control devices CPU611 and 621 when the power supply is interrupted such as a power failure. The power failure signal is a signal that changes from a high level to a low level when the power is cut off, and the output timing is set so that it is output before the reset signal is output.

  The power supply board 85 is configured to generate a DC5V backup power supply (VBB) by a backup power supply generation circuit 678 including a capacitor, and the backup power supply (VBB) output is the backup of each control board CPU611, 621. It is output to the terminal (VBB), and the storage contents of the RAMs of the control device CPUs 611 and 621 are held at the time of a power failure, as will be described later.

  The power supply board 85 also includes a RAM clear switch 676. A RAM clear switch 676 is provided to clear the contents stored in the RAMs 615 and 625 of the CPUs 611 and 621.

  The RAM clear switch 676 is a push button type that is turned on only when pressed, and if the RAM clear switch 676 is turned on when the reset signal is released, the RAM clear signal generation circuit 677 is a high level signal. A RAM clear signal is output to input ports 613 and 623 of main controller 80 and payout controller 81 for a predetermined time (described later). That is, the RAM clear signal is output only when the power is turned on when the reset signal is released. Here, the delay time Ta from turning on the power switch 671 to releasing the reset signal is set to 100 ms, for example. To generate the RAM clear signal, the power switch 671 is turned on while the RAM clear switch 676 is depressed. Each of the control device CPUs 611 and 621 monitors the presence or absence of a RAM clear signal at the input ports 613 and 623 via the data bus.

  FIG. 6 shows the operating states of the power supply board 85 and each part of the main controller 80 when the power supply switch 671 is turned on while the RAM clear switch 676 is pressed and power supply is started from the power supply board 85.

  The reset signal is released after the elapse of time Ta from when the power switch 671 is turned on (when the power is turned on). When this reset signal release becomes valid, the main control unit CPU 611 starts a security check. Although not shown, the CPU 621 of the payout control device 81 also performs a security check from the time when the reset signal release becomes valid. The security check time T1 is 185 ms in the main controller CPU611 in this specific example, although it depends on the CPU type, system clock frequency, and the like. As is well known, the security check is to check whether or not the contents of the ROM in which the CPU 611, 621 or the like, which is a one-chip microcomputer, has written the game progress contents are legitimate contents.

  In the pachinko machine 50, the security check time T1 of the main control unit CPU 611 takes longer than the time required for the security check of the payout control unit CPU 621. Therefore, when the security check of the main control unit CPU 611 is completed, the payout control unit CPU 621 has completed the security check, and when the main control unit CPU 611 starts controlling the game according to the program written in the ROM, the payout control unit CPU 621 has already been The game control is executed. As a result, even if the main control device CPU 611 transmits data to the payout control device CPU 621 immediately after the power is turned on, the payout control device CPU 621 finishes the security check and executes its own control, so that the data can be reliably received. Can do.

  On the other hand, since the power switch 671 is turned on while pressing the RAM clear switch 676, the RAM clear signal is output for a predetermined time from the time when the reset signal is released. This “predetermined time” is the time from when the reset signal is released until the RAM clear switch 676 is stopped being pressed (generally realized by releasing the hand from the RAM clear switch 676). , T3 is added. Here, T3 means that when the RAM clear switch 676 is pressed at the time of power-on, the security check of the main control unit CPU 611 is completed and the process at the time of power-on described later is started (exactly the same process). This is the time reserved for the main controller CPU 611 to reliably detect the RAM clear signal at the time of S10 (see FIG. 8). In general, it is considered that the time from when the operator turns on the power switch 671 until the hand is released from the RAM clear switch 676 is sufficiently longer than the time required for the security check of the main control unit CPU 611. Considering the case where the hand is released from the RAM clear switch 676, T3 is set to 300 ms, which is longer than 185 ms required for the security check of the main controller CPU611. This is realized by stopping the RAM clear signal after T3 when the RAM clear signal generating circuit 677 detects that the RAM clear switch 676 is stopped. Thereby, the time when the RAM clear signal is stopped changes corresponding to the time when the operator releases the RAM clear switch 676.

  Further, as shown in FIG. 7, the power switch 671 and the RAM clear switch 676 are both fixed to one surface of the power substrate 85, and the power substrate 85 is made of resin from the fixed surface side of the switches 671 and 676. It is covered with a molded box-shaped cover. The power switch 671 and the RAM clear switch 676 are exposed from the cover and arranged close to each other. Therefore, both switches 671 and 676 can be operated simultaneously with one hand without removing the cover.

  Processing executed by the CPU 611 of the main controller 80 when the power is turned on will be described with reference to FIG. When the power switch 671 is operated, the pachinko machine 50 is energized, the reset signal is released, and when the security check of the CPU 611 itself is completed, this process is started and an initial process of turning on the power is executed (S5). Then, it is determined whether or not the RAM clear signal is on (S10). As described above, since the RAM clear signal is H (on) if the RAM clear switch 676 is in the on state when the reset signal is released, this is substantially the RAM clear switch 676 in the on state when the power is turned on. It is determined whether or not it was.

  When the RAM clear signal is not on (S10: no), the main controller 80 is restored to the power-off state. Therefore, first, it is determined whether or not the occurrence information at the time of power-off is normal (S15). If normal (S15: yes), the RAM determination value is calculated (S20), and whether or not the determination value is normal. Is determined (S25). Here, the determination value of the RAM is a value stored in the RAM when the power is turned off. In S25, it is determined whether or not the value calculated in S20 matches the value stored in the RAM. If the determination value is normal, that is, if the determination value matches the stored value (S25: yes), the process at the time of power recovery (for example, the information generated when the power is turned off is cleared or the sub integrated control device 83 is A command for returning to the gaming state when the power is cut off is transmitted) (S30). Then, interrupt setting is performed (S35), and the process proceeds to the main routine.

  When the RAM clear signal is on (S10: yes), the main controller 80 is returned to the initial state. For this purpose, first, it waits for the RAM clear signal to be turned off in the infinite loop of S40. When it is turned off, all of the RAM is cleared to 0 (S45), and initial value random number setting processing is executed (S50). When the initial value random number setting process is completed, the RAM is initialized (S55), the interrupt is set (S60), and the process proceeds to the main routine.

  The initial value random number setting process is shown in FIG. When this process is started, first, a hard random number is acquired (S200). The hard random number is a random value generated by a random number generation circuit 616 (see FIG. 5) provided in the CPU 611 of the main control device 80. The random number generation circuit 616 is activated almost simultaneously with the energization of the CPU 611 (see also FIG. 6), and the value of 0 to 65535 is set to a constant rule (for example, 0 → 1 → 2 →... → 65535) without overlapping in one cycle. → 0 → ...) and update to generate. Note that the cycle of the random number generation circuit 616 of the CPU 611 is 50 ms. The time from when the power is turned on until the initial value random number setting process (S50) is executed varies depending on how many times the infinite loop of S40 is repeated. The number of repetitions is determined by the time from when the power switch 671 is turned on while pressing the RAM clear switch 676 to when the RAM clear switch 676 is stopped (hereinafter referred to as operation time). As other factors, a change in the operation clock cycle of the CPU 611 due to a temperature change or the like can be considered, but the operation time becomes dominant because the variation in the operation time is overwhelmingly large. Since the operation time is considered to change with each operation, the value set as the initial value of the soft random number in the initial value random number setting process can be expected to be different each time.

  A remainder (referred to as α) obtained by dividing the hard random number thus obtained by the maximum value +1 of the jackpot determination random number is calculated (S205). In the pachinko machine 50, the maximum value of the jackpot determination random number is 349 (described later), and in S205, the acquired value of the hard random number is divided by 349 + 1, that is, 350. For example, if the hard random number acquired in S200 is 65000, dividing by 350 gives a quotient of 185 and a remainder of 250, so α = 250. In S210, α is set as the initial value of the soft random number, and the process ends (returns to the process of FIG. 8).

  The main routine will be described with reference to FIG. Although the main routine is shown in FIG. 8 as if it is a process that is executed following the process when the power is turned on, in practice, the main routine takes about 2 ms after executing the processes up to S35 or S60. It is repeatedly executed by each hardware interrupt. In the present embodiment, the process that is executed only once from S100 to S155 every time the main routine is activated is referred to as “main process”. The process of S160 that is repeatedly executed as much as possible is referred to as “residual process”. The “main process” is periodically executed by the interrupt.

  When a hardware interrupt is executed by the microcomputer, it is first determined whether or not the interrupt is a normal interrupt (S100). This determination process is performed by determining whether or not the value of a predetermined area of the RAM as a memory is a predetermined value. When the process executed by the microcomputer shifts to this process, the normal process is executed. It is for judging whether it is okay. If the interrupt is not normal, microcomputer runaway due to noise or the like may be considered when power is turned on. However, microcomputer runaway may be considered to be almost impossible due to recent technological improvements, and is usually when power is turned on. When the power is turned on, the value of the predetermined area of the RAM is different from the predetermined value.

  When it is determined that the interrupt is not normal (S100: no), initial setting (for example, writing a predetermined value to the predetermined area of the memory and setting a special symbol and a normal symbol as an initial symbol to each initial to the working area of the memory. Value is written (S105), and the process proceeds to the remaining process (S160).

  If an affirmative determination is made with a normal interrupt (S100: yes), an initial value random number update process is executed (S110). This process is an increment process that increments the initial random number value by 1 each time this process is executed. The initial random number value before this process is incremented by +1, but the random number value before this process is executed is the maximum. When the value is “349”, it returns to the initial value “0” in the next processing, and 350 integers from “0” to “349” are repeatedly generated in ascending order.

  The jackpot determination random number update process (S115) subsequent to S110 is an increment process that increments by one each time the process is executed, similar to the initial value random number update process. When the maximum value is "349", the next process starts with the next process. Then, 350 integers from “0” to “349” are repeatedly generated in ascending order. The initial value of the jackpot determination random number is the value set in the initial value random number setting process. In the above example, since α = 250, the big hit determination random number is updated as “250” “251” “252”... “349” “0” “1”.

When the big hit determination random number is updated once (350 times), the initial value random number at that time is set as the initial value of the big hit determination random number, and the big hit determination random number is +1 from the initial value. Increment processing is performed. Then, when the big hit determining random number makes one round again, the initial value random number at that time is changed to the initial value of the big hit determining random number. That is, this series of operations is repeated. In the above example, when the big hit determination random number reaches “249”, it is one round, so the next value after “249” is the value of the initial value random number. If the value of the initial random number is “87”, it changes to “249” “87” “88”... “349” “0” “1”. Next to is a new initial random number value.
The jackpot symbol determination random number update process (S120) is configured as a counter that repeatedly creates ten integers “0” to “9”, and is incremented by +1 for each process and is the initial value “0”. Return to.

  The hit determination random number update process (S125) following S120 is configured as a counter that repeatedly creates six integers “0” to “5”, and is incremented by +1 for each process. Return to a certain “0”. The number of values to be won is 3 in both the normal probability state and the high probability state, and the values are “0”, “3”, and “5”. This winning determination random number update process is used for lottery of normal symbols, and other initial value random numbers, big hit determination random numbers, big hit symbol determination random numbers, reach determination random numbers, and fluctuation pattern determination random numbers are drawn special symbols. Used for.

  The reach determination random number update process (S130) is configured as a counter that repeatedly creates 229 integers from “0” to “228”, and is incremented by +1 for each process and is the initial value “0”. Return to. In the normal probability state, the number of values won when the variable time shortening function is not activated is 21, and the values are “0” to “20”. The number is 5, the values are “0” to “4”, the number of values to be won in the high probability state is 6, and the values are “0” to “5”.

  The variation pattern determination random number update process (S135) is configured as a counter that repeatedly creates 1021 integers “0” to “1020”, and is incremented by 1 for each process and is the first value when the maximum value is exceeded. Return to "0". Note that the big hit determination random number, the big hit symbol determination random number, the hit determination random number, the reach determination random number, and the variation pattern determination random number are called soft random numbers with respect to the hard random numbers described above (see also FIG. 6).

In the subsequent winning confirmation process (S140), confirmation of winning in the first start port 11 and second start port 12 and input processing of each switch provided in the pachinko machine 50 and connected to the main controller 80 are executed.
In this embodiment, when a game ball wins the first start port 11 and the second start port 12, a plurality of random numbers such as a big hit determination random number, a big hit symbol determination random number, a variation pattern determination random number, a reach determination random number, etc. are acquired. However, the number that can be reserved is limited to 4 each of the first start port 11 and the second start port 12, and when the first reserved memory is full, the game ball is stored in the first start port 11. Even if the winning ball or the second hold memory is full, even if the game ball wins the second start port 12, only the winning ball is paid out, and the plurality of random numbers are not stored. Yes.

  Subsequently, a success / failure determination process (S145) as condition establishment determination means for determining whether or not a big hit is made. When this success / failure determination process (S145) is completed, each output process (S150) such as an image output process is subsequently executed.

  In each output process (S150), as the game progresses, the main controller 80 controls the production symbol controller 82, the payout controller 81, the launch controller 84, the sub-integrated controller 83, the big prize opening solenoid 14b, and the like. Each output process is executed. That is, when it is detected by the winning confirmation process (S140) that there is a winning game ball at each winning port on the game board 1, the winning ball data is output to the payout control device 81 so as to pay out the gaming ball as a winning ball. In the process of outputting sound data corresponding to the gaming state to the sub-integrated control device 83, an error signal is output to the production symbol control device 82 to notify that there is an error when the pachinko machine 50 is abnormal. Each process is executed.

  In the subsequent fraud monitoring process (S155), it is monitored whether or not fraud is performed on the normal winning opening (the first left winning opening 31, the second left winning opening 32, the first right winning opening 33, the second right winning opening 34). It is a process to determine whether or not the number of game balls entering the winning opening within a predetermined time is greater than a predetermined number. It is processing to do. That is, the fraud determination means is provided in the main controller 80.

  The remaining process subsequent to this process is composed of the initial value random number update process (S160), but is the same process as S110 described above. This process forms an infinite loop and is repeated as long as time is allowed until the next interrupt is executed. The time required to execute the main processing from S100 to S155 described above differs for each interrupt depending on whether or not the big hit processing is executed, the difference in display mode of special symbols, and the like. As a result, the number of times the remaining process is executed is different for each interrupt, and the value updated to the initial random number is not uniform when the interrupt process shown in FIG. 9 is executed once. Thereby, the possibility that the initial value random number is synchronized with the big hit determination random number becomes extremely small. If the value of the initial value random number (350 patterns from 0 to 349) when the big hit determination random number has made one round, the probability of synchronization is only 1/350. The hit determination random number update process (S125) described above may also be executed in the remaining process.

  Processing executed by the CPU 621 of the payout control device 81 when the power is turned on will be described with reference to FIG. When the power switch 671 is operated, the pachinko machine 50 is energized, the reset signal is released, and when the security check of the CPU 621 itself is completed, this process is started and an initial process of turning on the power is executed (S200). Then, it is determined whether or not the RAM clear signal is on (S205). As described above, this substantially determines whether or not the RAM clear switch 676 is in the ON state when the power is turned on.

  When the RAM clear signal is not on (S205: no), the payout control device 81 is restored to the power-off state. Therefore, first, it is determined whether or not the power failure recovery information is set (S210). If it is set (S210: yes), the checksum of the data recorded in the current RAM is calculated (S215). Then, it is determined whether or not the value matches the checksum calculated in the same manner when the power is turned off (checksum is normal) (S220). If it matches the stored checksum (S220: yes), the RAM area of the portion excluding the storage target is cleared (S225). Then, the initial value is written in the cleared area (S240), the stand READY signal is turned on (S245), and the CTC is set (S250). Here, the stand READY signal is a signal that informs the CR unit 56 that the payout operation is possible. The CTC sets an interrupt cycle of a timer interrupt performed by the payout control device 81. When the setting of the CTC is completed, an interrupt is set (S255) and the process proceeds to a main routine (not shown) of the payout control device 81. .

When the RAM clear signal is on (S205: yes), the payout control device 81 is returned to the initial state. For this purpose, first, all the RAMs are cleared to 0 (S230), the RAM to be saved is initially set (S235), and then the process proceeds to S240.
That is, in the power-on process in the main controller 80 shown in FIG. 8, when the RAM clear signal is on, the infinite loop of S40 (FIG. 8) is executed so that the RAM clear signal is turned off again. In the power-on process in the payout control device 81 shown in FIG. 11, when the RAM clear signal is on, all the RAMs are immediately cleared without waiting for the RAM clear signal to be turned off. .

As a result, the processing execution timing when the main control device 80 and the payout control device 81 are turned on is as shown in FIG. 12A is a time chart when the power is normally turned on, and FIG. 12B is a case where the main controller and the payout controller wait for the RAM clear signal to be turned off when the RAM is cleared. FIG. 12C is a time chart when waiting for the RAM clear signal to be turned off only in the main controller when the RAM is cleared.
When the power is turned on normally, as shown in FIG. 12A, when the main control device 80 and the payout control device 81 are both turned on, a security check is performed, and the processing at the time of power-on is performed. The original processing (main processing) 80 and 81 is performed. A high-performance CPU 611 of the main control device 80 is used because the clock frequency is higher than that of the CPU 621 of the payout control device 81, but the ROM 614 of the main control device 80 has a larger capacity than the ROM 624 of the payout control device 81. Therefore, the security check takes time. As a result, the on-load processing of the payout control device 81 starts earlier than the on-load processing of the main control device 80 and ends earlier. As a result, when the main control device 80 starts the main processing, the payout control device 81 has already started its own main processing, and the payout control device 81 receives the command transmitted from the main control device 80. Processing can be performed without spilling.

On the other hand, when the RAM is cleared, as shown in FIG. 12B, the main controller 80 performs an infinite loop (S4 in FIG. 8) after the security check while the RAM clear signal is on. Processing is delayed by the amount of minutes. When the RAM clear signal is turned off (the hand is released from the RAM clear switch 676, described as “non-operation” in FIG. 12), the power-on process is started, and the main process (main process) of the main controller 80 is started. Do. At this time, similarly, when the payout control device 81 waits for the RAM clear signal to be turned off, the main control device 80 performs the process at the time of turning on the power almost simultaneously with the main control device 80. At the time of execution, there is a possibility that the payout control device 81 has not started the original process (main process). In this case, the payout control device 81 may miss a command transmitted from the main control device 80.
In this regard, when the RAM of the payout control device 81 of the present invention is cleared, there is no processing corresponding to S40 in FIG. 8, so when the security check is completed, as shown in FIG. The process at the time of insertion is started, and the main process of the payout control device 81 is performed. As a result, when the main controller 80 performs the main process, the payout controller 81 has already started the main process, and the payout controller 81 misses the command transmitted from the main controller 80. The processing can be performed without any problem.

  According to the pachinko machine 50 configured as described above, even when the RAM clear switch 676 is pressed and the power switch 671 is turned on, when the RAM clear switch 676 is stopped (more precisely, the RAM clear switch 676 T3 after stopping pressing 676. More precisely, the main control unit CPU 611 detects that the time T3 has elapsed and the RAM clear signal is turned off (see S40 in FIG. 8), and further RAM The initial value of the jackpot determination random number is determined based on the value of the hard random number that is cleared to 0 (see S45 in FIG. 8). The values of Ta and T3 are almost constant for each RAM clear operation, but the time from when the reset signal is released until the RAM clear switch 676 is turned off (the operator stops pressing the RAM clear switch 676). Is different every time. For this reason, the value of the hard random number is rarely the same as the value of the hard random number as before, and it can be expected that the initial value of the jackpot determination random number is different every time the RAM clear operation is performed. Therefore, an illegal act of aiming for a big hit by performing a RAM clear operation becomes extremely difficult.

  Since the hard random number is updated at a very high speed of 0 to 65535 in 50 ms, even if the operator has a habit of releasing the RAM clear switch 676 at the same time as the power switch 671 is turned on. , It is almost never the same value. Note that if the operator releases his hand from the RAM clear switch 676 prior to turning on the power switch 671, it will be judged as no in S10 and the recovery operation of the pachinko machine 50 will start, so use RAM clear. There is no worry that the cheating done. If the RAM clear is essential, the energization of the pachinko machine 50 is cut off again (for example, the power switch 671 is turned off), and the RAM clear operation is performed.

  Further, regarding the RAM clear of the payout control device 81, without waiting for the RAM clear switch 676 to be turned off (that is, without waiting for the elapse of T3), the RAM 625 is cleared when the security check of the ROM 624 is completed, and the power supply Processing at the time of input. Therefore, when the main process of the main control device 80 is started, the main process of the payout control device 81 is already started, and the payout control device 81 steadily receives a command transmitted from the main control device 80. Can do.

  Here, the correspondence between the configuration of the present embodiment and the configuration requirements of the present invention is shown. The processing of S110 to S115 corresponds to the “first random number generation means” of the present invention, the CPU 611 of the main control device 80 corresponds to the “main control means” of the present invention, and the RAM 615 of the main control device 80 corresponds to the “first random number generation means” of the present invention. The CPU 621 of the payout control device 81 corresponds to the “payout control means” of the present invention, the RAM 625 of the payout control device 81 corresponds to the “second RAM” of the present invention, and the RAM clear switch 676 is the main RAM. It corresponds to the “clear switch” of the invention, and the processing of S10 corresponds to “determination means” of Reference Example 1 of the present invention (the processing of S10 and the RAM clear signal generation circuit 677 corresponds to “estimation means” of the present invention). The random number generation circuit 616 corresponds to the “second random number generation means” of the present invention, the process of S50 corresponds to the “initial value setting means” of the present invention, and the process of S45 performed through the process of S40 Corresponds to the "second 1RAM Clear means", the processing of S230 corresponds to the "2RAM Clear means" of the present invention, the processing step S30 corresponds to the "recovery unit" of the invention. The RAM clear signal generation circuit 677 corresponds to “non-operation signal output means” of the present invention.

[Other embodiments]
In the above embodiment, the initial value of the big hit determination random number is determined using the hard random number, but instead, the initial value of the initial random number may be determined using the hard random number. In this case, since the hard random number value affects the initial value random number, not only the first round but also the big hit decision random numbers after the second round are affected. In this case, the initial value of the first round of jackpot determination random numbers may be the initial value random number. Further, the calculation when setting the value of the hard random number as the initial value of the big hit random number may be performed by a method other than the calculation performed in S205. For example, a table in which the value of the second random number and the numerical value to be set as the initial value of the first random number corresponding thereto is prepared in advance, and the initial value of the first random number is referred to by referring to this table May be set. However, in this case, it is necessary to prepare as many table data as the number of initial random numbers that can be set (350 in the above embodiment), and the ROM or the like for storing the table may press the capacity. There is. In this regard, in the above embodiment, since the remainder when the value of the hard random number is divided by the maximum value +1 of the jackpot determination random number is calculated, the storage capacity can be reduced. When this calculation is performed, the hard random number value may be actually divided by the maximum value of the jackpot determination random number + 1, but the maximum value of the jackpot determination random number + 1 is repeatedly subtracted from the hard random number value. If the calculated value becomes negative, it may be calculated by adding the maximum value +1 of the jackpot determining random number.
Although the RAM 615 of the CPU 611 and the RAM 625 of the CPU 621 are cleared to 0 by the RAM clear, a nonvolatile RAM (for example, in the main control device 61 but provided outside the CPU 611 in other locations) The storage contents of a storage medium other than the RAM or a non-volatile RAM provided on another substrate (not shown) or the RAM may be cleared.

The reset signal is input directly from the reset signal generation circuit 674 to the main controller 80 and the payout controller 81, but may be configured to be input to both or one via a predetermined delay circuit.
In the above embodiments, the signals are configured as high active. However, some (or all) signals may be configured as low active. For example, the RAM clear signal may be set to low active, and the time when the RAM clear is performed may be performed after the rise of the RAM clear signal.

In the above embodiment, the RAM clear signal is determined based on whether the RAM clear switch 676 is turned on when the power switch 671 is turned on and whether the RAM clear switch 676 is turned off. However, the determination may be made using different signals. For example, the RAM clear signal is generated by the RAM clear signal generation circuit 677 if the RAM clear switch 676 is turned on when the reset signal is released, as described above. Separately, the RAM clear signal is high. In this state, when the RAM clear switch 676 is turned off, a predetermined signal may be generated after T3, and when this signal is detected, the CPU 611 may clear all of the RAM to obtain a hard random number.
In the above-described embodiment, the power switch 671 and the RAM clear switch 676 are provided on the power supply board 85. However, both or one of them may be provided at another location (for example, the main control device 61 or the payout control device 62). Good.

80 Main controller 81 Dispensing controller 85 Power supply board 671 Power switch 674 Reset signal generating circuit 676 RAM clear switch

Claims (1)

First random number generating means for generating a first random number used for determination of success / failure in a game, main control means for performing determination determination based on at least the first random number, and data used for processing of the main control means are non-volatile First RAM capable of being held, a payout control means for paying out a value carrier to a player of the gaming machine based on a command from the main control means, and used for processing of the payout control means In a gaming machine comprising: a second RAM capable of holding data in a nonvolatile manner; and a clear switch operated when clearing the contents held in the first RAM and the second RAM.
An estimation means that starts when the gaming machine is energized and estimates whether or not the clear switch has been operated when the energization is performed;
When it is estimated by the estimation means that the clear switch has been operated, it is determined whether or not the clear switch has transitioned to a non-operated state, and when it has been determined that the clear switch has transitioned, a non-operation signal Non-operation signal output means for outputting
A second random number generating means that is activated when the gaming machine is energized and generates a second random number independent of the first random number while being updated over time;
When a non-operation signal is output by the non-operation signal output unit, an initial value setting unit that sets a numerical value calculated based on the random number generated by the second random number generation unit as an initial value of a random number used for determination of success / failure; A first RAM clear for clearing data held in the first RAM after the non-operation signal is output by at least the non-operation signal output means when the estimation means estimates that the clear switch has been operated. Means,
When it is estimated by the estimation means that the clear switch has been operated, the data held in the second RAM is cleared without waiting for the non-operation signal output by the non-operation signal output means. Second RAM clearing means;
When the estimation means estimates that the clear switch has not been operated, a recovery means for recovering the gaming state of the gaming machine based on data held in the first RAM and the second RAM;
A gaming machine characterized by comprising:

Images