JP2012028693A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a heat dissipation structure in a silicon substrate of an MMIC on which an active element including a nitride semiconductor is mounted and thereby enable a nitride semiconductor element having a large heat release to be mounted even on an Si substrate with smaller thermal conductivity than an SiC substrate.SOLUTION: A semiconductor device 10 has a silicon substrate 12, a metal layer 24, and an active element 14. The silicon substrate has a mounting surface 12b and a principal surface 12a. The principal surface and the mounting surface face each other. A via hole V extending to the mounting surface from the principal surface is formed on the silicon substrate 12. The metal layer is provided within the via hole. The active element includes a nitride semiconductor. The active element has a first portion in contact with the metal layer, and a second portion located on both sides of the first portion and provided on the mounting surface.

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof.

  As a kind of semiconductor device, a monolithic microwave integrated circuit (MMIC) as described in Non-Patent Document 1 is known. The MMIC described in this document is manufactured using a wafer formed by epitaxially growing a GaN semiconductor layer on a SiC substrate. Thus, the MMIC manufactured using the SiC substrate is excellent in heat dissipation characteristics, high frequency characteristics, and band characteristics.

Eli Reese et al., “Wideband Power Amplifier MMICs Optimized GaN on SiC”, IEEE / MTT-S International Microwave Symposium 2010, Dig. , Pages 1230 to 1233

  The SiC substrate described above is expensive. Therefore, the MMIC manufactured using the SiC substrate can be expensive.

  Therefore, the inventor of the present application is considering to configure an MMIC by mounting an active element including a nitride semiconductor on a silicon substrate. In addition, since the silicon substrate has a lower thermal conductivity than the SiC substrate, the inventor of the present application provides a heat dissipation structure on the silicon substrate in order to mount an active element including a nitride semiconductor with a large amount of heat generation on the silicon substrate. I am considering that. In this heat dissipation structure, a via hole is provided in a silicon substrate, a metal layer is provided in the via hole, and an active element is mounted on the metal layer.

  The present invention provides a semiconductor device manufactured by mounting an active element including a nitride semiconductor on such a metal layer, which is low in cost and excellent in supporting strength of the active element. The purpose is that. Another object of the present invention is to provide a method for manufacturing such a semiconductor device.

  A semiconductor device according to one aspect of the present invention includes a silicon substrate, a metal layer, and an active element. The silicon substrate has a mounting surface and a main surface. The main surface and the mounting surface face each other. A via hole extending from the main surface to the mounting surface is formed in the silicon substrate. The metal layer is provided in the via hole. The active device includes a nitride semiconductor. The active element has a first portion in contact with the metal layer, and a second portion provided on the mounting surface on both sides of the first portion.

  In this semiconductor device, the size of the via hole is set so that the active element is mounted over the metal layer and the mounting surfaces on both sides thereof. Therefore, the size of the via hole is small. As a result, in this semiconductor device, the amount of the metal layer can be reduced. The active element is supported by the mounting surface and is in contact with the metal layer. Therefore, this semiconductor device can obtain a strong support strength of the active element while ensuring a heat dissipation function by the metal layer even if a silicon substrate that is less expensive than the SiC substrate but is inferior in heat dissipation is used.

  A method of manufacturing a semiconductor device according to another aspect of the present invention includes: (a) preparing an active element including a nitride semiconductor; (b) mounting the active element on a mounting surface of a silicon substrate; (C) forming a via hole reaching only a part of the active element from the main surface of the silicon substrate facing the mounting surface to the mounting surface; and (d) forming a metal layer in the via hole.

  A method for manufacturing a semiconductor device according to still another aspect of the present invention includes: (a) a step of preparing an active element including a nitride semiconductor; and (b) a mounting surface of the silicon substrate from the mounting surface of the silicon substrate. A step of forming a via hole extending to the main surface of the silicon substrate facing the substrate, (c) a step of forming a metal layer in the via hole, and (d) a first portion of the active element in contact with the metal layer, Mounting the active element such that the second part of the active element on both sides of the part is provided on the mounting surface.

  According to these manufacturing methods, the above-described semiconductor device can be preferably manufactured. For example, the amount of the metal layer can be reduced, and the manufacturing time of the metal layer can be shortened. As a result, the semiconductor device can be manufactured at a low cost.

  In one embodiment, the active device may have a SiC substrate or a GaN substrate.

  In one embodiment, the entire periphery of the active element can be provided on the mounting surface. According to this embodiment, the size of the via hole, that is, the amount of the metal layer can be further reduced.

  In one embodiment, after the step of mounting the active element on the mounting surface of the silicon substrate, a wiring for connecting the transmission line and the active element arranged on the mounting surface of the silicon substrate may be formed. .

  As described above, according to the present invention, a semiconductor device manufactured by mounting an active element including a nitride semiconductor on a metal layer is low in cost and excellent in supporting strength of the active element. A semiconductor device is provided. Moreover, according to this invention, the manufacturing method is provided.

It is a top view of the semiconductor device concerning one embodiment. It is sectional drawing of the semiconductor device which concerns on one Embodiment. It is a top view which shows roughly the relationship between a via hole and an active element. It is a figure which shows each process of the manufacturing method of the semiconductor device which concerns on one Embodiment. It is a figure which shows each process of the manufacturing method of the semiconductor device which concerns on another embodiment. It is a figure which shows each process of the manufacturing method of the semiconductor device which concerns on another embodiment. It is sectional drawing which shows the semiconductor device which concerns on another embodiment.

  DESCRIPTION OF EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals.

  FIG. 1 is a plan view of a semiconductor device according to an embodiment. The semiconductor device in one embodiment may be an MMIC. As shown in FIG. 1, in one embodiment, the semiconductor device 10 includes a silicon substrate 12 and an active element 14. The semiconductor device 10 may further include a passive element 16, a terminal electrode 18, a line 20, and a wire 30.

  Examples of the passive element 16 include an element such as a capacitor and an inductor. The passive element 16 may be formed on the silicon substrate 12 by a semiconductor process, or may be an element manufactured separately and mounted on the silicon substrate 12. The terminal electrode 18 is a part that provides an electrical connection to the outside. The line 20 and the wire 30 electrically connect corresponding elements among the active element 14, the passive element 16, and the terminal electrode 18.

  FIG. 2 is a cross-sectional view of a semiconductor device according to an embodiment. The active element 14 shown in FIGS. 1 and 2 is an active element including a nitride semiconductor. In one embodiment, the active element 14 can be a HEMT device.

  As shown in FIG. 2, the active element 14 may include a semiconductor substrate 14a, a first semiconductor layer 14b, a second semiconductor layer 14c, a gate electrode 14d, a source electrode 14e, and a drain electrode 14f.

  As the semiconductor substrate 14a, for example, a SiC substrate or a GaN substrate can be used. The first semiconductor layer 14b is a semiconductor layer epitaxially grown on the semiconductor substrate 14a. An example of the first semiconductor layer 14b is an i-type GaN semiconductor layer. The second semiconductor layer 14c is a semiconductor layer epitaxially grown on the first semiconductor layer 14b. An example of the second semiconductor layer 14c is an n-type AlGaN semiconductor layer. The gate electrode 14d, the source electrode 14e, and the drain electrode 14f are provided on the second semiconductor layer 14c. The gate electrode 14d is provided between the source electrode 14e and the drain electrode 14f.

As shown in FIG. 2, the silicon substrate 12 has one main surface 12a and the other main surface 12b. An insulating film 22 may be provided on one main surface 12a. Examples of the insulating film 22 include a film made of SiO ₂ or SiN.

  A via hole V is formed in the silicon substrate 12. In one embodiment, the via hole V is provided so as to extend from the other main surface 12b to the one main surface 12a. A metal layer 24 is provided in the via hole V. As the metal layer 24, for example, a metal layer made of Au can be exemplified.

  The metal layer 24 may be a multilayer metal layer. In the case of a multilayer metal layer, an Au layer is formed along the surface defining the other main surface 12b and the via hole V. In addition, a plurality of layers including, for example, a molybdenum layer and a copper layer are formed on the Au layer. Molybdenum layers and copper layers can be alternately stacked. Molybdenum is a metal having a thermal expansion coefficient close to that of SiC, and the copper layer is a metal having a large thermal conductivity. Therefore, when the semiconductor substrate 14a is a SiC substrate, a metal layer 24 having a thermal expansion coefficient suitable for the semiconductor substrate 14a and a thermal conductivity suitable for heat dissipation from the active element 14 is formed on a portion in contact with the semiconductor substrate 14a. Can be provided.

  As shown in FIG. 2, the insulating film 22 is not formed on a portion of the one main surface 12 a of the silicon substrate 12 around the via hole V. An active element 14 is mounted on this portion of one main surface 12a. Therefore, one main surface 12a has a function as a mounting surface for mounting the active element 14.

  The mounting surface of the active element 14, that is, the surface facing one main surface 12a includes a first portion 14g and a second portion 14h. The first portion 14 g is a portion in contact with the metal layer 24. The second portion 14h is a portion that exists on both sides of the first portion 14g, and is a portion that is mounted on the main surface (mounting surface) 12a.

  FIG. 3 is a plan view schematically showing the relationship between via holes and active elements. As shown in FIG. 3A, the via hole V may have a size such that the entire periphery of the active element 14 is provided on one main surface 12a.

  Further, as shown in FIGS. 3B and 3C, the via hole V is mounted such that two edges in a certain direction of the active element 14 are mounted on one main surface 12a with the via hole V interposed therebetween. Can have a size. That is, the width of the via hole V in a certain direction may be smaller than the distance between the two edges of the active element 14 in that direction.

  In any of the forms shown in FIG. 3 described above, the size of the via hole V can be reduced, and as a result, the amount of the metal layer 24 can be reduced. In particular, according to the embodiment shown in FIG. 3A, the amount of the metal layer 24 can be reduced most.

  3, a part of the mounting surface of the active element 14 is in contact with the metal layer 24, and at least two edges of the mounting surface of the active element 14 are one main part. Since it is mounted on the surface 12a, a high support strength of the active element 14 can be obtained while ensuring a heat dissipation function by the metal layer 24. If a part of the mounting surface of the active element 14 is located on the one main surface 12a of the silicon substrate 12, the size and shape of the active element 14 and the via hole may be any size and shape. .

  Further, since the semiconductor device 10 uses the silicon substrate 12 as a substrate on which the active element 14 is mounted, it can be produced at low cost. In the semiconductor device 10, the passive element 16 that generates a small amount of heat is provided on the silicon substrate 12, but a part of the active element 14 that generates a large amount of heat is provided on the metal layer 24. The generated heat can be radiated satisfactorily. Furthermore, the semiconductor device 10 can obtain good characteristics by using a SiC substrate as a part of the active element 14.

  A method for manufacturing a semiconductor device according to an embodiment will be described below. FIG. 4 is a diagram illustrating each step of the method of manufacturing a semiconductor device according to one embodiment.

  In one embodiment, as shown in FIG. 4A, elements such as the insulating film 22, the electrode 32, and the line 20 are arranged on one main surface 12 a on one main surface 12 a of the silicon substrate 12. Form. The passive element 16 includes an electrode 32 and an insulating film 22. Next, as shown in FIG. 4A, the insulating film 22 present at the position where the active element 14 is to be mounted is removed. In this step, any process capable of removing the insulating film 22 such as wet etching or dry etching can be adopted. Separately from the step shown in FIG. 4A, the active element 14 shown in FIGS. 1 and 2 is prepared.

  Next, as shown in FIG. 4B, the active element 14 is mounted on one main surface 12a from which the insulating film 22 has been removed. Note that an Au film may be provided on the mounting surface of the active element 14, and the active element 14 may be fixed to one main surface 12a of the silicon substrate 12 by eutectic bonding between the Au film and silicon.

  Next, as shown in FIG. 4C, a via hole V is formed from the other main surface 12b of the silicon substrate 12 to the one main surface 12a. Through this step, a part of the active element 14 is positioned on the via hole V. The via hole V can be formed by any process for forming a via hole in a silicon substrate such as dry etching or wet etching.

  Next, as shown in FIG. 4D, the metal layer 24 is formed along the surface defining the via hole V. In this step, the metal layer 24 can also be formed on the other main surface 12b. The metal layer 24 can be formed by, for example, a plating process.

  Next, as shown in FIG. 4 (e), the electrodes 14 d, 14 e, 14 f of the active element 14 and the corresponding line 20 are connected by wiring 30. The wiring 30 is a wire in this embodiment. The semiconductor device according to one embodiment can be manufactured through the above steps. According to this manufacturing method, since the size of the via hole V is small, the amount of the metal layer can be reduced and the manufacturing time can be shortened. Therefore, the semiconductor device of one embodiment can be manufactured at low cost.

  Hereinafter, a method for manufacturing a semiconductor device according to another embodiment will be described. FIG. 5 is a diagram illustrating each step of a method for manufacturing a semiconductor device according to another embodiment. In another embodiment, first, as shown in FIG. 5A, a step similar to the step shown in FIG. 4A is performed. In addition, the active element 14 shown in FIGS. 1 and 2 is prepared separately from the process shown in FIG. 5A, and the active element 14 is changed as in the process shown in FIG. Then, it is mounted on one main surface 12a from which the insulating film 22 has been removed.

  Next, as shown in FIG. 5B, another insulating film 26 that functions as a mask for the wiring 30 is formed, and further, the wiring 30 is formed. The wiring 30 can be formed by metal plating. Next, as shown in FIG. 5C, via holes V are formed from the other main surface 12b of the silicon substrate 12 to the one main surface 12a, as in the step shown in FIG. 4C.

  Next, as shown in FIG. 5D, the metal layer 24 is formed along the surface defining the via hole V, as in the step shown in FIG. As described above, according to the manufacturing method shown in FIG. 5, the wiring 30 can be formed by patterning the metal film without using a wire. Further, according to the manufacturing method shown in FIG. 5, the process of connecting the wires becomes unnecessary, and the semiconductor device according to the embodiment can be manufactured more easily.

  Hereinafter, a method for manufacturing a semiconductor device according to still another embodiment will be described. FIG. 6 is a diagram illustrating a method for manufacturing a semiconductor device according to still another embodiment. In still another embodiment, unlike the steps shown in FIGS. 4 and 5, the formation of the via hole V is performed prior to the surface process shown in FIGS. 4 (a) and 5 (a) and 5 (b). And formation of the metal layer 24 is performed. Details will be described below.

  In yet another embodiment, as shown in FIG. 6A, first, an insulating film 22 is formed on one main surface 12a of the silicon substrate 12, and the other main surface 12b of the silicon substrate 12 is formed. To one main surface 12a.

  Next, as shown in FIG. 6B, the metal layer 24 is formed along the surface defining the via hole V. In this case as well, the metal layer 24 can be formed on the other main surface 12 b of the silicon substrate 12.

  Next, as shown in FIG. 6C, as in the step shown in FIG. 4A, the insulating film 22, the passive element 16, and the line 20 are formed on one main surface 12a of the silicon substrate 12. Form an element. Further, as shown in FIG. 6C, the insulating film 22 present at the position where the active element 14 is to be mounted is removed.

  Next, as shown in FIG. 6D, the active element 14 is mounted on one main surface 12a from which the insulating film 22 has been removed. Next, the electrodes 14d, 14e, and 14f of the active element 14 and the corresponding passive elements 16 or terminal electrodes 18 are wired by wiring 30 such as wires, whereby the semiconductor device according to the embodiment can be manufactured.

  The various embodiments of the present invention have been described above. However, the present invention is not limited to the above-described embodiment, and various modifications can be made. FIG. 7 is a cross-sectional view showing a semiconductor device according to another embodiment. In the semiconductor device 10 </ b> A shown in FIG. 7, a recess R is formed on one main surface 12 a of the silicon substrate 12. A bottom surface RF that defines the recess R is used as a mounting surface of the active element 14. In the semiconductor device 10A, the depth of the recess R is made substantially the same as the thickness of the active element 14, so that the horizontal level of the electrodes 14d, 14e, and 14f of the active element and the horizontal line 20 formed on the silicon substrate 12 are increased. Levels can be aligned. As a result, the length of the wire connecting the active element 14 and the line 20 can be shortened. As a result, the parasitic component (parasitic inductance) of the wiring 30 can be reduced and the characteristics of the semiconductor device can be improved.

  DESCRIPTION OF SYMBOLS 10,10A ... Semiconductor device, 12 ... Silicon substrate, 12a ... One main surface, 12b ... The other main surface, 14 ... Active element, 14g ... First part, 14g ... Second part, 16 ... Passive element, 18 ... terminal electrode, 20 ... line, 22 ... insulating film, 24 ... metal layer, V ... via hole.

Claims (8)

A silicon substrate having a mounting surface and a main surface facing the mounting surface, in which via holes extending from the main surface to the mounting surface are formed;
A metal layer provided in the via hole;
An active element including a nitride semiconductor, the active element having a first portion in contact with the metal layer, and a second portion provided on the mounting surface on both sides of the first portion. Elements,
A semiconductor device comprising:   The semiconductor device according to claim 1, wherein the active element includes a SiC substrate or a GaN substrate.   The semiconductor device according to claim 1, wherein the entire periphery of the active element is provided on the mounting surface. A method for manufacturing a semiconductor device, comprising:
Providing an active device comprising a nitride semiconductor;
Mounting the active element on a mounting surface of a silicon substrate;
Forming a via hole reaching only a part of the active element from the main surface of the silicon substrate facing the mounting surface to the mounting surface;
Forming a metal layer in the via hole;
Including methods. A method for manufacturing a semiconductor device, comprising:
Providing an active device comprising a nitride semiconductor;
Forming a via hole in the silicon substrate extending from a mounting surface of the silicon substrate to a main surface of the silicon substrate facing the mounting surface;
Forming a metal layer in the via hole;
Mounting the active element such that a first portion of the active element is in contact with the metal layer and a second portion of the active element on both sides of the first portion is provided on the mounting surface;
Including methods.   The method according to claim 4 or 5, wherein the active device comprises a SiC substrate or a GaN substrate.   The method according to claim 4, wherein the entire periphery of the active element is provided on the mounting surface.   The wiring for connecting the transmission line arranged on the mounting surface of the silicon substrate and the active element is formed after the step of mounting the active element on the mounting surface of the silicon substrate. The method according to 4 or 5.

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