JP2012023404A - Circuit substrate, and semiconductor module using the same - Google Patents

Circuit substrate, and semiconductor module using the same Download PDF

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JP2012023404A
JP2012023404A JP2011236825A JP2011236825A JP2012023404A JP 2012023404 A JP2012023404 A JP 2012023404A JP 2011236825 A JP2011236825 A JP 2011236825A JP 2011236825 A JP2011236825 A JP 2011236825A JP 2012023404 A JP2012023404 A JP 2012023404A
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circuit board
metal
heat sink
metal heat
metal circuit
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JP5218621B2 (en
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Toshiyuki Imamura
寿之 今村
Junichi Watanabe
渡辺  純一
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Proterial Ltd
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Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor module which can operate a mounting semiconductor chip with high power while exhibiting high heat dissipation efficiency and durability.SOLUTION: A metal circuit plate 3 with a thickness Tand a metal heat dissipation plate 4 with a thickness Tare bonded to one and the other surfaces of a ceramics substrate 2, respectively, via a brazing material 5. Although both the metal circuit plate 3 and the metal heat dissipation plate 4 are formed of a kind of copper or copper alloy, material qualities of those are different from each other. An apparent coefficient of heat expansion of a surface of the metal circuit plate 3 is in a range of (3 to 9)×10/K, and an apparent coefficient of heat expansion of a surface of the metal heat dissipation plate 4 is in a range of (9 to 17)×10/K.

Description

本発明は、主に大電力で動作する半導体チップを搭載する回路基板、およびこれを用いた半導体モジュールの構造に関する。   The present invention relates to a circuit board on which a semiconductor chip operating mainly with high power is mounted, and a structure of a semiconductor module using the circuit board.

近年、電動車両用インバータとして高電圧、大電流動作が可能なパワー半導体モジュール(例えばIGBTモジュール)が用いられている。こうした半導体モジュールにおいては、半導体チップが自己の発熱によって高温になるため、その放熱を効率よく行なうという機能が要求される。このため、この半導体モジュールにおいて、半導体チップを搭載する回路基板としては、機械的強度が高く、熱伝導率の高いセラミックス基板に金属板を接合したものが広く使用されている。ここで、金属板はセラミックス基板の両面に接合され、その一面は金属回路板となり、他面は金属放熱板となる。金属回路板は、半導体チップに電気的に接続される配線としても機能する。   In recent years, power semiconductor modules (for example, IGBT modules) capable of high voltage and large current operation have been used as inverters for electric vehicles. In such a semiconductor module, since the semiconductor chip becomes high temperature due to its own heat generation, a function of efficiently radiating the heat is required. For this reason, in this semiconductor module, a circuit board on which a semiconductor chip is mounted is widely used in which a metal plate is bonded to a ceramic substrate having high mechanical strength and high thermal conductivity. Here, the metal plate is bonded to both surfaces of the ceramic substrate, one surface thereof is a metal circuit plate, and the other surface is a metal heat radiating plate. The metal circuit board also functions as a wiring electrically connected to the semiconductor chip.

金属回路板は配線として機能するため、セラミックス基板には高い絶縁性も要求され、金属回路板には、低い電気抵抗率も要求される。このため、セラミックス基板としては、窒化アルミニウム(熱伝導率が170W/m/K程度)、金属板としてはアルミニウム(熱伝導率が240W/m/K程度、電気抵抗率が3.5×10−8Ω・m)が用いられた。しかしながら、窒化アルミニウムはその機械的強度が不充分であるため、近年はより機械的強度の高い窒化珪素(熱伝導率が90W/m/K程度)が代わりに用いられている。また、金属板としては、より高い熱伝導率と低い電気抵抗率をもつ銅または銅合金(熱伝導率が300W/m/K程度、電気抵抗率が1.7×10−8Ω・m程度)が好ましく用いられている。 Since the metal circuit board functions as wiring, the ceramic substrate is also required to have high insulation, and the metal circuit board is also required to have low electrical resistivity. Therefore, aluminum nitride (thermal conductivity is about 170 W / m / K) is used as the ceramic substrate, and aluminum (thermal conductivity is about 240 W / m / K, electrical resistivity is 3.5 × 10 ) as the metal plate. 8 Ω · m) was used. However, since aluminum nitride has insufficient mechanical strength, silicon nitride having higher mechanical strength (having a thermal conductivity of about 90 W / m / K) has been used instead in recent years. In addition, as the metal plate, copper or copper alloy having higher thermal conductivity and lower electrical resistivity (thermal conductivity is about 300 W / m / K, electrical resistivity is about 1.7 × 10 −8 Ω · m. ) Is preferably used.

この回路基板上の金属回路板に半導体チップが接合され、半導体モジュールが形成される。金属回路板は、セラミックス基板の一面においてその全面を覆うことはなく、所定の配線パターンに加工される。一方、金属放熱板は、放熱を目的としてセラミックス基板に接合されている。そのため、セラミックス基板の他面においてほぼその全面を覆って形成される。また、実際にこの半導体モジュールが機器に搭載されるに際しては、この放熱板が、同様に熱伝導率の高い材料からなる放熱ベースに接合される。同一の金属板を金属放熱板と放熱ベースを兼ねてセラミックス基板に接合することもできる。この場合、セラミックス基板の一面には金属回路板が形成され、他面にはセラミックス基板よりも大きな面積を持った金属板が接合された形態となる。   A semiconductor chip is joined to the metal circuit board on the circuit board to form a semiconductor module. The metal circuit board is processed into a predetermined wiring pattern without covering the entire surface of one surface of the ceramic substrate. On the other hand, the metal heat sink is joined to the ceramic substrate for the purpose of heat dissipation. Therefore, it is formed so as to cover almost the entire surface of the other surface of the ceramic substrate. Further, when the semiconductor module is actually mounted on a device, the heat radiating plate is joined to a heat radiating base made of a material having a high thermal conductivity. The same metal plate can also be joined to the ceramic substrate as a metal heat radiating plate and a heat radiating base. In this case, a metal circuit board is formed on one surface of the ceramic substrate, and a metal plate having a larger area than the ceramic substrate is bonded to the other surface.

この半導体モジュールを含む機器がONの場合には半導体チップが高温となり、OFFの場合には常温となる。さらに、寒冷地においては−20℃程度の厳寒な条件にも至ることもある。従って、通常の使用において、この半導体モジュールは、多数回の冷熱サイクルにさらされる。この半導体モジュールを構成する半導体チップ、セラミックス基板、金属放熱板(銅板)等の熱膨張率は異なる(例えば、半導体チップを構成するシリコンの熱膨張係数は3.0×10−6/K、銅は17×10−6/K、窒化珪素は2.5×10−6/K程度)ため、これらを接合した場合、この冷熱サイクルに際しては、この熱膨張差に起因した歪みが発生する。この歪みの大きさや方向は、このサイクル中で変化する。このため、この半導体モジュールにおいては、冷熱サイクルによって、セラミックス基板や半導体チップが割れたり、半導体チップと金属回路板との接続部が破断することがあった。従って、この歪みによってこの半導体モジュールの冷熱サイクルに対する耐久性が劣化する。また、破壊を生じない場合でも、高温において放熱ベースとの接合部分で大きな反りが生ずると、熱伝導が悪くなり、放熱効率が低下する。 When the device including the semiconductor module is ON, the semiconductor chip has a high temperature, and when the device is OFF, the temperature is room temperature. Furthermore, in cold regions, it may reach severe conditions of about -20 ° C. Thus, in normal use, the semiconductor module is subjected to multiple cold cycles. The thermal expansion coefficient of the semiconductor chip, ceramic substrate, metal heat sink (copper plate), etc. constituting this semiconductor module is different (for example, the thermal expansion coefficient of silicon constituting the semiconductor chip is 3.0 × 10 −6 / K, copper Is 17 × 10 −6 / K, and silicon nitride is about 2.5 × 10 −6 / K). Therefore, when these are joined, distortion due to this thermal expansion difference occurs during this cooling / heating cycle. The magnitude and direction of this distortion changes during this cycle. For this reason, in this semiconductor module, the ceramic substrate or the semiconductor chip may be broken or the connection portion between the semiconductor chip and the metal circuit board may be broken due to the cooling / heating cycle. Therefore, the durability of the semiconductor module with respect to the thermal cycle deteriorates due to this distortion. Even if no breakdown occurs, if a large warp occurs at the joint with the heat dissipation base at a high temperature, the heat conduction deteriorates and the heat dissipation efficiency decreases.

また、一般に、セラミックス基板と、金属回路板や金属放熱板となる金属板との接合はろう付けを用いて行われる。この接合に要する温度は、例えば、Ag−Cu系ろう材を用いた場合には、700℃以上であるため、この接合後に常温に戻った状態においては、この方法で製造された回路基板は、反りを生じている。従って、この回路基板を放熱ベースに接合して使用する場合、特に高温の場合でなくとも、これによって放熱効率が低下することがある。   In general, the ceramic substrate and the metal plate serving as the metal circuit plate or the metal heat radiating plate are joined by brazing. The temperature required for this bonding is, for example, 700 ° C. or more when using an Ag—Cu brazing material, and in this state, the circuit board manufactured by this method is There is warping. Therefore, when this circuit board is used while being joined to a heat dissipation base, the heat dissipation efficiency may be reduced even when the circuit board is not particularly hot.

こうした反りや冷熱サイクルに対する耐久性の劣化を改善するために、その構成を工夫した各種の回路基板または半導体モジュールが提案されている。   In order to improve the deterioration of durability against such warpage and cooling / heating cycle, various circuit boards or semiconductor modules whose devices have been devised have been proposed.

特許文献1に記載の回路基板においては、金属回路板と金属放熱板を熱膨張係数の異なる材料とした。さらに、特許文献2においては、これらをセラミックス基板に接合する方法や、その接合に用いるろう材の種類や厚さを金属回路板と金属放熱板で異なるものとした。これによって、熱膨張差に起因する歪みを減少させ、高い耐久性を得ることができた。   In the circuit board described in Patent Document 1, the metal circuit board and the metal heat sink are made of materials having different thermal expansion coefficients. Furthermore, in Patent Document 2, the method of bonding these to the ceramic substrate and the type and thickness of the brazing material used for the bonding are different between the metal circuit board and the metal heat sink. As a result, distortion caused by the difference in thermal expansion was reduced, and high durability could be obtained.

特許文献3には、さらにモールド樹脂までも含めた半導体モジュールの構造において、各構成要素の材料、構造を最適化して歪みを減少させ、高い耐久性を得ることができることが記載されている。この半導体モジュールの構造断面図を図18に示す。この半導体モジュール31においては、厚い金属ブロック32がこの半導体モジュールの基体として形成されており、半導体チップ33がフレーム34を介して金属ブロック32に接合されている。半導体チップ33からの配線は、リード35とボンディングワイヤ36を介して、外部のケース37に形成された外部端子38と接続される。これらの構造はモールド樹脂39で覆われている。ここで、金属ブロック33とモールド樹脂39の熱膨張係数は近いものとなっている。これらの構造の下部には、放熱ベース(図示せず)との間の絶縁を保つために絶縁基板(セラミックス基板)40が接合される。ここでは、半導体モジュール31の基体を熱伝導率の高い金属ブロック32とし、配線は主にこの半導体パッケージ31の外部に形成される。また、この半導体装置において複数の半導体チップがある場合、以上の構造の半導体パッケージ31を半導体チップ毎に形成することによって、これらの熱膨張差に起因した歪みが低減される。絶縁基板40はモールド樹脂39を形成した後で例えば銀ペースト等によって低温で接合されるため、絶縁基板40と金属ブロック32等との熱膨張係数差に起因する歪みは常温ではほとんど生じない。以上により、この半導体装置においては、高い放熱特性と冷熱サイクルに対する高い耐久性を得ていた。   Patent Document 3 describes that in the structure of a semiconductor module including even a mold resin, the material and structure of each component can be optimized to reduce distortion and obtain high durability. A sectional view of the structure of this semiconductor module is shown in FIG. In the semiconductor module 31, a thick metal block 32 is formed as a base of the semiconductor module, and a semiconductor chip 33 is joined to the metal block 32 via a frame 34. The wiring from the semiconductor chip 33 is connected to an external terminal 38 formed on an external case 37 via a lead 35 and a bonding wire 36. These structures are covered with a mold resin 39. Here, the thermal expansion coefficients of the metal block 33 and the mold resin 39 are close to each other. An insulating substrate (ceramic substrate) 40 is bonded to the lower part of these structures in order to maintain insulation from the heat dissipation base (not shown). Here, the base of the semiconductor module 31 is a metal block 32 having high thermal conductivity, and the wiring is mainly formed outside the semiconductor package 31. Further, when there are a plurality of semiconductor chips in this semiconductor device, the distortion due to the difference in thermal expansion is reduced by forming the semiconductor package 31 having the above structure for each semiconductor chip. Since the insulating substrate 40 is bonded at a low temperature by, for example, silver paste after forming the mold resin 39, the distortion caused by the difference in thermal expansion coefficient between the insulating substrate 40 and the metal block 32 hardly occurs at room temperature. As described above, in this semiconductor device, high heat dissipation characteristics and high durability against a cooling / heating cycle were obtained.

特開平7−45915号公報JP 7-45915 A 特開2004−207587号公報JP 2004-207587 A 特開2003−100987号公報Japanese Patent Laid-Open No. 2003-10077

しかしながら、近年のパワー半導体モジュールにおいては、その大電力化はさらに顕著になり、これらが使用される装置も、例えば電動自動車等、多岐にわたっている。この際、耐久性と放熱特性に加えて、この回路基板上の配線が大電力動作に適応することが求められる。すなわち、この配線が数百A以上の大電流かつ数百V以上の大電圧に耐えるものである必要がある。このためには、配線(金属回路板)が低抵抗であることと、この配線と放熱ベース(機器)との間の絶縁性が高いことが必要である。   However, in recent power semiconductor modules, the increase in power has become more prominent, and there are a wide variety of devices in which these are used, for example, electric vehicles. At this time, in addition to durability and heat dissipation characteristics, the wiring on the circuit board is required to be adapted to high power operation. That is, it is necessary that this wiring can withstand a large current of several hundreds A or more and a large voltage of several hundreds V or more. For this purpose, it is necessary that the wiring (metal circuit board) has a low resistance and that the insulation between the wiring and the heat dissipation base (device) is high.

特許文献1、2に記載の回路基板においては、金属回路板と金属放熱板に熱膨張係数の異なる材料を用いるという制限がある。金属回路板の低抵抗化の観点からは、金属回路板の材料としては、電気抵抗率の小さな銅または銅合金が好ましい。また、回路基板の製造工程を単純化するためには、金属放熱板も同様に銅または銅合金であることが好ましい。しかしながら、特許文献1、2に記載の回路基板においては、両方に銅または銅合金を用いることは困難である。すなわち、配線(金属回路板)の低抵抗化は困難である。   In the circuit boards described in Patent Documents 1 and 2, there is a limitation that materials having different thermal expansion coefficients are used for the metal circuit board and the metal heat sink. From the viewpoint of reducing the resistance of the metal circuit board, the metal circuit board is preferably made of copper or a copper alloy having a low electrical resistivity. Moreover, in order to simplify the manufacturing process of a circuit board, it is preferable that a metal heat sink is also copper or a copper alloy similarly. However, in the circuit boards described in Patent Documents 1 and 2, it is difficult to use copper or a copper alloy for both. That is, it is difficult to reduce the resistance of the wiring (metal circuit board).

特許文献3に記載の半導体モジュールにおいては、モールド樹脂が劣化しない程度の低温で絶縁基板を接合する必要がある。この際には、高温を要するろう付け等の手法を用いることは不可能であり、銀ペーストや接着剤が代わりに用いられる。これらを用いた場合には、接合の機械的強度が不充分であったり、この部分の熱抵抗が増大する。従って、半導体チップから金属ブロックまでの熱伝導は良好であるが、金属ブロックから外部の放熱効率は高くない。また、絶縁基板自身の絶縁耐圧が充分であっても、接合後の絶縁基板上ではこの銀ペースト等の存在のため、あるいは機械的強度が弱いために絶縁耐圧が劣化する。従って、この半導体モジュールを大電圧で動作させることは困難である。   In the semiconductor module described in Patent Document 3, it is necessary to bond the insulating substrate at a low temperature that does not deteriorate the mold resin. At this time, it is impossible to use a technique such as brazing that requires high temperature, and silver paste or an adhesive is used instead. When these are used, the mechanical strength of bonding is insufficient, or the thermal resistance of this portion increases. Therefore, the heat conduction from the semiconductor chip to the metal block is good, but the heat dissipation efficiency from the metal block to the outside is not high. Even if the insulation withstand voltage of the insulation substrate itself is sufficient, the insulation withstand voltage deteriorates due to the presence of this silver paste or the like on the joined insulation substrate or due to the weak mechanical strength. Therefore, it is difficult to operate this semiconductor module with a large voltage.

従って、高い放熱効率および耐久性を兼ね備え、搭載する半導体チップを大電力で動作させることのできる半導体モジュールを得ることは困難であった。   Therefore, it has been difficult to obtain a semiconductor module having both high heat dissipation efficiency and durability and capable of operating a mounted semiconductor chip with high power.

本発明は、斯かる問題点に鑑みてなされたものであり、上記問題点を解決する発明を提供することを目的とする。   The present invention has been made in view of such problems, and an object thereof is to provide an invention that solves the above problems.

本発明は、上記課題を解決すべく、以下に掲げる構成とした。
請求項1記載の発明の要旨は、セラミックス基板の一面に金属回路板が形成され、他面に金属放熱板が形成された回路基板であって、前記金属回路板および前記金属放熱板が銅または銅合金であり、 冷熱サイクル時における前記回路基板上の前記金属回路板の表面の歪み量/温度変化量、で定義される、前記金属回路板の表面の見かけの熱膨張係数が(3〜9)×10−6/K、冷熱サイクル時における前記回路基板上の前記金属放熱板の表面の歪み量/温度変化量、で定義される、前記金属放熱板の表面の見かけの熱膨張係数が(9〜17)×10−6/Kの範囲であることを特徴とする回路基板に存する。
請求項2記載の発明の要旨は、前記金属回路板の厚さは前記金属放熱板の厚さよりも小さく、前記金属回路板の軟化点温度は前記金属放熱板の軟化点温度よりも高いことを特徴とする請求項1に記載の回路基板に存する。
請求項3記載の発明の要旨は、前記金属回路板の軟化点温度は400〜900℃の範囲であることを特徴とする請求項2に記載の回路基板に存する。
請求項4記載の発明の要旨は、前記金属放熱板の軟化点温度は300℃以上であることを特徴とする請求項2又は3に記載の回路基板に存する。
請求項5記載の発明の要旨は、前記金属回路板および前記金属放熱板の厚さが0.1〜10mmの範囲であることを特徴とする請求項1乃至4のいずれか1項に記載の回路基板に存する。
請求項6記載の発明の要旨は、前記金属回路板の厚さをT、前記金属放熱板の厚さをTとしたとき、1<T/T≦10であることを特徴とする請求項1乃至5のいずれか1項に記載の回路基板に存する。
請求項7記載の発明の要旨は、常温における最大反り量が200μm/inch以下であることを特徴とする請求項1乃至6のいずれか1項に記載の回路基板に存する。
請求項8記載の発明の要旨は、前記セラミックス基板が窒化珪素セラミックスであることを特徴とする請求項1乃至7のいずれか1項に記載の回路基板に存する。
請求項9記載の発明の要旨は、請求項1乃至8のいずれか1項に記載の回路基板に半導体チップが搭載された半導体モジュールであって、前記金属回路板に前記半導体チップが接合され、前記金属放熱板に放熱ベースが接合されたことを特徴とする半導体モジュールに存する。
請求項10記載の発明の要旨は、前記放熱ベースが銅、アルミニウム、銅合金、またはアルミニウム合金であることを特徴とする請求項9に記載の半導体モジュールに存する。
In order to solve the above problems, the present invention has the following configurations.
The gist of the invention of claim 1 is a circuit board in which a metal circuit board is formed on one surface of a ceramic substrate and a metal heat sink is formed on the other surface, and the metal circuit board and the metal heat sink are copper or The apparent thermal expansion coefficient of the surface of the metal circuit board, which is a copper alloy, and is defined by the amount of distortion / temperature change of the surface of the metal circuit board on the circuit board during the cooling cycle (3-9 ) × 10 −6 / K, the apparent thermal expansion coefficient of the surface of the metal heat sink defined by the amount of distortion / temperature change of the surface of the metal heat sink on the circuit board during the cooling cycle is ( 9 to 17) × 10 −6 / K.
The gist of the invention of claim 2 is that the thickness of the metal circuit board is smaller than the thickness of the metal heat sink, and the softening point temperature of the metal circuit board is higher than the softening point temperature of the metal heat sink. It exists in the circuit board of Claim 1 characterized by the above-mentioned.
The gist of the invention described in claim 3 resides in the circuit board according to claim 2, wherein the softening point temperature of the metal circuit board is in the range of 400 to 900 ° C.
The gist of the invention described in claim 4 resides in the circuit board according to claim 2 or 3, wherein the softening point temperature of the metal heat sink is 300 ° C or higher.
The gist of the invention described in claim 5 is that the thickness of the metal circuit board and the metal heat sink is in the range of 0.1 to 10 mm, according to any one of claims 1 to 4. Lies on the circuit board.
Summary of the Invention described in claim 6, T 1 the thickness of the metal circuit plate, when the thickness of the metal heat dissipating plate has a T 2, and characterized in that it is a 1 <T 2 / T 1 ≦ 10 It exists in the circuit board of any one of Claim 1 thru | or 5.
The gist of the invention described in claim 7 resides in the circuit board according to any one of claims 1 to 6, wherein the maximum warpage amount at room temperature is 200 μm / inch or less.
The gist of the invention according to claim 8 resides in the circuit board according to any one of claims 1 to 7, wherein the ceramic substrate is silicon nitride ceramics.
The gist of the invention according to claim 9 is a semiconductor module in which a semiconductor chip is mounted on the circuit board according to any one of claims 1 to 8, wherein the semiconductor chip is joined to the metal circuit board, A semiconductor module is characterized in that a heat dissipation base is joined to the metal heat dissipation plate.
The gist of the invention described in claim 10 resides in the semiconductor module according to claim 9, wherein the heat dissipation base is copper, aluminum, a copper alloy, or an aluminum alloy.

本発明は以上のように構成されているので、高い放熱特性と冷熱サイクルに対する高い耐久性を兼ね備え、搭載する半導体チップを大電力で動作させることのできる半導体モジュールを得ることができる。   Since the present invention is configured as described above, it is possible to obtain a semiconductor module that has both high heat dissipation characteristics and high durability against a thermal cycle and can operate a semiconductor chip to be mounted with high power.

本発明の第1の実施の形態に係る回路基板の平面図および断面図である。It is the top view and sectional view of a circuit board concerning a 1st embodiment of the present invention. 銅および銅合金の熱伝導率と軟化温度との関係を示した図である。It is the figure which showed the relationship between the thermal conductivity of copper and a copper alloy, and a softening temperature. 金属回路板と金属放熱板の表面の見かけの熱膨張係数を変えた回路基板における耐久性及び熱抵抗の評価結果を示す図である。It is a figure which shows the evaluation result of durability and thermal resistance in the circuit board which changed the apparent thermal expansion coefficient of the surface of a metal circuit board and a metal heat sink. 金属放熱板の厚さTを一定としたときの金属回路板表面の見かけの熱膨張係数と金属回路板の厚さTとの関係を示す図である。Is a graph showing the relationship between the thickness T 1 of the thermal expansion coefficient and the metal circuit plate of apparent metal circuit plate surface when the thickness T 2 of the metal radiator plate constant. 金属放熱板の厚さTを一定としたときの金属放熱板表面の見かけの熱膨張係数と金属回路板の厚さTとの関係を示す図である。Is a graph showing the relationship between the thickness T 1 of the thermal expansion coefficient and the metal circuit plate of apparent metal radiator plate surface when the thickness T 2 of the metal radiator plate constant. 金属回路板の厚さTを一定としたときの金属回路板表面の見かけの熱膨張係数と金属放熱板の厚さTとの関係を示す図である。It is a graph showing the relationship between the thickness T 2 of the thermal expansion coefficient and the metal heat sink apparent metal circuit plate surface when the thickness T 1 of the metal circuit plate is constant. 金属回路板の厚さTを一定としたときの金属放熱板表面の見かけの熱膨張係数と金属放熱板の厚さTとの関係を示す図である。It is a graph showing the relationship between the thickness T 2 of the thermal expansion coefficient and the metal heat sink apparent metal radiator plate surface when the thickness T 1 of the metal circuit plate is constant. 0.6mm厚の銅合金Dを金属回路板に、1.5mm厚の無酸素銅Aを金属放熱板に用いたときの金属回路板と金属放熱板の表面の熱膨張を測定した結果を示す図である。The result of having measured the thermal expansion of the surface of a metal circuit board and a metal heat sink when a 0.6 mm-thick copper alloy D is used for a metal circuit board and 1.5 mm-thick oxygen-free copper A is used for a metal heat sink is shown. FIG. 0.8mm厚の無酸素銅Aを金属回路板に、1.0mm厚の無酸素銅Aを金属放熱板に用いたときの金属回路板と金属放熱板の表面の熱膨張を測定した結果を示す図である。The result of measuring the thermal expansion of the surface of the metal circuit board and the metal heat sink when 0.8 mm thick oxygen-free copper A is used for the metal circuit board and 1.0 mm thick oxygen free copper A is used for the metal heat sink. FIG. 金属回路板と金属放熱板の厚さを変えた回路基板において、熱抵抗と最大反り量との関係を調べた結果を示す図である。It is a figure which shows the result of having investigated the relationship between thermal resistance and the largest curvature amount in the circuit board which changed the thickness of the metal circuit board and the metal heat sink. 金属回路板を同一とし、金属放熱板の厚さを一定としたときの、最大反り量の金属放熱板の軟化温度依存性を示す図である。It is a figure which shows the softening temperature dependence of the metal heat sink of the largest curvature amount when the metal circuit board is made the same and the thickness of the metal heat sink is made constant. 金属放熱板を同一とし、金属回路板の厚さを一定としたときの、最大反り量の金属回路板の軟化温度依存性を示す図である。It is a figure which shows the softening temperature dependence of the metal circuit board of the largest curvature amount when the metal heat sink is made the same and the thickness of the metal circuit board is made constant. 金属回路板と金属放熱板の厚さを変えた回路基板における耐久性及び熱抵抗の評価結果を示す図である。It is a figure which shows the evaluation result of durability and thermal resistance in the circuit board which changed the thickness of a metal circuit board and a metal heat sink. 金属回路板の材料および金属放熱板の材料を一定としたときの、金属回路板表面の見かけの熱膨張係数とT/Tとの関係を示す図である。When the material of the material and the metal heat radiating plate of the metal circuit plate and fixed is a diagram showing the relationship between the thermal expansion coefficient and T 2 / T 1 of the apparent metal circuit plate surface. 金属回路板の材料および金属放熱板の材料を一定としたときの、最大反り量とT/Tとの関係を示す図である。When the material of the material and the metal heat radiating plate of the metal circuit plate and fixed is a diagram showing the relationship between the maximum warpage and T 2 / T 1. 本発明の第2の実施の形態に係る半導体モジュールの断面図である。It is sectional drawing of the semiconductor module which concerns on the 2nd Embodiment of this invention. 実施例および比較例として作成した回路基板における金属回路板のパターン形状を示す図である。It is a figure which shows the pattern shape of the metal circuit board in the circuit board produced as an Example and a comparative example. 従来の半導体モジュールの一例の構造の断面図である。It is sectional drawing of the structure of an example of the conventional semiconductor module.

以下、本発明を実施するための最良の形態について説明する。   Hereinafter, the best mode for carrying out the present invention will be described.

(第1の実施の形態)
本発明の第1の実施の形態に係る回路基板は、その構造を最適なものとすることにより、これを用いた半導体モジュールにおいては、高い放熱特性と冷熱サイクルに対する高い耐久性を有する。特に、半導体モジュールが実際に機器に搭載された状態において、その放熱特性と耐久性を高くしている。また、金属回路板の低抵抗化および放熱ベースとの間の高い絶縁耐圧を得ることによって、搭載する半導体チップの大電力での動作を可能としている。この回路基板1の平面図およびそのI−Iにおける断面図が図1である。この回路基板1においては、セラミックス基板2の一面に厚さTの金属回路板3が、他面に厚さTの金属放熱板4が、それぞれろう材5を介して接合されている。また、金属回路板3と金属放熱板4はどちらも銅または銅合金の1種であるが、その材質は異なり、金属回路板3の軟化点温度は金属放熱板4の軟化点温度よりも高い。また、金属放熱板4の厚さTは金属回路板3の厚さTよりも大きい。
(First embodiment)
The circuit board according to the first embodiment of the present invention has an optimum structure, so that a semiconductor module using the circuit board has high heat dissipation characteristics and high durability against a thermal cycle. In particular, in a state where the semiconductor module is actually mounted on a device, its heat dissipation characteristics and durability are increased. In addition, by reducing the resistance of the metal circuit board and obtaining a high dielectric strength between the metal circuit board and the base, it is possible to operate the mounted semiconductor chip with high power. FIG. 1 is a plan view of the circuit board 1 and a cross-sectional view taken along the line II. In this circuit board 1, a metal circuit board 3 having a thickness T 1 is bonded to one surface of a ceramic substrate 2, and a metal heat radiating plate 4 having a thickness T 2 is bonded to the other surface via a brazing material 5. The metal circuit board 3 and the metal heat sink 4 are both copper or copper alloy, but the materials are different, and the softening point temperature of the metal circuit board 3 is higher than the softening point temperature of the metal heat sink 4. . Further, the thickness T 2 of the metal heat sink 4 is larger than the thickness T 1 of the metal circuit board 3.

ここで、軟化点温度は以下の通りに定義される。銅または銅合金に保持時間1時間の熱処理を加えてビッカース硬度を測定する。この硬度と熱処理温度との関係を測定すると、温度の上昇に伴って、急激に硬度が減少し、硬度は常温時よりも低い値で飽和値をとる。このほぼ飽和値をとる温度が軟化点温度であり、具体的には、常温からの硬度の変化量が、常温での硬度とこの飽和値との差分の95%となった温度を軟化点温度とした。   Here, the softening point temperature is defined as follows. A Vickers hardness is measured by applying a heat treatment for 1 hour to copper or a copper alloy. When the relationship between the hardness and the heat treatment temperature is measured, as the temperature rises, the hardness decreases rapidly, and the hardness takes a saturation value at a value lower than that at room temperature. The temperature at which the saturation value is almost obtained is the softening point temperature. Specifically, the temperature at which the amount of change in hardness from room temperature becomes 95% of the difference between the hardness at room temperature and the saturation value is the softening point temperature. It was.

セラミックス基板2としては、高い熱伝導率、絶縁性、および機械的強度を有し、厚い金属回路板3を接合できる材料として、各種のものを用いることができる。中でも、窒化珪素セラミックスが特に好ましい。具体的には、熱伝導率が90W/m/K程度以上、3点曲げ強度が700MPa程度以上、破壊靱性値が6MPa・m1/2程度以上である窒化珪素セラミックスが好ましい。熱伝導率がこれよりも小さい場合には回路基板の熱抵抗が大きくなることがある。3点曲げ強度や破壊靱性値がこれよりも小さな場合には、回路基板の製造時や冷熱サイクルによって発生する歪みによってクラックが発生する可能性がある。例えば、その厚さは0.3mmであり、大きさは30mm×50mmである。特にその大きさについてはその用途によって適宜決定される。さらに放熱性を向上させるためには、その厚さは、0.2mmあるいは0.1mmとすることが望ましい。 As the ceramic substrate 2, various materials can be used as materials that have high thermal conductivity, insulating properties, and mechanical strength, and that can be joined to the thick metal circuit board 3. Among these, silicon nitride ceramics is particularly preferable. Specifically, silicon nitride ceramics having a thermal conductivity of about 90 W / m / K or more, a three-point bending strength of about 700 MPa or more, and a fracture toughness value of about 6 MPa · m 1/2 or more are preferable. When the thermal conductivity is smaller than this, the thermal resistance of the circuit board may increase. If the three-point bending strength or fracture toughness value is smaller than this, there is a possibility that cracks may occur due to distortion generated during the manufacture of the circuit board or by the thermal cycle. For example, the thickness is 0.3 mm and the size is 30 mm × 50 mm. In particular, the size is appropriately determined depending on the application. In order to further improve heat dissipation, the thickness is preferably 0.2 mm or 0.1 mm.

金属回路板3は銅または銅合金であり、セラミックス基板2の一面(図1中では上面)に形成されている。金属回路板3はこの上に搭載される半導体チップ(図示せず)と機械的および電気的に接続され、セラミックス基板2上でその配線となる。従って、金属回路板3はこの配線となるパターンで形成されており、例として図1中では3つの分離したパターンとなっている。また、金属回路板3は半導体チップとこの回路基板1との接点ともなるため、半導体チップからの熱をこの回路基板1に伝導させ、その放熱も行なう。金属回路板3の厚さは金属放熱板4の厚さよりも小さくなっている。また、はんだ濡れ性の確保やワイヤボンディングを容易にするために、金属回路板3の最表面にはNi−Pメッキが施してあることが好ましい。   The metal circuit board 3 is made of copper or copper alloy, and is formed on one surface (the upper surface in FIG. 1) of the ceramic substrate 2. The metal circuit board 3 is mechanically and electrically connected to a semiconductor chip (not shown) mounted thereon, and becomes a wiring on the ceramic substrate 2. Therefore, the metal circuit board 3 is formed in a pattern to be this wiring, and as an example, in FIG. Further, since the metal circuit board 3 also serves as a contact point between the semiconductor chip and the circuit board 1, heat from the semiconductor chip is conducted to the circuit board 1 and also radiates heat. The thickness of the metal circuit board 3 is smaller than the thickness of the metal heat sink 4. In order to ensure solder wettability and facilitate wire bonding, the outermost surface of the metal circuit board 3 is preferably Ni-P plated.

金属放熱板4は銅または銅合金であり、セラミックス基板2の他面(図1中では下面)に形成されている。金属放熱板4と半導体チップとは電気的に接続されないため、配線としての機能は有さない。一方、半導体チップから金属回路板3を介してこのセラミックス基板2に伝導した熱は、この金属放熱板4を介して放熱される。このため、金属放熱板4は、その放熱効率を高くするべく、セラミックス基板2のほぼ全面にわたり一様に形成されている場合が多く、一般的にはその総面積は金属回路板3よりも大きい。また、金属放熱板4の面積がセラミックス基板2の面積よりも大きくともよい。また、この回路基板1が半導体パッケージを構成して機器に搭載される場合には、金属放熱板4が放熱ベースに接合される。また、はんだ濡れ性の確保のために、金属回路板3と同様に、金属放熱板4の最表面にはNi−Pメッキが施してあることが好ましい。   The metal heat sink 4 is made of copper or a copper alloy, and is formed on the other surface (the lower surface in FIG. 1) of the ceramic substrate 2. Since the metal heat sink 4 and the semiconductor chip are not electrically connected, they do not have a function as wiring. On the other hand, heat conducted from the semiconductor chip to the ceramic substrate 2 through the metal circuit board 3 is radiated through the metal heat radiating plate 4. For this reason, the metal heat radiating plate 4 is often formed uniformly over almost the entire surface of the ceramic substrate 2 in order to increase its heat radiating efficiency. In general, the total area is larger than that of the metal circuit plate 3. . Moreover, the area of the metal heat sink 4 may be larger than the area of the ceramic substrate 2. Further, when the circuit board 1 constitutes a semiconductor package and is mounted on a device, the metal heat radiating plate 4 is joined to the heat radiating base. Further, in order to ensure solder wettability, it is preferable that the outermost surface of the metal heat radiating plate 4 is subjected to Ni-P plating in the same manner as the metal circuit plate 3.

金属回路板3および金属放熱板4として用いられる銅または銅合金の例について、その種類および軟化点温度、熱伝導率、熱膨張係数、ヤング率を示したのが表1である。ここでは無酸素銅としてA(C1020−1/2H)、B(C1020−EH)の2種類と、銅合金としてC〜Gの5種類を例として示した。ここでは参考としてセラミックス基板2となる窒化珪素セラミックスについての値も示してある。ここに示したものは一例であるが、図2にその熱伝導率と軟化点温度の関係を示すように、無酸素銅を含めた一般的な傾向として、軟化点温度が高い材料ほど熱伝導率が低い。銅合金の軟化点温度を制御することは、銅にニッケル、スズおよび鉄などを微量添加し、熱処理にともなう再結晶粒子の成長を抑制することで達成される。この場合、銅の結晶粒子中に添加元素が固溶し、結晶自身の熱伝導率を低下させる。また、結晶粒子間の粒界相にも添加元素が析出するため、結果として銅合金の熱伝導率を低下させる。ただし、この場合においても、熱膨張係数とヤング率においては大差がない。また、電気伝導率においても大差がなく、いずれも高い値を示す。特にこれらの軟化点温度と熱伝導率によって、金属回路板3と金属放熱板4にこれらの材料を使い分けることができる。   Table 1 shows the types and softening point temperatures, thermal conductivity, thermal expansion coefficient, and Young's modulus of the examples of copper or copper alloy used as the metal circuit board 3 and the metal heat sink 4. Here, two types of A (C1020-1 / 2H) and B (C1020-EH) as oxygen-free copper and five types of C to G as copper alloys are shown as examples. Here, for reference, values for silicon nitride ceramics to be the ceramic substrate 2 are also shown. What is shown here is an example, but as shown in FIG. 2 showing the relationship between the thermal conductivity and the softening point temperature, as a general tendency including oxygen-free copper, the higher the softening point temperature, the higher the heat conduction. The rate is low. Controlling the softening point temperature of the copper alloy is achieved by adding a small amount of nickel, tin, iron or the like to the copper and suppressing the growth of recrystallized particles accompanying the heat treatment. In this case, the additive element is dissolved in the copper crystal particles, and the thermal conductivity of the crystal itself is lowered. Moreover, since an additional element precipitates also in the grain boundary phase between crystal grains, the thermal conductivity of a copper alloy is reduced as a result. However, even in this case, there is no great difference between the coefficient of thermal expansion and the Young's modulus. Moreover, there is no big difference also in electrical conductivity, and all show a high value. In particular, these materials can be properly used for the metal circuit board 3 and the metal heat sink 4 depending on the softening point temperature and the thermal conductivity.

Figure 2012023404
Figure 2012023404

これらの銅または銅合金は、圧延後の常温においては、いずれも硬度、引っ張り強度、降伏応力等の機械的性質において高い値を示す。これらに軟化点温度以上での熱処理を行った場合、前記の通り、これらの物性値は低下する。その後、この温度から常温になった状態においても、これらの物性値は熱処理前の値には戻らず、より低い値になるという性質がある。従って、熱処理前は、これらの材料は弾性変形をするが、軟化点温度以上の熱処理を施した場合には、塑性変形能が増す。この際、熱処理の温度が同じであっても、軟化点温度が高い場合は、この塑性変形能は小さくなる。また、熱処理温度が軟化点温度よりも低い場合には、硬度等は熱処理前の高い値を保つ。   These copper or copper alloys all show high values in mechanical properties such as hardness, tensile strength, and yield stress at room temperature after rolling. When these are heat-treated at the softening point temperature or higher, as described above, their physical property values are lowered. Thereafter, even when the temperature is changed from this temperature to room temperature, these physical property values do not return to the values before the heat treatment but have a property of lower values. Therefore, these materials are elastically deformed before heat treatment, but the plastic deformation ability is increased when heat treatment at the softening point temperature or higher is performed. At this time, even if the temperature of the heat treatment is the same, this plastic deformability becomes small if the softening point temperature is high. Moreover, when the heat treatment temperature is lower than the softening point temperature, the hardness and the like are kept at a high value before the heat treatment.

ろう材5としては、例えばAg−Cu系活性ろう材が用いられ、これによって700℃〜900℃程度の温度範囲で金属回路板3と金属放熱板4がセラミックス基板2に強固に接合されている。その厚さは20μm程度であり、金属回路板等と比べて薄く、熱伝導率も高いため、ろう材5による接合が強固であれば、この部分の熱抵抗は他の部分と比べて無視できる。一方、この接合部に破断が生ずると熱抵抗の増大の原因となる。また、ろう材5によって金属回路板3等(銅または銅合金)を接合する際の接合温度(ろう付け温度)は高いため、特にこの温度が前記の軟化点温度を超える場合には、回路基板1における金属放熱板4等の特性に影響を及ぼす。   As the brazing material 5, for example, an Ag—Cu-based active brazing material is used, whereby the metal circuit board 3 and the metal heat sink 4 are firmly joined to the ceramic substrate 2 in a temperature range of about 700 ° C. to 900 ° C. . Its thickness is about 20 μm, and it is thinner than metal circuit boards and has high thermal conductivity. Therefore, if the brazing material 5 is firmly joined, the thermal resistance of this part can be ignored compared to other parts. . On the other hand, if the joint is broken, it causes an increase in thermal resistance. Further, since the bonding temperature (brazing temperature) when the metal circuit board 3 or the like (copper or copper alloy) is bonded by the brazing material 5 is high, the circuit board is particularly when this temperature exceeds the softening point temperature. 1 affects the characteristics of the metal heat sink 4 and the like in FIG.

この回路基板1における各材料の熱膨張係数は、例えば、セラミックス基板2となる窒化珪素セラミックスが2.5×10−6/K、金属回路板3および金属放熱板4となる銅が18×10−6/Kである。従って、金属回路板3および金属放熱板4が前記の温度でろう材5によって接合され、常温に戻った時点で、この回路基板1には歪みや反りが生じる。また、冷熱サイクルに際しては、この歪み量およびその方向も変化することがある。金属回路板3が所定の配線パターンをなして形成されているのに対して、金属放熱板4はセラミックス基板2のほぼ全面にわたって形成されているため、これに対する影響は金属回路板3よりも大きい。 The thermal expansion coefficient of each material in the circuit board 1 is, for example, 2.5 × 10 −6 / K for silicon nitride ceramics to be the ceramic substrate 2, and 18 × 10 6 for copper to be the metal circuit board 3 and the metal heat sink 4. -6 / K. Therefore, when the metal circuit board 3 and the metal heat radiating plate 4 are joined by the brazing material 5 at the above-described temperature and returned to room temperature, the circuit board 1 is distorted and warped. In addition, during the cooling and heating cycle, the amount of distortion and its direction may change. The metal circuit board 3 is formed with a predetermined wiring pattern, whereas the metal heat radiating plate 4 is formed over almost the entire surface of the ceramic substrate 2, so the influence on this is greater than that of the metal circuit board 3. .

ろう付け温度と軟化点温度との関係によって、この歪みの状況は異なる。すなわち、ろう付け温度が軟化点温度よりも高い場合には、前記の通り、接合後に常温に戻った状態においては、金属回路板3または金属放熱板4の塑性変形能は高くなる。この塑性変形能は、ろう付け温度と軟化点温度の差が大きいほど高い。すなわち、軟化点温度の小さい銅合金は塑性変形能が高く、軟化点温度の高いものは塑性変形能が小さい。   Depending on the relationship between the brazing temperature and the softening point temperature, this strain situation varies. That is, when the brazing temperature is higher than the softening point temperature, as described above, the plastic deformability of the metal circuit board 3 or the metal heat sink 4 is increased in the state where the temperature is returned to the normal temperature after joining. This plastic deformability is higher as the difference between the brazing temperature and the softening point temperature is larger. That is, a copper alloy having a low softening point temperature has a high plastic deformability, and a copper alloy having a high softening point temperature has a low plastic deformability.

この回路基板1において、金属回路板3の表面や金属放熱板4の表面で、冷熱サイクルの際の実際の歪み量を測定した結果、これらの値は前記の銅または銅合金の熱膨張係数(18×10−6/K)から算出した値とは異なっていた。また、回路基板1を形成した状態においては、これらの歪み量は金属回路板3等の材質や厚さによって異なる値となった。この原因は、これらがセラミックス基板2に接合された状態においては、セラミックス基板2の影響と、ろう付け温度の影響とを受けるためである。 In this circuit board 1, as a result of measuring the actual strain amount during the cooling and heating cycle on the surface of the metal circuit board 3 and the surface of the metal heat sink 4, these values are the coefficient of thermal expansion of the copper or copper alloy ( 18 × 10 −6 / K). Further, in the state in which the circuit board 1 is formed, the amount of distortion varies depending on the material and thickness of the metal circuit board 3 and the like. This is because, when these are bonded to the ceramic substrate 2, they are affected by the ceramic substrate 2 and the brazing temperature.

セラミックス基板2は表1に示すように、銅または銅合金よりも高い弾性率を有するため、これらが接合された状態では、金属回路板3および金属放熱板4の歪みに影響を及ぼす。このため、金属回路板3または金属放熱板4の厚さが小さな場合、熱膨張に際しては、窒化珪素セラミックスの影響が強く現れ、熱膨張(歪み量)は小さくなる。逆に、金属回路板3または金属放熱板4の厚さが大きいほど、その熱膨張は、本来の銅に近い、大きなものとなり、歪み量が大きくなる。   As shown in Table 1, since the ceramic substrate 2 has a higher elastic modulus than copper or a copper alloy, it affects the distortion of the metal circuit board 3 and the metal heat sink 4 when they are joined. For this reason, when the thickness of the metal circuit board 3 or the metal heat sink 4 is small, the influence of silicon nitride ceramics appears strongly in the thermal expansion, and the thermal expansion (amount of strain) becomes small. Conversely, the greater the thickness of the metal circuit board 3 or the metal heat sink 4, the greater the thermal expansion thereof, closer to the original copper, and the greater the amount of distortion.

また、ろう付け温度の影響としては、前記の通り、ろう付け温度が銅または銅合金の軟化点温度よりも高い場合には、銅または銅合金の塑性変形能が高くなり、この塑性変形能は、ろう付け温度と軟化点温度の差が大きいほど高くなる。このため、軟化点温度が低いほど、歪み量が大きく、回路基板1上における熱膨張は大きくなる。すなわち、軟化点温度の低い銅または銅合金は、回路基板1における熱膨張は大きくなり、軟化点温度の高いものは、回路基板1における熱膨張は小さくなる。   Further, as described above, as described above, when the brazing temperature is higher than the softening point temperature of copper or copper alloy, the plastic deformability of copper or copper alloy is increased, and this plastic deformability is The higher the difference between the brazing temperature and the softening point temperature, the higher. For this reason, the lower the softening point temperature, the larger the strain amount and the greater the thermal expansion on the circuit board 1. That is, copper or a copper alloy having a low softening point temperature has a large thermal expansion in the circuit board 1, and a copper or copper alloy having a high softening point temperature has a small thermal expansion in the circuit board 1.

また、銅または銅合金の塑性変形能が高く、かつその厚さが大きな場合、セラミックス基板2と接する側の面と、その反対側の面(金属回路板3または金属放熱板4の表面)で異なった歪み量を示すこともある。従って、金属回路板3または金属放熱板4の軟化点温度が低く、その厚さが大きいほど、その表面の歪み量は大きくなり、逆の場合は歪み量は小さくなる。   Further, when the plastic deformability of copper or copper alloy is high and the thickness thereof is large, the surface on the side in contact with the ceramic substrate 2 and the surface on the opposite side (the surface of the metal circuit board 3 or the metal heat sink 4) May show different amounts of distortion. Accordingly, the lower the softening point temperature of the metal circuit board 3 or the metal heat sink 4 and the greater the thickness thereof, the larger the amount of distortion on the surface, and the smaller the amount of distortion in the opposite case.

特に実際の回路基板1上の金属回路板3および金属放熱板4における歪み量から測定した熱膨張係数を、以下では見かけの熱膨張係数と呼称する。この熱膨張係数は金属回路板3および金属放熱板4の表面に歪みゲ−ジを取り付け、冷熱サイクル時の歪み量を測定し、例えば、金属回路板の熱膨張係数=(金属回路板歪み量)/(温度変化量)として算出した。冷熱サイクルとしては、回路基板を冷熱サイクル試験機に装入し、−40℃〜+125℃の温度変化を与えた。これらの見かけの熱膨張係数は、上記の通り、金属回路板3、金属放熱板4の材質や厚さ(T、T)を調節することによって、これらの見かけの熱膨張係数を調整することができる。なお、歪み量の校正には、石英をリファレンスとして用いた。 In particular, the thermal expansion coefficient measured from the amount of distortion in the actual metal circuit board 3 and the metal heat sink 4 on the circuit board 1 is hereinafter referred to as an apparent thermal expansion coefficient. The thermal expansion coefficient is obtained by attaching strain gauges to the surfaces of the metal circuit board 3 and the metal heat sink 4 and measuring the amount of strain during the cooling / heating cycle. For example, the coefficient of thermal expansion of the metal circuit board = (the amount of strain of the metal circuit board) ) / (Temperature change amount). As a cooling / heating cycle, the circuit board was loaded into a cooling / heating cycle tester, and a temperature change of −40 ° C. to + 125 ° C. was given. As described above, these apparent thermal expansion coefficients are adjusted by adjusting the materials and thicknesses (T 1 , T 2 ) of the metal circuit board 3 and the metal heat sink 4. be able to. Note that quartz was used as a reference for calibration of the strain amount.

セラミックス基板2として0.3mm厚の窒化珪素セラミックス、金属回路板3として表1における前記の銅合金C(表1)、金属放熱板4として前記の無酸素銅Aを用い、TとTを変えた回路基板1を多数作成した。これらの回路基板における前記の見かけの熱膨張係数を測定した。その後、これらの回路基板に半導体チップを搭載し、放熱ベースに接合して、後述する構造の半導体モジュールを作成した。この半導体モジュールにおいて−40℃〜+125℃の温度範囲の冷熱サイクルを3000回加え、その放熱効率および耐久性を判定した。ここで、放熱効率を示す指標として、冷熱サイクル印加前後の半導体チップからの熱抵抗を測定した。ここで、熱抵抗は、JISA1412で規定される量である。印加前の熱抵抗が0.15℃/Wよりも大きな場合を不合格とした。また、3000回印加後に、半導体チップと金属回路板3との接合部または金属放熱板4と放熱ベースとの接合部が破断したものと、熱抵抗が印加前よりも30%以上上昇していたものを不合格とした。 The ceramic substrate 2 is 0.3 mm thick silicon nitride ceramics, the metal circuit board 3 is the copper alloy C (Table 1) in Table 1, and the metal heat sink 4 is the oxygen-free copper A. T 1 and T 2 A large number of circuit boards 1 with different patterns were prepared. The apparent coefficient of thermal expansion of these circuit boards was measured. Thereafter, a semiconductor chip was mounted on these circuit boards and bonded to a heat dissipation base to produce a semiconductor module having a structure to be described later. In this semiconductor module, a cooling cycle in the temperature range of −40 ° C. to + 125 ° C. was added 3000 times to determine the heat dissipation efficiency and durability. Here, the thermal resistance from the semiconductor chip before and after application of the cooling cycle was measured as an index indicating the heat dissipation efficiency. Here, the thermal resistance is an amount defined by JISA1412. The case where the thermal resistance before application was larger than 0.15 ° C./W was regarded as unacceptable. In addition, after 3000 times of application, the junction between the semiconductor chip and the metal circuit board 3 or the junction between the metal radiator plate 4 and the radiator base was broken, and the thermal resistance was increased by 30% or more than before application. Things were rejected.

金属回路板3の見かけの熱膨張係数を横軸に、金属放熱板4の見かけの熱膨張係数を縦軸にとり、以上の観点について合格だった回路基板については○印で、不合格だった回路基板については×印で表した結果を図3に示す。ここで、熱膨張係数の単位のppm/Kは10−6/Kを表す。この結果、金属回路板3の表面の見かけの熱膨張係数を(3〜9)×10−6/Kとし、金属放熱板4の表面の見かけの熱膨張係数をこれよりも大きい(9〜17)×10−6/Kの範囲とした場合に良好な耐久性が得られた。ここで、金属放熱板4についての値は、銅または銅合金の本来の熱膨張係数(18×10−6/K)に近い。金属回路板3についての値は、半導体チップ(シリコン)およびセラミックス基板(窒化珪素セラミックス)の熱膨張係数(2.5×10−6/K)に近い。すなわち、この回路基板1においては、金属回路板3と金属放熱板4の表面の見かけの熱膨張係数を上記の範囲とすることによって、冷熱サイクルに対する高い耐久性と低い熱抵抗を得ることができる。 The apparent thermal expansion coefficient of the metal circuit board 3 is plotted on the horizontal axis, and the apparent thermal expansion coefficient of the metal heat sink 4 is plotted on the vertical axis. FIG. 3 shows the result of the substrate represented by x. Here, the unit of the coefficient of thermal expansion, ppm / K, represents 10 −6 / K. As a result, the apparent thermal expansion coefficient of the surface of the metal circuit board 3 is (3-9) × 10 −6 / K, and the apparent thermal expansion coefficient of the surface of the metal heat radiating plate 4 is larger than this (9-17). ) Good durability was obtained in the range of × 10 −6 / K. Here, the value about the metal heat sink 4 is close to the original thermal expansion coefficient (18 × 10 −6 / K) of copper or a copper alloy. The value for the metal circuit board 3 is close to the thermal expansion coefficient (2.5 × 10 −6 / K) of the semiconductor chip (silicon) and the ceramic substrate (silicon nitride ceramics). That is, in this circuit board 1, by setting the apparent thermal expansion coefficients of the surfaces of the metal circuit board 3 and the metal heat radiating plate 4 within the above range, high durability and low thermal resistance against a cooling cycle can be obtained. .

熱膨張係数をこの範囲にすることは、金属回路板3および金属放熱板4の材質と厚さを調整することによって可能である。特に、この回路基板1においては、金属回路板3と金属放熱板4の表面の見かけの熱膨張係数を異ならせ、特に金属放熱板4の表面の熱膨張係数を大きくしている。   It is possible to adjust the coefficient of thermal expansion within this range by adjusting the material and thickness of the metal circuit board 3 and the metal heat sink 4. In particular, in this circuit board 1, the apparent thermal expansion coefficients of the surfaces of the metal circuit board 3 and the metal heat sink 4 are made different, and in particular, the thermal expansion coefficient of the surface of the metal heat sink 4 is increased.

この構造の回路基板においては、金属放熱板4の厚さTを金属回路板3の厚さTよりも大きくすることが好ましい。これにより、金属放熱板4の表面の見かけの熱膨張係数を金属回路板3よりも大きくすることが容易である。また、金属回路板3の軟化点温度を金属放熱板4の軟化点温度より高くすることが好ましい。この条件下で、Tを一定としたときの、金属回路板の見かけの熱膨張係数のT依存性を調べた結果が図4である。ここで、セラミックス基板2は前記と同様であり、金属回路板3は銅合金C、金属放熱板4は無酸素銅Aである。同様の場合の、金属放熱板4の見かけの熱膨張係数のT依存性を調べた結果が図5である。また、Tを一定としたときの、金属回路板3の見かけの熱膨張係数のT依存性を調べた結果が図6であり、金属放熱板4の見かけの熱膨張係数のT依存性を調べた結果が図7である。これらの結果より、TとTを変えることによって、金属回路板3の表面の見かけの熱膨張係数を(3〜9)×10−6/K、金属放熱板4の表面の見かけの熱膨張係数を(9〜17)×10−6/Kの範囲とすることが可能である。 In the circuit board of this structure, it is preferable that the thickness T 2 of the metal heat sink 4 is made larger than the thickness T 1 of the metal circuit plate 3. Thereby, it is easy to make the apparent thermal expansion coefficient of the surface of the metal heat sink 4 larger than that of the metal circuit board 3. In addition, the softening point temperature of the metal circuit board 3 is preferably higher than the softening point temperature of the metal heat sink 4. FIG. 4 shows the result of examining the T 1 dependence of the apparent thermal expansion coefficient of the metal circuit board when T 2 is constant under these conditions. Here, the ceramic substrate 2 is the same as described above, the metal circuit board 3 is a copper alloy C, and the metal heat sink 4 is oxygen-free copper A. FIG. 5 shows the result of examining the T 1 dependence of the apparent thermal expansion coefficient of the metal heat sink 4 in the same case. Further, when the T 1 constant, results of examining the T 2 dependence of the thermal expansion coefficient of the apparent metal circuit plate 3 is a diagram 6, T 2 dependence of the thermal expansion coefficient of the apparent metal heat sink 4 FIG. 7 shows the result of examining the sex. From these results, by changing T 1 and T 2 , the apparent thermal expansion coefficient of the surface of the metal circuit board 3 is (3-9) × 10 −6 / K, and the apparent heat of the surface of the metal heat sink 4 The expansion coefficient can be in the range of (9 to 17) × 10 −6 / K.

この一例として、セラミックス基板2として0.3mmの窒化珪素セラミックスを使用し、金属回路板3を0.6mm厚の銅合金D(表1)、金属放熱板4を1.5mm厚の無酸素銅Aとした回路基板1を作成した。この場合の、冷熱サイクルに際しての金属回路板3と金属放熱板4の表面の歪み量を測定した結果が図8である。一方、同一のセラミックス基板と、金属回路板として0.8mm厚の無酸素銅A、金属放熱板として1.0mm厚である同一の無酸素銅Aを使用した回路基板を作成した。この場合の同様の測定結果が図9である。後者の場合には、金属回路板表面での歪み量と金属放熱板表面での歪み量はほぼ同等であるのに対して、前者においては、金属回路板3と金属放熱板4を上記の構成とすることにより、それぞれの表面の歪み量が異なる。従って、それぞれの見かけの熱膨張係数を上記の範囲とすることができる。   As an example of this, 0.3 mm silicon nitride ceramics is used as the ceramic substrate 2, the metal circuit board 3 is 0.6 mm thick copper alloy D (Table 1), and the metal heat sink 4 is 1.5 mm thick oxygen-free copper. A circuit board 1 with A was prepared. FIG. 8 shows the results of measuring the amount of strain on the surfaces of the metal circuit board 3 and the metal heat sink 4 during the cooling cycle in this case. On the other hand, a circuit board using the same ceramic substrate, 0.8 mm-thick oxygen-free copper A as the metal circuit board, and 1.0 mm-thick oxygen-free copper A as the metal heat sink was prepared. FIG. 9 shows the same measurement result in this case. In the latter case, the amount of distortion on the surface of the metal circuit board and the amount of distortion on the surface of the metal heat sink are substantially equal, whereas in the former, the metal circuit board 3 and the metal heat sink 4 are configured as described above. As a result, the amount of strain on each surface differs. Therefore, each apparent thermal expansion coefficient can be set to the above range.

また、回路基板の熱抵抗を低減するためには、回路基板の反り量を低減し、回路基板と放熱ベース等との接触を良好にすることが必要である。この回路基板の最大反り量も、上記の耐久性と同様に、金属回路板および金属放熱板の材質や厚さによって異なったものとなった。ここで、最大反り量とは、常温において回路基板1の対角線上で測定した反り量の最大値をその対角線の長さで割った量であり、図1の断面図の方向において、上が凸となる方向の反りを+とし、逆向きの反りを−とした。これらの回路基板に半導体チップを搭載し、放熱ベースに接合した場合の半導体チップから見た熱抵抗と、最大反り量との関係を調べた結果を図10に示す。ここで、熱抵抗が0.15℃/W以下となった回路基板を○印とし、熱抵抗がこれよりも大きくなった回路基板を×印で示してある。この回路基板1においては、常温におけるその最大反り量の絶対値を200μm/inch(1inchは0.0254m)以下とすることによって、熱抵抗を0.15℃/W以下と小さくすることができた。なお、最大反り量が200μm/inchである金属回路板/放熱板の構成であっても、200μm/inch以内となるように、放熱板に平面研削加工などの加工を施すことで、熱抵抗を0.15℃/W以下とすることは可能である。   Further, in order to reduce the thermal resistance of the circuit board, it is necessary to reduce the amount of warping of the circuit board and to improve the contact between the circuit board and the heat dissipation base. The maximum amount of warpage of the circuit board was also different depending on the material and thickness of the metal circuit board and the metal heat sink, similarly to the durability described above. Here, the maximum amount of warpage is an amount obtained by dividing the maximum value of the amount of warpage measured on the diagonal line of the circuit board 1 at room temperature by the length of the diagonal line, and the top is convex in the direction of the cross-sectional view of FIG. The warp in the direction becomes “+”, and the reverse warp is −. FIG. 10 shows the result of examining the relationship between the thermal resistance viewed from the semiconductor chip and the maximum warpage when the semiconductor chip is mounted on these circuit boards and bonded to the heat dissipation base. Here, a circuit board having a thermal resistance of 0.15 ° C./W or less is indicated by a circle, and a circuit board having a thermal resistance higher than this is indicated by an x mark. In this circuit board 1, by setting the absolute value of the maximum warpage amount at room temperature to 200 μm / inch (1 inch is 0.0254 m) or less, the thermal resistance could be reduced to 0.15 ° C./W or less. . In addition, even if the maximum warpage amount is 200 μm / inch, the heat resistance can be reduced by subjecting the heat sink to surface grinding so as to be within 200 μm / inch. It can be 0.15 ° C./W or less.

金属放熱板4の軟化点温度を金属回路板3よりも低くすることによって、回路基板1の最大反り量を前記の範囲とすることができる。これによって、ろう付けによって発生する歪みに際して金属放熱板4が塑性変形しやすくなるために、回路基板の最大反り量の絶対値が小さくなる。図11に、セラミックス基板2として0.3mm厚の窒化珪素セラミックス、金属回路板3として0.6mm厚の銅合金C(軟化点温度790℃)を用いた場合の、最大反り量の金属放熱板4の軟化点温度依存性を示す。ここで、金属放熱板4の厚さTは1.5mmである。金属放熱板4の材質を変え、その軟化点温度を金属回路板3の軟化点温度よりも低くとることによって、その最大反り量を上記の許容範囲である200μm/inchとすることができる。ただし、金属放熱板4の軟化点温度が300℃よりも低くなると、金属回路板3と金属放熱板4の熱膨張のバランスが崩れるため、図11に示すように、最大反り量が逆向きに増大して上記の範囲外となることがあった。従って、金属放熱板4の軟化点温度は金属回路板3の軟化点温度よりも低く、かつ300℃以上であることが好ましい。 By making the softening point temperature of the metal heat sink 4 lower than that of the metal circuit board 3, the maximum warp amount of the circuit board 1 can be set in the above range. As a result, the metal heat radiating plate 4 is easily plastically deformed at the time of distortion caused by brazing, and thus the absolute value of the maximum warpage amount of the circuit board is reduced. FIG. 11 shows a metal heat radiating plate having a maximum warpage when using 0.3 mm thick silicon nitride ceramics as the ceramic substrate 2 and 0.6 mm thick copper alloy C (softening temperature 790 ° C.) as the metal circuit board 3. 4 shows the temperature dependence of the softening point. Here, the thickness T 1 of the metal heat sink 4 is 1.5 mm. By changing the material of the metal heat radiating plate 4 and setting its softening point temperature to be lower than the softening point temperature of the metal circuit plate 3, the maximum warping amount can be set to 200 μm / inch which is the above-mentioned allowable range. However, when the softening point temperature of the metal heat sink 4 is lower than 300 ° C., the balance of thermal expansion between the metal circuit board 3 and the metal heat sink 4 is lost, so that the maximum warpage amount is reversed as shown in FIG. In some cases, it increased and was outside the above range. Therefore, the softening point temperature of the metal heat sink 4 is preferably lower than the softening point temperature of the metal circuit board 3 and 300 ° C. or higher.

従って、金属回路板3の軟化点温度は金属放熱板4よりも高いことが好ましい。図12に、金属回路板3を0.6mm厚とし、金属放熱板4を1mm厚の無酸素銅Aとしたときの、最大反り量の金属回路板3の軟化点温度依存性を示す。金属回路板3の軟化点温度をこの範囲とすることによって、最大反り量を前記の範囲とすることができた。ただし、金属放熱板4(無酸素銅A)の軟化点温度は300℃であり、金属回路板3の軟化点温度がこれより高い場合でも、400℃よりも低い場合には反り量は許容範囲外となった。また、金属回路板3の軟化点温度が900℃よりも高くなった場合にも、これとは逆向きに反り量が大きくなり、許容範囲外となった。この原因は、400℃よりも低い場合には、より厚い金属放熱板4の影響が特に大きくなり、900℃よりも高い場合には、塑性変形能が小さな金属回路板3の影響が特に大きくなるため、熱膨張のバランスが崩れるためである。従って、金属回路板3の軟化点温度は、金属放熱板4よりも高く、かつ400〜900℃の範囲が好ましい。   Therefore, the softening point temperature of the metal circuit board 3 is preferably higher than that of the metal heat sink 4. FIG. 12 shows the softening point temperature dependence of the maximum amount of warpage of the metal circuit board 3 when the metal circuit board 3 is 0.6 mm thick and the metal heat sink 4 is oxygen-free copper A of 1 mm thickness. By setting the softening point temperature of the metal circuit board 3 within this range, the maximum warpage amount could be set within the above range. However, the softening point temperature of the metal heat sink 4 (oxygen-free copper A) is 300 ° C. Even if the softening point temperature of the metal circuit board 3 is higher than this, the warping amount is acceptable if it is lower than 400 ° C. It was outside. Further, even when the softening point temperature of the metal circuit board 3 was higher than 900 ° C., the amount of warpage increased in the opposite direction, which was outside the allowable range. This is because the influence of the thicker metal heat sink 4 is particularly large when the temperature is lower than 400 ° C., and the influence of the metal circuit board 3 having a small plastic deformability is particularly large when the temperature is higher than 900 ° C. For this reason, the balance of thermal expansion is lost. Therefore, the softening point temperature of the metal circuit board 3 is higher than that of the metal heat sink 4 and is preferably in the range of 400 to 900 ° C.

以上より、金属回路板3の材質としては、軟化点温度が前記の範囲内であり、かつ無酸素銅よりも軟化点温度が高い銅合金(表1の例からは、銅合金D、銅合金C等)が好ましい。また、その厚さは金属放熱板4よりも小さいことが好ましい。前記の通り、これらの材料は無酸素銅と同等の熱膨張係数をもつが、その厚さを薄くすることにより、金属回路板3の表面の見かけの熱膨張係数を小さく、セラミックス基板2や半導体チップとなるシリコンに近くすることができ、(3〜9)×10−6/Kとすることができる。これは、冷熱サイクルに際しての回路基板1の歪みを小さくしていることを意味する。また、これらの銅合金の軟化点温度は高いために、これによって回路基板1の機械的強度も保たれる。表1に示したように、これらの銅合金の熱伝導率は無酸素銅と比べて劣るが、金属回路板3は薄いため、この部分の熱抵抗を小さくすることができる。 As described above, as a material of the metal circuit board 3, a copper alloy having a softening point temperature within the above range and a softening point temperature higher than that of oxygen-free copper (from the example of Table 1, copper alloy D, copper alloy). C) and the like are preferable. The thickness is preferably smaller than that of the metal heat sink 4. As described above, these materials have a thermal expansion coefficient equivalent to that of oxygen-free copper, but by reducing the thickness, the apparent thermal expansion coefficient of the surface of the metal circuit board 3 is reduced, so that the ceramic substrate 2 and the semiconductor It can be close to silicon to be a chip, and can be (3-9) × 10 −6 / K. This means that the distortion of the circuit board 1 during the cooling / heating cycle is reduced. Moreover, since the softening point temperature of these copper alloys is high, the mechanical strength of the circuit board 1 is also maintained thereby. As shown in Table 1, the thermal conductivity of these copper alloys is inferior to that of oxygen-free copper, but since the metal circuit board 3 is thin, the thermal resistance of this portion can be reduced.

また、金属放熱板4は、軟化点温度が前記の範囲内にあってかつ銅合金よりも低い無酸素銅(例えば無酸素銅A)、とし、その厚さは大きいことが好ましい。表1より、無酸素銅は高い熱伝導率を有しているため、厚い場合でも、金属放熱板4で高い熱伝導率で放熱ベースへ放熱を行うことができる。この際、無酸素銅は塑性変形能が高いため、金属放熱板4の上側(セラミックス基板2側)での熱膨張は弾性率の高いセラミックス基板の熱膨張の量に近づく。一方、下側では本来の無酸素銅の熱膨張係数によって決まる量に近い熱膨張をする。このため、金属放熱板4の表面の見かけの熱膨張係数を(9〜17)×10−6/Kの範囲とすることができる。金属放熱板4の上部と下部では歪み量が異なるため、金属放熱板4内部で歪みが生ずるが、この歪みは厚い無酸素銅の塑性変形により吸収される。 The metal heat sink 4 is made of oxygen-free copper (for example, oxygen-free copper A) having a softening point temperature in the above range and lower than that of the copper alloy, and its thickness is preferably large. From Table 1, since oxygen-free copper has high thermal conductivity, even when it is thick, the metal heat radiating plate 4 can radiate heat to the heat radiating base with high thermal conductivity. At this time, since oxygen-free copper has a high plastic deformability, the thermal expansion on the upper side of the metal heat radiating plate 4 (the ceramic substrate 2 side) approaches the amount of thermal expansion of the ceramic substrate having a high elastic modulus. On the other hand, on the lower side, the thermal expansion is close to the amount determined by the thermal expansion coefficient of the original oxygen-free copper. For this reason, the apparent thermal expansion coefficient of the surface of the metal heat sink 4 can be in the range of (9 to 17) × 10 −6 / K. Since the strain amount differs between the upper part and the lower part of the metal heat radiating plate 4, distortion occurs inside the metal heat radiating plate 4, but this strain is absorbed by plastic deformation of thick oxygen-free copper.

上記の構成の回路基板1を用いた半導体モジュールにおいて、Tを横軸、Tを縦軸にとり、前記の冷熱サイクル試験結果と熱抵抗の測定結果について表示したものが図13である。ここで、どちらかの測定結果が不合格であった点を×印とし、両方とも合格であった点を○印とした。この結果より、T、T共に0.1〜10mmの範囲が好ましいことがわかる。どちらかが0.1mmより小さいと、金属回路板3および金属放熱板4の表面の見かけの熱膨張係数を上記の範囲とすることができず、冷熱サイクルに対する耐久性が劣化することがある。どちらかが10mmよりも大きいと、最大反り量が上記の範囲に入らなくなり、これによって熱抵抗が増大したり、耐久性が劣化することがある。また、図14は、金属回路板3に銅合金D、金属放熱板4に無酸素銅Aを用いたときの金属回路板3の表面の見かけの熱膨張係数と、比T/Tとの関係を示した図である。この結果より、T/Tが1以下の場合は、金属回路板3表面の見かけの熱膨張係数が前記の範囲外となる。図15は、回路基板1の最大反り量とT/Tとの関係を同様の回路基板1について調べた結果である。この結果より、T/Tが10よりも大きいと、最大反り量が前記の範囲外となる。T/Tが1以下の場合は、金属放熱板4の影響が、T/Tが10よりも大きな場合は金属回路板3の影響が特に大きくなるために、熱膨張のバランスが崩れることがこれらの原因である。従って、T/Tは1より大きく、10以下の範囲が好ましい。 In the semiconductor module using a circuit board 1 of the above construction, the horizontal axis T 1, the T 2 placed vertically, that displays the measurement results of the thermal cycling test results and thermal resistance of the is 13. Here, a point where one of the measurement results was unacceptable was marked as x, and a point where both were acceptable was marked as ◯. From this result, it can be seen that both T 1 and T 2 are preferably in the range of 0.1 to 10 mm. If either is smaller than 0.1 mm, the apparent thermal expansion coefficients of the surfaces of the metal circuit board 3 and the metal heat radiating plate 4 cannot be within the above range, and the durability against the cooling cycle may be deteriorated. If either is larger than 10 mm, the maximum warpage amount does not fall within the above range, which may increase the thermal resistance or deteriorate the durability. FIG. 14 shows the apparent thermal expansion coefficient of the surface of the metal circuit board 3 when the copper alloy D is used for the metal circuit board 3 and the oxygen-free copper A is used for the metal heat radiating board 4, and the ratio T 2 / T 1 . FIG. From this result, when T 2 / T 1 is 1 or less, the apparent thermal expansion coefficient of the surface of the metal circuit board 3 is out of the above range. FIG. 15 shows the result of examining the relationship between the maximum amount of warpage of the circuit board 1 and T 2 / T 1 for the same circuit board 1. From this result, when T 2 / T 1 is larger than 10, the maximum warpage amount is out of the above range. When T 2 / T 1 is 1 or less, the influence of the metal heat sink 4 is particularly large, and when T 2 / T 1 is greater than 10, the influence of the metal circuit board 3 is particularly large. It is these causes that collapse. Accordingly, T 2 / T 1 is preferably greater than 1 and 10 or less.

この回路基板1は、例えば、以下の通りにして製造できる。絶縁性セラミックス基板2(窒化珪素セラミックス)の両面に活性金属ろう材5として例えば、Tiが添加されたAg−Cu系合金に代表される活性金属を印刷形成する。次に、絶縁性セラミックス基板2とほぼ同じ長方形状の金属板である無酸素銅または銅合金を両面に600℃〜900℃の温度で加熱接合する。このうち一方は金属回路板3となり、他方は金属放熱板4となる。冷却後、一方の面の金属板上にレジストパターンを形成後に、例えば塩化第二鉄あるいは塩化第二銅溶液によってエッチング処理して回路パターンをなす金属回路板3を形成する。他方の面に接合された金属板をそのままエッチング処理無しで金属放熱板4としてもよいし、同様に所望の形状に加工して金属放熱板4としてもよい。この場合、金属回路板3と金属放熱板4はその主成分が同一(銅)であるため、これらのエッチングは同時に行われる。また、これによって露出した部分のろう材5のエッチングも、例えば塩化第二鉄あるいは塩化第二銅溶液によってエッチング処理して回路パターンをなす金属回路板3を形成する。さらには、半導体素子との接合信頼性(パワーサイクル特性)を向上させるため、銅および銅合金あるいは、銅とインバーとのクラッド材からなるリード板による接合を行ってもよい。一方、他方の面に接合された金属板をそのままエッチング処理無しで金属放熱板4としてもよいし、同様に所望の形状に加工して金属放熱板4としてもよい。この場合、金属回路板3と金属放熱板4はその主成分が同一(銅)であるため、これらのエッチングは同時に行われる。また、これによって露出した部分のろう材5のエッチングも、例えば過酸化水素とフッ化アンモニウムとの混合溶液によって引き続き行われる。さらに回路パターン形成後の金属回路板3及び金属放熱板4にNi−Pメッキを施し、回路基板1が作製される。なお、このメッキ処理を施さないことも可能であり、この場合には、回路パターン形成後に化学研磨を行い、ベンゾトリアゾール等などの防錆剤を添付する。また、選択するはんだ材種に応じて、ロジンなどの濡れ性向上成分を含有した防錆剤を用いる。   This circuit board 1 can be manufactured as follows, for example. For example, an active metal typified by an Ag—Cu alloy to which Ti is added is printed on both surfaces of the insulating ceramic substrate 2 (silicon nitride ceramics) as the active metal brazing material 5. Next, oxygen-free copper or copper alloy, which is a rectangular metal plate that is substantially the same as the insulating ceramic substrate 2, is heat-bonded to both surfaces at a temperature of 600 ° C. to 900 ° C. One of these is the metal circuit board 3 and the other is the metal heat sink 4. After cooling, after forming a resist pattern on the metal plate on one side, a metal circuit plate 3 having a circuit pattern is formed by etching with a ferric chloride or cupric chloride solution, for example. The metal plate joined to the other surface may be used as it is as the metal heat radiating plate 4 without etching, or may be processed into a desired shape to form the metal heat radiating plate 4. In this case, since the main components of the metal circuit board 3 and the metal heat sink 4 are the same (copper), these etchings are performed simultaneously. Further, the exposed portion of the brazing material 5 is also etched by, for example, ferric chloride or cupric chloride solution to form the metal circuit board 3 having a circuit pattern. Further, in order to improve the bonding reliability (power cycle characteristics) with the semiconductor element, bonding with a lead plate made of a clad material of copper and copper alloy or copper and invar may be performed. On the other hand, the metal plate bonded to the other surface may be used as it is as the metal heat radiating plate 4 without etching, or may be processed into a desired shape to form the metal heat radiating plate 4. In this case, since the main components of the metal circuit board 3 and the metal heat sink 4 are the same (copper), these etchings are performed simultaneously. Further, the etching of the brazing material 5 in the exposed portion is continued, for example, with a mixed solution of hydrogen peroxide and ammonium fluoride. Further, Ni-P plating is applied to the metal circuit board 3 and the metal heat sink 4 after the circuit pattern is formed, so that the circuit board 1 is manufactured. In addition, it is also possible not to perform this plating process. In this case, chemical polishing is performed after the circuit pattern is formed, and a rust preventive agent such as benzotriazole is attached. Further, a rust inhibitor containing a wettability improving component such as rosin is used according to the solder material type to be selected.

以上の通り、この回路基板1においては、常温、および冷熱サイクルにおける歪み量を小さくすることができる。従って、これに半導体チップを搭載し、放熱ベースに接合して半導体モジュールを形成した場合には、冷熱サイクルに対して高い耐久性を有する。特に、この回路基板1は、これを用いた半導体モジュールが実際に機器に搭載されて使用される状況において、高い耐久性を有する設計となっている。   As described above, in the circuit board 1, the amount of distortion at room temperature and in the cooling / heating cycle can be reduced. Therefore, when a semiconductor chip is mounted on the semiconductor chip and bonded to the heat dissipation base to form a semiconductor module, the semiconductor module has high durability against the cooling and heating cycle. In particular, the circuit board 1 is designed to have high durability in a situation where a semiconductor module using the circuit board 1 is actually mounted on a device and used.

この回路基板1に半導体チップを搭載した場合に、半導体チップからの放熱は金属回路板3や金属放熱板4等を介して高い効率で行われる。さらに、常温における反りが小さくなるために、放熱ベースとの間の熱伝導を良好にすることができる。   When a semiconductor chip is mounted on the circuit board 1, heat dissipation from the semiconductor chip is performed with high efficiency via the metal circuit board 3, the metal heat sink 4, and the like. Furthermore, since warpage at normal temperature is reduced, heat conduction with the heat dissipation base can be improved.

金属回路板3は電気抵抗率の小さな銅または銅合金であるため、その配線抵抗を小さくすることができる。従って、この回路基板1に搭載する半導体チップに大電流を流して使用することができる。   Since the metal circuit board 3 is made of copper or copper alloy having a low electric resistivity, the wiring resistance can be reduced. Therefore, a large current can be passed through the semiconductor chip mounted on the circuit board 1 for use.

金属回路板3とセラミックス基板2はろう材5によって強固に接合される。従って、この部分の機械的強度は高く、熱抵抗も低い。その接合に銀ペーストや接着剤を使用しないため、絶縁耐圧も、本来のセラミックス基板2のもつ絶縁耐圧に近く、高い値となる。従って、この回路基板1に搭載する半導体チップを大電圧で動作させることができる。   The metal circuit board 3 and the ceramic substrate 2 are firmly joined by the brazing material 5. Therefore, the mechanical strength of this part is high and the thermal resistance is also low. Since no silver paste or adhesive is used for the joining, the withstand voltage is close to the withstand voltage of the original ceramic substrate 2 and becomes a high value. Therefore, the semiconductor chip mounted on the circuit board 1 can be operated with a large voltage.

従って、この回路基板1を用いた半導体モジュールは、高い放熱特性、冷熱サイクルに対する高い耐久性を兼ね備え、半導体チップを大電力で動作させることができる。   Therefore, the semiconductor module using the circuit board 1 has both high heat dissipation characteristics and high durability against the cooling and heating cycle, and can operate the semiconductor chip with high power.

また、上記の製造方法においては、金属回路板3と金属放熱板4のエッチング処理を同時に行うことが可能である。従って、低コストでこの回路基板を製造することができる。   In the above manufacturing method, the metal circuit board 3 and the metal heat sink 4 can be etched simultaneously. Therefore, this circuit board can be manufactured at low cost.

(第2の実施の形態)
本発明の第2の実施の形態に係る半導体モジュールは、前記の回路基板1を用いて形成され、特に大電力で動作する半導体チップをこれに搭載する。この半導体モジュールの断面図が図16である。この半導体モジュール11は、前記の回路基板1における金属回路板3上に半導体チップ6がはんだ層7を介して接合して搭載されている。また、放熱ベース13がはんだ層12を介して金属放熱板4に接合されている。
(Second Embodiment)
A semiconductor module according to the second embodiment of the present invention is formed using the circuit board 1, and a semiconductor chip that operates with high power is mounted thereon. FIG. 16 is a sectional view of this semiconductor module. In this semiconductor module 11, a semiconductor chip 6 is mounted on a metal circuit board 3 in the circuit board 1 by way of a solder layer 7. Further, the heat dissipation base 13 is joined to the metal heat dissipation plate 4 via the solder layer 12.

半導体チップ6は、例えばIGBT(Insulated Gate Bipolar Transistor)のような半導体デバイスが形成されたシリコンチップである。特にこの半導体デバイスは、大電力で動作するものとすることができる。これによる発熱がこの回路基板1によって放熱される。また、半導体チップ6と配線となる金属回路板3との電気的接続は、ボンディングワイヤ(図示せず)を用いてもよいし、フリップチップ接続を用いることにより、はんだ等のバンプにより行ってもよい。さらには、半導体素子との接合信頼性(パワーサイクル特性)を向上させるため、銅および銅合金あるいは、銅とインバーとのクラッド材からなるリード板による接合を行ってもよい。   The semiconductor chip 6 is a silicon chip on which a semiconductor device such as an IGBT (Insulated Gate Bipolar Transistor) is formed. In particular, this semiconductor device can be operated with high power. Heat generated thereby is radiated by the circuit board 1. Further, the electrical connection between the semiconductor chip 6 and the metal circuit board 3 serving as the wiring may be performed using a bonding wire (not shown), or may be performed by a bump such as solder by using a flip chip connection. Good. Further, in order to improve the bonding reliability (power cycle characteristics) with the semiconductor element, bonding with a lead plate made of a clad material of copper and copper alloy or copper and invar may be performed.

はんだ層7は、例えば、Sn−5%Pbはんだであり、その融点は270℃程度である。従って、これを用いて半導体チップ6と金属回路板3と290℃程度の温度で接合することができる。また、環境対応下Sn−3%Ag、Sn−3%Ag−0.5%Cu、Sn−5%BiなどのPbフリーはんだを用いることが望ましい。この接合温度はろう材5の融点よりも大幅に低いため、この接合に際しては金属回路板3および金属放熱板4とセラミックス基板2との接合に影響を与えることはない。このはんだ層7は、冷熱サイクルに際しては、上記の半導体チップ6と金属回路板3との熱膨張差によって内部応力が加わった状態となる。フリップチップ接続を用いた場合には、このはんだ層7によって半導体チップ6と金属回路板3との電気的接続もなされる。   The solder layer 7 is, for example, Sn-5% Pb solder, and its melting point is about 270 ° C. Therefore, the semiconductor chip 6 and the metal circuit board 3 can be bonded at a temperature of about 290 ° C. using this. In addition, it is desirable to use Pb-free solder such as Sn-3% Ag, Sn-3% Ag-0.5% Cu, Sn-5% Bi, etc. under the environment. Since this joining temperature is significantly lower than the melting point of the brazing material 5, the joining of the metal circuit board 3 and the metal heat sink 4 and the ceramic substrate 2 is not affected during this joining. The solder layer 7 is in a state where internal stress is applied due to a difference in thermal expansion between the semiconductor chip 6 and the metal circuit board 3 during the cooling and heating cycle. When the flip chip connection is used, the semiconductor layer 6 and the metal circuit board 3 are also electrically connected by the solder layer 7.

はんだ層12は、例えば共晶Pb―Snはんだであり、その融点は190℃程度である。これを用いて金属放熱板4(回路基板1)と放熱ベース13とを210℃程度の温度で接合することができる。また、Sn−3%Ag、Sn−3%Ag−0.5%Cu、Sn−5%BiなどのPbフリーはんだを用いることがさらに望ましい。さらには、はんだ層12の代わりに、熱伝導率の高いグリスやフィラーシートを用いることもできる。なお、半導体チップ6と回路基板1および放熱ベース13をはんだ層7およびはんだ層12を介して接合する場合の工程には、以下の2方法がある。一つは、回路基板1に半導体チップ6をはんだ層7で接合した後に、はんだ層12を介して放熱ベース13を接合する。この場合、はんだ層7には、はんだ層12よりも高融点のはんだ材を選定する。もう一つの方法は、半導体チップ6と回路基板1および放熱ベース13を一度のリフローで接合する。この際には、はんだ層7およびはんだ層12の融点が近似したはんだ材を選定する。   The solder layer 12 is eutectic Pb—Sn solder, for example, and its melting point is about 190 ° C. Using this, the metal heat radiating plate 4 (circuit board 1) and the heat radiating base 13 can be joined at a temperature of about 210 ° C. Further, it is more desirable to use Pb-free solder such as Sn-3% Ag, Sn-3% Ag-0.5% Cu, Sn-5% Bi. Further, instead of the solder layer 12, grease or filler sheet having high thermal conductivity can be used. There are the following two methods for joining the semiconductor chip 6 to the circuit board 1 and the heat dissipation base 13 via the solder layer 7 and the solder layer 12. One is that the semiconductor chip 6 is joined to the circuit board 1 with the solder layer 7, and then the heat dissipation base 13 is joined via the solder layer 12. In this case, a solder material having a melting point higher than that of the solder layer 12 is selected for the solder layer 7. In another method, the semiconductor chip 6, the circuit board 1, and the heat dissipation base 13 are joined by one reflow. At this time, a solder material having an approximate melting point of the solder layer 7 and the solder layer 12 is selected.

放熱ベース13は、機器側でこの回路基板1を搭載する部分である。放熱ベース13は金属放熱板4に伝わった熱を放熱するため、熱伝導率が高く、熱容量が大きい。これは例えば銅、アルミニウム、銅合金、またはアルミニウム合金からなる。放熱ベース13の熱膨張係数は、例えば、銅が17×10−6/K、アルミニウムが22×10−6/K程度と大きい。銅合金およびアルミニウム合金の熱膨張係数もこれらに近い値となる。 The heat dissipation base 13 is a part on which the circuit board 1 is mounted on the device side. Since the heat dissipation base 13 dissipates heat transmitted to the metal heat dissipation plate 4, the heat dissipation base 13 has a high thermal conductivity and a large heat capacity. This consists, for example, of copper, aluminum, copper alloy or aluminum alloy. The thermal expansion coefficient of the heat dissipation base 13 is as large as, for example, about 17 × 10 −6 / K for copper and about 22 × 10 −6 / K for aluminum. The thermal expansion coefficients of copper alloys and aluminum alloys are also close to these values.

この半導体モジュール11においては、半導体チップ6となるシリコンの熱膨張係数は3.0×10−6/Kであり、これが接合される金属回路板3表面の見かけの熱膨張係数((3〜9)×10−6/K)に近い。従って、冷熱サイクルに際しては、これらの間での熱膨張差は小さく、これに起因する歪みは生じない。従って、半導体チップ6に反りが生じたり、はんだ層7に応力が集中して破断することがない。 In this semiconductor module 11, the thermal expansion coefficient of silicon to be the semiconductor chip 6 is 3.0 × 10 −6 / K, and the apparent thermal expansion coefficient ((3-9) on the surface of the metal circuit board 3 to which it is bonded. ) × 10 −6 / K). Therefore, during the cooling / heating cycle, the difference in thermal expansion between them is small, and distortion caused by this difference does not occur. Therefore, the semiconductor chip 6 is not warped, and stress is not concentrated on the solder layer 7 to break.

また、放熱ベース13と接合する金属放熱板4の見かけの熱膨張係数は、(9〜17)×10−6/Kであり、放熱ベース13の熱膨張係数に近い。従って、冷熱サイクルに際しては、これらの間での熱膨張差は小さく、これに起因する歪みは生じない。従って、はんだ層12に応力が集中して破断することがない。 Further, the apparent thermal expansion coefficient of the metal heat radiating plate 4 joined to the heat radiating base 13 is (9 to 17) × 10 −6 / K, which is close to the thermal expansion coefficient of the heat radiating base 13. Therefore, during the cooling / heating cycle, the difference in thermal expansion between them is small, and distortion caused by this difference does not occur. Therefore, stress does not concentrate on the solder layer 12 and breakage occurs.

従って、この半導体モジュール11は、冷熱サイクルに対する高い耐久性を有する。特に、この半導体モジュール11においては、これが機器に搭載された状態で高い耐久性が得られる。 Therefore, this semiconductor module 11 has high durability against the cooling and heating cycle. In particular, in the semiconductor module 11, high durability can be obtained in a state where the semiconductor module 11 is mounted on a device.

また、この半導体モジュール11においては、回路基板1の最大反り量を小さくすることができるので、放熱ベースとの接合状態が常に良好に保たれる。従って、高い放熱効率を得ることができ、大電力で動作する半導体チップを搭載して動作させることができる。   Moreover, in this semiconductor module 11, since the maximum amount of warping of the circuit board 1 can be reduced, the bonding state with the heat dissipation base is always kept good. Therefore, high heat dissipation efficiency can be obtained, and a semiconductor chip that operates with high power can be mounted and operated.

この半導体モジュール11の最も優れる点は、回路基板1を構成する金属回路板3および金属放熱板4の個々の熱膨張挙動を制御することで、半導体モジュール11の高放熱性を確保した上で耐久性を飛躍的に向上させたことにある。   The most excellent point of the semiconductor module 11 is that the individual heat expansion behavior of the metal circuit board 3 and the metal heat radiating plate 4 constituting the circuit board 1 is controlled to ensure high heat dissipation of the semiconductor module 11 and durability. It is in improving the sex dramatically.

また、この半導体モジュール11においては、単一のセラミックス基板2上に金属回路板3による配線パターンが設けられているため、配線パターンに対応して多数の半導体チップ6を搭載することができる。すなわち、高集積化にも適応する。この際、この半導体モジュール11の基体は絶縁性の高いセラミックス基板2となるため、半導体チップ6とこれと分離して形成された配線(金属回路板3)との絶縁性も良好である。従って、半導体チップ6を大電力で動作させることができる。   Further, in this semiconductor module 11, since a wiring pattern made of the metal circuit board 3 is provided on the single ceramic substrate 2, a large number of semiconductor chips 6 can be mounted corresponding to the wiring pattern. That is, it is applicable to high integration. At this time, since the base of the semiconductor module 11 becomes the ceramic substrate 2 having high insulation, the insulation between the semiconductor chip 6 and the wiring (metal circuit board 3) formed separately from the semiconductor chip 6 is also good. Therefore, the semiconductor chip 6 can be operated with high power.

なお、上記の例ではセラミックス基板2として窒化珪素セラミックスを用いていたが、これに限られるものではなく、同等以上の熱伝導率、3点曲げ強度、破壊靱性値、絶縁性をもつものであれば、同様に用いることができる。   In the above example, silicon nitride ceramics is used as the ceramic substrate 2. However, the ceramic substrate 2 is not limited to this. Can be used similarly.

また、上記の例では金属回路板3および金属放熱板4として銅または銅合金を用いていたが、これに限られるものではなく、金属回路板3と金属放熱板4で主成分を同一とし、その軟化温度が異なる合金を同様に用いることが可能である。この際、銅合金と同等以上の熱伝導率および電気伝導度を有していれば好ましい。   In the above example, copper or a copper alloy is used as the metal circuit board 3 and the metal heat sink 4, but the present invention is not limited to this, and the main components of the metal circuit board 3 and the metal heat sink 4 are the same. Alloys having different softening temperatures can be used as well. At this time, it is preferable that the thermal conductivity and electrical conductivity be equal to or higher than those of the copper alloy.

(実施例1〜25、比較例1〜13)
実施例1〜25として、上記の構成の回路基板を作成し、これに半導体チップを搭載して上記の構造の半導体モジュールを作成して冷熱サイクルを印加し、その耐久性能を調べた。同時に、比較例となる回路基板も作成し、同様の特性を調べた。
(Examples 1-25, Comparative Examples 1-13)
As Examples 1-25, the circuit board of said structure was created, the semiconductor chip was mounted in this, the semiconductor module of said structure was created, the thermal cycle was applied, and the durability performance was investigated. At the same time, a circuit board as a comparative example was also prepared, and similar characteristics were examined.

実施例1〜25および比較例1〜13においては、使用したセラミックス基板はすべて30mm×50mmの窒化珪素セラミックス板(熱伝導率が90W/m/K程度、3点曲げ強度が700MPa程度、破壊靱性値が6MPa・m1/2程度)である。金属回路板および金属放熱板としては、表1に示した銅または銅合金の中から選択した。金属回路板のパターンはすべて同一であり、図18に示す形状である。使用したろう材はTiを活性金属として含有し、組成はAg−Cu−In系のものである。また、接合温度760℃である。 In Examples 1 to 25 and Comparative Examples 1 to 13, the ceramic substrates used were all 30 mm × 50 mm silicon nitride ceramic plates (thermal conductivity is about 90 W / m / K, three-point bending strength is about 700 MPa, fracture toughness The value is about 6 MPa · m 1/2 ). The metal circuit board and the metal heat sink were selected from the copper or copper alloy shown in Table 1. The patterns of the metal circuit boards are all the same and have the shape shown in FIG. The brazing material used contains Ti as an active metal and has a composition of an Ag-Cu-In system. The bonding temperature is 760 ° C.

実施例1〜8は、金属回路板に銅合金C、金属放熱板には無酸素銅Aを用い、T、TをT>Tの範囲で、かつこれらを0.1〜10mmとなる範囲で変化させた。実施例9〜11は、金属回路板に銅合金Dを用い、実施例12〜13は、金属回路板に銅合金Eを用いている。なお、上記の実施例1〜13においては、いずれもセラミックス基板の厚さは0.3mmとした。 In Examples 1 to 8, copper alloy C is used for the metal circuit board and oxygen-free copper A is used for the metal heat sink, and T 1 and T 2 are in the range of T 2 > T 1 , and these are 0.1 to 10 mm. The range was changed. Examples 9-11 use the copper alloy D for a metal circuit board, and Examples 12-13 use the copper alloy E for a metal circuit board. In each of Examples 1 to 13, the thickness of the ceramic substrate was 0.3 mm.

実施例14〜19では、セラミックス基板の厚さと金属回路板の材質を変化させ、金属放熱板はいずれも1.5mm厚の無酸素銅Aとし、金属回路板の厚さは0.6mmとした。実施例14〜16ではセラミックス基板の厚さを0.2mmとし、実施例17〜19では0.1mmとした。金属回路板は、実施例14、17では銅合金C、実施例15、18では銅合金D、実施例16、19では銅合金E(表1)とした。   In Examples 14 to 19, the thickness of the ceramic substrate and the material of the metal circuit board were changed, and the metal heat radiating plates were all oxygen-free copper A having a thickness of 1.5 mm, and the thickness of the metal circuit board was 0.6 mm. . In Examples 14-16, the thickness of the ceramic substrate was 0.2 mm, and in Examples 17-19, it was 0.1 mm. The metal circuit board was made of copper alloy C in Examples 14 and 17, copper alloy D in Examples 15 and 18, and copper alloy E in Examples 16 and 19 (Table 1).

実施例20〜25においては、金属放熱板を銅合金とし、金属回路板と金属放熱板の材質(組み合わせ)を変えている。ここで、実施例20〜22においては、Tを0.6mm、Tを1.5mmとし、実施例23〜25においてはTを0.8mm、Tを2.0mmとした。金属回路板と金属放熱板の組み合わせは、実施例20、23では(銅合金C、銅合金D)、実施例21、24では(銅合金C、銅合金E)、実施例22、25では(銅合金D、銅合金E)とした。なお、セラミックス基板の厚さはいずれも0.3mmとした。 In Examples 20 to 25, the metal heat sink is made of a copper alloy, and the material (combination) of the metal circuit board and the metal heat sink is changed. Here, in Example 20 to 22, 0.6 mm to T 1, and 1.5mm to T 2, in Examples 23 to 25 were the T 1 0.8 mm, the T 2 and 2.0 mm. The combination of the metal circuit board and the metal heat sink is (copper alloy C, copper alloy D) in Examples 20 and 23, (copper alloy C, copper alloy E) in Examples 21 and 24, and ( Copper alloy D and copper alloy E) were used. The thickness of each ceramic substrate was 0.3 mm.

比較例1〜5はいずれも金属回路板に銅合金C、金属放熱板に無酸素銅Aを用いているが、これらの厚さを0.1mmより小さく、あるいは10mmよりも大きくした。比較例1、2では金属回路板と金属放熱板の厚さをいずれも0.1mmよりも小さくし、比較例3では金属回路板のみを小さくした。比較例4、5では金属放熱板の厚さのみを10mmよりも大きくした。   In each of Comparative Examples 1 to 5, copper alloy C was used for the metal circuit board and oxygen-free copper A was used for the metal heat sink, but these thicknesses were made smaller than 0.1 mm or larger than 10 mm. In Comparative Examples 1 and 2, the thickness of each of the metal circuit board and the metal heat sink was made smaller than 0.1 mm, and in Comparative Example 3, only the metal circuit board was made smaller. In Comparative Examples 4 and 5, only the thickness of the metal heat sink was made larger than 10 mm.

比較例6、7では、金属回路板を0.6mm厚の銅合金C、金属放熱板を1.5mm厚の無酸素銅Bとし、金属放熱板の軟化温度を300℃よりも低くした。   In Comparative Examples 6 and 7, the metal circuit board was 0.6 mm thick copper alloy C, the metal heat sink was oxygen-free copper B 1.5 mm thick, and the softening temperature of the metal heat sink was lower than 300 ° C.

比較例8、9では、金属回路板を0.6mm厚の銅合金Cとし、金属放熱板をこれよりも軟化温度の高い銅合金G(表1)とした。   In Comparative Examples 8 and 9, the metal circuit board was a copper alloy C having a thickness of 0.6 mm, and the metal heat radiating board was a copper alloy G (Table 1) having a higher softening temperature.

比較例10では、金属放熱板を無酸素銅Aとし、その軟化温度がこれよりも高いが、400℃未満である銅合金F(表1)を金属回路板に用いた。   In Comparative Example 10, the metal heat sink was oxygen-free copper A, and a copper alloy F (Table 1) having a softening temperature higher than this but less than 400 ° C. was used for the metal circuit board.

比較例11では、金属回路板と金属放熱板に同じ無酸素銅Aを用いた。   In Comparative Example 11, the same oxygen-free copper A was used for the metal circuit board and the metal heat sink.

比較例12では、金属回路板に銅合金D、金属放熱板に無酸素銅Aを用い、T/Tを1よりも小さくした。比較例13では、同じ材料構成で、T/Tを10よりも大きくした。 In Comparative Example 12, copper alloy D was used for the metal circuit board, and oxygen-free copper A was used for the metal heat sink, and T 2 / T 1 was made smaller than 1. In Comparative Example 13, T 2 / T 1 was made larger than 10 with the same material configuration.

以上の実施例および比較例について、−40℃〜+125℃の冷熱サイクルにおける特性を調べた。まず、この温度範囲での金属回路板および金属放熱板の表面の見かけの熱膨張係数を測定した。この測定は、金属回路板および金属放熱板表面に歪みゲージを取り付け、この温度範囲での歪み量を測定することにより算出した。また、回路基板の反りについては、常温におけるこの回路基板において、図18中の点線で示す対角線上における金属放熱板の反り量を3次元形状測定器により測定し、対角線の長さで割った量を最大反り量(μm/inch)とした。ここで、金属回路板側が凸になる方向を+とした。   About the above Example and the comparative example, the characteristic in the cold cycle of -40 degreeC-+125 degreeC was investigated. First, the apparent thermal expansion coefficient of the surface of the metal circuit board and the metal heat sink in this temperature range was measured. This measurement was calculated by attaching strain gauges to the surfaces of the metal circuit board and the metal heat sink and measuring the amount of strain in this temperature range. As for the warpage of the circuit board, the amount of warpage of the metal heat sink on the diagonal line indicated by the dotted line in FIG. 18 is measured with a three-dimensional shape measuring instrument and divided by the length of the diagonal line. Was the maximum warpage (μm / inch). Here, the direction in which the metal circuit board side is convex is defined as +.

図16に示すように、この回路基板に半導体チップ(パワーMOSFET)をSn−3%Ag−0.5%Cuはんだで接合して搭載し、さらに無酸素銅の放熱ベースにPb−Sn共晶はんだでこの金属放熱板を接合した半導体モジュールを作成し、冷熱サイクルを印加した。−40℃〜+125℃の冷熱サイクル(1サイクルは70分)を3000回印加し、その後での半導体チップ下のはんだ層および金属放熱板下のはんだ層の破損の状況を超音波画像診断装置(日立建機製Hi−Focus)を用い、ボイド率(ボイドの面積/半導体チップ面積×100)を算定した。調べた。はんだ層の破損は、これらにおける界面のボイド率が3000サイクル後に30%以上となっていた場合を、破損や剥離が発生したと認定した。いずれかの箇所で破損や剥離が発生したものを不合格とした。   As shown in FIG. 16, a semiconductor chip (power MOSFET) is mounted on this circuit board by bonding with Sn-3% Ag-0.5% Cu solder, and a Pb-Sn eutectic is formed on an oxygen-free copper heat dissipation base. The semiconductor module which joined this metal heat sink with the solder was created, and the thermal cycle was applied. Applying a -40 ° C to + 125 ° C cooling cycle (one cycle is 70 minutes) 3000 times, the ultrasonic image diagnosis apparatus (the solder layer under the semiconductor chip and the solder layer under the metal heat sink after that) Hitachi Construction Machinery Hi-Focus) was used to calculate the void ratio (void area / semiconductor chip area × 100). Examined. Regarding the breakage of the solder layer, it was determined that breakage or peeling occurred when the void ratio at the interface was 30% or more after 3000 cycles. A case where breakage or peeling occurred at any point was regarded as rejected.

また、冷熱サイクルの印加の前後で、半導体チップ側から見た熱抵抗(℃/W)を測定した。この測定は、半導体チップに通電することによってこれを発熱させ、そのとき温度上昇を熱抵抗評価装置(キャッツ電子製、MODEL DVF240)によって電圧換算により測定した。ここでは、単位断面積当たりの量ではなく、単位を(℃/W)として測定した。初期(冷熱サイクル印加前)の熱抵抗の値が0.15℃/W以上であったものは放熱特性が悪いために不合格と判定した。また、初期の熱抵抗がこの値より小さくとも、冷熱サイクル印加後の熱抵抗の値が30%以上増加していたものは、はんだ層において上記の観察では判別できない程度の破損やセラミックス基板のクラック等が発生したものと考えられるため、不合格とした。以上の結果を表2にまとめて示す。   Further, the thermal resistance (° C./W) viewed from the semiconductor chip side was measured before and after the application of the cooling / heating cycle. This measurement was performed by energizing the semiconductor chip to generate heat. At that time, the temperature rise was measured by voltage conversion using a thermal resistance evaluation device (Model DVF240, manufactured by Cats Electronics). Here, not the amount per unit cross-sectional area, but the unit was (° C./W). Those having a thermal resistance value of 0.15 ° C./W or more at the initial stage (before application of the cooling / heating cycle) were judged to be unacceptable because of their poor heat dissipation characteristics. Moreover, even if the initial thermal resistance is smaller than this value, the value of the thermal resistance after application of the cooling cycle is increased by 30% or more. Since it was thought that etc. occurred, it was judged as rejected. The above results are summarized in Table 2.

Figure 2012023404
Figure 2012023404

実施例1〜25の半導体モジュールにおいては、3000回の冷熱サイクルによってもはんだ層の破損を生じることがなく、冷熱サイクルの前後で低い熱抵抗値を保つことが確認できた。また、これらの回路基板における金属回路板および金属放熱板の表面の見かけの熱膨張係数は、それぞれ(3〜9)×10−6/K、(9〜17)×10−6/Kの範囲内であった。また、常温における最大反り量の絶対値は200μm/inch以下であった。 In the semiconductor modules of Examples 1 to 25, it was confirmed that the solder layer was not damaged even after 3000 cooling cycles, and a low thermal resistance value was maintained before and after the cooling cycle. Further, the apparent thermal expansion coefficients of the surfaces of the metal circuit board and the metal heat sink in these circuit boards are in the range of (3-9) × 10 −6 / K and (9-17) × 10 −6 / K, respectively. It was in. Further, the absolute value of the maximum warpage amount at room temperature was 200 μm / inch or less.

これに対し、金属回路板および/または金属放熱板が薄い比較例1〜3は、3000サイクル前に金属放熱板下のはんだ層の破損が発生した。金属回路板および金属放熱板の表面の見かけの熱膨張係数はいずれも上記の範囲よりも小さくなっていた。   On the other hand, in Comparative Examples 1 to 3 where the metal circuit board and / or the metal heat sink were thin, the solder layer under the metal heat sink was damaged before 3000 cycles. The apparent thermal expansion coefficients of the surfaces of the metal circuit board and the metal heat sink were both smaller than the above range.

金属放熱板が厚い比較例4、5は初期の熱抵抗値が大きく、3000サイクル後には半導体チップ下のはんだ層の破損が生じ、熱抵抗の増加率も大きくなった。回路基板の最大反り量の絶対値は大きくなっていた。   In Comparative Examples 4 and 5 where the metal heat sink is thick, the initial thermal resistance value was large, and after 3000 cycles, the solder layer under the semiconductor chip was damaged, and the rate of increase in thermal resistance was also large. The absolute value of the maximum warping amount of the circuit board was large.

金属放熱板の軟化温度が低い比較例6、7は、初期の熱抵抗および冷熱サイクル印加後の熱抵抗の増加率共に大きくなった。このとき、金属放熱板表面の見かけの熱膨張係数が上記の範囲よりも大きく、最大反り量の絶対値が大きくなっていた。   In Comparative Examples 6 and 7, where the metal heat sink had a low softening temperature, both the initial thermal resistance and the rate of increase in thermal resistance after the application of the cooling / heating cycle increased. At this time, the apparent thermal expansion coefficient on the surface of the metal heat radiating plate was larger than the above range, and the absolute value of the maximum warpage amount was large.

金属放熱板の軟化温度が金属回路板よりも高い比較例8、9は、初期の熱抵抗が大きくなった。このとき、最大反り量が比較例1〜7とは逆向きに大きくなっていた。   In Comparative Examples 8 and 9 in which the softening temperature of the metal heat sink is higher than that of the metal circuit board, the initial thermal resistance is large. At this time, the maximum warpage amount was larger in the opposite direction to Comparative Examples 1-7.

金属放熱板の軟化温度が低い比較例10は、冷熱サイクル印加後に半導体チップ下のはんだ層に破損を生じた。このとき、回路基板の最大反り量の絶対値が大きくなっていた。   In Comparative Example 10 in which the softening temperature of the metal heat sink was low, the solder layer under the semiconductor chip was damaged after applying the cooling cycle. At this time, the absolute value of the maximum warpage amount of the circuit board was large.

金属回路板と金属放熱板に同じ無酸素銅を用いた比較例11は、冷熱サイクル印加後に半導体チップ下のはんだ層に破損を生じた。このとき、回路基板の最大反り量の絶対値が大きくなっていた。   In Comparative Example 11 in which the same oxygen-free copper was used for the metal circuit board and the metal heat sink, the solder layer under the semiconductor chip was damaged after the application of the cooling cycle. At this time, the absolute value of the maximum warpage amount of the circuit board was large.

/Tが1よりも小さい比較例12は、冷熱サイクル印加後に半導体チップ下のはんだ層に破損を生じ、熱抵抗も増大した。このとき、金属回路板の表面の見かけの熱膨張係数は上記の範囲よりも小さくなっていた。T/Tが10よりも大きい比較例13は、初期の熱抵抗が大きくなっていた。このとき、回路基板の最大反り量の絶対値が大きくなっていた。 In Comparative Example 12 where T 2 / T 1 was less than 1, the solder layer under the semiconductor chip was damaged after application of the cooling / heating cycle, and the thermal resistance was also increased. At this time, the apparent thermal expansion coefficient of the surface of the metal circuit board was smaller than the above range. In Comparative Example 13 where T 2 / T 1 was greater than 10, the initial thermal resistance was large. At this time, the absolute value of the maximum warpage amount of the circuit board was large.

(実施例26、比較例14〜21)
実施例26と比較例14〜21としては、金属回路板と金属放熱板の組み合わせを同一とし、セラミックス基板の材質を変化させ、前記と同様の特性を調べた。
(Example 26, Comparative Examples 14-21)
In Example 26 and Comparative Examples 14 to 21, the combination of the metal circuit board and the metal heat sink was the same, the material of the ceramic substrate was changed, and the same characteristics as described above were examined.

実施例26および比較例14〜21においては、金属回路板は0.6mm厚の銅合金C、金属放熱板は1.5mm厚の無酸素銅Aとした。また、セラミックス基板の厚さは0.3mmとした。金属回路板のパターンおよび使用したろう材、回路基板の製造方法については前記の実施例と同様である。   In Example 26 and Comparative Examples 14 to 21, the metal circuit board was made of copper alloy C having a thickness of 0.6 mm, and the metal heat sink was made of oxygen-free copper A having a thickness of 1.5 mm. The thickness of the ceramic substrate was 0.3 mm. The pattern of the metal circuit board, the brazing material used, and the method of manufacturing the circuit board are the same as those in the above embodiment.

実施例26におけるセラミックス基板は、熱伝導率が89W/m/K、3点曲げ強度が740MPa、破壊靱性値が6.3MPa・m1/2である標準的な窒化珪素セラミックスであり、実施例1〜25におけるものと同等である。 The ceramic substrate in Example 26 is a standard silicon nitride ceramic having a thermal conductivity of 89 W / m / K, a three-point bending strength of 740 MPa, and a fracture toughness value of 6.3 MPa · m 1/2. Equivalent to those in 1-25.

比較例14、15におけるセラミックス基板は、同じ窒化珪素セラミックスであるが、その製造条件が異なり、特に熱伝導率が40W/m/K(比較例16)、20W/m/K(比較例17)と小さくなっている。比較例16、17におけるセラミックス基板も、同じ窒化珪素セラミックスであるが、その製造条件が異なり、特に3点曲げ強度が550MPa(比較例16)、480MPa(比較例17)と小さくなっている。比較例18、19におけるセラミックス基板も、同じ窒化珪素セラミックスであるが、その製造条件が異なり、特に破壊靱性が4.5MPa・m1/2(比較例18)、3.0MPa・m1/2(比較例19)と小さくなっている。比較例20、21は、同じ厚さである他のセラミックス基板を窒化珪素セラミックスの代わりに用いた場合であり、アルミナ・ジルコニアセラミックス(比較例20)、窒化アルミニウムセラミックス(比較例21)を用いている。アルミナ・ジルコニアセラミックスは窒化珪素セラミックス(標準)と比べて3点曲げ強度は高いが、熱伝導率および破壊靱性が低く、窒化アルミニウムセラミックスは、熱伝導率は高いが、3点曲げ強度および破壊靱性が低い。 The ceramic substrates in Comparative Examples 14 and 15 are the same silicon nitride ceramics, but the manufacturing conditions are different, and in particular, the thermal conductivity is 40 W / m / K (Comparative Example 16), 20 W / m / K (Comparative Example 17). It is getting smaller. The ceramic substrates in Comparative Examples 16 and 17 are also the same silicon nitride ceramics, but the manufacturing conditions are different. In particular, the three-point bending strength is as small as 550 MPa (Comparative Example 16) and 480 MPa (Comparative Example 17). The ceramic substrates in Comparative Examples 18 and 19 are also the same silicon nitride ceramics, but the production conditions are different. In particular, the fracture toughness is 4.5 MPa · m 1/2 (Comparative Example 18), 3.0 MPa · m 1/2. (Comparative Example 19) Comparative Examples 20 and 21 are cases in which other ceramic substrates having the same thickness were used instead of silicon nitride ceramics, using alumina / zirconia ceramics (Comparative Example 20) and aluminum nitride ceramics (Comparative Example 21). Yes. Alumina / zirconia ceramics have higher three-point bending strength than silicon nitride ceramics (standard), but have lower thermal conductivity and fracture toughness. Aluminum nitride ceramics have higher thermal conductivity, but three-point bending strength and fracture toughness. Is low.

上記の構成で、実施例1〜25と同様に、回路基板を作成したところ、金属回路板および金属放熱板の形成後に、セラミックス基板にこれらによって応力が発生し、クラックが発生することがあった。クラックの発生しなかった回路基板に半導体チップを搭載して、同様に冷熱サイクル試験を行った。これらの結果を表3にまとめて示す。   With the above configuration, a circuit board was prepared in the same manner as in Examples 1 to 25. After the formation of the metal circuit board and the metal heat sink, stress was generated on the ceramic substrate, and cracks were sometimes generated. . A semiconductor chip was mounted on a circuit board where no cracks were generated, and a thermal cycle test was similarly conducted. These results are summarized in Table 3.

Figure 2012023404
Figure 2012023404

実施例26は、実施例1〜25と同様に、良好な放熱特性および耐久性を示した。   Example 26 showed the favorable heat dissipation characteristic and durability similarly to Examples 1-25.

セラミックス基板の熱伝導率の小さな比較例14、15は、初期の熱抵抗が高くなった。セラミックス基板の3点曲げ強度が小さな比較例16、17は熱サイクル後に大きく熱抵抗が増大した。破壊靱性が低い窒化珪素セラミックス、あるいは他の材料を用いた比較例18〜21は、いずれも、回路基板作成後にセラミックス基板にクラックが発生したため、半導体モジュールの評価に至らなかった。   In Comparative Examples 14 and 15 having a small thermal conductivity of the ceramic substrate, the initial thermal resistance was high. In Comparative Examples 16 and 17 having a small three-point bending strength of the ceramic substrate, the thermal resistance increased greatly after the thermal cycle. In Comparative Examples 18 to 21 using silicon nitride ceramics having a low fracture toughness or other materials, cracks were generated in the ceramic substrate after the circuit substrate was produced, and thus the semiconductor module was not evaluated.

従って、本発明の回路基板および半導体モジュールにおけるセラミックス基板としては、特に、熱伝導率が90W/m/K程度以上、3点曲げ強度が700MPa程度以上、破壊靱性値が6MPa・m1/2程度以上である窒化珪素セラミックスが好ましい。 Therefore, as the ceramic substrate in the circuit board and semiconductor module of the present invention, in particular, the thermal conductivity is about 90 W / m / K or more, the three-point bending strength is about 700 MPa or more, and the fracture toughness value is about 6 MPa · m 1/2. The silicon nitride ceramics described above are preferable.

1 回路基板
2、40 セラミックス基板
3 金属回路板
4 金属放熱板
5 ろう材
6、33 半導体チップ
7、12 はんだ層
39 モールド樹脂
11、31 半導体モジュール
13 放熱ベース
32 金属ブロック
34 フレーム
35 リード
36 ボンディングワイヤ
37 ケース
38 外部端子
DESCRIPTION OF SYMBOLS 1 Circuit board 2 and 40 Ceramic substrate 3 Metal circuit board 4 Metal heat sink 5 Brazing material 6 and 33 Semiconductor chip 7 and 12 Solder layer 39 Mold resin 11, 31 Semiconductor module 13 Heat release base 32 Metal block 34 Frame 35 Lead 36 Bonding wire 37 Case 38 External terminal

Claims (10)

セラミックス基板の一面に金属回路板が形成され、他面に金属放熱板が形成された回路基板であって、
前記金属回路板および前記金属放熱板が銅または銅合金であり、
冷熱サイクル時における前記回路基板上の前記金属回路板の表面の歪み量/温度変化量、で定義される、前記金属回路板の表面の見かけの熱膨張係数が(3〜9)×10−6/K、
冷熱サイクル時における前記回路基板上の前記金属放熱板の表面の歪み量/温度変化量、で定義される、前記金属放熱板の表面の見かけの熱膨張係数が(9〜17)×10−6/Kの範囲であることを特徴とする回路基板。
A circuit board in which a metal circuit board is formed on one surface of a ceramic substrate and a metal heat sink is formed on the other surface,
The metal circuit board and the metal heat sink are copper or copper alloy;
The apparent thermal expansion coefficient of the surface of the metal circuit board defined by the amount of distortion / temperature change of the surface of the metal circuit board on the circuit board during the cooling / heating cycle is (3-9) × 10 −6. / K,
The apparent thermal expansion coefficient of the surface of the metal heat sink defined by the amount of distortion / temperature change of the surface of the metal heat sink on the circuit board during a cooling / heating cycle is (9 to 17) × 10 −6. A circuit board characterized by being in the range of / K.
前記金属回路板の厚さは前記金属放熱板の厚さよりも小さく、
前記金属回路板の軟化点温度は前記金属放熱板の軟化点温度よりも高いことを特徴とする請求項1に記載の回路基板。
The thickness of the metal circuit board is smaller than the thickness of the metal heat sink,
The circuit board according to claim 1, wherein a softening point temperature of the metal circuit board is higher than a softening point temperature of the metal heat sink.
前記金属回路板の軟化点温度は400〜900℃の範囲であることを特徴とする請求項2に記載の回路基板。   The circuit board according to claim 2, wherein a softening point temperature of the metal circuit board is in a range of 400 to 900 ° C. 前記金属放熱板の軟化点温度は300℃以上であることを特徴とする請求項2又は3に記載の回路基板。   The circuit board according to claim 2 or 3, wherein the metal heat sink has a softening point temperature of 300 ° C or higher. 前記金属回路板および前記金属放熱板の厚さが0.1〜10mmの範囲であることを特徴とする請求項1乃至4のいずれか1項に記載の回路基板。   5. The circuit board according to claim 1, wherein a thickness of the metal circuit board and the metal heat radiation plate is in a range of 0.1 to 10 mm. 前記金属回路板の厚さをT、前記金属放熱板の厚さをTとしたとき、1<T/T≦10であることを特徴とする請求項1乃至5のいずれか1項に記載の回路基板。 T 1 the thickness of the metal circuit plate, wherein when the thickness of the metal radiator plate and the T 2, 1 <any one of claims 1 to 5, characterized in that a T 2 / T 1 ≦ 10 The circuit board according to the item. 常温における最大反り量が200μm/inch以下であることを特徴とする請求項1乃至6のいずれか1項に記載の回路基板。   The circuit board according to claim 1, wherein a maximum warpage amount at room temperature is 200 μm / inch or less. 前記セラミックス基板が窒化珪素セラミックスであることを特徴とする請求項1乃至7のいずれか1項に記載の回路基板。   The circuit board according to claim 1, wherein the ceramic substrate is a silicon nitride ceramic. 請求項1乃至8のいずれか1項に記載の回路基板に半導体チップが搭載された半導体モジュールであって、
前記金属回路板に前記半導体チップが接合され、前記金属放熱板に放熱ベースが接合されたことを特徴とする半導体モジュール。
A semiconductor module in which a semiconductor chip is mounted on the circuit board according to any one of claims 1 to 8,
A semiconductor module, wherein the semiconductor chip is bonded to the metal circuit board, and a heat dissipation base is bonded to the metal heat dissipation board.
前記放熱ベースが銅、アルミニウム、銅合金、またはアルミニウム合金であることを特徴とする請求項9に記載の半導体モジュール。   The semiconductor module according to claim 9, wherein the heat dissipation base is copper, aluminum, a copper alloy, or an aluminum alloy.
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013147142A1 (en) * 2012-03-30 2013-10-03 三菱マテリアル株式会社 Power module substrate, power module substrate with heat sink, and power module
JP2014175613A (en) * 2013-03-12 2014-09-22 Shindengen Electric Mfg Co Ltd Semiconductor device
KR20150133194A (en) * 2013-03-18 2015-11-27 미쓰비시 마테리알 가부시키가이샤 Method for manufacturing bonded body and method for manufacturing power-module substrate
CN107251214A (en) * 2015-09-28 2017-10-13 株式会社东芝 Silicon nitride circuit substrate and the semiconductor module for having used the silicon nitride circuit substrate
EP3255666A4 (en) * 2015-02-02 2018-09-26 Kabushiki Kaisha Toshiba Silicon nitride circuit substrate and electronic component module using same
WO2019166259A1 (en) * 2018-02-28 2019-09-06 Rogers Germany Gmbh Metal-ceramic substrate and method for producing a metal-ceramic substrate

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0745915A (en) * 1993-08-03 1995-02-14 Denki Kagaku Kogyo Kk Circuit board
JPH10154774A (en) * 1996-11-26 1998-06-09 Hitachi Ltd Semiconductor module
JPH11121889A (en) * 1997-10-16 1999-04-30 Denki Kagaku Kogyo Kk Circuit board
JP2004331993A (en) * 2003-04-30 2004-11-25 Kiyohito Ishida Copper alloy
JP2005011922A (en) * 2003-06-18 2005-01-13 Mitsubishi Electric Corp Double-sided copper clad substrate equipped with heat sink, and semiconductor device using it

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0745915A (en) * 1993-08-03 1995-02-14 Denki Kagaku Kogyo Kk Circuit board
JPH10154774A (en) * 1996-11-26 1998-06-09 Hitachi Ltd Semiconductor module
JPH11121889A (en) * 1997-10-16 1999-04-30 Denki Kagaku Kogyo Kk Circuit board
JP2004331993A (en) * 2003-04-30 2004-11-25 Kiyohito Ishida Copper alloy
JP2005011922A (en) * 2003-06-18 2005-01-13 Mitsubishi Electric Corp Double-sided copper clad substrate equipped with heat sink, and semiconductor device using it

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102097177B1 (en) * 2012-03-30 2020-04-03 미쓰비시 마테리알 가부시키가이샤 Power module substrate, power module substrate with heat sink, and power module
JP2013229579A (en) * 2012-03-30 2013-11-07 Mitsubishi Materials Corp Substrate for power module, substrate for power module having heat sink, and power module
KR20140147090A (en) * 2012-03-30 2014-12-29 미쓰비시 마테리알 가부시키가이샤 Power module substrate, power module substrate with heat sink, and power module
CN104185900B (en) * 2012-03-30 2017-03-15 三菱综合材料株式会社 Power module substrate, the power module substrate and power model that carry radiator
EP2833399A4 (en) * 2012-03-30 2015-12-30 Mitsubishi Materials Corp Power module substrate, power module substrate with heat sink, and power module
US9480144B2 (en) 2012-03-30 2016-10-25 Mitsubishi Materials Corporation Power module substrate, power module substrate with heat sink, and power module
WO2013147142A1 (en) * 2012-03-30 2013-10-03 三菱マテリアル株式会社 Power module substrate, power module substrate with heat sink, and power module
JP2014175613A (en) * 2013-03-12 2014-09-22 Shindengen Electric Mfg Co Ltd Semiconductor device
KR102220852B1 (en) * 2013-03-18 2021-02-25 미쓰비시 마테리알 가부시키가이샤 Method for manufacturing bonded body and method for manufacturing power-module substrate
EP2978019A4 (en) * 2013-03-18 2016-11-02 Mitsubishi Materials Corp Method for manufacturing bonded body and method for manufacturing power-module substrate
US10199237B2 (en) 2013-03-18 2019-02-05 Mitsubishi Materials Corporation Method for manufacturing bonded body and method for manufacturing power-module substrate
KR20150133194A (en) * 2013-03-18 2015-11-27 미쓰비시 마테리알 가부시키가이샤 Method for manufacturing bonded body and method for manufacturing power-module substrate
US10366938B2 (en) 2015-02-02 2019-07-30 Kabushiki Kaisha Toshiba Silicon nitride circuit board and electronic component module using the same
EP3255666A4 (en) * 2015-02-02 2018-09-26 Kabushiki Kaisha Toshiba Silicon nitride circuit substrate and electronic component module using same
EP3358615A4 (en) * 2015-09-28 2019-05-15 Kabushiki Kaisha Toshiba Silicon nitride circuit board and semiconductor module using same
CN107251214A (en) * 2015-09-28 2017-10-13 株式会社东芝 Silicon nitride circuit substrate and the semiconductor module for having used the silicon nitride circuit substrate
US11807584B2 (en) 2018-02-28 2023-11-07 Rogers Germany Gmbh Metal-ceramic substrate and method for producing a metal-ceramic substrate
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CN111801791A (en) * 2018-02-28 2020-10-20 罗杰斯德国有限公司 Cermet substrate and method for producing a cermet substrate
EP3905319A1 (en) * 2018-02-28 2021-11-03 Rogers Germany GmbH Metal-ceramic substrate and method of producing a metal ceramic substrate

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