JP2008147308A - Circuit board and semiconductor module having same - Google Patents

Circuit board and semiconductor module having same Download PDF

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JP2008147308A
JP2008147308A JP2006331023A JP2006331023A JP2008147308A JP 2008147308 A JP2008147308 A JP 2008147308A JP 2006331023 A JP2006331023 A JP 2006331023A JP 2006331023 A JP2006331023 A JP 2006331023A JP 2008147308 A JP2008147308 A JP 2008147308A
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circuit board
metal
layer
aluminum
solder
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Junichi Watanabe
渡辺　　純一
Taku Fujita
卓 藤田
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Proterial Ltd
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Hitachi Metals Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit board having both high heat radiation efficiency and durability, in which a semiconductor chip to be mounted can operate with a large power by preventing the generation of cracks on a solder layer for joining the circuit board to a heat radiation base and the forming of a compound layer on an interface between a metal heat radiation plate and an aluminum layer. <P>SOLUTION: The circuit board has a configuration in which a metal circuit board is formed on one surface of a ceramic substrate and a metal heat radiation plate is formed on the other surface, wherein the metal circuit board or the metal heat radiation plate is made of copper or copper alloy and an aluminum plate is bonded on the metal heat radiation plate via a bonding member layer. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、主に大電力で動作する半導体チップを搭載する回路基板、およびこれを用いた半導体モジュールの構造に関する。   The present invention relates to a circuit board on which a semiconductor chip operating mainly with high power is mounted, and a structure of a semiconductor module using the circuit board.

近年、電動車両用インバータとして高電圧、大電流動作が可能なパワー半導体モジュール（例えばＩＧＢＴモジュール）が用いられている。こうした半導体モジュールにおいては、半導体チップが自己の発熱によって高温になるため、その放熱を効率よく行なうという機能が要求される。このため、この半導体モジュールにおいて、半導体チップを搭載する回路基板としては、機械的強度が高く、熱伝導率の高いセラミックス基板に金属板を接合したものが広く使用されている。ここで、金属板はセラミックス基板の両面に接合され、その一面は金属回路板となり、他面は金属放熱板となる。金属回路板は、半導体チップに電気的に接続される配線としても機能する。   In recent years, power semiconductor modules (for example, IGBT modules) capable of high voltage and large current operation have been used as inverters for electric vehicles. In such a semiconductor module, since the semiconductor chip becomes high temperature due to its own heat generation, a function of efficiently radiating the heat is required. For this reason, in this semiconductor module, a circuit board on which a semiconductor chip is mounted is widely used in which a metal plate is bonded to a ceramic substrate having high mechanical strength and high thermal conductivity. Here, the metal plate is bonded to both surfaces of the ceramic substrate, one surface thereof is a metal circuit plate, and the other surface is a metal heat radiating plate. The metal circuit board also functions as a wiring electrically connected to the semiconductor chip.

金属回路板は配線として機能するため、セラミックス基板には高い絶縁性も要求され、金属回路板には、低い電気抵抗率も要求される。このため、セラミックス基板としては、窒化アルミニウム（熱伝導率が１７０Ｗ／ｍ／Ｋ程度）、金属板としてはアルミニウム（熱伝導率が２４０Ｗ／ｍ／Ｋ程度、電気抵抗率が３．５×１０−８Ω・ｍ）が用いられた。しかしながら、窒化アルミニウムはその機械的強度が不充分であるため、近年はより機械的強度の高い窒化珪素（熱伝導率が９０Ｗ／ｍ／Ｋ程度）が代わりに用いられている。また、金属板としては、より高い熱伝導率と低い電気抵抗率をもつ銅が好ましく用いられている。 Since the metal circuit board functions as wiring, the ceramic substrate is also required to have high insulation, and the metal circuit board is also required to have low electrical resistivity. Therefore, aluminum nitride (thermal conductivity is about 170 W / m / K) is used as the ceramic substrate, and aluminum (thermal conductivity is about 240 W / m / K, electrical resistivity is 3.5 × 10 − ) as the metal plate. 8 Ω · m) was used. However, since aluminum nitride has insufficient mechanical strength, silicon nitride having higher mechanical strength (having a thermal conductivity of about 90 W / m / K) has been used instead in recent years. As the metal plate, copper having a higher thermal conductivity and a lower electric resistivity is preferably used.

この回路基板上の金属回路板に半導体チップが接合され、半導体モジュールが形成される。金属回路板は、セラミックス基板の一面においてその全面を覆うことはなく、所定の配線パターンに加工される。一方、金属放熱板は、放熱を目的としてセラミックス基板に接合されている。そのため、セラミックス基板の他面においてほぼその全面を覆って形成される。また、実際にこの半導体モジュールが機器に搭載されるに際しては、この放熱板が、同様に熱伝導率の高い材料からなる放熱ベースに接合される。同一の金属板を金属放熱板と放熱ベースを兼ねてセラミックス基板に接合することもできる。この場合、セラミックス基板の一面には金属回路板が形成され、他面にはセラミックス基板よりも大きな面積を持った金属板が接合された形態となる。   A semiconductor chip is joined to the metal circuit board on the circuit board to form a semiconductor module. The metal circuit board is processed into a predetermined wiring pattern without covering the entire surface of one surface of the ceramic substrate. On the other hand, the metal heat sink is joined to the ceramic substrate for the purpose of heat dissipation. Therefore, it is formed so as to cover almost the entire surface of the other surface of the ceramic substrate. Further, when the semiconductor module is actually mounted on a device, the heat radiating plate is joined to a heat radiating base made of a material having a high thermal conductivity. The same metal plate can also be joined to the ceramic substrate as a metal heat radiating plate and a heat radiating base. In this case, a metal circuit board is formed on one surface of the ceramic substrate, and a metal plate having a larger area than the ceramic substrate is bonded to the other surface.

この半導体モジュールを含む機器がＯＮの場合には半導体チップが高温となり、ＯＦＦの場合には常温となる。さらに、寒冷地においては−２０℃程度の厳寒な条件にも至ることもある。従って、通常の使用において、この半導体モジュールは、多数回の冷熱サイクルにさらされる。この半導体モジュールを構成する半導体チップ、セラミックス基板、金属放熱板（銅板）等の熱膨張率は異なる（例えば、半導体チップを構成するシリコンの熱膨張係数は３．０×１０−６／Ｋ、銅は１７×１０−６／Ｋ、窒化珪素は２．５×１０−６／Ｋ程度）ため、これらを接合した場合、この冷熱サイクルに際しては、この熱膨張差に起因した歪みが発生する。この歪みの大きさや方向は、このサイクル中で変化する。このため、この半導体モジュールにおいては、冷熱サイクルによって、セラミックス基板や半導体チップが割れたり、半導体チップと金属回路板との接続部が破断することがあった。従って、この歪みによってこの半導体モジュールの冷熱サイクルに対する耐久性が劣化する。また、破壊を生じない場合でも、高温において放熱ベースとの接合部分で大きな反りが生ずると、熱伝導が悪くなり、放熱効率が低下する。 When the device including the semiconductor module is ON, the semiconductor chip has a high temperature, and when the device is OFF, the temperature is room temperature. Furthermore, in cold regions, it may reach severe conditions of about -20 ° C. Thus, in normal use, the semiconductor module is subjected to multiple cold cycles. The thermal expansion coefficients of the semiconductor chip, the ceramic substrate, the metal heat sink (copper plate), etc. constituting this semiconductor module are different (for example, the thermal expansion coefficient of silicon constituting the semiconductor chip is 3.0 × 10 −6 / K, copper 17 × 10 −6 / K, and silicon nitride is about 2.5 × 10 −6 / K). Therefore, when these are joined, distortion due to this thermal expansion difference occurs during this cooling / heating cycle. The magnitude and direction of this distortion changes during this cycle. For this reason, in this semiconductor module, the ceramic substrate or the semiconductor chip may be broken or the connection portion between the semiconductor chip and the metal circuit board may be broken due to the cooling / heating cycle. Therefore, the durability of the semiconductor module with respect to the thermal cycle deteriorates due to this distortion. Even if no breakdown occurs, if a large warp occurs at the joint with the heat dissipation base at a high temperature, the heat conduction deteriorates and the heat dissipation efficiency decreases.

また、一般に、セラミックス基板と、金属回路板や金属放熱板となる金属板との接合はろう付けを用いて行われる。この接合に要する温度は、例えば、Ａｇ−Ｃｕ系ろう材を用いた場合には、およそ７００℃以上であるため、この接合後に常温に戻った状態においては、この方法で製造された回路基板は、反りを生じている。従って、この回路基板を放熱ベースに接合して使用する場合、特に高温の場合でなくとも、これによって放熱効率が低下することがある。   In general, the ceramic substrate and the metal plate serving as the metal circuit plate or the metal heat radiating plate are joined by brazing. The temperature required for this bonding is, for example, about 700 ° C. or higher when an Ag—Cu brazing material is used. Therefore, in the state where the temperature returns to room temperature after this bonding, the circuit board manufactured by this method is , Causing warping. Therefore, when this circuit board is used while being joined to a heat dissipation base, the heat dissipation efficiency may be reduced even when the circuit board is not particularly hot.

図３には従来の半導体モジュールの断面図を示す。この半導体モジュールは、セラミックス基板２の一方の面にろう材層５を介して金属回路板３が接合され、金属回路板３上に半導体チップ６がはんだ層７を介して接合して搭載されている。また、同様にしてセラミックス基板２の他方の面にろう材層５を介して金属放熱板４が接合され、金属放熱板４に放熱ベース１３がはんだ層１２を介して接合されている。   FIG. 3 shows a cross-sectional view of a conventional semiconductor module. In this semiconductor module, a metal circuit board 3 is bonded to one surface of a ceramic substrate 2 via a brazing material layer 5, and a semiconductor chip 6 is mounted on the metal circuit board 3 via a solder layer 7. Yes. Similarly, the metal heat radiating plate 4 is joined to the other surface of the ceramic substrate 2 via the brazing material layer 5, and the heat radiating base 13 is joined to the metal heat radiating plate 4 via the solder layer 12.

はんだ層７、１２は、例えば、Ｓｎ−ＰｂはんだやＳｎ−Ａｇ−Ｃｕであり、その融点は１９０〜２７０℃程度である。従って、これを用いて半導体チップ６と金属回路板３を、金属放熱板４と放熱ベース１３を２１０〜２９０℃程度の温度で接合することができる。この接合温度はろう材５の融点よりも大幅に低いため、この接合に際しては金属回路板３および金属放熱板４とセラミックス基板２との接合に影響を与えることはない。はんだ層７は、冷熱サイクルに際しては、上記の半導体チップ６と金属回路板３との熱膨張差によって内部応力が加わった状態となる。フリップチップ接続を用いた場合には、このはんだ層７によって半導体チップ６と金属回路板３との電気的接続もなされる。また、放熱ベース１３は、機器側でこの回路基板１を搭載する部分である。放熱ベース１３は金属放熱板４に伝わった熱を放熱するため、熱伝導率が高く、熱容量が大きいことが望ましい。一方、放熱ベース１３は前記の通りはんだ層１２を介して、回路基板１と接続されるため、回路基板に近い熱膨張係数をもつ材料が好ましい。このため従来は例えば銅・モリブデン或いは銅・タングステン等の熱膨張係数が１０×１０−６／Ｋ前後という、金属材料としては熱膨張係数が比較的小さい材料が用いられている。このような材料を用いることではんだ層１２の信頼性を確保している。放熱ベース１３ははんだ層１２を介して金属放熱板４と接続されるにもかかわらず回路基板１の熱膨張係数を重要視するのは次の理由による。すなわち、回路基板１は金属放熱板４、金属回路板３およびセラミックス基板２がろう材により互いに強固に接合されて構成されるため、前記三つの部材の複合された挙動・物性を示します。このことから回路基板１は全体として金属放熱板４および金属回路板３を構成する銅とセラミックス基板２を構成するセラミックスの中間の熱膨張係数を有し、単純な銅である金属放熱板４よりも小さい熱膨張係数を有するからである。 The solder layers 7 and 12 are, for example, Sn—Pb solder or Sn—Ag—Cu, and the melting point thereof is about 190 to 270 ° C. Therefore, using this, the semiconductor chip 6 and the metal circuit board 3 can be joined to the metal heat radiating plate 4 and the heat radiating base 13 at a temperature of about 210 to 290 ° C. Since this joining temperature is significantly lower than the melting point of the brazing material 5, the joining of the metal circuit board 3 and the metal heat sink 4 and the ceramic substrate 2 is not affected during this joining. The solder layer 7 is in a state in which an internal stress is applied due to a difference in thermal expansion between the semiconductor chip 6 and the metal circuit board 3 during the cooling / heating cycle. When the flip chip connection is used, the semiconductor layer 6 and the metal circuit board 3 are also electrically connected by the solder layer 7. The heat dissipation base 13 is a part on which the circuit board 1 is mounted on the device side. Since the heat radiating base 13 radiates heat transmitted to the metal heat radiating plate 4, it is desirable that the heat radiating base 13 has a high thermal conductivity and a large heat capacity. On the other hand, since the heat dissipation base 13 is connected to the circuit board 1 via the solder layer 12 as described above, a material having a thermal expansion coefficient close to that of the circuit board is preferable. For this reason, conventionally, a material having a relatively small thermal expansion coefficient, such as copper / molybdenum or copper / tungsten, having a thermal expansion coefficient of around 10 × 10 −6 / K is used. The reliability of the solder layer 12 is ensured by using such a material. Although the heat dissipation base 13 is connected to the metal heat dissipation plate 4 through the solder layer 12, the thermal expansion coefficient of the circuit board 1 is regarded as important for the following reason. In other words, the circuit board 1 is composed of the metal heat radiating plate 4, the metal circuit board 3 and the ceramic substrate 2 which are firmly joined to each other by the brazing material, so that the above three members exhibit the combined behavior and physical properties. Therefore, the circuit board 1 as a whole has a thermal expansion coefficient intermediate between the copper constituting the metal heat sink 4 and the metal circuit board 3 and the ceramic constituting the ceramic board 2, and the metal heat sink 4 is simple copper. This is because it also has a small coefficient of thermal expansion.

前記のような構成である図３に示す半導体モジュールは冷熱サイクルに対する高い耐久性を有しているが、銅・モリブデン或いは銅・タングステン等の低熱膨張材料はその熱伝導率が高々２００W／ｍKと低いこと、比重が重くモジュール重量が大きいこと、更にはモリブデン、タングステン等の希少金属を使用するためコスト高となる等の課題を有している。   The semiconductor module shown in FIG. 3 having the above-described configuration has high durability against a thermal cycle, but a low thermal expansion material such as copper / molybdenum or copper / tungsten has a thermal conductivity of 200 W / mK at most. There are problems such as low, high specific gravity, large module weight, and high costs due to the use of rare metals such as molybdenum and tungsten.

図３に示すモジュールの課題を解決するモジュールとして、図４に示すモジュールがある。図４の半導体モジュールでは、放熱ベース１３は銅もしくは銅合金等の熱伝導の高い材料が使用される。銅もしくは銅合金はその熱膨張係数は１７×１０−６／Ｋ前後と大きく、図３に示した回路基板１とはんだ層１２を介して接合すると、冷熱サイクル試験ではんだ層１２にクラックが発生し易い。クラックは伝熱抵抗を大きくするため好ましくない。そこで図４に示す半導体モジュールでは金属放熱板４の下にアルミニウム板２０を介してはんだ層１２により、回路基板１と放熱ベース１３とを接合している。アルミニウム板２０は柔らかい材料であるため応力緩和の機能を有し、結果としてはんだ層１２の信頼性を確保することができる。 As a module for solving the problem of the module shown in FIG. 3, there is a module shown in FIG. In the semiconductor module of FIG. 4, the heat dissipation base 13 is made of a material having high thermal conductivity such as copper or a copper alloy. Copper or copper alloy has a large thermal expansion coefficient of around 17 × 10 −6 / K, and when the circuit board 1 and the solder layer 12 shown in FIG. Easy to do. Cracks are undesirable because they increase heat transfer resistance. Therefore, in the semiconductor module shown in FIG. 4, the circuit board 1 and the heat radiating base 13 are joined to each other by the solder layer 12 via the aluminum plate 20 under the metal heat radiating plate 4. Since the aluminum plate 20 is a soft material, it has a stress relaxation function, and as a result, the reliability of the solder layer 12 can be ensured.

なお、図４では銅・アルミニウムの２層構造を示したが、銅もしくは銅合金の上下両側にアルミニウム板を設けた構造（特許文献１）や、銅もしくは銅合金層を多孔質層として応力緩和を更に改善した方法（特許文献２）も開示されている。   4 shows a two-layer structure of copper / aluminum. However, a structure in which aluminum plates are provided on both upper and lower sides of copper or copper alloy (Patent Document 1), or stress relaxation using a copper or copper alloy layer as a porous layer. There is also disclosed a method (Patent Document 2) in which the above is further improved.

特開２００１−１８５８２６号公報JP 2001-185826 A 特開２０００−１３８３１９号公報JP 2000-138319 A

前述した図４に示す半導体モジュール或いは特許文献１および特許文献２に開示されている回路基板では、銅もしくは銅合金とアルミニウム板が５００℃前後の温度で熱圧着されることで一体化されることが開示されている。しかしながら、銅とアルミニウムの直接接合においては、４００℃以上の温度になると、化合物を形成し易い。そのため、５００℃という温度にさらされると金属放熱板４とアルミニウム板２０との界面には、銅とアルミニウムからなる化合物層が形成される。そして、この化合物層は極めて脆いため、半導体モジュールが冷熱サイクルや衝撃を受けるとクラックを生じやすく、半導体モジュールの信頼性を大幅に低減させてしまう。   In the semiconductor module shown in FIG. 4 or the circuit board disclosed in Patent Document 1 and Patent Document 2, the copper or copper alloy and the aluminum plate are integrated by thermocompression bonding at a temperature of about 500 ° C. Is disclosed. However, in the direct bonding of copper and aluminum, a compound is easily formed at a temperature of 400 ° C. or higher. Therefore, when exposed to a temperature of 500 ° C., a compound layer made of copper and aluminum is formed at the interface between the metal heat sink 4 and the aluminum plate 20. And since this compound layer is very brittle, when a semiconductor module receives a thermal cycle and an impact, it will be easy to produce a crack, and the reliability of a semiconductor module will be reduced significantly.

また、上記の化合物層の生成抑制に効果のある銀等の金属層を銅とアルミニウムの界面に挟みこんだ銅・銀・アルミニウムからなる三層クラッド材を作製し、これとセラミックス基板２とをろう材５を用いて接合するなども試みられている。しかしながら、銀を挟みこんだ場合でも銅とアルミニウムとの反応を完全に抑制することは困難であり、従って、高い放熱効率および耐久性を兼ね備え、搭載する半導体チップを大電力で動作させることのできる半導体モジュールを得ることは困難であった。   In addition, a three-layer clad material made of copper, silver, and aluminum, in which a metal layer such as silver, which is effective in suppressing the formation of the compound layer, is sandwiched between the interfaces of copper and aluminum, is prepared. Attempts have been made to join using the brazing material 5. However, even when silver is sandwiched, it is difficult to completely suppress the reaction between copper and aluminum. Therefore, it has high heat dissipation efficiency and durability, and the mounted semiconductor chip can be operated with high power. It was difficult to obtain a semiconductor module.

本発明はこのような問題点に鑑みてなされたものであり、回路基板と放熱ベースとを接合するはんだ層にクラックが発生すること及び金属放熱板とアルミニウム層との界面に化合物層が形成されることを防止することにより高い放熱効率および耐久性を兼ね備え、搭載する半導体チップを大電力で動作させることのできる回路基板およびそれを用いた半導体モジュールを提供することを目的とする。   The present invention has been made in view of such problems, and a crack is generated in a solder layer that joins a circuit board and a heat dissipation base, and a compound layer is formed at the interface between the metal heat dissipation plate and the aluminum layer. It is an object of the present invention to provide a circuit board that has high heat dissipation efficiency and durability by preventing this phenomenon and can operate a mounted semiconductor chip with high power, and a semiconductor module using the circuit board.

本発明は、上記課題を解決すべく、以下に掲げる構成とした。   In order to solve the above problems, the present invention has the following configurations.

請求項１記載の発明の要旨は、セラミックス基板の一面に金属回路板が形成され、他面に金属放熱板が形成された回路基板であって、前記金属回路板および前記金属放熱板が銅または銅合金であり、前記金属放熱板に接合部材層を介してアルミニウム板が接合されていることを特徴とする回路基板に存する。   The gist of the invention of claim 1 is a circuit board in which a metal circuit board is formed on one surface of a ceramic substrate and a metal heat sink is formed on the other surface, and the metal circuit board and the metal heat sink are copper or The circuit board is made of a copper alloy, and an aluminum plate is bonded to the metal heat dissipation plate via a bonding member layer.

請求項２記載の発明の要旨は、前記アルミニウム板の厚みが０．２ｍｍ〜１．５ｍｍであり、かつ金属回路板の厚みT１は０．３〜０．８ｍｍであり、さらに金属回路板の厚みT１と金属放熱板の厚みT２の比、T２／T１が０．７〜１．０であることを特徴とする回路基板に存する。   The gist of the invention described in claim 2 is that the thickness of the aluminum plate is 0.2 mm to 1.5 mm, the thickness T1 of the metal circuit board is 0.3 to 0.8 mm, and the thickness of the metal circuit board. A ratio of T1 to the thickness T2 of the metal heat radiating plate, T2 / T1, is 0.7 to 1.0.

請求項３記載の発明の要旨は、常温における最大反り量が２００μｍ／ｉｎｃｈ以下であることを特徴とする請求項１乃至２のいずれか１項に記載の回路基板に存する。   The gist of the invention described in claim 3 resides in the circuit board according to any one of claims 1 to 2, wherein a maximum warpage amount at room temperature is 200 μm / inch or less.

請求項４記載の発明の要旨は、前記セラミックス基板が窒化珪素セラミックスであることを特徴とする請求項１乃至３のいずれか１項に記載の回路基板に存する。 The gist of the invention according to claim 4 resides in the circuit board according to any one of claims 1 to 3, wherein the ceramic substrate is silicon nitride ceramics.

請求項５記載の発明の要旨は、前記接合部材層の融点が、２５０℃〜４５０℃であることを特徴とする請求項１乃至３のいずれか１項に記載の回路基板に存する。   The gist of the invention of claim 5 resides in the circuit board according to any one of claims 1 to 3, wherein the melting point of the joining member layer is 250 ° C to 450 ° C.

請求項６記載の発明の要旨は、前記接合部材層が、Ｐｂ：８０〜９９ｗｔ％、Ｓｎ：０〜２０ｗｔ％を含有し、Ｐｂ、Ｓｎ合わせて９０ｗｔ％以上を含有するＰｂ系高温はんだ層である回路基板に存する。   The gist of the invention described in claim 6 is that the joining member layer is a Pb-based high-temperature solder layer containing Pb: 80 to 99 wt%, Sn: 0 to 20 wt%, and containing 90 wt% or more in total of Pb and Sn. It exists on a certain circuit board.

請求項７記載の発明の要旨は、前記接合部材層が、Ｚｎ：３０〜９９ｗｔ％、Ａｌ：０．１〜６０ｗｔ％、Ｓｉ：０．１〜３０ｗｔ％を含有し、Ｚｎ、Ａｌ、Ｓｉ合わせて９０ｗｔ％以上を含有するＺｎ−Ａｌ系はんだ層である回路基板に存する。   The gist of the invention described in claim 7 is that the joining member layer contains Zn: 30 to 99 wt%, Al: 0.1 to 60 wt%, Si: 0.1 to 30 wt%, and Zn, Al, and Si combined. The circuit board is a Zn—Al solder layer containing 90 wt% or more.

請求項８記載の発明の要旨は、前記接合部材層が、Ｓｎ：５０〜９０ｗｔ％、Ｃｕ：５〜５０ｗｔ％を含有し、Ｓｎ、Ｃｕ合わせて９０ｗｔ％以上を含有するＰｂフリー高温はんだ層である回路基板に存する。   The gist of the invention described in claim 8 is a Pb-free high-temperature solder layer in which the joining member layer contains Sn: 50 to 90 wt%, Cu: 5 to 50 wt%, and Sn and Cu in total contain 90 wt% or more. It exists on a certain circuit board.

請求項９記載の発明の要旨は、請求項１乃至８のいずれか１項に記載の回路基板の金属回路板に半導体チップが接合され、前記回路基板のアルミニウム板に放熱ベースが接合され、これらを接合するためのはんだの融点が、前記回路基板の接合部材層の融点よりも低いことを特徴とする半導体モジュールに存する。   According to a ninth aspect of the present invention, a semiconductor chip is bonded to the metal circuit board of the circuit board according to any one of the first to eighth aspects, and a heat dissipation base is bonded to the aluminum plate of the circuit board. In the semiconductor module, the melting point of the solder for bonding is lower than the melting point of the bonding member layer of the circuit board.

請求項１０記載の発明の要旨は、前記接合部材層の融点が、２５０℃未満であることを特徴とする回路基板に存する。   The gist of the invention described in claim 10 resides in a circuit board characterized in that a melting point of the joining member layer is less than 250 ° C.

請求項１１記載の発明の要旨は、前記接合部材層が、Ｐｂ：３０〜７０ｗｔ％、Ｓｎ：３０〜７０ｗｔ％を含有し、Ｐｂ、Ｓｎ合わせて９０ｗｔ％以上を含有するＰｂ系はんだ層である回路基板に存する。   The gist of the invention of claim 11 is a Pb-based solder layer in which the joining member layer contains Pb: 30 to 70 wt%, Sn: 30 to 70 wt%, and Pb and Sn together contain 90 wt% or more. Lies on the circuit board.

請求項１２記載の発明の要旨は、前記接合部材層が、Ｓｎ：８０〜９９．５ｗｔ％、Ａｇ：０．１〜２０ｗｔ％を含有し、Ｓｎ、Ａｇ合わせて９０ｗｔ％以上を含有するＰｂフリーはんだ層である回路基板に存する。   The gist of the invention described in claim 12 is that the joining member layer contains Sn: 80 to 99.5 wt%, Ag: 0.1 to 20 wt%, and Sn and Ag combined to contain 90 wt% or more. It exists in the circuit board which is a solder layer.

請求項１３記載の発明の要旨は、請求項１乃至４または請求項１０乃至１２のいずれか１項に記載の回路基板の金属回路板に半導体チップが接合され、前記回路基板のアルミニウム板に放熱ベースが接合され、これらを接合するためのはんだの融点が、前記回路基板の接合部材層の融点とほぼ同等であることを特徴とする半導体モジュールに存する。   The gist of the invention described in claim 13 is that a semiconductor chip is bonded to the metal circuit board of the circuit board according to any one of claims 1 to 4 or 10 to 12, and heat is radiated to the aluminum board of the circuit board. The base is joined, and the melting point of the solder for joining them is approximately equal to the melting point of the joining member layer of the circuit board.

請求項１４記載の発明の要旨は、前記放熱ベースが銅、銅合金、またはアルミニウム合金であることを特徴とする請求項９もしくは請求項１３に記載の半導体モジュールに存する。   The gist of the invention described in claim 14 resides in the semiconductor module according to claim 9 or 13, wherein the heat dissipation base is copper, a copper alloy, or an aluminum alloy.

本発明は以上のように構成されているので、高い放熱特性と冷熱サイクルに対する高い耐久性を兼ね備える半導体モジュールを得ることができる。   Since this invention is comprised as mentioned above, the semiconductor module which has a high heat dissipation characteristic and the high durability with respect to a thermal cycle can be obtained.

以下、本発明を実施するための最良の形態について説明する。   Hereinafter, the best mode for carrying out the present invention will be described.

本発明に係る回路基板は、これを用いた半導体モジュールにおいて、高い放熱特性と冷熱サイクルに対する高い耐久性を有する。この回路基板断面図が図１である。図１においては、セラミックス基板２の一面に金属回路板３が、他面に金属放熱板４が、それぞれろう材５を介して接合されている。その後、接合部材層２１を介して、金属放熱板４とアルミニウム板２０が接合される。   The circuit board according to the present invention has high heat dissipation characteristics and high durability against a thermal cycle in a semiconductor module using the circuit board. This circuit board cross-sectional view is shown in FIG. In FIG. 1, a metal circuit board 3 is joined to one surface of a ceramic substrate 2, and a metal heat sink 4 is joined to the other surface via a brazing material 5. Then, the metal heat sink 4 and the aluminum plate 20 are joined via the joining member layer 21.

セラミックス基板２としては、高い熱伝導率、絶縁性、および機械的強度を有し、厚い金属回路板３を接合できる材料として、各種のものを用いることができる。中でも、窒化珪素セラミックスが特に好ましい。具体的には、熱伝導率が９０Ｗ／ｍ・Ｋ程度以上、絶縁耐圧としてセラミックス基板厚が0.32mm厚みのものでAC８ｋV程度以上、抵抗値としては１０GΩ程度以上、３点曲げ強度が７００ＭＰａ程度以上、破壊靱性値が６ＭＰａ・ｍ１／２程度以上である窒化珪素セラミックスが好ましい。熱伝導率がこれよりも小さい場合には、回路基板の熱抵抗が大きくなることがある。３点曲げ強度や破壊靱性値がこれよりも小さな場合には、回路基板の製造時や冷熱サイクルによって発生する歪みによってクラックが発生する可能性がある。例えば、その厚さは０．３ｍｍであり、大きさは３０ｍｍ×５０ｍｍである。特にその大きさについてはその用途によって適宜決定される。さらに放熱性を向上させるためには、その厚さは、０．２ｍｍあるいは０．１ｍｍとすることが望ましい。 As the ceramic substrate 2, various materials can be used as materials that have high thermal conductivity, insulating properties, and mechanical strength, and that can be joined to the thick metal circuit board 3. Among these, silicon nitride ceramics is particularly preferable. Specifically, the thermal conductivity is about 90 W / m · K or more, the ceramic substrate thickness is 0.32 mm as the withstand voltage, the AC is about 8 kV or more, the resistance is about 10 GΩ or more, and the three-point bending strength is about 700 MPa or more. Silicon nitride ceramics having a fracture toughness value of about 6 MPa · m 1/2 or more are preferable. When the thermal conductivity is smaller than this, the thermal resistance of the circuit board may increase. If the three-point bending strength or fracture toughness value is smaller than this, there is a possibility that cracks may occur due to distortion generated during the manufacture of the circuit board or by the thermal cycle. For example, the thickness is 0.3 mm and the size is 30 mm × 50 mm. In particular, the size is appropriately determined depending on the application. In order to further improve heat dissipation, the thickness is preferably 0.2 mm or 0.1 mm.

金属回路板３および金属放熱板４は銅または銅合金であり、セラミックス基板２のそれぞれの面に形成されており、さらに接合部材層２１を介して、金属放熱板４とアルミニウム板２０が接合されている。アルミニウム板２０は融点や熱伝導を踏まえて、JIS表記において１０００系の純アルミニウム板である。   The metal circuit board 3 and the metal heat sink 4 are made of copper or copper alloy and are formed on the respective surfaces of the ceramic substrate 2, and the metal heat sink 4 and the aluminum plate 20 are joined via the joining member layer 21. ing. The aluminum plate 20 is a 1000 series pure aluminum plate in JIS notation in consideration of the melting point and heat conduction.

また、高い放熱特性を達成するため、金属放熱板４ならびにアルミニウム板２０は、セラミックス基板２のほぼ全面にわたり一様に形成されている場合が多く、金属放熱板４ならびにアルミニウム板２０の面積がセラミックス基板２の面積よりも大きくともよい。   In order to achieve high heat dissipation characteristics, the metal heat dissipation plate 4 and the aluminum plate 20 are often formed uniformly over almost the entire surface of the ceramic substrate 2, and the areas of the metal heat dissipation plate 4 and the aluminum plate 20 are ceramics. It may be larger than the area of the substrate 2.

また、より優れた応力緩和の機能を有するためには、アルミニウム板２０は、金属放熱板４と同等かもしくは金属放熱板４よりも大きいほうが好ましい。また、はんだ濡れ性の確保のために金属回路板３とアルミニウム板２０の最表面にはＮｉ−Ｐメッキが施してあることが好ましい。   In order to have a more excellent stress relaxation function, the aluminum plate 20 is preferably equal to or larger than the metal heat sink 4. In order to ensure solder wettability, the outermost surfaces of the metal circuit board 3 and the aluminum board 20 are preferably Ni-P plated.

金属回路板３および金属放熱板４とセラミックス基板２とを接合するろう材としては、例えばＴｉを含有するＡｇ−Ｃｕ系活性ろう材が用いられ、これによって７００℃〜９００℃程度の温度範囲で金属回路板３と金属放熱板４がセラミックス基板２に強固に接合されている。なお、ろう材層５の厚さは２０μｍ程度と金属回路板等と比べて薄く、熱伝導率も高いため、ろう材層５の熱抵抗は他の部分と比べて無視できる。   As the brazing material for joining the metal circuit board 3 and the metal heat sink 4 and the ceramic substrate 2, for example, an Ag—Cu-based active brazing material containing Ti is used, and thereby, in a temperature range of about 700 ° C. to 900 ° C. The metal circuit board 3 and the metal heat sink 4 are firmly bonded to the ceramic substrate 2. In addition, since the thickness of the brazing filler metal layer 5 is about 20 μm, which is thinner than a metal circuit board and the like, and has a high thermal conductivity, the thermal resistance of the brazing filler metal layer 5 can be ignored as compared with other portions.

以上のようなＴｉ含有Ａｇ−Ｃｕ系ろう材での接合強度は極めて高いが、その接合温度はおおよそ７００℃以上となり、アルミニウムの融点６６０℃を上回るため、アルミニウム板を接合する部材とはなりえない。また、アルミニウム系ろう材や熱圧着法などでも５００℃前後の加熱は必要となり、かつ銅とアルミニウムの直接接合のため、脆性な化合物層が形成されてしまう。本発明では、あらかじめセラミックス基板２に金属回路板３および金属放熱板４を前記ろう材にて接合した後、銅とアルミニウムの反応を抑えられる４５０℃以下の融点を有する接合部材層２１を用いてアルミニウム板２０を接合するため、銅とアルミニウムの化合物層がほとんど形成されない。したがってアルミニウム板２０が応力緩和層として確実に機能することができる。   Although the bonding strength of the Ti-containing Ag—Cu brazing filler metal as described above is extremely high, the bonding temperature is approximately 700 ° C. or higher, and exceeds the melting point of aluminum of 660 ° C., so it can be a member for bonding aluminum plates. Absent. Also, heating at around 500 ° C. is required even with an aluminum brazing material or a thermocompression bonding method, and a brittle compound layer is formed due to direct bonding between copper and aluminum. In the present invention, the metal circuit board 3 and the metal heat sink 4 are bonded to the ceramic substrate 2 with the brazing material in advance, and then the bonding member layer 21 having a melting point of 450 ° C. or less that can suppress the reaction between copper and aluminum is used. Since the aluminum plate 20 is joined, a compound layer of copper and aluminum is hardly formed. Therefore, the aluminum plate 20 can function reliably as a stress relaxation layer.

また、回路基板の熱抵抗を低減するためには、回路基板の反り量を低減し、回路基板と放熱ベース等との接触を良好にすることが必要である。回路基板と放熱ベースはんだで互いに接合されるが回路基板の反りが大きいとはんだ層に空隙が生じやすく、空隙量が増大すると空隙が熱伝達を妨げ熱抵抗が大きくなる。そのためそり量を低減する必要がある。ろう材５により、金属回路板３と金属放熱板４とをセラミックス基板２とを接合した状態では、回路基板の反りは３０μｍ／ｉｎｃｈ（１ｉｎｃｈは０．０２５４ｍ）以下である。その後、アルミニウム板２０を接合する際の温度条件などによっては基板が大きく反る場合があるが、接合条件の調整により、放熱性に支障ない反りのレベル、具体的には、常温におけるその最大反り量の絶対値を２００μｍ／ｉｎｃｈ（１ｉｎｃｈは０．０２５４ｍ）以下とすることができる。   Further, in order to reduce the thermal resistance of the circuit board, it is necessary to reduce the amount of warping of the circuit board and to improve the contact between the circuit board and the heat dissipation base. The circuit board and the heat-dissipating base solder are joined to each other, but if the warp of the circuit board is large, voids are likely to be generated in the solder layer, and when the void amount increases, the voids prevent heat transfer and increase the thermal resistance. Therefore, it is necessary to reduce the amount of warpage. In a state where the metal circuit board 3 and the metal heat sink 4 are bonded to the ceramic substrate 2 by the brazing material 5, the warp of the circuit board is 30 μm / inch (1 inch is 0.0254 m) or less. Thereafter, the substrate may be greatly warped depending on the temperature condition at the time of joining the aluminum plate 20, but by adjusting the joining conditions, the level of warpage that does not affect heat dissipation, specifically, its maximum warpage at normal temperature. The absolute value of the amount can be 200 μm / inch (1 inch is 0.0254 m) or less.

この回路基板は、例えば、以下の通りにして製造できる。絶縁性セラミックス基板２（窒化珪素セラミックス）の両面に活性金属ろう材５として例えば、Ｔｉが添加されたＡｇ−Ｃｕ系合金に代表される活性金属を印刷塗布する。次に、絶縁性セラミックス基板２とほぼ同じ長方形状の金属板である無酸素銅を両面に７００℃〜９００℃の温度で加熱接合する。その後、金属板上にレジストパターンを形成後、例えば塩化第二鉄あるいは塩化第二銅溶液によってエッチング処理を施して、回路パターンをなす金属回路板３および金属放熱板４を形成する。また、これによって露出した部分のろう材層５のエッチングは、例えば過酸化水素とフッ化アンモニウムとの混合溶液によって引き続き行われる。その後、接合部材層２１を介して、金属放熱板４とアルミニウム板２０を接合する。さらに回路パターン形成後の金属回路板３およびアルミニウム板２０にＮｉ−Ｐメッキを施し、図１の回路基板が製造される。なお、このメッキ処理を施さないことも可能であり、この場合には、アルミニウム板２０を接合した後、ベンゾトリアゾール等などの防錆剤を添付する。また、選択するはんだ材種に応じて、ロジンなどの濡れ性向上成分を含有した防錆剤を用いる。   This circuit board can be manufactured, for example, as follows. For example, an active metal typified by an Ag—Cu alloy to which Ti is added is printed and applied as an active metal brazing material 5 on both surfaces of the insulating ceramic substrate 2 (silicon nitride ceramics). Next, oxygen-free copper, which is a rectangular metal plate that is substantially the same as the insulating ceramic substrate 2, is heated and bonded to both surfaces at a temperature of 700 ° C. to 900 ° C. Then, after forming a resist pattern on the metal plate, an etching process is performed, for example, with a ferric chloride or cupric chloride solution, thereby forming the metal circuit plate 3 and the metal heat radiating plate 4 forming the circuit pattern. Moreover, the etching of the brazing material layer 5 in the exposed portion is continued, for example, with a mixed solution of hydrogen peroxide and ammonium fluoride. Then, the metal heat sink 4 and the aluminum plate 20 are joined via the joining member layer 21. Further, Ni-P plating is applied to the metal circuit board 3 and the aluminum board 20 after the circuit pattern is formed, and the circuit board of FIG. 1 is manufactured. In addition, it is also possible not to perform this plating process, and in this case, after joining the aluminum plate 20, a rust preventive agent such as benzotriazole is attached. Further, a rust inhibitor containing a wettability improving component such as rosin is used according to the solder material type to be selected.

また、金属放熱板４とアルミニウム板２０とを接合するための接合部材層２１が銅やアルミニウムと接合し難い材料からなる場合は、金属放熱板４やアルミニウム板２０にＮｉ−Ｐメッキを施した後に接合部材層２１を介してそれらを接合させることが好ましい。特に銅やアルミニウムを含む接合部材を用いる際には、Ｎｉ−Ｐメッキが銅とアルミニウムの直接接合を回避する層となりえるため、回路基板の信頼性をより向上させる効果が得られる。アルミニウムを含む接合部材を用いる場合は金属放熱板４にＮｉ−Ｐメッキを施した後に金属放熱板４とアルミニウム板２０とを接合することが好ましく、アルミニウムとの濡れ性を確保することができない接合部材を用いる場合はアルミニウム板２０にＮｉ−Ｐメッキを施した後にアルミニウム板２０と金属放熱板４とを接合することが好ましい。   Moreover, when the joining member layer 21 for joining the metal heat sink 4 and the aluminum plate 20 is made of a material that is difficult to join with copper or aluminum, the metal heat sink 4 or the aluminum plate 20 is subjected to Ni-P plating. It is preferable to bond them later via the bonding member layer 21. In particular, when using a joining member containing copper or aluminum, Ni-P plating can be a layer that avoids direct joining of copper and aluminum, so that the effect of further improving the reliability of the circuit board can be obtained. When a joining member containing aluminum is used, it is preferable to join the metal heat sink 4 and the aluminum plate 20 after Ni-P plating is applied to the metal heat sink 4, so that the wettability with aluminum cannot be ensured. When using a member, it is preferable to join the aluminum plate 20 and the metal heat sink 4 after Ni-P plating is applied to the aluminum plate 20.

図１の回路基板に、半導体チップおよび放熱ベースをはんだ付けすることによって半導体モジュールを得ることができる。この半導体モジュールの断面図が図２である。図２においては、図１の回路基板１に半導体チップ６と放熱ベース１３がそれぞれはんだ層７および１２を介して接合される。   A semiconductor module can be obtained by soldering a semiconductor chip and a heat dissipation base to the circuit board of FIG. FIG. 2 is a sectional view of this semiconductor module. In FIG. 2, the semiconductor chip 6 and the heat dissipation base 13 are joined to the circuit board 1 of FIG. 1 via solder layers 7 and 12, respectively.

半導体チップ６は、例えばＩＧＢＴ（Ｉｎｓｕｌａｔｅｄ Ｇａｔｅ Ｂｉｐｏｌａｒ Ｔｒａｎｓｉｓｔｏｒ）のような半導体デバイスが形成されたシリコンチップである。特にこの半導体デバイスは、大電力で動作するものとすることができる。これによる発熱がこの回路基板によって放熱される。また、半導体チップ６と配線となる金属回路板３との電気的接続は、ボンディングワイヤ（図示せず）を用いてもよいし、フリップチップ接続を用いることにより、はんだ等のバンプにより行ってもよい。さらには、半導体素子との接合信頼性（パワーサイクル特性）を向上させるため、銅および銅合金あるいは、銅とインバーとのクラッド材からなるリード板による接合を行ってもよい。   The semiconductor chip 6 is a silicon chip on which a semiconductor device such as an IGBT (Insulated Gate Bipolar Transistor) is formed. In particular, this semiconductor device can be operated with high power. Heat generated thereby is dissipated by the circuit board. Further, the electrical connection between the semiconductor chip 6 and the metal circuit board 3 serving as the wiring may be performed using a bonding wire (not shown), or may be performed by a bump such as solder by using a flip chip connection. Good. Further, in order to improve the bonding reliability (power cycle characteristics) with the semiconductor element, bonding with a lead plate made of a clad material of copper and copper alloy or copper and invar may be performed.

はんだ層７および１２は、例えば、Ｓｎ−Ｐｂはんだ等であり、その融点は１９０〜２７０℃程度である。従って、これを用いて半導体チップ６と金属回路板３を、アルミニウム板２０と放熱ベース１３とを２１０〜２９０℃程度の温度で接合することができる。また、環境対応下Ｓｎ−Ａｇ系、Ｓｎ−Ａｇ−Ｃｕ系、Ｓｎ−Ｂｉ系などのＰｂフリーはんだを用いることが望ましい。   The solder layers 7 and 12 are, for example, Sn—Pb solder and the melting point thereof is about 190 to 270 ° C. Therefore, using this, the semiconductor chip 6 and the metal circuit board 3 can be joined to the aluminum plate 20 and the heat dissipation base 13 at a temperature of about 210 to 290 ° C. Further, it is desirable to use Pb-free solder such as Sn—Ag, Sn—Ag—Cu, or Sn—Bi based on environment.

なお、はんだ層７は、冷熱サイクルに際しては、上記の半導体チップ６と金属回路板３との熱膨張差によって内部応力が加わった状態となる。特に金属回路板の厚みが０．８ｍｍを越えるような厚い場合、その内部応力は高くなり、冷熱サイクル試験にはんだ層７にクラックが入る可能性が高くなるため、金属回路板３の厚みは０．８ｍｍ以下とする必要がある。一方、金属回路板３の厚みが０．３ｍｍ未満の場合には回路断面積が小さくなり過ぎるためシリコンチップから流れてくる電流による発熱量が増大する虞が高くなる。   Note that the solder layer 7 is in a state where internal stress is applied due to a difference in thermal expansion between the semiconductor chip 6 and the metal circuit board 3 during the cooling / heating cycle. In particular, when the thickness of the metal circuit board exceeds 0.8 mm, the internal stress increases, and the possibility of cracks in the solder layer 7 in the thermal cycle test increases, so the thickness of the metal circuit board 3 is 0. It must be 8 mm or less. On the other hand, when the thickness of the metal circuit board 3 is less than 0.3 mm, the circuit cross-sectional area becomes too small, and there is a high possibility that the amount of heat generated by the current flowing from the silicon chip increases.

放熱ベース１３は、機器側でこの回路基板を搭載する部分である。放熱ベース１３は金属放熱板４に伝わった熱を放熱するため、熱伝導率が高く、熱容量が大きい。これは例えば銅、銅合金、またはアルミニウム合金からなる。純アルミニウムは柔らかすぎて反り量が大きくなりやすいため不適である。放熱ベース１３の熱膨張係数は、例えば、銅が１７×１０−６／Ｋ、アルミニウムが２２×１０−６／Ｋ程度と大きい。銅合金およびアルミニウム合金の熱膨張係数もこれらに近い値となる。これらは回路基板の熱膨張係数５〜８×１０−６／Ｋよりもかなり大きいため、アルミニウム板２０がない状態で回路基板１を放熱ベースに接合した場合、はんだ層１２に応力が集中して破断する恐れがあるが、本発明のように放熱金属板４にアルミニウム板２０を接合した後、回路基板を放熱ベースに接合した場合には、柔らかいアルミニウム板２０が応力緩和層として作用し、結果としてはんだ層１２に集中していた応力を緩和し、はんだ層１２の接合信頼性を大幅に向上させることができる。併せて放熱ベース１３として熱伝導性の高い銅もしくは銅合金を用いることができるので、放熱性と耐久性に優れた半導体モジュールを得ることができる。 The heat dissipation base 13 is a part on which the circuit board is mounted on the device side. Since the heat dissipation base 13 dissipates heat transmitted to the metal heat dissipation plate 4, the heat dissipation base 13 has a high thermal conductivity and a large heat capacity. This consists, for example, of copper, copper alloy or aluminum alloy. Pure aluminum is unsuitable because it is too soft and the amount of warpage tends to increase. The thermal expansion coefficient of the heat dissipation base 13 is as large as, for example, about 17 × 10 −6 / K for copper and about 22 × 10 −6 / K for aluminum. The thermal expansion coefficients of copper alloys and aluminum alloys are also close to these values. These are considerably larger than the thermal expansion coefficient of the circuit board 5-8 × 10 −6 / K. Therefore, when the circuit board 1 is joined to the heat dissipation base without the aluminum plate 20, stress concentrates on the solder layer 12. Although there is a risk of breaking, when the aluminum plate 20 is joined to the heat radiating metal plate 4 as in the present invention and then the circuit board is joined to the heat radiating base, the soft aluminum plate 20 acts as a stress relaxation layer, resulting in As a result, the stress concentrated on the solder layer 12 can be relaxed, and the bonding reliability of the solder layer 12 can be greatly improved. In addition, since copper or copper alloy having high thermal conductivity can be used as the heat dissipation base 13, a semiconductor module excellent in heat dissipation and durability can be obtained.

この半導体モジュールは、例えば、以下の通りにして製造できる。金属放熱板４とアルミニウム板２０とを接合させる接合部材層２１が融点３００℃を超えるような高温はんだ等であった場合には、放熱ベース１３の上に、融点が１９０〜２５０℃の組成を有する低温〜中温はんだの箔を乗せ、その上に金属放熱板４にアルミニウム板２０が接合された回路基板１を重ねる。さらに前記回路基板の金属回路板３の上に、前記低温〜中温はんだとほぼ同融点のはんだの箔を乗せ、半導体チップ６を重ねる。その後、窒素や水素などの雰囲気条件下、２１０〜２７０℃まで加熱することではんだ層７および１２を同時に形成し、図４の半導体モジュールを得ることができる（以下、別接合法という）。なお、この場合、はんだ層７および１２の組成が同一であっても問題はない。   This semiconductor module can be manufactured, for example, as follows. When the joining member layer 21 for joining the metal heat radiating plate 4 and the aluminum plate 20 is a high temperature solder or the like having a melting point exceeding 300 ° C., a composition having a melting point of 190 to 250 ° C. is formed on the heat radiating base 13. The circuit board 1 in which the aluminum plate 20 is joined to the metal heat radiating plate 4 is placed thereon. Furthermore, a solder foil having substantially the same melting point as that of the low-temperature to medium-temperature solder is placed on the metal circuit board 3 of the circuit board, and the semiconductor chip 6 is overlaid. Thereafter, the solder layers 7 and 12 are simultaneously formed by heating to 210 to 270 ° C. under an atmospheric condition such as nitrogen or hydrogen, whereby the semiconductor module of FIG. 4 can be obtained (hereinafter referred to as a separate bonding method). In this case, there is no problem even if the compositions of the solder layers 7 and 12 are the same.

また、金属放熱板４とアルミニウム板２０とを接合させる接合部材層２１が融点２５０℃未満の低温〜中温はんだ等であった場合には、放熱ベース１３の上に、融点が１９０〜２５０℃の組成を有する低温〜中温はんだの箔を乗せ、その上にアルミニウム板２０を重ねる。次にアルミニウム板２０の上に前記低温〜中温はんだとほぼ同融点のはんだの箔を乗せ、アルミニウム板２０が接合されていない回路基板１を重ね、さらに前記回路基板の金属回路板３の上に、前記低温〜中温はんだとほぼ同融点のはんだの箔を乗せ、半導体チップ６を重ねる。その後、窒素や水素などの雰囲気条件下、２１０〜２７０℃まで加熱することではんだ層７および１２と接合部材層２１を同時に形成し、図４の半導体モジュールを得ることができる（以下、同時接合法という）。なお、この場合、はんだ層７および１２と接合部材層２１の組成が同一であっても問題はない。   When the joining member layer 21 for joining the metal heat radiating plate 4 and the aluminum plate 20 is a low-temperature to medium-temperature solder having a melting point of less than 250 ° C., the melting point is 190 to 250 ° C. on the heat radiating base 13. A low-temperature to medium-temperature solder foil having the composition is placed, and the aluminum plate 20 is stacked thereon. Next, a solder foil having substantially the same melting point as that of the low-temperature to medium-temperature solder is placed on the aluminum plate 20, the circuit board 1 to which the aluminum plate 20 is not bonded is stacked, and further on the metal circuit board 3 of the circuit board. Then, a solder foil having substantially the same melting point as that of the low to medium temperature solder is placed thereon, and the semiconductor chip 6 is stacked. Thereafter, the solder layers 7 and 12 and the bonding member layer 21 are simultaneously formed by heating to 210 to 270 ° C. under an atmospheric condition such as nitrogen or hydrogen, whereby the semiconductor module of FIG. 4 can be obtained (hereinafter, simultaneous contact). Called legal). In this case, there is no problem even if the compositions of the solder layers 7 and 12 and the joining member layer 21 are the same.

なお、上記の例ではセラミックス基板２として窒化珪素セラミックスを用いていたが、これに限られるものではなく、同等以上の熱伝導率、３点曲げ強度、破壊靱性値、絶縁性をもつものであれば、同様に用いることができる。   In the above example, silicon nitride ceramics is used as the ceramic substrate 2. However, the ceramic substrate 2 is not limited to this, and has any thermal conductivity equal to or higher than that, three-point bending strength, fracture toughness value, and insulation. Can be used similarly.

最後に、これらの半導体モジュールにおいて−４０℃〜＋１２５℃の温度範囲の冷熱サイクルを３０００回行い、その放熱効率および耐久性を判定した。ここで、放熱効率を示す指標として、冷熱サイクル印加前後の半導体チップからの熱抵抗を測定した。ここで、熱抵抗は、ＪＩＳＡ１４１２で規定される量である。印加前の熱抵抗が０．１５℃／Ｗよりも大きな場合を不合格とした。また、３０００回印加後に、はんだ層７および１２および接合部材２１のいずれかが破断したものを不合格とした。   Finally, in these semiconductor modules, a cooling cycle in the temperature range of −40 ° C. to + 125 ° C. was performed 3000 times to determine the heat dissipation efficiency and durability. Here, the thermal resistance from the semiconductor chip before and after application of the cooling cycle was measured as an index indicating the heat dissipation efficiency. Here, the thermal resistance is an amount defined by JISA1412. The case where the thermal resistance before application was larger than 0.15 ° C./W was regarded as unacceptable. Moreover, after 3000 times of application, any of the solder layers 7 and 12 and the joining member 21 that were broken was regarded as rejected.

（実施例１〜１４、比較例１〜１１）
実施例１〜１４として、表１の構成の回路基板を作成し、これに半導体チップを搭載して上記の構造の半導体モジュールを作製して冷熱サイクルを印加し、その耐久性能を調べた。同時に、比較例となる回路基板も作成し、同様の特性を調べた。半導体モジュールは実施例１２〜１４では同時接合法により作製し、それ以外では別接合法により作製した。 (Examples 1-14, Comparative Examples 1-11)
As Examples 1 to 14, a circuit board having the structure shown in Table 1 was prepared, a semiconductor chip was mounted on the circuit board, a semiconductor module having the structure described above was prepared, a cooling cycle was applied, and the durability performance was examined. At the same time, a circuit board as a comparative example was also prepared, and similar characteristics were examined. The semiconductor modules were manufactured by the simultaneous bonding method in Examples 12 to 14, and were manufactured by the separate bonding method in other cases.

実施例１〜１４および比較例１〜１１においては、使用したセラミックス基板２はすべて３０ｍｍ×５０ｍｍ×厚さ０．３２ｍｍの窒化珪素セラミックス板（熱伝導率が９０Ｗ／ｍ・Ｋ程度、３点曲げ強度が７００ＭＰａ程度、破壊靱性値が６ＭＰａ・ｍ１／２程度）である。金属回路板３および金属放熱板４としては、３０ｍｍ×５０ｍｍの無酸素銅を用いた。金属回路板のパターンはすべて同一である。使用したろう材はＴｉを活性金属として含有し、組成はＡｇ−Ｃｕ系のものである。また、接合温度は約８００℃である。 In Examples 1 to 14 and Comparative Examples 1 to 11, the ceramic substrates 2 used were all 30 mm × 50 mm × 0.32 mm thick silicon nitride ceramic plates (thermal conductivity of about 90 W / m · K, three-point bending The strength is about 700 MPa, and the fracture toughness value is about 6 MPa · m 1/2 ). As the metal circuit board 3 and the metal heat sink 4, 30 mm × 50 mm oxygen-free copper was used. The patterns on the metal circuit board are all the same. The brazing material used contains Ti as an active metal, and the composition is of the Ag-Cu type. The bonding temperature is about 800 ° C.

実施例１〜４および比較例１〜４は、アルミニウム板２０の効果並びにその厚みの影響を調べたものである。実施例５〜７および比較例５は回路基板の反りの影響を調べたものである。回路基板の反りはアルミニウム板の接合条件および荷重付加により可変した。実施例７〜９および比較例６〜９は金属回路板３および金属放熱板４の厚みと厚み比の影響を調べたものである。実施例１０〜１４および比較例１０は接合部材種の影響を調べたものである。また、比較例１１は接合部材を用いずに、前記特許文献に開示された５００℃熱圧着にてアルミニウム板２０を接合した効果を調べたものである。なお、実施例１０の接合部材２１はアルミニウムを含むため金属放熱板４にＮｉ−Ｐメッキを施した後に金属放熱板４とアルミニウム板２０とを接合した。実施例１〜９および実施例１１〜１４および比較例３〜９の接合部材２１はアルミニウムとの濡れ性を確保することができないため、アルミニウム板２０にＮｉ−Ｐメッキを施した後にアルミニウム板２０と金属放熱板４とを接合した。   Examples 1-4 and Comparative Examples 1-4 investigate the effect of the aluminum plate 20 and the influence of its thickness. In Examples 5 to 7 and Comparative Example 5, the influence of warping of the circuit board was examined. The warping of the circuit board was varied depending on the joining conditions of the aluminum plate and the load applied. Examples 7 to 9 and Comparative Examples 6 to 9 examine the influence of the thickness and thickness ratio of the metal circuit board 3 and the metal heat sink 4. In Examples 10 to 14 and Comparative Example 10, the influence of the joining member type was examined. Moreover, the comparative example 11 investigated the effect which joined the aluminum plate 20 by the 500 degreeC thermocompression disclosed by the said patent document, without using a joining member. In addition, since the joining member 21 of Example 10 contains aluminum, the metal heat sink 4 and the aluminum plate 20 were joined after performing Ni-P plating on the metal heat sink 4. Since the joining members 21 of Examples 1 to 9, Examples 11 to 14 and Comparative Examples 3 to 9 cannot ensure wettability with aluminum, the aluminum plate 20 is subjected to Ni-P plating on the aluminum plate 20. And the metal heat sink 4 were joined.

以上の実施例および比較例について、−４０℃〜＋１２５℃の冷熱サイクルにおける特性を調べた。回路基板の反りについては、常温にて金属放熱板の対角線上の反り量を３次元形状測定器により測定し、対角線の長さで割った量を最大反り量（μｍ／ｉｎｃｈ）とした。ここで、金属回路板側が凸になる方向を＋とした。   About the above Example and the comparative example, the characteristic in the cold cycle of -40 degreeC-+125 degreeC was investigated. Regarding the warpage of the circuit board, the warpage amount on the diagonal line of the metal heat sink was measured with a three-dimensional shape measuring device at room temperature, and the amount divided by the length of the diagonal line was defined as the maximum warpage amount (μm / inch). Here, the direction in which the metal circuit board side is convex is defined as +.

図２に示すように、この回路基板１に半導体チップ（パワーＭＯＳＦＥＴ）６と５０ｍｍ×９０ｍｍ×厚さ３ｍｍの無酸素銅の放熱ベース１３をＳｎ−３％Ａｇ−０．５％Ｃｕはんだで接合して半導体モジュール１１を作成し、冷熱サイクルを行った。−４０℃〜＋１２５℃の冷熱サイクル（１サイクルは７０分）を３０００回行い、その後での半導体チップ６下のはんだ層７および金属放熱板４下の接合部材層２１およびアルミニウム板２０下のはんだ層１２の破損の状況を超音波画像診断装置（日立建機製Ｈｉ−Ｆｏｃｕｓ）を用い、ボイド率（ボイドの面積／半導体チップ面積×１００）を調べた。はんだ層の破損は、これらにおける界面のボイド率が３０００サイクル後に３０％以上となっていた場合を、破損や剥離が発生したと認定した。いずれかの箇所で破損や剥離が発生したものを不合格とした。   As shown in FIG. 2, a semiconductor chip (power MOSFET) 6 and an oxygen-free copper heat dissipation base 13 of 50 mm × 90 mm × thickness 3 mm are joined to the circuit board 1 with Sn—3% Ag—0.5% Cu solder. Then, the semiconductor module 11 was created and a cooling / heating cycle was performed. A cooling cycle of -40 ° C. to + 125 ° C. (one cycle is 70 minutes) is performed 3000 times, and then the solder layer 7 under the semiconductor chip 6, the bonding member layer 21 under the metal heat sink 4, and the solder under the aluminum plate 20 The void ratio (void area / semiconductor chip area × 100) was examined by using an ultrasonic diagnostic imaging apparatus (Hi-Focus manufactured by Hitachi Construction Machinery Co., Ltd.) as to whether the layer 12 was damaged. Regarding the breakage of the solder layer, it was determined that breakage or peeling occurred when the void ratio at the interface was 30% or more after 3000 cycles. A case where breakage or peeling occurred at any point was regarded as rejected.

また、冷熱サイクルの印加の前後で、半導体チップ側から見た熱抵抗（℃／Ｗ）を測定した。この測定は、半導体チップに通電することによってこれを発熱させ、そのとき温度上昇を熱抵抗評価装置（キャッツ電子製、ＭＯＤＥＬ ＤＶＦ２４０）によって電圧換算により測定した。ここでは、単位断面積当たりの量ではなく、単位を（℃／Ｗ）として測定した。初期（冷熱サイクル印加前）の熱抵抗の値が０．２０℃／Ｗ以上であったものは放熱特性が悪いために不合格と判定した。また、初期の熱抵抗がこの値より小さくとも、冷熱サイクル印加後の熱抵抗の値が２５％以上増加していたものは、はんだ層において上記の観察では判別できない程度の破損やセラミックス基板のクラック等が発生したものと考えられるため、不合格とした。以上の結果を表１にまとめて示す。   Further, the thermal resistance (° C./W) viewed from the semiconductor chip side was measured before and after the application of the cooling / heating cycle. This measurement was performed by energizing the semiconductor chip to generate heat. At that time, the temperature rise was measured by voltage conversion using a thermal resistance evaluation device (Model DVF240, manufactured by Cats Electronics). Here, not the amount per unit cross-sectional area, but the unit was (° C./W). Those having a thermal resistance value of 0.20 ° C./W or more at the initial stage (before application of the cooling / heating cycle) were judged to be unacceptable because of their poor heat dissipation characteristics. Moreover, even if the initial thermal resistance is smaller than this value, the value of the thermal resistance after application of the cooling cycle is increased by 25% or more. Since it was thought that etc. occurred, it was judged as rejected. The above results are summarized in Table 1.

Figure 2008147308
Figure 2008147308

実施例１〜１４の半導体モジュールにおいては、３０００回の冷熱サイクルによってもはんだ層７、接合部材層２１およびはんだ層１２で大きな破損を生じることがなく、冷熱サイクルの前後で低い熱抵抗値を保つことが確認できた。また、常温における最大反り量の絶対値は２００μｍ／ｉｎｃｈ以下であった。金属放熱板４と接合部材層２１、アルミニウム層２０と接合部材層２１のそれぞれの界面にＣｕ−Ａｌ化合物層は形成されていないことが確認された。ここでＣｕ−Ａｌ化合物層の有無は断面観察で接合部分の界面を観察して確認することができる。   In the semiconductor modules of Examples 1 to 14, the solder layer 7, the joining member layer 21 and the solder layer 12 are not damaged significantly even after 3000 cooling cycles, and a low thermal resistance value is maintained before and after the cooling cycle. I was able to confirm. Further, the absolute value of the maximum warpage amount at room temperature was 200 μm / inch or less. It was confirmed that the Cu—Al compound layer was not formed at each interface between the metal heat sink 4 and the bonding member layer 21, and the aluminum layer 20 and the bonding member layer 21. Here, the presence or absence of the Cu—Al compound layer can be confirmed by observing the interface of the bonded portion by cross-sectional observation.

これに対し、アルミニウム板２０がない比較例１は、１５００サイクルで金属ベース上のはんだ層の破損が発生した。アルミニウム板２０がなく、金属ベースとしてCu・Mｏベースを用いた比較例２では初期の熱抵抗が０．２３℃／Ｗと高く、放熱性が不充分であった。   On the other hand, in Comparative Example 1 without the aluminum plate 20, damage to the solder layer on the metal base occurred in 1500 cycles. In Comparative Example 2 in which the aluminum plate 20 was not provided and the Cu • Mo base was used as the metal base, the initial thermal resistance was as high as 0.23 ° C./W, and the heat dissipation was insufficient.

アルミニウム板２０が０．１ｍｍと薄い比較例３では２０００サイクルで金属ベース上のはんだ層の破損が発生した。一方、アルミニウム板２０が１．８ｍｍと厚い比較例４では初期の熱抵抗値が０．２３℃／Ｗと高く、放熱性が不充分であった。   In Comparative Example 3 where the aluminum plate 20 was as thin as 0.1 mm, breakage of the solder layer on the metal base occurred in 2000 cycles. On the other hand, in Comparative Example 4 where the aluminum plate 20 was as thick as 1.8 mm, the initial thermal resistance value was as high as 0.23 ° C./W, and the heat dissipation was insufficient.

回路基板の反りが大きい比較例５では初期の熱抵抗値が０．２２℃／Ｗと高く、放熱性が不充分であった。なお、実施例においては基板の反りはアルミニウム層接合後に室温にてハンドプレスを用いて０．１〜０．５Mpaの圧力を加えることにより、反りを矯正した。一方、反りの大きい比較例５，８，９では反りの矯正を行わなかった。金属回路板３の厚みＴ１が０．２ｍｍと薄い比較例６および金属回路板３と金属放熱板４との厚み比Ｔ２／Ｔ１比が本発明外の比較例８および９では熱抵抗値が高く、放熱性が不充分であった。また、金属回路板３の厚みＴ１が１．０ｍｍと厚い比較例７では半導体チップ下のはんだ層７にクラックが入り１０００サイクルで半導体チップ下のはんだ層７にクラックが入り熱抵抗が大きく上昇した。しかし、はんだ層１２に破損は発生しなかった。なお、比較例３〜９の半導体モジュールにおいても金属放熱板４と接合部材層２１、アルミニウム層２０と接合部材層２１のそれぞれの界面にＣｕ−Ａｌ化合物層は形成されていないことが確認された。   In Comparative Example 5 where the warpage of the circuit board was large, the initial thermal resistance value was as high as 0.22 ° C./W, and the heat dissipation was insufficient. In the examples, the warpage of the substrate was corrected by applying a pressure of 0.1 to 0.5 MPa using a hand press at room temperature after joining the aluminum layer. On the other hand, in Comparative Examples 5, 8, and 9 having a large warp, the warp was not corrected. In Comparative Example 6 where the thickness T1 of the metal circuit board 3 is as thin as 0.2 mm, and in the Comparative Examples 8 and 9 where the thickness ratio T2 / T1 between the metal circuit board 3 and the metal heat sink 4 is outside the present invention, the thermal resistance value is high. Insufficient heat dissipation. Further, in Comparative Example 7 where the thickness T1 of the metal circuit board 3 is as large as 1.0 mm, cracks occurred in the solder layer 7 under the semiconductor chip, and cracks occurred in the solder layer 7 under the semiconductor chip in 1000 cycles, resulting in a significant increase in thermal resistance. . However, the solder layer 12 was not damaged. In the semiconductor modules of Comparative Examples 3 to 9, it was confirmed that no Cu—Al compound layer was formed at each interface between the metal heat sink 4 and the bonding member layer 21 and between the aluminum layer 20 and the bonding member layer 21. .

接合部材２１に融点５７０℃のアルミニウム系ろう材を用いた比較例１０では、金属放熱板４下の接合部材層２１にクラックが入り、１０００サイクルでＮＧとなった。また、接合部材を用いずに、５００℃熱圧着にてアルミニウム板２０を接合した比較例１１では、金属放熱板４とアルミニウム板２０の間にクラックが入り、１０００サイクルでＮＧとなった。比較例１０，１１はいずれも接合温度が高く、比較例１０では接合部材であるＡｌ−１２％Ｓｉの周辺部に、比較例１１では金属放熱板４とアルミニウム板２０との界面にそれぞれＡｌ−Ｃｕ系の脆性化合物層が生成し、冷熱サイクル試験中にこの脆性化合物層にクラックが生じ熱抵抗が大きくなった。   In Comparative Example 10 in which an aluminum-based brazing material having a melting point of 570 ° C. was used for the bonding member 21, cracks occurred in the bonding member layer 21 below the metal heat radiating plate 4 and became NG in 1000 cycles. Moreover, in the comparative example 11 which joined the aluminum plate 20 by 500 degreeC thermocompression bonding without using a joining member, the crack entered between the metal heat sink 4 and the aluminum plate 20, and became NG in 1000 cycles. In Comparative Examples 10 and 11, the bonding temperature is high. In Comparative Example 10, Al-12% Si is the peripheral part of the bonding member, and in Comparative Example 11, Al-- is formed at the interface between the metal heat sink 4 and the aluminum plate 20, respectively. A Cu-based brittle compound layer was formed, and the brittle compound layer was cracked during the thermal cycle test, and the thermal resistance increased.

以上実施例を示したが、これらは本発明における、ほんの一部である。いずれにしても、本発明を実施したセラミックス回路基板および、前記回路基板を用いたモジュールとすることにより、高放熱性に優れ、なおかつ信頼性、特にはんだ層の接続信頼性に優れたパワー半導体モジュールを提供することができる。   Examples have been given above, but these are only a part of the present invention. In any case, by making the ceramic circuit board embodying the present invention and a module using the circuit board, a power semiconductor module excellent in high heat dissipation and excellent in reliability, particularly in solder layer connection reliability. Can be provided.

本発明の実施の形態に係る回路基板の断面図である。1 is a cross-sectional view of a circuit board according to an embodiment of the present invention. 本発明の実施の形態に係る半導体モジュールの断面図である。It is sectional drawing of the semiconductor module which concerns on embodiment of this invention. 従来の半導体モジュールの一例の構造の断面図である。It is sectional drawing of the structure of an example of the conventional semiconductor module. 特許文献に開示された方法を用いて、金属放熱板４の下にアルミニウム板２０を熱圧着した半導体モジュールの断面図である。It is sectional drawing of the semiconductor module which heat-pressed the aluminum plate 20 under the metal heat sink 4 using the method disclosed by the patent document.

符号の説明Explanation of symbols

１ 回路基板
２ セラミックス基板
３ 金属回路板
４ 金属放熱板
５ ろう材層
６ 半導体チップ
１１ 半導体モジュール
７，１２ はんだ層
２０ アルミニウム板
２１ 接合部材層 DESCRIPTION OF SYMBOLS 1 Circuit board 2 Ceramic substrate 3 Metal circuit board 4 Metal heat sink 5 Brazing material layer 6 Semiconductor chip 11 Semiconductor module 7, 12 Solder layer 20 Aluminum plate 21 Joining member layer

Claims (14)

セラミックス基板の一方の面に金属回路板が形成され、他方の面に金属放熱板が形成された回路基板であって、前記金属回路板および前記金属放熱板が銅または銅合金からなり、前記金属放熱板に接合部材層を介してアルミニウム板が接合されていることを特徴とする回路基板。   A circuit board in which a metal circuit board is formed on one surface of a ceramic substrate and a metal heat sink is formed on the other surface, wherein the metal circuit board and the metal heat sink are made of copper or a copper alloy, and the metal A circuit board, wherein an aluminum plate is bonded to a heat radiating plate through a bonding member layer. 請求項１記載のアルミニウム板の厚みが０．２ｍｍ〜１．５ｍｍであり、かつ金属回路板の厚みT１は０．３〜０．８ｍｍであり、さらに金属回路板の厚みT１と金属放熱板の厚みT２の比、T２／T１が０．７〜１．０であることを特徴とする回路基板。   The thickness of the aluminum plate according to claim 1 is 0.2 mm to 1.5 mm, the thickness T1 of the metal circuit board is 0.3 to 0.8 mm, and the thickness T1 of the metal circuit board and the metal heat sink A ratio of thickness T2, T2 / T1 is 0.7 to 1.0. 常温における最大反り量が２００μｍ／ｉｎｃｈ以下であることを特徴とする請求項１乃至２のいずれか１項に記載の回路基板。   3. The circuit board according to claim 1, wherein a maximum warpage amount at a normal temperature is 200 μm / inch or less. 4. 前記セラミックス基板が窒化珪素セラミックスであることを特徴とする請求項１乃至３のいずれか１項に記載の回路基板。   The circuit board according to any one of claims 1 to 3, wherein the ceramic substrate is a silicon nitride ceramic. 前記接合部材層の融点が、２５０℃〜４５０℃であることを特徴とする請求項１乃至４のいずれか１項に記載の回路基板。   5. The circuit board according to claim 1, wherein the bonding member layer has a melting point of 250 ° C. to 450 ° C. 5. 請求項５記載の接合部材層が、Ｐｂ：８０〜９９ｗｔ％、Ｓｎ：０〜２０ｗｔ％を含有し、Ｐｂ、Ｓｎ合わせて９０ｗｔ％以上を含有するＰｂ系高温はんだ層である回路基板。   6. The circuit board according to claim 5, wherein the bonding member layer is a Pb-based high-temperature solder layer containing Pb: 80 to 99 wt%, Sn: 0 to 20 wt%, and containing 90 wt% or more in total of Pb and Sn. 請求項５記載の接合部材層が、Ｚｎ：３０〜９９ｗｔ％、Ａｌ：０．１〜６０ｗｔ％、Ｓｉ：０．１〜３０ｗｔ％を含有し、Ｚｎ、Ａｌ、Ｓｉ合わせて９０ｗｔ％以上を含有するＺｎ−Ａｌ系はんだ層である回路基板。   The bonding member layer according to claim 5 contains Zn: 30 to 99 wt%, Al: 0.1 to 60 wt%, Si: 0.1 to 30 wt%, and Zn, Al, and Si together contain 90 wt% or more. A circuit board which is a Zn-Al solder layer. 請求項５記載の接合部材層が、Ｓｎ：５０〜９０ｗｔ％、Ｃｕ：５〜５０ｗｔ％を含有し、Ｓｎ、Ｃｕ合わせて９０ｗｔ％以上を含有するＰｂフリー高温はんだ層である回路基板。   6. The circuit board according to claim 5, wherein the bonding member layer is a Pb-free high-temperature solder layer containing Sn: 50 to 90 wt%, Cu: 5 to 50 wt%, and Sn and Cu in total containing 90 wt% or more. 請求項１乃至８のいずれか１項に記載の回路基板の金属回路板に半導体チップが接合され、前記回路基板のアルミニウム板に放熱ベースが接合され、これらを接合するためのはんだの融点が、前記回路基板の接合部材層の融点よりも低いことを特徴とする半導体モジュール。   A semiconductor chip is joined to the metal circuit board of the circuit board according to any one of claims 1 to 8, a heat dissipation base is joined to the aluminum board of the circuit board, and a melting point of solder for joining them is A semiconductor module having a melting point lower than that of the bonding member layer of the circuit board. 前記接合部材層の融点が、２５０℃未満であることを特徴とする請求項１乃至４のいずれか１項に記載の回路基板。   5. The circuit board according to claim 1, wherein a melting point of the bonding member layer is less than 250 ° C. 6. 請求項１０記載の接合部材層が、Ｐｂ：３０〜７０ｗｔ％、Ｓｎ：３０〜７０ｗｔ％を含有し、Ｐｂ、Ｓｎ合わせて９０ｗｔ％以上を含有するＰｂ系はんだ層である回路基板。   The circuit board according to claim 10, wherein the bonding member layer is a Pb-based solder layer containing Pb: 30 to 70 wt%, Sn: 30 to 70 wt%, and containing 90 wt% or more in total of Pb and Sn. 請求項１０記載の接合部材層として、Ｓｎ：８０〜９９．５ｗｔ％、Ａｇ：０．１〜２０ｗｔ％を含有し、Ｓｎ、Ａｇ合わせて９０ｗｔ％以上を含有するＰｂフリーはんだ層である回路基板。   The circuit board which is a Pb-free solder layer containing Sn: 80 to 99.5 wt%, Ag: 0.1 to 20 wt%, and a combined content of Sn and Ag of 90 wt% or more as the bonding member layer according to claim 10 . 請求項１乃至４または請求項１０乃至１２のいずれか１項に記載の回路基板の金属回路板に半導体チップが接合され、前記回路基板のアルミニウム板に放熱ベースが接合され、これらを接合するためのはんだの融点が、前記回路基板の接合部材層の融点とほぼ同等であることを特徴とする半導体モジュール。   A semiconductor chip is joined to the metal circuit board of the circuit board according to any one of claims 1 to 4 or 10 to 12, and a heat dissipation base is joined to the aluminum board of the circuit board, for joining them. The semiconductor module is characterized in that the melting point of the solder is substantially equal to the melting point of the bonding member layer of the circuit board. 前記放熱ベースが銅、銅合金、またはアルミニウム合金からなることを特徴とする請求項９又は請求項１３に記載の半導体モジュール。   The semiconductor module according to claim 9 or 13, wherein the heat dissipation base is made of copper, a copper alloy, or an aluminum alloy.
JP2006331023A 2006-12-07 2006-12-07 Circuit board and semiconductor module having same Pending JP2008147308A (en)

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