JP2012009473A - Semiconductor device and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device and a manufacturing method of the same which suppress delamination of a film deposited on a substrate caused by processing damages or residual stress of the film occurred in a process of dividing semiconductor devices into pieces by die cutting or the like.SOLUTION: The semiconductor device comprises a groove 6 formed on the periphery of each of semiconductor devices 101, 102, that is, on a position of a substrate 1 near a processing line of division. A thin film deposited on the substrate is at least partially discontinuous inside the groove 6 thereby inhibiting growth of delamination at the groove part even when the delamination starts from an edge part of the semiconductor device.

Description

  The present invention relates to a so-called through electrode that penetrates through a substrate and electrically connects the wiring on the front and back of the substrate due to processing damage or residual stress of the film when the semiconductor device is separated into pieces by dicing or the like. The present invention relates to a semiconductor device that can suppress peeling of a film on a substrate and a method for manufacturing the same.

  As a three-dimensional wiring method in a semiconductor device, development relating to a three-dimensional through electrode forming technique has been actively performed. The three-dimensional through electrode is an electrode or wiring formed on the front side of the silicon substrate, drawn from the back side of the substrate to the back side of the substrate through a hole drilled through the substrate, and re-wired and mounted on the back side Bumps are provided. With this configuration, the wiring length is shortened as compared with the wiring by the conventional wire bonding, so that higher-frequency signal transmission is possible. Further, since it is not necessary to route the wire, the package can be downsized at the same time (see, for example, Patent Document 1).

  Here, a structure and manufacturing method of a semiconductor device using a conventional three-dimensional through electrode will be described with reference to FIGS.

  FIG. 13 shows two cross-sectional views of a semiconductor device having one through electrode and one mounting solder ball. The silicon substrate 51 on which the functional device is formed on the first surface 51a is bonded to the support glass 54 using an adhesive (not shown). Here, the functional device is a transistor or a photodiode formed in the diffusion process which is the first half process. A first insulating film 52 for passivation and a pad electrode 53 for wiring are formed on the first surface 51a.

  Usually, in this state, the silicon substrate 51 is thinned by grinding from the second surface 51b side opposite to the first surface 51a by the back grinding method. The amount of processing at this time is determined in consideration of the wiring length by the through electrode, the handleability when the final semiconductor device is peeled from the support glass 54, and the like. In general, the silicon substrate 51 is generally finished to a thickness of about 250 μm.

  The through-hole via hole 56 is formed mainly by the dry etching method from the second surface 51b of the silicon substrate 51 thus thinned.

  Next, in order to electrically insulate between the conductive film to be formed later and the silicon substrate 51, a second insulating film 55 is formed. As a method for forming the second insulating film 55, a CVD method, which is considered to have good coverage even for complicated three-dimensional shapes such as via holes, is generally used.

  Further, a barrier metal film 58 is formed in order to insulate the diffusion of the material between them. As the material of the barrier metal film 58, Ti, TiN, or a laminated film of Ti or TiN is often used. Further thereon, a plating seed film 59 to be an electrode for plating is formed. In many cases, Cu is selected as the plating seed film 59. In many cases, the barrier metal film 58 and the plating seed film 59 are collectively formed in the same sputtering apparatus.

  A plating film 57 is formed using the plating seed film 59 thus formed as an electrode. Thereafter, a wiring pattern is formed on the second surface 51b of the silicon substrate 51 by photoresist and etching.

  Further thereon, a solder mask 61 is formed as a protective layer, and solder balls 62 for mounting are arranged in openings formed in the solder mask 61. In this case, a buffer layer 60 is provided below the solder ball 62 in order to reduce the influence of the impact during mounting on the semiconductor device.

  The semiconductor device manufactured in this way is separated into pieces by dicing using a laser or the like. A processing removal portion (dicing line) by dicing is shown in FIG. L. It is the part shown. The semiconductor device singulated by dicing is further peeled from the support glass 54, whereby a semiconductor device including a through electrode and a mounting solder ball can be obtained.

JP 2008-160142 A

  However, in the conventional structure, when machining such as dicing is performed, the semiconductor device is damaged to some extent. As a result, a defective phenomenon such as chip chipping at the dicing end face or film peeling at the interface between the substrate and the thin film (see 63 in FIG. 13) occurs.

  In particular, with regard to film peeling, the degree of freedom for stress deformation of the film is increased by dividing the film into pieces, and as a result, peeling may start from the interface 63 with the silicon substrate 51 at the dicing end face. If the film peeling generated from the end face propagates to the inside of the semiconductor device, that is, the portion where the wiring or the like is formed, it does not function as a device. If this phenomenon proceeds gradually over a long period of time, the reliability of the product will be significantly reduced.

  An object of the present invention is to solve the above-described problems, and to provide a semiconductor device and a method for manufacturing the same that can suppress peeling of a film on a substrate.

  In order to achieve the above object, a first aspect of the present invention includes a substrate, a through hole that penetrates the substrate in the thickness direction to form a through electrode, and a wiring pattern disposed on one surface of the substrate. And an insulating film that electrically insulates the through electrode and the substrate, and a recess disposed at least at a corner of the one surface of the substrate.

  In order to achieve the above object, the second aspect of the present invention includes a through hole that penetrates the substrate in the thickness direction to form a through electrode, a wiring pattern disposed on one surface of the substrate, In the method of manufacturing a semiconductor device having an insulating film disposed on one surface and electrically insulating the through electrode and the substrate, the through hole is formed in forming a photoresist layer for performing a dry etching process. Forming a photoresist layer having an opening for forming a through hole for forming and an opening for forming a recess for forming a recess inside the dicing line along the outer peripheral portion of the semiconductor device; Using the dimensional difference of the opening, when the depth of the through hole becomes equal to the thickness of the substrate, dry etching is performed so that the depth of the recess is smaller than the thickness of the substrate. Characterized by comprising the extent, the.

  ADVANTAGE OF THE INVENTION According to this invention, the semiconductor device which can suppress the film peeling of a board | substrate, and its manufacturing method can be provided.

Sectional drawing explaining the manufacturing method of the semiconductor device which concerns on 1st Embodiment of this invention. Sectional drawing explaining the manufacturing method of the semiconductor device which concerns on 1st Embodiment of this invention. Sectional drawing explaining the manufacturing method of the semiconductor device which concerns on 1st Embodiment of this invention. Sectional drawing explaining the manufacturing method of the semiconductor device which concerns on 1st Embodiment of this invention. Sectional drawing explaining the manufacturing method of the semiconductor device which concerns on 1st Embodiment of this invention. FIG. 3 is a plan view illustrating the method for manufacturing the semiconductor device according to the first embodiment of the invention. The top view explaining the manufacturing method of the semiconductor device which concerns on the modification of 1st Embodiment of this invention. Sectional drawing explaining the manufacturing method of the semiconductor device which concerns on 2nd Embodiment of this invention. Sectional drawing explaining the manufacturing method of the semiconductor device which concerns on 2nd Embodiment of this invention. Sectional drawing explaining the manufacturing method of the semiconductor device which concerns on 2nd Embodiment of this invention. Sectional drawing explaining the manufacturing method of the semiconductor device which concerns on 2nd Embodiment of this invention. Sectional drawing explaining the manufacturing method of the semiconductor device which concerns on 2nd Embodiment of this invention. Plan view illustrating a method for manufacturing a semiconductor device according to a second embodiment of the present invention. A top view explaining the manufacturing method of the semiconductor device concerning the modification of a 2nd embodiment of the present invention. Sectional drawing explaining the manufacturing method by a prior art (patent document 1) The figure which shows the example of the groove | channel near the corner | angular part which concerns on 1st Embodiment of this invention. The figure which shows another example of the groove | channel near the corner | angular part which concerns on 1st Embodiment of this invention. The figure which shows another example of the groove | channel near the corner | angular part which concerns on 1st Embodiment of this invention. The figure which shows another example of the groove | channel near the corner | angular part which concerns on 1st Embodiment of this invention.

  Embodiments according to the present invention will be described below with reference to the drawings.

(First embodiment)
First, the configuration of the semiconductor device 101 according to the first embodiment of the present invention will be described with reference to FIG. FIG. 5 is a longitudinal sectional view of the final chip-shaped semiconductor device 101. Here, the final chip shape is separated from the glass substrate for support after being separated into pieces by dicing through a process of forming the through electrode 20 in a wafer state and a process of arranging the solder balls 12. The shape of the chip in the state.

In FIG. 5, for the sake of simplicity, only one through electrode 20 is arranged on the chip of the semiconductor device 101. However, in reality, hundreds to thousands of through electrodes 20 are arranged on the chip of the semiconductor device 101. The The left and right end surfaces in FIG. 5 are surfaces separated by dicing. The silicon substrate 1 is a device in which a functional device such as a transistor or a photodiode (both not shown) is mounted on a first surface (lower surface in FIG. 5), for example, BPSG (Boron Phosphorus Silicon Glass). The pad electrode 3 is formed so as to be protected by the first insulating film 2 such as. For this pad electrode 3, through-holes for through-holes (through-holes) 5 are processed from the second surface (upper surface in FIG. 5) 1b of the silicon substrate 1 by dry etching. A second insulating film 7 typified by SiO ₂ or SiN _x that electrically insulates the substrate 1, a barrier metal film 9 that prevents mutual diffusion of constituent elements, and a plating seed film 10 are formed, and further, a plating seed film A plated film 11 is formed using 10 as an electrode to form a through electrode 20. The barrier metal film 9, the plating seed film 10, and the plating film 11 on the second surface 1b of the silicon substrate 1 are processed into a wiring pattern 21 using a photoresist or the like. A solder ball 12 for mounting is installed at a predetermined position of the wiring pattern 21, and the function of the semiconductor device 101 is completed.

  Here, the difference from the conventional semiconductor device having a through electrode is that in the semiconductor device 101 of the first embodiment, the insulating film is formed on the outer peripheral portion of the chip of the semiconductor device 101 as an example of a recess for preventing peeling. The presence or absence of a groove 6. The form seen from the second surface 1b side of the silicon substrate 1 is shown in FIG. 6A. As shown in FIG. 6A, the grooves 6 are formed in an L shape near the four corners of the semiconductor device 101 as an example. In FIG. 6A, the groove 6 bent in an L shape is formed in the vicinity of the corner portion of the semiconductor device 101, two end surfaces constituting the corner portion, and the center line of each straight portion of the L shape groove 6. Are arranged parallel to each other. The function of the groove 6 is that an end face in FIG. 6A, that is, film peeling that occurs between the silicon substrate 1 and the second insulating film 7, for example, exposed by dicing, propagates inside the semiconductor device 101. It is a function to prevent.

  The groove 6 is preferably formed along the outer periphery of the semiconductor device 101 and over the entire outer periphery from the viewpoint of more surely preventing the propagation of film peeling (see FIG. 6B). However, in the first embodiment, the semiconductor device 101 is formed not only on the entire outer periphery but only near the corner as shown in FIG. 6A. One reason for this is that the film peeling described above is likely to occur from, for example, a corner where the residual stress of the thin film is concentrated. Therefore, if it is formed only in the vicinity of the corner, the prevention of film peeling propagation can be greatly reduced. This is because it can. Another reason is that a number of extraction electrodes having through electrodes 20 are arranged on the outer periphery of the semiconductor device 101, so that depending on the arrangement state of the electrodes, a groove is formed on the entire outer periphery of the semiconductor device 101. This is because there may be insufficient space. Further, as another reason, when the groove 6 is formed over the entire circumference, the thin film that has been completely peeled off between the end portion and the groove 6 may fall. It is also to prevent.

  Since the groove 6 has a sufficiently small opening width as compared with the through-electrode via hole 5, the second insulating film 7 does not reach the bottom of the groove 6. The bottom of the groove 6 is discontinuous. Therefore, the dicing line D.D. L. Even if film peeling occurs, the groove 6 stops the progress of film peeling.

  Further, an experiment or the like is performed in advance to examine the tendency of film peeling. Based on the tendency of film peeling, the groove 6 formed only in the vicinity of the corner portion has various shapes as shown in FIGS. 14A to 14D. It is also possible to do.

  14A, for each corner of the semiconductor device 101, instead of one L-shaped groove 6, a pair of straight grooves 601 is formed with center lines orthogonal to each other and a pair of straight grooves 601. It is formed so that there is a little space between the ends. In FIG. 14A, the pair of straight grooves 601 are arranged in the vicinity of the corner portion of the semiconductor device 101 so that the end faces of the corner portion and the center line are parallel to each other. In the configuration of FIG. 14A, since the occupied area of the groove 601 on the silicon substrate 1 is narrow, it is effective when a chip, a via hole 5 or the like is formed up to the vicinity of the outer edge of the silicon substrate 1.

  In FIG. 14B, another straight groove 602 is arranged so as to connect the other ends of the pair of straight grooves 601 in FIG. 14A, and a total of three straight grooves 601 and 602 have a gap at the apex. It is formed to draw a triangle with In the configuration of FIG. 14B, three non-continuous grooves 601 and 602 are formed at each corner portion, so that it is possible to more reliably prevent the film peeling from propagating.

  In FIG. 14C, one curved arc-shaped groove 603 is formed instead of one L-shaped groove 6 for each corner of the semiconductor device 101. In FIG. 14D, grooves 604 that are bent along three straight lines are formed instead of one curved arc-shaped groove 603 at each corner of the semiconductor device 101. In the configuration of FIGS. 14C and 14D, since the grooves 603 and 604 are one, the grooves 603 and 604 can be easily formed.

  As described above, as shown in FIGS. 14A to 14D, the grooves 601, 602, 603, and 604 have various shapes, so that the grooves 601, 602, 603, and 604 formed in a small space are more efficient. In addition, it is considered possible to prevent film peeling.

  The depth of the grooves 6, 601, 602, 603, and 604 may be any depth that is less than the thickness of the silicon substrate 1 and does not penetrate the silicon substrate 1. The depth of the grooves 6, 601, 602, 603, and 604 is determined by the opening width of the photoresist for forming the grooves 6, 601, 602, 603, and 604 and the conditions of the etching process. Therefore, these opening widths and conditions are adjusted so that the depth of the formed grooves 6, 601, 602, 603 and 604 is less than the thickness of the silicon substrate 1. Details of the dimensions and materials of this configuration will be given in conjunction with the description of the manufacturing method.

  1 to 5 show an outline of the manufacturing process of the semiconductor device 101 in the first embodiment. The manufacturing process in the first embodiment will be described with reference to these drawings.

  The feature of the manufacturing process of the first embodiment simply includes a step of forming a photoresist layer (resist pattern) 4 and a step of performing dry etching.

  Here, the step of forming the photoresist layer 4 is performed along the outer periphery of one semiconductor device 101 that is finally separated in the formation of the resist pattern for performing the dry etching process. A dicing line that separates D. L. In this step, a photoresist layer 4 having an opening 6a is formed on the inner side. The opening 6a has a width smaller than the opening diameter of the resist through-hole forming opening 5a for forming the through-electrode via hole 5 in the same resist pattern, and is a groove that is continuous in a loop shape (frame shape) or partially. 6 (in the description of the manufacturing method here, the grooves 6, 601, 602, 603, and 604 are described as “grooves 6” as a representative).

  Further, in the step of performing the dry etching process, the depth of the through-hole via hole 5 is equal to the thickness of the silicon substrate 1 by utilizing the difference in local etching process rate generated due to the difference in the dimensions of the openings 5a and 6a. In this process, the dry etching process is performed so that the depth of the groove 6 formed along the outer periphery of the semiconductor device 101 is smaller than the thickness of the silicon substrate 1. These will be described in detail below. A wafer that has been subjected to a diffusion process in semiconductor manufacturing is bonded to a glass substrate for support using an adhesive, and a semiconductor substrate (silicon substrate 1 as an example) is thinned by back grinding. As an example of the first embodiment, the thickness of the silicon substrate 1 was processed to 250 μm.

  Next, a photoresist layer 4 for forming the through-hole via hole 5 is formed on the surface of the silicon substrate 1 subjected to the back grinding process. FIG. 1 shows a state in which a photoresist layer 4 is formed. A first insulating film 2 and a pad electrode 3 are formed on the first surface 1a of the silicon substrate 1, and the first insulating film 2 is attached to a glass substrate for support (not shown) via an adhesive (not shown). (Not shown). The first insulating film 2 in this embodiment is mainly made of BPSG as an example, and the pad electrode 3 is made mainly of Al as an example. When the photoresist layer 4 is formed on the second surface 1b of the silicon substrate 1, a circular via hole forming opening 5a is formed in the photoresist layer 4 as an example for processing the via hole 5 for the through electrode. The opening 5a is, for example, a circular opening having a diameter of 80 μm. In FIG. L. A region sandwiched between two two-dot chain lines indicated as (dicing line) is a portion that is removed by dicing when finally dividing into individual pieces. This dicing line D.E. L. Openings 6a for forming the grooves 6 are provided on both sides in the vicinity of. The opening 6a has a width of 20 μm, and a dicing line D.D. L. From about 50 to 500 μm from the dicing line D.E. L. Is formed in a line shape. In order to prevent the groove 6 from penetrating the silicon substrate 1, it is important that the opening width of the opening 6 a is set to a half or less of the opening diameter of the through-electrode via hole 5 and designed to be sufficiently small. In addition, in consideration of the formation accuracy of the photoresist layer 4 and the function that the film is not formed as much as possible in the portion inside the groove 6, the opening width dimension of the opening 6 a is about 5 μm or more as an example. , And preferably designed to be 50 μm or less.

  Next, processing is performed by dry etching using the photoresist layer 4 described above. First, the silicon substrate 1 is etched until the through-electrode via hole 5 penetrates the silicon substrate 1 and the first insulating film 2 is exposed. After the first insulating film 2 is exposed, the gas used for dry etching of the silicon substrate 1 is switched to the insulating film etching gas, and the first insulating film 2 is etched until the pad electrode 3 is exposed. . FIG. 2 shows the state at this time. In this embodiment, the diameter of the through-electrode via hole 5 is, for example, about 100 μm at the opening (opening on the upper surface of the photoresist layer 4 in FIG. It was approximately 80 μm. On the other hand, in the present embodiment, the groove 6 is also formed around the opening 5a at the same time. The opening width of the groove 6 at this time is, for example, about 20 μm and the depth is about 100 μm.

Next, the photoresist layer 4 is removed from the second surface 1b of the silicon substrate 1, and in order to electrically insulate the through electrode 20 and the silicon substrate 1 to be formed later from each other, SiO ₂ is secondly formed by a CVD method. The second insulating film 7 of the SiO ₂ film formed on the pad electrode 3 is partially removed by dry etching. At this time, a photo resist is not used, but a method called etch back is used to etch the entire surface of the silicon substrate 1 on the second surface 1b side. FIG. 3 shows this state. A second insulating film 7 is formed on the side wall surface inside the through hole 5 for the through electrode and the second surface 1 b of the silicon substrate 1. At this time, the second insulating film 7 is also formed inside the groove 6, but the film is hardly formed particularly near the bottom 8 of the groove 6 because the opening width is relatively small. Further, the film at the bottom 8 of the groove 6 is removed by etch back. That is, the second insulating film 7 is divided in the trench 6.

  Thereafter, Ti, which is an example of the barrier metal film 9 for preventing diffusion, and Cu, which is an example of the plating seed film 10, are formed by sputtering. In performing this film formation, the pad electrode 3, the barrier metal film 9, and the plating seed film 10 need to be connected with an extremely small contact resistance, that is, ohmic bonding. Here, if there is a natural oxide layer at the interface, the function is deteriorated, so reverse sputtering is performed as a cleaning step.

  In reverse sputtering, an inert gas such as argon is filled in the sputtering apparatus as an example at a pressure of about 1 Pa, and plasma is generated by applying high frequency power to the stage on which the silicon substrate 1 is mounted in the sputtering apparatus, The second surface 1b of the silicon substrate 1 is etched by argon ions that collide with the silicon substrate 1. The interface can be kept clean by performing a film forming process subsequent to the reverse sputtering process in the same sputtering apparatus.

  Using the plating seed film 10 thus formed as an electrode, a plating film 11 made of Cu, which is an example of wiring, is formed on the through electrode 20 and the second surface 1b of the silicon substrate 1 by plating.

  Thereafter, unnecessary portions of the barrier metal film 9, the plating seed film 10, and the plating film 11 are removed by forming a photoresist and wet etching, and wiring is formed on the second surface 1 b of the silicon substrate 1. To do. At this time, since the above-described groove 6 is arranged at a place other than the original wiring pattern 21, the film once formed in the groove 6 is removed by this etching process. FIG. 4 shows a state in which a mounting solder ball 12 is mounted on a part of the wiring.

  Through the steps so far, desired functions of the semiconductor device 101 are formed, and then dicing is performed for individualization. A predetermined dicing line; L. Cleave along and cut into pieces.

  The semiconductor device 101 shown in FIG. 5 is formed by such a manufacturing method.

  According to the first embodiment of the present invention, when the semiconductor device 101 is separated into pieces by dicing, even if film peeling occurs from the end surface of the dicing process, the semiconductor device 101 is not propagated inside the semiconductor device 101. Dicing line L. Propagation of film peeling is stopped by the groove 6 provided immediately inside, and the original function of the semiconductor device 101 is not affected, so that the reliability of the semiconductor device 101 can be improved.

  Furthermore, the conventional manufacturing method itself can be used simply by devising the resist pattern, such as forming the opening 6a for forming the groove 6 in the resist pattern, so that the product performance can be improved without increasing the manufacturing cost. Can be increased.

(Second Embodiment)
The configuration of the semiconductor device 102 according to the second embodiment will be described with reference to FIG. FIG. 11 shows a final chip-shaped semiconductor device that is separated from a glass substrate for support after being diced through a process of forming through electrodes 20 in a wafer state and a process of arranging solder balls. A longitudinal sectional view of 102 is shown. The left and right end surfaces in FIG. 11 are surfaces separated by dicing.

The silicon substrate 1 has a functional device such as a transistor or a photodiode (both not shown) mounted on the first surface 1a and is protected by a first insulating film 2 such as BPSG as an example. In form, a pad electrode 3 is formed. With respect to the pad electrode 3, a through-electrode via hole (through-hole) 5 is processed by dry etching from the second surface (upper surface in FIG. 11) 1 b of the silicon substrate 1, A second insulating film 7 typified by SiO ₂ or SiN _x that electrically insulates the silicon substrate 1, a barrier metal film 9 that prevents mutual diffusion of constituent elements, and a plating seed film 10 are formed. A plated film 11 is formed using the film 10 as an electrode to form a through electrode 20. The barrier metal film 9, the plating seed film 10, and the plating film 11 on the second surface 1b of the silicon substrate 1 are processed into a wiring pattern 21 using a photoresist or the like. A solder ball 12 for mounting is installed at a predetermined position of the wiring pattern 21, and the function of the semiconductor device 102 is completed.

  Here, the difference from the conventional semiconductor device having a through electrode is that, in the semiconductor device 102 of the second embodiment, the insulating film is formed on the outer periphery of the chip of the semiconductor device 102 as an example of a recess for preventing peeling. Step 6b. This step 6 b is a recess formed in the second surface 1 b of the silicon substrate 1. Specifically, the step 6b is formed by forming a groove 6 and then cutting a blade end face of dicing through the center line of the groove 6 as described later. . As an example, the step 6 b is formed in an L shape at four corners of the semiconductor device 102. The form seen from the second surface 1b side of the silicon substrate 1 is shown in FIG. 12A.

  The function of the step 6b is to strengthen the adhesion between the silicon substrate 1 and the second insulating film 7 formed thereon. In the step 6b, the film thickness of the second insulating film 7 decreases as it approaches the end portion, and works advantageously against film peeling due to the residual stress of the second insulating film 7, Since it has a corner part, it is a structure that can be expected to strengthen the adhesion by the anchor effect. As shown in FIG. 12B, the step 6b is formed along the outer periphery of the semiconductor device 102 and over the entire outer periphery, thereby further improving the reliability of prevention of film peeling propagation.

  The height of the step 6b (the height of the step 6b with respect to the second surface 1b of the silicon substrate 1) may be less than the thickness of the silicon substrate 1 and does not penetrate the silicon substrate 1. The height of the step 6b is determined by the opening width of the photoresist for forming the groove 6 that forms the base of the step 6b and the conditions of the etching process. These opening widths and conditions are adjusted so as to be less than the thickness. Details of the dimensions and materials of this configuration will be described next in conjunction with the description of the manufacturing method.

  7 to 11 schematically show the manufacturing process of the semiconductor device 102 in the second embodiment. This will be described with reference to these drawings.

  In short, the feature of this manufacturing method is that it includes a step of forming the photoresist layer 4 and a step of performing dry etching. Here, the step of forming the photoresist layer 4 is performed along the outer peripheral portion of one semiconductor device 102 that is finally separated into pieces in the formation of a resist pattern for performing a dry etching process. A dicing line D. L. A photoresist layer 4 having a width smaller than the opening radius of the via hole forming opening 5a for forming the through-electrode via hole 5 in the same resist pattern and having an opening 6a for forming the step 6b. Is a step of forming. Further, in the step of performing the dry etching process, the depth of the through-electrode via hole 5 becomes equal to the thickness of the silicon substrate 1 by utilizing a local etching processing rate difference caused by a difference in the size of the opening 6a. At this time, the dry etching process is performed so that the depth of the step 6 b formed along the outer periphery of the semiconductor device 102 is smaller than the thickness of the silicon substrate 1. These will be described in detail below.

  A wafer that has been subjected to a diffusion process in semiconductor manufacturing is bonded to a glass substrate for support using an adhesive, and a semiconductor substrate (silicon substrate 1 as an example) is thinned by back grinding. As an example of the second embodiment, the thickness of the silicon substrate 1 was processed to 250 μm.

  Next, a photoresist layer 4 for forming the through-hole via hole 5 is formed on the surface of the silicon substrate 1 subjected to the back grinding process. FIG. 7 shows a state in which the photoresist layer 4 is formed. A first insulating film 2 and a pad electrode 3 are formed on the first surface 1a of the silicon substrate 1, and the first insulating film 2 is attached to a glass substrate for support (not shown) via an adhesive (not shown). (Not shown). The first insulating film 2 in this embodiment is mainly made of BPSG as an example, and the pad electrode 3 is made mainly of Al as an example. When the photoresist layer 4 is formed on the second surface 1 b of the silicon substrate 1, a circular opening 5 a is formed in the photoresist layer 4 as an example for processing the through-electrode via hole 5. The opening 5a is, for example, a circular opening having a diameter of 80 μm. In FIG. L. A region sandwiched between two two-dot chain lines indicated as (dicing line) is a portion that is removed by dicing when finally dividing into individual pieces. This dicing line D.E. L. The opening 6a for forming the groove 6 is provided so that the end of the dicing process removal portion is along the center line of the opening 6a of the photoresist layer 4. The opening 6a has a width of 20 μm, and the dicing line D.D. L. It is formed along. In order to prevent the groove 6 from penetrating the silicon substrate 1, it is important that the opening width of the opening 6 a is designed to be sufficiently small to be half or less of the opening diameter of the through-electrode via hole 5. In addition, in consideration of the formation accuracy of the photoresist layer 4 and the function that the film is not formed as much as possible in the portion inside the groove 6, the opening width dimension of the opening 6 a is about 5 μm or more as an example. , And preferably designed to be 50 μm or less. Further, the width of the step 6b remaining in the manufactured semiconductor device 102 is half of the opening width of the opening 6a if it is cut at the center line of the groove 6, so that the opening diameter of the through-hole via hole 5 is 4 times. 1 / min or less. By combining these conditions, the opening width dimension of the opening 6a is determined.

  Next, processing is performed by dry etching using the photoresist layer 4 described above. First, the silicon substrate 1 is etched until the through-electrode via hole 5 penetrates the silicon substrate 1 and the first insulating film 2 is exposed, and then a gas used for dry etching of the silicon substrate 1 is used. Switching to the insulating film etching gas, the first insulating film 2 is etched until the pad electrode 3 is exposed. FIG. 8 shows the state at this time. In the present embodiment, the diameter of the through-electrode via hole 5 is, for example, about 100 μm at the opening (opening on the upper surface of the photoresist layer 4 in FIG. 8) 5 a and at the through-electrode via hole 5 immediately above the pad electrode 3. It was approximately 80 μm. On the other hand, in this embodiment, the groove 6 is also formed at the same time. The opening width of the groove 6 at this time is, for example, about 20 μm and the depth is about 100 μm.

Next, the photoresist layer 4 is removed from the second surface 1b of the silicon substrate 1, and in order to electrically insulate the through electrode 20 and the silicon substrate 1 to be formed later from each other, SiO ₂ is secondly formed by a CVD method. The second insulating film 7 of the SiO ₂ film formed on the pad electrode 3 is partially removed by dry etching. At this time, a photo resist is not used, but a method called etch back is used to etch the entire surface of the silicon substrate 1 on the second surface 1b side. FIG. 9 shows this state. A second insulating film 7 is formed on the side wall surface inside the through-electrode via hole 5 and the second surface 1 b of the silicon substrate 1. At this time, the second insulating film 7 is also formed inside the groove 6, but the film is hardly formed particularly near the bottom 8 of the groove 6 because the opening width is relatively small. Further, the film at the bottom 8 of the groove 6 is removed by etch back. That is, the second insulating film 7 is divided in the trench 6.

  Thereafter, Ti, which is an example of the barrier metal film 9 for preventing diffusion, and Cu, which is an example of the plating seed film 10, are formed by sputtering. In performing this film formation, the pad electrode 3, the barrier metal film 9, and the plating seed film 10 require a connection with an extremely small contact resistance, that is, an ohmic junction, and the function is deteriorated when a natural oxide layer is present at the interface. Therefore, reverse sputtering is performed as a cleaning process.

  In reverse sputtering, an inert gas such as argon is filled in the sputtering apparatus as an example at a pressure of about 1 Pa, and plasma is generated by applying high frequency power to the stage on which the silicon substrate 1 is mounted in the sputtering apparatus, The second surface 1b of the silicon substrate 1 is etched by argon ions that collide with the silicon substrate 1. The interface can be kept clean by performing a film forming process subsequent to the reverse sputtering process in the same sputtering apparatus.

  Using the plating seed film 10 thus formed as an electrode, a plating film 11 made of Cu as an example of a wiring is formed on the through electrode and the second surface 1b of the silicon substrate 1 by plating.

  Thereafter, unnecessary portions of the barrier metal film 9, the plating seed film 10, and the plating film 11 are removed by formation of the photoresist layer 4 and wet etching, and wiring is formed on the second surface 1b of the silicon substrate 1. Form. At this time, since the above-described groove 6 is originally disposed at a place other than the wiring pattern 21, the film once formed in the groove 6 is removed by this etching process. FIG. 10 shows a state in which a mounting solder ball 12 is mounted on a part of the wiring.

  Up to this step, desired functions of the semiconductor device 102 are formed, and then dicing is performed for separation. A predetermined dicing line; L. Cleave along and cut into pieces.

  The semiconductor device 102 shown in FIG. 11 is formed by such a manufacturing method.

  According to the second embodiment of the present invention, when the semiconductor device 102 is diced into pieces, the dicing line D.D. L. Thus, by taking the shape in which the step 6b, which is a part of the groove 6, is exposed, the occurrence of film peeling itself can be suppressed, and the reliability of the semiconductor device 102 can be improved.

  Furthermore, the conventional manufacturing method itself can be used simply by devising the resist pattern such as forming the opening 6a for forming the step 6b in the resist pattern, so that the product performance can be improved without increasing the manufacturing cost. Can be increased.

  It is to be noted that, by appropriately combining arbitrary embodiments of the various embodiments described above, the effects possessed by them can be produced.

  By using the semiconductor device and the manufacturing method thereof according to the present invention, it is possible to improve the reliability of a semiconductor device mainly having through electrodes. In the embodiment of the present invention, a semiconductor device having a through electrode is given as a specific example, but it is also useful when a thin film is formed on a substrate having an uneven shape by using a vacuum process such as sputtering. For example, the present invention can be applied to film formation on a three-dimensional object typified by an ink jet printer head.

DESCRIPTION OF SYMBOLS 1, 51 Silicon substrate 101, 102 Semiconductor device 1a 1st surface 1b 2nd surface 2, 52 1st insulating film 3, 53 Pad electrode 4 Photoresist layer 5, 56 Through-hole via hole 5a Opening 6,601 602, 603, 604 groove 6a opening 6b step 7, 55 second insulating film 8 groove bottom 9, 58 barrier metal film 10, 59 plating seed film 11, 57 plating film 12, 62 solder ball 20 through electrode 21 wiring pattern 54 Support glass 60 Buffer layer 61 Solder mask DL dicing line

Claims (12)

A substrate,
A through hole that penetrates the substrate in the thickness direction and constitutes a through electrode; and
A wiring pattern disposed on one surface of the substrate;
An insulating film that electrically insulates the through electrode and the substrate;
A recess disposed at least at a corner of the one surface of the substrate,
Semiconductor device. The recess is disposed over the entire circumference of the substrate;
The semiconductor device according to claim 1. The recess is a groove whose depth is smaller than the thickness of the substrate.
The semiconductor device according to claim 1. The width of the groove is smaller than the opening diameter of the through hole opening in the one surface,
The semiconductor device according to claim 3. The width of the groove is less than or equal to half of the opening diameter of the through hole that opens in the one surface.
The semiconductor device according to claim 4. The recess is a step that is smaller than the thickness of the substrate and linearly disposed along the end surface of the substrate.
The semiconductor device according to claim 1. Corners of the substrate exposed at the step are covered with the insulating film,
The semiconductor device according to claim 6. A through hole that penetrates the substrate in the thickness direction to form a through electrode, a wiring pattern disposed on one surface of the substrate, and the through electrode and the substrate electrically disposed on the one surface In a method for manufacturing a semiconductor device having an insulating film for insulation,
In forming a photoresist layer for performing a dry etching process, a through hole forming opening for forming the through hole and a recess for forming a recess inside the dicing line along the outer peripheral portion of the semiconductor device Forming a photoresist layer having an opening for forming a recess;
Using the dimensional difference of the opening, and performing a dry etching process so that the depth of the recess becomes smaller than the thickness of the substrate when the depth of the through hole becomes equal to the thickness of the substrate; Comprising
A method for manufacturing a semiconductor device. When forming the photoresist layer, the opening for forming the recess is formed over the entire circumference of the substrate inside the dicing line along the outer periphery of the semiconductor device, and then the dry etching process is performed. The recess is disposed over the entire circumference of the substrate.
A method for manufacturing a semiconductor device according to claim 8. The width of the groove is smaller than the opening diameter of the through hole opening in the one surface,
A method for manufacturing a semiconductor device according to claim 9. The width of the groove is less than or equal to half of the opening diameter of the through hole that opens in the one surface.
A method for manufacturing a semiconductor device according to claim 10. When forming the photoresist layer, the opening for forming the recess is formed over the entire circumference of the substrate inside the dicing line along the outer periphery of the semiconductor device, and then the dry etching process is performed. Thus, the recess is formed as a step that is smaller than the thickness of the substrate and linearly disposed along the end surface of the substrate.
A method for manufacturing a semiconductor device according to claim 8.

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