JP2011509469A5 - - Google Patents

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Publication number
JP2011509469A5
JP2011509469A5 JP2010541762A JP2010541762A JP2011509469A5 JP 2011509469 A5 JP2011509469 A5 JP 2011509469A5 JP 2010541762 A JP2010541762 A JP 2010541762A JP 2010541762 A JP2010541762 A JP 2010541762A JP 2011509469 A5 JP2011509469 A5 JP 2011509469A5
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JP
Japan
Prior art keywords
translation
address
data block
entry
region
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Application number
JP2010541762A
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English (en)
Japanese (ja)
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JP5602638B2 (ja
JP2011509469A (ja
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Publication date
Priority claimed from US11/972,706 external-priority patent/US8037278B2/en
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Publication of JP2011509469A publication Critical patent/JP2011509469A/ja
Publication of JP2011509469A5 publication Critical patent/JP2011509469A5/ja
Application granted granted Critical
Publication of JP5602638B2 publication Critical patent/JP5602638B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2010541762A 2008-01-11 2009-01-05 フォーマット制御を有する動的アドレス変換 Active JP5602638B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/972,706 US8037278B2 (en) 2008-01-11 2008-01-11 Dynamic address translation with format control
US11/972,706 2008-01-11
PCT/EP2009/050049 WO2009087132A1 (en) 2008-01-11 2009-01-05 Dynamic address translation with format control

Publications (3)

Publication Number Publication Date
JP2011509469A JP2011509469A (ja) 2011-03-24
JP2011509469A5 true JP2011509469A5 (enExample) 2011-05-06
JP5602638B2 JP5602638B2 (ja) 2014-10-08

Family

ID=40481750

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010541762A Active JP5602638B2 (ja) 2008-01-11 2009-01-05 フォーマット制御を有する動的アドレス変換

Country Status (12)

Country Link
US (1) US8037278B2 (enExample)
EP (1) EP2229630B1 (enExample)
JP (1) JP5602638B2 (enExample)
KR (1) KR101419578B1 (enExample)
CN (1) CN101911022B (enExample)
CY (1) CY1113979T1 (enExample)
DK (1) DK2229630T3 (enExample)
ES (1) ES2406056T3 (enExample)
PL (1) PL2229630T3 (enExample)
PT (1) PT2229630E (enExample)
SI (1) SI2229630T1 (enExample)
WO (1) WO2009087132A1 (enExample)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8041922B2 (en) * 2008-01-11 2011-10-18 International Business Machines Corporation Enhanced dynamic address translation with load real address function
US8037278B2 (en) 2008-01-11 2011-10-11 International Business Machines Corporation Dynamic address translation with format control
US8335906B2 (en) * 2008-01-11 2012-12-18 International Business Machines Corporation Perform frame management function instruction for clearing blocks of main storage
US8151083B2 (en) * 2008-01-11 2012-04-03 International Business Machines Corporation Dynamic address translation with frame management
US8082405B2 (en) * 2008-01-11 2011-12-20 International Business Machines Corporation Dynamic address translation with fetch protection
US8417916B2 (en) * 2008-01-11 2013-04-09 International Business Machines Corporation Perform frame management function instruction for setting storage keys and clearing blocks of main storage
US8677098B2 (en) 2008-01-11 2014-03-18 International Business Machines Corporation Dynamic address translation with fetch protection
US8019964B2 (en) 2008-01-11 2011-09-13 International Buisness Machines Corporation Dynamic address translation with DAT protection
US8117417B2 (en) 2008-01-11 2012-02-14 International Business Machines Corporation Dynamic address translation with change record override
US8041923B2 (en) 2008-01-11 2011-10-18 International Business Machines Corporation Load page table entry address instruction execution based on an address translation format control field
US8103851B2 (en) * 2008-01-11 2012-01-24 International Business Machines Corporation Dynamic address translation with translation table entry format control for indentifying format of the translation table entry
US8086811B2 (en) 2008-02-25 2011-12-27 International Business Machines Corporation Optimizations of a perform frame management function issued by pageable guests
US8095773B2 (en) 2008-02-26 2012-01-10 International Business Machines Corporation Dynamic address translation with translation exception qualifier
US8239667B2 (en) * 2008-11-13 2012-08-07 Intel Corporation Switching between multiple operating systems (OSes) using sleep state management and sequestered re-baseable memory
US8782434B1 (en) 2010-07-15 2014-07-15 The Research Foundation For The State University Of New York System and method for validating program execution at run-time
US9753860B2 (en) 2012-06-14 2017-09-05 International Business Machines Corporation Page table entry consolidation
US9092359B2 (en) 2012-06-14 2015-07-28 International Business Machines Corporation Identification and consolidation of page table entries
US9811472B2 (en) * 2012-06-14 2017-11-07 International Business Machines Corporation Radix table translation of memory
US9122873B2 (en) 2012-09-14 2015-09-01 The Research Foundation For The State University Of New York Continuous run-time validation of program execution: a practical approach
US9069782B2 (en) 2012-10-01 2015-06-30 The Research Foundation For The State University Of New York System and method for security and privacy aware virtual machine checkpointing
US10445229B1 (en) 2013-01-28 2019-10-15 Radian Memory Systems, Inc. Memory controller with at least one address segment defined for which data is striped across flash memory dies, with a common address offset being used to obtain physical addresses for the data in each of the dies
US11249652B1 (en) 2013-01-28 2022-02-15 Radian Memory Systems, Inc. Maintenance of nonvolatile memory on host selected namespaces by a common memory controller
US9652376B2 (en) 2013-01-28 2017-05-16 Radian Memory Systems, Inc. Cooperative flash memory control
GB2514618B (en) * 2013-05-31 2020-11-11 Advanced Risc Mach Ltd Data processing systems
EP3033682A4 (en) * 2013-08-14 2017-04-05 Skyera, LLC Address translation for a non-volatile memory storage device
US9542118B1 (en) 2014-09-09 2017-01-10 Radian Memory Systems, Inc. Expositive flash memory control
US9514058B2 (en) * 2014-12-22 2016-12-06 Texas Instruments Incorporated Local page translation and permissions storage for the page window in program memory controller
EP3274824B1 (en) 2015-03-27 2021-03-17 Intel Corporation Efficient address translation
US9658792B2 (en) * 2015-06-11 2017-05-23 International Business Machines Corporation Reserving a storage area and building page frame table entries
US11379371B2 (en) 2019-11-07 2022-07-05 Research & Business Foundation Sungkyunkwan University Method and system with improved memory input and output speed
US11175984B1 (en) 2019-12-09 2021-11-16 Radian Memory Systems, Inc. Erasure coding techniques for flash memory

Family Cites Families (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4669043A (en) * 1984-02-17 1987-05-26 Signetics Corporation Memory access controller
US4972338A (en) * 1985-06-13 1990-11-20 Intel Corporation Memory management for microprocessor system
JPS6417137A (en) * 1987-07-13 1989-01-20 Nippon Telegraph & Telephone Control system for large-capacity page
JP2635058B2 (ja) * 1987-11-11 1997-07-30 株式会社日立製作所 アドレス変換方式
US5008811A (en) * 1988-02-10 1991-04-16 International Business Machines Corp. Control mechanism for zero-origin data spaces
US5058003A (en) * 1988-12-15 1991-10-15 International Business Machines Corporation Virtual storage dynamic address translation mechanism for multiple-sized pages
US5617554A (en) * 1992-02-10 1997-04-01 Intel Corporation Physical address size selection and page size selection in an address translator
AU6629894A (en) * 1993-05-07 1994-12-12 Apple Computer, Inc. Method for decoding guest instructions for a host computer
US5551013A (en) * 1994-06-03 1996-08-27 International Business Machines Corporation Multiprocessor for hardware emulation
US5845331A (en) * 1994-09-28 1998-12-01 Massachusetts Institute Of Technology Memory system including guarded pointers
US5790825A (en) * 1995-11-08 1998-08-04 Apple Computer, Inc. Method for emulating guest instructions on a host computer through dynamic recompilation of host instructions
JPH10301848A (ja) * 1997-04-28 1998-11-13 Hitachi Ltd 多重ページサイズを有する仮想記憶装置
US6009261A (en) * 1997-12-16 1999-12-28 International Business Machines Corporation Preprocessing of stored target routines for emulating incompatible instructions on a target processor
US6308255B1 (en) * 1998-05-26 2001-10-23 Advanced Micro Devices, Inc. Symmetrical multiprocessing bus and chipset used for coprocessor support allowing non-native code to run in a system
US6463582B1 (en) * 1998-10-21 2002-10-08 Fujitsu Limited Dynamic optimizing object code translator for architecture emulation and dynamic optimizing object code translation method
DE10002120B4 (de) * 1999-02-13 2006-04-20 International Business Machines Corp. Adressumsetzpufferanordnung und Verfahren für den Betrieb einer Adressumsetzpufferanordnung
US7069412B2 (en) * 1999-02-17 2006-06-27 Elbrus International Method of using a plurality of virtual memory spaces for providing efficient binary compatibility between a plurality of source architectures and a single target architecture
US6574706B2 (en) * 2001-02-28 2003-06-03 International Business Machines Corporation Managing unvirtualized data pages in real storage
US6985951B2 (en) * 2001-03-08 2006-01-10 International Business Machines Corporation Inter-partition message passing method, system and program product for managing workload in a partitioned processing environment
US7299243B2 (en) * 2001-09-19 2007-11-20 Bmc Software, Inc. System and method for controlling free space distribution by key range within a database
US7120746B2 (en) 2002-09-09 2006-10-10 International Business Machines Corporation Technique for data transfer
US7703097B2 (en) * 2002-11-15 2010-04-20 International Business Machines Corporation Auto-commit processing in an IMS batch application
US7284100B2 (en) * 2003-05-12 2007-10-16 International Business Machines Corporation Invalidating storage, clearing buffer entries, and an instruction therefor
US7530067B2 (en) 2003-05-12 2009-05-05 International Business Machines Corporation Filtering processor requests based on identifiers
US7020761B2 (en) * 2003-05-12 2006-03-28 International Business Machines Corporation Blocking processing restrictions based on page indices
US6996698B2 (en) * 2003-05-12 2006-02-07 International Business Machines Corporation Blocking processing restrictions based on addresses
EP1517504B1 (en) * 2003-09-19 2007-01-24 Sun Microsystems, Inc. Method and apparatus for protocol processing in a computer system applying memory address translation
US7234037B2 (en) 2003-11-25 2007-06-19 International Business Machines Corporation Memory mapped Input/Output operations
US7941799B2 (en) * 2004-05-27 2011-05-10 International Business Machines Corporation Interpreting I/O operation requests from pageable guests without host intervention
US8214622B2 (en) * 2004-05-27 2012-07-03 International Business Machines Corporation Facilitating management of storage of a pageable mode virtual environment absent intervention of a host of the environment
US8387049B2 (en) * 2005-07-15 2013-02-26 International Business Machines Corporation Facilitating processing within computing environments supporting pageable guests
US7464249B2 (en) 2005-07-26 2008-12-09 International Business Machines Corporation System and method for alias mapping of address space
JP4469783B2 (ja) * 2005-11-28 2010-05-26 株式会社東芝 メモリ保護装置、メモリ保護システムおよびメモリ保護方法
US8041923B2 (en) 2008-01-11 2011-10-18 International Business Machines Corporation Load page table entry address instruction execution based on an address translation format control field
US8117417B2 (en) 2008-01-11 2012-02-14 International Business Machines Corporation Dynamic address translation with change record override
US8037278B2 (en) 2008-01-11 2011-10-11 International Business Machines Corporation Dynamic address translation with format control
US8041922B2 (en) 2008-01-11 2011-10-18 International Business Machines Corporation Enhanced dynamic address translation with load real address function
US8677098B2 (en) 2008-01-11 2014-03-18 International Business Machines Corporation Dynamic address translation with fetch protection
US8335906B2 (en) * 2008-01-11 2012-12-18 International Business Machines Corporation Perform frame management function instruction for clearing blocks of main storage
US8082405B2 (en) 2008-01-11 2011-12-20 International Business Machines Corporation Dynamic address translation with fetch protection
US8103851B2 (en) 2008-01-11 2012-01-24 International Business Machines Corporation Dynamic address translation with translation table entry format control for indentifying format of the translation table entry
US8019964B2 (en) * 2008-01-11 2011-09-13 International Buisness Machines Corporation Dynamic address translation with DAT protection
US8151083B2 (en) 2008-01-11 2012-04-03 International Business Machines Corporation Dynamic address translation with frame management
US8417916B2 (en) 2008-01-11 2013-04-09 International Business Machines Corporation Perform frame management function instruction for setting storage keys and clearing blocks of main storage
US8095773B2 (en) * 2008-02-26 2012-01-10 International Business Machines Corporation Dynamic address translation with translation exception qualifier

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