JP2011258749A - Mounting method of electronic component, removing method of electronic component, and wiring board - Google Patents

Mounting method of electronic component, removing method of electronic component, and wiring board Download PDF

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Publication number
JP2011258749A
JP2011258749A JP2010131941A JP2010131941A JP2011258749A JP 2011258749 A JP2011258749 A JP 2011258749A JP 2010131941 A JP2010131941 A JP 2010131941A JP 2010131941 A JP2010131941 A JP 2010131941A JP 2011258749 A JP2011258749 A JP 2011258749A
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Prior art keywords
solder
wiring board
electronic component
electrode
hole
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Junya Enogaki
淳也 榎垣
Tadayuki Sato
忠之 佐藤
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Priority to JP2010131941A priority Critical patent/JP2011258749A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector

Abstract

PROBLEM TO BE SOLVED: To solve a problem of flatness deterioration in surface-mounting solder portions caused by multi-polarization, upsizing, etc. of electronic components, and also to cope with a difficulty of obtaining high-quality, high-reliable solder joints due to oxidation, etc.SOLUTION: Through-holes 3 each of which has a conductor 2 for solder connection formed therein are provided on a printed wiring board 1. The through-holes 3 are arranged at the same positions as electrode parts 6 of a bottom electrode component 5 so to face the electrode parts 6. A solder resist 4 of the printed wiring board 1 is configured such that a side mounted with the bottom electrode component 5 is formed to ensure an area for through-hole lands (component side) 8, whereas the through-hole lands (rear surface side) 21 on which the electrode component 5 is not mounted are formed as the solder resist 4 having the same diameter as an opening diameter of the through-holes 3. By bringing molten solder 10 jetted in a solder bath 9 into contact with a lower surface of the printed wiring board 1, solder is guided into the through-holes 3, thereby performing solder joint.

Description

本発明は、底面電極を有する電子部品を印刷配線板へ実装する実装方法に関するものである。   The present invention relates to a mounting method for mounting an electronic component having a bottom electrode on a printed wiring board.

底面電極を有する電子部品を印刷配線板へ表面実装はんだ付けする工法は、はんだごてを用いた手はんだ付けができない。このため、通常、クリームはんだを印刷した基板に電子部品を搭載し、リフロー加熱によりはんだ接合を行うという工法が用いられる。この際、電子部品の電極の平坦度に不ぞろいがあると、搭載した電子部品の電極とクリームはんだとが非接触のままリフロー加熱されるため接合不良が生じる。この対策として、従来、はんだ付けの前準備として電子部品の平坦度の不ぞろいを均一にした後、はんだ付けを行うことが開示されている（例えば、特許文献１参照）。   The method of surface mounting soldering an electronic component having a bottom electrode to a printed wiring board cannot be manually soldered using a soldering iron. For this reason, a method of mounting electronic parts on a substrate printed with cream solder and soldering by reflow heating is usually used. At this time, if the flatness of the electrodes of the electronic component is uneven, the electrodes of the mounted electronic component and the cream solder are reflow-heated in a non-contact state, resulting in poor bonding. As a countermeasure, it has been disclosed that soldering is performed after the unevenness of the flatness of electronic components is made uniform as a preparation for soldering (see, for example, Patent Document 1).

特開平５−５５０４１号公報JP-A-5-55041

しかしながら、従来のような前準備は量産基板組立において多くの処理時間を要する。また電子部品の多極化・大型化により電子部品の平坦性が無くなる傾向にあり、必要とされる平坦性を確保することが困難となっている。
また、底面電極部品の実装において高品質・高信頼性のはんだ接合を得るには、電子部品や印刷配線板の平坦性のほか、底面電極部の清浄性を保つことが重要である。底面電極部は電子部品の製造・試験プロセスにおいて、例えば高温バーンインなどの影響を受け、酸化等の汚染が生じる。このことから高品質・高信頼性なはんだ接合を得ることが難しい。
また、電子部品の多極化、小型化により、印刷配線板の表面実装パッド上へ供給できるはんだが少なくなっており、リフロー加熱による一般的な底面電極部品のはんだ接合では、接合信頼性へ影響を及ぼすスタンドオフ高さ（電子部品と印刷配線板とのクリアランス）を確保することが困難となっている。 However, conventional preparations require a lot of processing time in mass production substrate assembly. In addition, the flatness of electronic components tends to disappear due to the increase in the number of poles and the size of electronic components, making it difficult to ensure the required flatness.
In addition, in order to obtain high-quality and high-reliability solder joints in the mounting of bottom electrode parts, it is important to maintain the cleanness of the bottom electrode part in addition to the flatness of electronic parts and printed wiring boards. The bottom electrode portion is affected by, for example, high-temperature burn-in in the electronic component manufacturing / testing process, resulting in contamination such as oxidation. For this reason, it is difficult to obtain a high-quality and highly reliable solder joint.
In addition, due to the multipolarization and miniaturization of electronic components, the amount of solder that can be supplied onto the surface mounting pads of printed wiring boards has decreased, and soldering of general bottom electrode components by reflow heating has an effect on bonding reliability. It is difficult to ensure the standoff height (clearance between the electronic component and the printed wiring board).

この発明は係る課題を解決するためになされたものであり、底面電極部品や印刷配線板の平坦性に左右されずに、高品質・高信頼性なはんだ接合が可能な実装方法を提供することを目的とする。   The present invention has been made to solve such problems, and provides a mounting method capable of performing high-quality and high-reliability solder bonding without being influenced by the flatness of the bottom electrode parts and the printed wiring board. With the goal.

この発明の底面電極を有する電子部品の実装方法は、電子部品の電極と、配線板の一面にあって前記電極と対向する位置に設けられた電極（スルーホールランド）とをはんだ接合する電子部品の実装方法であって、前記配線板の電極位置に貫通スルーホールを穿設し、前記電子部品の電極と前記配線板の電極とを位置合わせした後に、前記配線板の他の一面から前記貫通スルーホール内部を通して溶融はんだを供給し、前記電子部品の電極と前記配線板の電極とをはんだ接合する。   The method of mounting an electronic component having a bottom electrode according to the present invention is an electronic component in which an electrode of an electronic component and an electrode (through-hole land) provided on one surface of the wiring board and facing the electrode are soldered. The through-hole is formed at the electrode position of the wiring board, the electrode of the electronic component and the electrode of the wiring board are aligned, and then the through-hole is formed from the other surface of the wiring board. Molten solder is supplied through the inside of the through hole, and the electrode of the electronic component and the electrode of the wiring board are joined by soldering.

この発明によれば、スルーホール内部から溶融はんだが基板上面より高い位置まで噴出するため、底面電極部品や印刷配線板の平坦性に左右されずに、高品質・高信頼性なはんだ接合が可能となる。   According to this invention, since the molten solder is ejected from the inside of the through hole to a position higher than the upper surface of the substrate, high-quality and highly reliable solder joining is possible without being affected by the flatness of the bottom electrode parts and the printed wiring board. It becomes.

本発明の実施の形態１に係る底面電極を有する電子部品の印刷配線板への実装方法を説明するためのモデル図である。It is a model figure for demonstrating the mounting method to the printed wiring board of the electronic component which has a bottom face electrode which concerns on Embodiment 1 of this invention. 本発明の実施の形態１に係る印刷配線板の断面構造を示す図である。It is a figure which shows the cross-section of the printed wiring board which concerns on Embodiment 1 of this invention. 本発明の実施の形態１における部品を搭載する工程での効果の一例を説明するための図である。It is a figure for demonstrating an example of the effect in the process of mounting the components in Embodiment 1 of this invention. 本発明の実施の形態１における実装工程を説明する図である。It is a figure explaining the mounting process in Embodiment 1 of this invention. 本発明の実施の形態１におけるはんだ付け工程の説明とその効果の一例を説明する図である。It is a figure explaining the example of the soldering process in Embodiment 1 of this invention, and its effect. 本発明の実施の形態１におけるはんだ付け工程による効果の一例を説明する図である。It is a figure explaining an example of the effect by the soldering process in Embodiment 1 of this invention. 本発明の実施の形態２におけるはんだ付け工程を説明するための図である。It is a figure for demonstrating the soldering process in Embodiment 2 of this invention. 本発明の実施の形態３における底面電極部品のリペア工程を説明する図である。It is a figure explaining the repair process of the bottom face electrode components in Embodiment 3 of this invention. 本発明の実施の形態４における底面電極部品の実装方法を説明する図である。It is a figure explaining the mounting method of the bottom electrode component in Embodiment 4 of this invention. 本発明の実施の形態５における底面電極部品の実装方法を説明する図である。It is a figure explaining the mounting method of the bottom electrode component in Embodiment 5 of this invention.

実施の形態１．
以下に、この発明に係る実施形態例を図面に基づいて説明する。
図１は、実施の形態１に係る底面電極を有する電子部品（以下、底面電極部品という）の印刷配線板への実装方法を説明するためのモデル図である。
図１に示すように、底面電極部品の印刷配線板への実装において、印刷配線板１に穿設されたはんだ接続用の貫通スルーホール３と底面電極部品５の電極部６とは、位置を同じく対向するように配置されている。
印刷配線板１と底面電極部品５とを電気的に接続する継ぎ手は、印刷配線板１のスルーホールランド（部品側）８から貫通スルーホール３内へ充填した連続するはんだにより構成される。 Embodiment 1 FIG.
Embodiments according to the present invention will be described below with reference to the drawings.
FIG. 1 is a model diagram for explaining a method of mounting an electronic component having a bottom electrode according to Embodiment 1 (hereinafter referred to as a bottom electrode component) on a printed wiring board.
As shown in FIG. 1, in mounting the bottom electrode component on the printed wiring board, the through-hole 3 for solder connection formed in the printed wiring board 1 and the electrode portion 6 of the bottom electrode component 5 are positioned at the positions. Similarly, they are arranged to face each other.
The joint that electrically connects the printed wiring board 1 and the bottom electrode component 5 is constituted by continuous solder filled from the through hole land (component side) 8 of the printed wiring board 1 into the through through hole 3.

図２は底面電極部品５を実装する印刷配線板１の断面構造を示した図である。印刷配線板１には、はんだ接続用の貫通スルーホール３が底面電極部品５の電極部６に対抗する位置に穿設されている。貫通スルーホール３にはめっき工程によりめっきが施される。より詳しくは、貫通スルーホール３のめっき工程によって、貫通スルーホールの孔内のめっきであるスルーホールめっき（孔内）２０と、底面電極部品５を実装する表面側に形成されたランド部にあたるスルーホールランド（部品側）８と、底面電極部品５を実装しない裏面側に形成されたスルーホールランド（裏面側）２１が形成される。
印刷配線板１のソルダレジスト４は、底面電極部品５を搭載するスルーホールランド（部品側）８周囲に形成されている。ソルダレジスト４により、はんだがスルーホールランド（部品側）８の周囲にぬれ広がって付着することを防止できる。一方、底面電極部品５を搭載しない側では、貫通スルーホール３の孔径とほぼ同じ寸法のソルダレジスト４で覆われ、スルーホールめっき（裏面側）２１がはんだにぬれないようにされている。 FIG. 2 is a view showing a cross-sectional structure of the printed wiring board 1 on which the bottom electrode component 5 is mounted. A through-hole 3 for solder connection is formed in the printed wiring board 1 at a position facing the electrode portion 6 of the bottom electrode component 5. The through-through hole 3 is plated by a plating process. More specifically, a through-hole plating (in-hole) 20 that is a plating in a hole of the through-through hole and a through-hole corresponding to a land portion formed on the surface side on which the bottom electrode component 5 is mounted by the plating process of the through-through hole 3. A hole land (component side) 8 and a through-hole land (back surface side) 21 formed on the back surface side where the bottom electrode component 5 is not mounted are formed.
The solder resist 4 of the printed wiring board 1 is formed around a through-hole land (component side) 8 on which the bottom electrode component 5 is mounted. The solder resist 4 can prevent the solder from spreading around the through-hole land (component side) 8 and adhering thereto. On the other hand, the side where the bottom electrode component 5 is not mounted is covered with a solder resist 4 having substantially the same size as the through-hole 3 so that the through-hole plating (back side) 21 is not wetted by solder.

印刷配線板１をこのような構造とすることにより、印刷配線板１と底面電極部品５とを電気的に接続するはんだ継ぎ手は、ソルダレジスト４によりはんだの流れる領域が制限される。
一方、底面電極部品５を実装しない印刷配線板１の裏面側では、スルーホールめっき（裏面側）２１を覆うように形成されたソルダレジスト４により、はんだはぬれ広がらない。 With the printed wiring board 1 having such a structure, the solder joint for electrically connecting the printed wiring board 1 and the bottom electrode component 5 is limited by the solder resist 4 in the area where the solder flows.
On the other hand, on the back side of the printed wiring board 1 on which the bottom electrode component 5 is not mounted, the solder resist 4 formed so as to cover the through-hole plating (back side) 21 does not wet and spread.

以下に、底面電極を有する電子部品の実装方法と検査方法、及び電子部品のリペア方法について、図を用いて説明する。   Hereinafter, a method for mounting and inspecting an electronic component having a bottom electrode and a method for repairing the electronic component will be described with reference to the drawings.

まず、図３に示すように、印刷配線板１に設けた貫通スルーホール３と位置を同じくして対向する電極部を有する底面電極部品５を印刷配線板１上に搭載する。搭載する底面電極部品５は、貫通スルーホールの中心位置と電極部の中心位置がほぼ同じになるように印刷配線板１上へ搭載する。その方法は、電極部６をカメラにより画像認識し位置補正する機能を有する表面実装部品実装機や、貫通スルーホール３と電極部６をハーフミラーにより合成し、位置補正するような機能を有する実装機などを用いて搭載する。搭載方法を制限するものではなく、また底面電極部品の電極先端が半球状である場合、図３に示すように、貫通スルーホール部３のくぼみに電極部６をはめ合わせることで、貫通スルーホール３や電極部６の位置誤差による実装ズレを、現物にて調整することが可能であり、実装機を利用しなくとも手作業で実施できる。   First, as shown in FIG. 3, a bottom electrode component 5 having an electrode portion facing the same position as the through-through hole 3 provided in the printed wiring board 1 is mounted on the printed wiring board 1. The bottom electrode component 5 to be mounted is mounted on the printed wiring board 1 so that the center position of the through-hole and the center position of the electrode portion are substantially the same. The method includes a surface mount component mounting machine having a function of recognizing an image of the electrode unit 6 by a camera and correcting the position, or a mounting having a function of correcting the position by synthesizing the through-through hole 3 and the electrode unit 6 using a half mirror. It is installed using a machine. The mounting method is not limited, and when the electrode tip of the bottom electrode component is hemispherical, as shown in FIG. 3, the electrode portion 6 is fitted into the recess of the through through-hole portion 3, thereby allowing the through-through hole. 3 and the mounting deviation due to the position error of the electrode unit 6 can be adjusted with the actual product, and can be performed manually without using a mounting machine.

その後、はんだ接合部の酸化物などのはんだ付け阻害成分を取り除くためのフラックス剤を、印刷配線板１の貫通スルーホール３や電極部６へ塗る。フラックス剤の塗布方法はスプレー塗布や発泡でもよく、印刷配線板１の貫通スルーホール３や電極部６へフラックス剤が付着できればよい。印刷配線板１の貫通スルーホール３と底面電極部品５の電極部６に、同時にフラックス剤を塗布できない場合は、底面電極部品５を搭載する前に、印刷配線板１の貫通スルーホール３と底面電極部品５の電極部６を別々にフラックス剤塗布してもよい。   Thereafter, a flux agent for removing soldering-inhibiting components such as oxides in the solder joints is applied to the through-through holes 3 and the electrode parts 6 of the printed wiring board 1. The flux agent may be applied by spray coating or foaming as long as the flux agent can be attached to the through-through hole 3 and the electrode portion 6 of the printed wiring board 1. If the flux agent cannot be applied simultaneously to the through-hole 3 of the printed wiring board 1 and the electrode portion 6 of the bottom electrode component 5, the through-through hole 3 and bottom surface of the printed wiring board 1 are mounted before the bottom electrode component 5 is mounted. You may apply | coat a flux agent to the electrode part 6 of the electrode component 5 separately.

次に、はんだ付け方法について図４を用いて説明する。また図５に、はんだ付け方法の例を示す。
まず、図４に示すように、予め塗布したフラックス剤の作用を働かせるために、ヒータにより印刷配線板１及び底面電極部品５を加熱する。加熱温度は、用いるフラックス剤の成分や底面電極部品５の耐熱温度により異なるが、印刷配線板１の表面で８０〜１００℃が一般的である。その後、はんだ槽９にて噴流させた溶融はんだ１０を、印刷配線板１の下面へ接触させる。溶融はんだ１０の温度は、用いるはんだ組成により異なるが、ＳｎＰｂ共晶はんだ合金の場合は、融点１８３℃よりも７０℃程度高い２４５〜２６０℃が一般的である。印刷配線板１の下面側の貫通スルーホール３に接触した溶融はんだ１０は、フラックス剤の酸化膜除去機能による表面張力の低下や毛細管現象の作用により、貫通スルーホール３の内部へはんだを誘導させる。貫通スルーホール３の内部を充填した溶融はんだは、印刷配線板１の上面へ到達し噴出する。 Next, a soldering method will be described with reference to FIG. FIG. 5 shows an example of a soldering method.
First, as shown in FIG. 4, the printed wiring board 1 and the bottom electrode part 5 are heated by a heater in order to make the action of the flux agent applied in advance. The heating temperature varies depending on the component of the fluxing agent used and the heat resistance temperature of the bottom electrode component 5, but is generally 80 to 100 ° C. on the surface of the printed wiring board 1. Thereafter, the molten solder 10 jetted in the solder bath 9 is brought into contact with the lower surface of the printed wiring board 1. The temperature of the molten solder 10 varies depending on the solder composition used, but in the case of a SnPb eutectic solder alloy, the temperature is generally 245 to 260 ° C., which is about 70 ° C. higher than the melting point 183 ° C. The molten solder 10 that has come into contact with the through-hole 3 on the lower surface side of the printed wiring board 1 induces solder into the through-through hole 3 due to a decrease in surface tension due to the oxide film removal function of the flux agent and the action of capillary action. . The molten solder filling the inside of the through-through hole 3 reaches the upper surface of the printed wiring board 1 and jets out.

その溶融はんだの噴出作用により、電極部６表面がはんだでぬれる。さらに、この実施形態例では、その溶融はんだの噴出作用により、図５に示すような、底面電極部品５の電極部６の凹凸や印刷配線板１の平面度といった平坦性が悪い場合においても、はんだが噴出することにより電極部６へのはんだ接触が可能になる。   Due to the spraying action of the molten solder, the surface of the electrode portion 6 is wetted by the solder. Furthermore, in this embodiment example, even when the flatness such as the unevenness of the electrode portion 6 of the bottom electrode component 5 and the flatness of the printed wiring board 1 is poor due to the spraying action of the molten solder, as shown in FIG. When the solder is ejected, solder contact with the electrode portion 6 becomes possible.

さらには、その溶融はんだの噴出作用は、はんだの持つ高い比重との相乗効果により、底面電極部品５を上部方向へ押し上げることができる。一般的には、底面電極部品５はエポキシ樹脂やセラミック（Ａｌ２Ｏ３）材質をボディとしており、それぞれの比重はＳｎＰｂ共晶はんだ合金の比重に比べて、１／５〜１／２程度軽い。この作用により、図６に示すようにはんだ接合信頼性に影響を与えるスタンドオフ高さ（底面電極部品５と印刷配線板１とのクリアランス）を従来以上に確保することが可能となる。 Furthermore, the spraying action of the molten solder can push up the bottom electrode part 5 upward due to a synergistic effect with the high specific gravity of the solder. In general, the bottom electrode part 5 has an epoxy resin or ceramic (Al 2 O 3 ) material as a body, and each specific gravity is lighter by about 1/5 to 1/2 than the specific gravity of the SnPb eutectic solder alloy. . With this action, as shown in FIG. 6, it is possible to secure a standoff height (clearance between the bottom electrode component 5 and the printed wiring board 1) that affects the solder joint reliability more than ever.

さらには、その溶融はんだの噴出作用は、はんだの持つ高い比重との相乗効果により、底面電極部品５を上部方向へ押し上げるが、印刷配線板１の上のスルーホールランド８や貫通スルーホール３などのはんだ接触領域が多い場合は、はんだが凝固するまでの過程で、押し上げた底面電極部品５を逆に押し下げようという作用が働く。これを抑制するためには、印刷配線板１の上のスルーホールランド８や貫通スルーホール３などのはんだ接触領域を小さくする工夫が必要であり、図１に示すソルダレジスト４がその機能を果たす。ソルダレジスト４は、底面電極部品５を搭載する側はスルーホールランド８を確保して、はんだフィレット形成を十分なものとする。一方、底面電極部品５を搭載しない側は、貫通スルーホール３の孔径とほぼ同じ寸法の孔を形成したソルダレジスト４とすることで、はんだの流れる領域の抑制効果を図っている。   Furthermore, the spraying action of the molten solder pushes the bottom electrode component 5 upward due to a synergistic effect with the high specific gravity of the solder, but the through-hole land 8 and the through-through hole 3 on the printed wiring board 1 etc. In the case where the solder contact area is large, an action to push down the pushed-up bottom electrode component 5 works in the process until the solder is solidified. In order to suppress this, it is necessary to devise a method for reducing the solder contact area such as the through-hole land 8 and the through-through hole 3 on the printed wiring board 1, and the solder resist 4 shown in FIG. . The solder resist 4 secures through-hole lands 8 on the side on which the bottom electrode component 5 is mounted so that solder fillet formation is sufficient. On the other hand, the side on which the bottom electrode component 5 is not mounted is intended to suppress the solder flowing region by using the solder resist 4 in which holes having substantially the same size as the through-holes 3 are formed.

また、広く用いられているプラスチック樹脂モールドの本体を持つ、いわゆるプラスチップパッケージＩＣを表面実装リフロー加熱する場合は、部品耐熱温度以上にはんだを溶融させ接合することができない。プラスチックパッケージＩＣの耐熱温度は、その樹脂の種類や半導体ベアチップの接続方法などにより異なるが、２３０〜２４０℃の部品もあり、その際はリフロー加熱のピーク温度を２３０℃未満に抑える必要がある。しかし、その温度では、底面電極部品５の電極部６に強固な酸化膜などのはんだ付け阻害物質が付着している場合は、フラックス剤の作用だけでは酸化膜を除去できず、正常なはんだ接合を得ることができない。これに対して、図４で示すはんだ付け方法は、印刷配線板１の下面から溶融はんだを接触させるため、はんだ温度を部品耐熱温度よりも高くすることが可能であり、電極部の強固な酸化膜をも破り、正常なはんだ付けを実現することが可能である。   Further, when a so-called plus chip package IC having a widely used plastic resin mold main body is subjected to surface mounting reflow heating, the solder cannot be melted and bonded to a temperature higher than the component heat resistance temperature. Although the heat resistance temperature of the plastic package IC varies depending on the type of resin, the method of connecting the semiconductor bare chip, etc., there are parts of 230 to 240 ° C., and in this case, it is necessary to suppress the peak temperature of reflow heating to less than 230 ° C. However, when a soldering inhibiting substance such as a strong oxide film adheres to the electrode portion 6 of the bottom electrode component 5 at that temperature, the oxide film cannot be removed only by the action of the flux agent, and normal solder bonding Can't get. On the other hand, in the soldering method shown in FIG. 4, since the molten solder is brought into contact with the lower surface of the printed wiring board 1, the solder temperature can be made higher than the component heat resistance temperature, and the electrode portion can be strongly oxidized. It is possible to break the film and achieve normal soldering.

実施の形態２．
実施の形態２として、はんだ付け方法とその検査方法を、図７を用いて説明する。はんだ付け方法は、印刷配線板１のスルーホールランド（部品側）８及び貫通スルーホール３内を満たし、通常適正なはんだフィレットを形成できる量のはんだをペースト状はんだ１１で供給し、リフロー加熱によりはんだ接合を行う。はんだ付け後の検査は、印刷配線板１の貫通スルーホール３へのはんだの充填率により、はんだ接合状態の良し悪しを目視判断する検査方法を提供できる。 Embodiment 2. FIG.
As the second embodiment, a soldering method and an inspection method thereof will be described with reference to FIG. The soldering method is to supply the amount of solder that can fill the through-hole lands (component side) 8 and the through-through holes 3 of the printed wiring board 1 and the through-holes 3 and form a proper solder fillet with the paste-like solder 11, and by reflow heating. Perform solder joint. The inspection after soldering can provide an inspection method for visually judging whether the solder joint state is good or bad based on the filling rate of the solder into the through-hole 3 of the printed wiring board 1.

このはんだ付け方法は、印刷配線板１のスルーホールランド（部品側）８の上のはんだＡと貫通スルーホール３内を満たすはんだＢの双方を形成できる量のはんだを算出し、ペースト状はんだ１１で印刷配線板１の上のスルーホールランド（部品側）８の位置へ供給する。そして、底面電極部品５を、印刷配線板１に設けたはんだ接続用の貫通スルーホール３と、底面電極部品５の電極部６の位置が同じくなるように搭載し、表面実装リフロー全体加熱により、ペースト状はんだ１１を溶融させ、はんだのぬれ作用によりはんだ付けをする。その際、溶融したはんだは、印刷配線板１のスルーホールランド（部品側）８の上だけでなく、貫通スルーホール３の内部へもはんだのぬれ、毛細管現象により、進入しはんだ付けを終える。供給したはんだ量が同一であるので、貫通スルーホール内に充填されたはんだ量も一定の出来栄えを得ることができる。   This soldering method calculates the amount of solder that can form both the solder A on the through-hole land (component side) 8 of the printed wiring board 1 and the solder B that fills the through-through hole 3, and the paste solder 11 Then, it is supplied to the position of the through hole land (component side) 8 on the printed wiring board 1. Then, the bottom electrode component 5 is mounted so that the positions of the through-holes 3 for solder connection provided in the printed wiring board 1 and the electrode portion 6 of the bottom electrode component 5 are the same, and the entire surface mounting reflow is heated, The paste solder 11 is melted and soldered by the wetting action of the solder. At that time, the melted solder enters not only on the through-hole land (component side) 8 of the printed wiring board 1 but also inside the through-through hole 3 due to solder wetting and capillary action, and finishes the soldering. Since the supplied amount of solder is the same, the amount of solder filled in the through-through hole can also obtain a certain quality.

はんだ付け後、貫通スルーホール３の下面から、はんだの充填具合を、目視や拡大鏡により観察可能となる。仮に図７のようにはんだの充填具合が少なかったり、はんだが多かったりしている箇所がある場合は、ペースト状はんだ１１の供給量のばらつきや、電極部６へのはんだのぬれ不具合などの異常があった可能性を示すものである。本実施形態２であれば、非破壊検査装置や電気性能試験などの試験機器を用いることなく、はんだ継ぎ手の目視による観察が出来る利点をもつ。   After soldering, the solder filling state can be observed from the lower surface of the through-hole 3 with the naked eye or with a magnifying glass. As shown in FIG. 7, if there is a place where the solder is not filled enough or there is a lot of solder, abnormalities such as variations in the amount of paste solder 11 supplied and solder wetting to the electrode section 6 may occur. This indicates the possibility that there was. The second embodiment has an advantage that the solder joint can be visually observed without using a non-destructive inspection device or a test device such as an electrical performance test.

実施の形態３．
実施の形態３として、部品の取外しと取り付けの作用と効果を、図８を用いて説明する。該当する底面電極部品５を搭載している印刷配線板１の下部より溶融はんだを接触させると、はんだ継ぎ手部のはんだの溶融が開始する。はんだ継ぎ手部のはんだ溶融後、底面電極部品５を吸着ピンセットなどで持ち上げることにより、はんだ継ぎ手部が切断されて、取外しを完了する。 Embodiment 3 FIG.
As Embodiment 3, the operation and effect of component removal and attachment will be described with reference to FIG. When molten solder is brought into contact from the lower part of the printed wiring board 1 on which the corresponding bottom electrode component 5 is mounted, melting of the solder at the solder joint portion starts. After the solder joint portion is melted, the bottom electrode component 5 is lifted with suction tweezers to cut the solder joint portion and complete the removal.

取付けに当っては、実施の形態１でのはんだ付けと同様に行う。通常、取り外した部品を再度使用する場合は、はんだ継ぎ手部のはんだ量が多すぎないように、かつ均一なはんだ量を供給できるように電極部６に付着している余剰はんだ１２を除去するが、貫通スルーホール３でのはんだ量の自己調整ができることから、予め除去する必要はない。   The mounting is performed in the same manner as the soldering in the first embodiment. Normally, when the removed component is used again, the excess solder 12 attached to the electrode portion 6 is removed so that the solder amount of the solder joint portion is not too large and a uniform solder amount can be supplied. Since the amount of solder in the through-through hole 3 can be self-adjusted, it is not necessary to remove it in advance.

実施の形態４．
実施の形態４による底面電極部品の実装方法は、はんだ付けされる金属電極やはんだバンプの表面に形成される、酸化物や水酸化物の等の酸化膜により、電子部品の電極やはんだバンプの適正なはんだ付けが阻害される、という課題に対処するためのものである。
実施の形態４では、特にコラム表面に１５ｎｍレベルの厚い酸化膜を有する３０４ピン、１．２７ｍｍピッチＣＧＡパッケージをはんだ付けするために、φ０．６ｍｍの貫通スルーホールを有する２．０ｍｍ厚印刷配線板に噴流させた２６０℃の溶融はんだを接触させはんだ付けを行うことを特徴とする。 Embodiment 4 FIG.
In the mounting method of the bottom electrode component according to the fourth embodiment, the electrode of the electronic component or the solder bump is formed by an oxide film such as oxide or hydroxide formed on the surface of the metal electrode or solder bump to be soldered. This is to address the problem that proper soldering is hindered.
In the fourth embodiment, in particular, a 2.0 mm thick printed wiring board having a through hole of φ0.6 mm for soldering a 304 pin, 1.27 mm pitch CGA package having a thick oxide film of 15 nm level on the column surface. Soldering is performed by bringing a molten solder at 260 ° C. jetted into the nozzle into contact.

図９は、実施の形態４におけるＣＧＡパッケージ実装方法を示す正面図である。この実装は、ＣＧＡパッケージ以外の表面実装部品を印刷配線板に実装した後の工程に適用される。   FIG. 9 is a front view showing a CGA package mounting method according to the fourth embodiment. This mounting is applied to a process after a surface mounting component other than the CGA package is mounted on a printed wiring board.

図９において、底面電極部品の実装構造は、貫通スルーホール３を有する印刷配線板１と、電子部品であるＣＧＡパッケージ１３と、はんだ槽９と、溶融はんだ１０によって形成されるはんだ５を備え構成される。ＣＧＡパッケージ１３は、パッケージ内部に電子回路が形成され、パッケージ底面（裏面）に複数個、面配列された円筒状のはんだコラム１４が接合されている。コラム表面は厚い酸化膜１５で覆われている。印刷配線板１は、部品側レジスト４及び溶融はんだ接触側レジスト４が施されている。
なお、図９において、ＣＧＡパッケージ１３以外の搭載部品やはんだ付け装置詳細等は図示していない。 In FIG. 9, the mounting structure of the bottom electrode component includes a printed wiring board 1 having a through-hole 3, a CGA package 13 which is an electronic component, a solder bath 9, and solder 5 formed by molten solder 10. Is done. The CGA package 13 has an electronic circuit formed inside the package, and a plurality of surface-aligned cylindrical solder columns 14 are joined to the bottom surface (back surface) of the package. The column surface is covered with a thick oxide film 15. The printed wiring board 1 is provided with a component side resist 4 and a molten solder contact side resist 4.
In FIG. 9, mounted components other than the CGA package 13 and details of the soldering apparatus are not shown.

次にＣＧＡパッケージ１３のはんだ付けの流れを説明する。印刷配線板１の上にＣＧＡパッケージ１３を設置する。印刷配線板１の下面に２６０℃の溶融はんだ１０を接触させ、表面張力により貫通スルーホール３の内部へはんだを誘導する。通常用いられる全体加熱方式であるリフロー加熱では、部品耐熱温度、例えば２２０℃を越えないよう加熱温度を設定する。一方、本手法では、印刷配線板１の下面から２６０℃という部品耐熱温度を超えた溶融はんだを接触させることが可能となり、実施の形態１で示したとおり活性化エネルギーの高いはんだがコラム表面に存在する厚い酸化を除去し、良好なはんだフィレットを形成できる。   Next, the flow of soldering of the CGA package 13 will be described. A CGA package 13 is installed on the printed wiring board 1. The molten solder 10 at 260 ° C. is brought into contact with the lower surface of the printed wiring board 1, and the solder is guided into the through-through hole 3 by surface tension. In reflow heating, which is a general heating method that is normally used, the heating temperature is set so as not to exceed the component heat resistance temperature, for example, 220 ° C. On the other hand, in this method, it becomes possible to contact the molten solder that exceeds the component heat resistance temperature of 260 ° C. from the lower surface of the printed wiring board 1, and the solder having high activation energy is applied to the column surface as shown in the first embodiment. Thick oxidation present can be removed and good solder fillets can be formed.

実施の形態５．
実施の形態５による底面電極部品実装方法は、はんだ付けされる金属電極やはんだバンプのの平坦度が悪いために、電子部品の電極やはんだバンプの適正なはんだ付けが阻害される、という課題に対処するためのものである。
この実施の形態５では、特に０．２５ｍｍのパッケージ平坦度を有する３５ｍｍ角、１．０ｍｍピッチの大型ＣＧＡパッケージをはんだ付けするために、φ０．２ｍｍの貫通スルーホールを有する２．０ｍｍ厚印刷配線板に噴流させた２６０℃の溶融はんだを接触させはんだ付けを行うことを特徴とする。以下、図１０を用いて実施の形態５について説明する。 Embodiment 5 FIG.
The bottom electrode component mounting method according to the fifth embodiment has a problem that proper soldering of electrodes and solder bumps of electronic components is hindered due to poor flatness of metal electrodes and solder bumps to be soldered. It is for coping.
In this fifth embodiment, in particular, a 2.0 mm thick printed wiring having a through hole of φ0.2 mm for soldering a large CGA package of 35 mm square and 1.0 mm pitch having a package flatness of 0.25 mm. Soldering is performed by contacting molten solder at 260 ° C. jetted onto the plate. Hereinafter, the fifth embodiment will be described with reference to FIG.

図１０は、実施の形態５におけるＣＧＡパッケージ実装方法を示す正面図である。この実装は、ＣＧＡパッケージ以外の表面実装部品を印刷配線板に実装した後の工程に適用される。   FIG. 10 is a front view showing a CGA package mounting method according to the fifth embodiment. This mounting is applied to a process after a surface mounting component other than the CGA package is mounted on a printed wiring board.

図１０において、底面電極部品実装構造は、貫通スルーホール３を有する印刷配線板１と、電子部品であるＣＧＡパッケージ１３と、はんだ槽９と、溶融はんだ１０によって形成されるはんだ５を備え構成される。ＣＧＡパッケージ１３は、パッケージ内部に電子回路が形成され、パッケージ底面（裏面）に複数個、面配列された円筒状のはんだコラム１４が接合されている。印刷配線板１は、部品側レジスト４及び溶融はんだ接触側レジスト４が施されており、部品側にはペースト状はんだ１１が印刷されている。
なお、図において、ＣＧＡパッケージ１３以外の搭載部品やはんだ付け装置詳細等は図示していない。 In FIG. 10, the bottom electrode component mounting structure includes a printed wiring board 1 having a through-through hole 3, a CGA package 13 that is an electronic component, a solder bath 9, and solder 5 formed by molten solder 10. The The CGA package 13 has an electronic circuit formed inside the package, and a plurality of surface-aligned cylindrical solder columns 14 are joined to the bottom surface (back surface) of the package. The printed wiring board 1 is provided with a component side resist 4 and a molten solder contact side resist 4, and paste solder 11 is printed on the component side.
In the figure, components other than the CGA package 13 and details of the soldering apparatus are not shown.

次にＣＧＡパッケージ１３のはんだ付けの流れを説明する。印刷配線板１上に設置したＣＧＡパッケージ１３へ溶融はんだ１０を誘導する方式は、実施の形態４と同様である。通常の表面実装では、ペースト状はんだ１１を印刷し、部品搭載、リフロー加熱を行う。この際、一般的なはんだ印刷厚さは最大でも０．２ｍｍ程度であるが、本事例のようにパッケージ平坦度が０．２５ｍｍの場合、（はんだ印刷厚さ）＜（パッケージ平坦度）となりリフロー加熱時にペースト状はんだ１１とパッケージのはんだコラム１４が非接触となる。この場合、良好なはんだフィレットが形成されない。   Next, the flow of soldering of the CGA package 13 will be described. The method for guiding the molten solder 10 to the CGA package 13 installed on the printed wiring board 1 is the same as in the fourth embodiment. In normal surface mounting, paste solder 11 is printed, component mounting, and reflow heating are performed. At this time, the general solder printing thickness is about 0.2 mm at the maximum, but when the package flatness is 0.25 mm as in this example, (solder printing thickness) <(package flatness). During the heating, the paste solder 11 and the solder column 14 of the package are not in contact with each other. In this case, a good solder fillet is not formed.

そこで図１０に示す手法を用いた場合、溶融はんだ１０は印刷配線板１の上面より１ｍｍ程度噴出し、０．２５ｍｍものパッケージ平坦度を吸収できる。この噴出作用によりパッケージの平坦度に左右されず良好なはんだフィレットを形成できる。   Therefore, when the method shown in FIG. 10 is used, the molten solder 10 is ejected from the upper surface of the printed wiring board 1 by about 1 mm and can absorb the package flatness of 0.25 mm. By this ejection action, a good solder fillet can be formed regardless of the flatness of the package.

１ 印刷配線板、２ 導体、３ 貫通スルーホール、４ ソルダレジスト、５ 底面電極部品、６ 電極部、７ はんだ、８ スルーホールランド（部品側）、９ はんだ槽、１０ 溶融はんだ、１１ ペースト状はんだ、１２ 余剰はんだ、１３ ＣＧＡパッケージ、１４ はんだコラム、１５ 酸化膜、２０ スルーホールめっき（孔内）、２１ スルーホールランド（裏面側）。   DESCRIPTION OF SYMBOLS 1 Printed wiring board, 2 Conductor, 3 Through-through hole, 4 Solder resist, 5 Bottom electrode component, 6 Electrode part, 7 Solder, 8 Through-hole land (component side), 9 Solder tank, 10 Molten solder, 11 Paste solder , 12 Excess solder, 13 CGA package, 14 solder column, 15 oxide film, 20 through-hole plating (inside hole), 21 through-hole land (back side).

Claims (7)

電子部品の電極と、配線板の一面にあって前記電極と対向する位置に設けられた電極とをはんだ接合する電子部品の実装方法であって、
前記配線板の電極位置に貫通スルーホールを穿設し、
前記電子部品の電極と前記配線板の電極とを位置合わせした後に、前記配線板の他の一面から前記貫通スルーホール内部を通して溶融はんだを供給し、前記電子部品の電極と前記配線板の電極とをはんだ接合することを特徴とする電子部品の実装方法。 An electronic component mounting method for solder-bonding an electrode of an electronic component and an electrode provided on a surface of the wiring board facing the electrode,
Drilling a through-hole at the electrode position of the wiring board,
After aligning the electrode of the electronic component and the electrode of the wiring board, molten solder is supplied from the other surface of the wiring board through the inside of the through-hole, and the electrode of the electronic component and the electrode of the wiring board A method for mounting an electronic component, characterized by soldering. はんだ槽内で溶融された溶融はんだに前記配線板の他の一面を接触させることにより前記貫通スルーホールを介して前記溶融はんだを供給することを特徴とする請求項１記載の電子部品の実装方法。 2. The electronic component mounting method according to claim 1, wherein the molten solder is supplied through the through-through hole by bringing the other surface of the wiring board into contact with the molten solder melted in a solder bath. . 前記電子部品の電極は半球状の形状を有し、
半球状の形状を有した前記電子部品の電極を、前記貫通スルーホールの孔位置にはめ合わせることにより、前記電子部品の電極と前記配線板の電極とを位置合わせすることを特徴とする請求項１、２いずれか記載の電子部品の実装方法。 The electrode of the electronic component has a hemispherical shape,
The electrode of the electronic component and the electrode of the wiring board are aligned by fitting the electrode of the electronic component having a hemispherical shape to the hole position of the through-hole. The electronic component mounting method according to any one of 1 and 2. 前記配線板の前記貫通スルーホールの孔内はめっきが施されており、
前記配線板の一面に設けられた前記電極の周囲はソルダレジストで覆われており、かつ、前記配線板の他の一面の前記貫通スルーホールの孔位置の周囲はソルダレジストで覆われていることを特徴とする請求項１乃至３のいずれか記載の電子部品の実装方法。 The inside of the through-through hole of the wiring board is plated,
The periphery of the electrode provided on one surface of the wiring board is covered with a solder resist, and the periphery of the hole position of the through-through hole on the other surface of the wiring board is covered with a solder resist. The electronic component mounting method according to claim 1, wherein the electronic component is mounted on the electronic component. 電子部品を搭載する一面にあって前記電子部品の電極と対向する位置に、スルーホールランドを備えた配線板であって、
前記スルーホールランドの位置には、孔内がめっき処理された貫通スルーホールが穿設されており、
前記電子部品を搭載する一面の前記スルーホールランドの周囲と、前記電子部品を搭載する一面と対向する他の面の前記貫通スルーホールの周囲とが、ソルダレジストで覆われていることを特徴とする配線板。 A wiring board provided with a through-hole land at a position facing an electrode of the electronic component on one surface on which the electronic component is mounted,
In the position of the through hole land, a through through hole in which the inside of the hole is plated is formed,
The periphery of the through hole land on one surface on which the electronic component is mounted and the periphery of the through through hole on the other surface opposite to the surface on which the electronic component is mounted are covered with a solder resist. Wiring board to do. 請求項１乃至４のいずれか記載の電子部品の実装方法により実装された電子部品を前記配線板から取り外す電子部品の取り外し方法であって、
前記配線板の他の一面をはんだ槽内に接触させることで、はんだ接合された前記電子部品のはんだを溶融した後に、前記電子部品を取り外すことを特徴とする電子部品の取り外し方法。 An electronic component removing method for removing an electronic component mounted by the electronic component mounting method according to claim 1 from the wiring board,
A method for removing an electronic component, comprising: bringing the other surface of the wiring board into contact with a solder bath to melt the solder of the electronic component that has been soldered and then removing the electronic component. 電子部品の電極と、前記電極と対向する位置にあって配線板の一面に設けられた電極とを位置合わせしてはんだ接合する電子部品の実装方法であって、
前記配線板の電極位置に貫通スルーホールを穿設し、
前記貫通スルーホール上にペースト状はんだを供給し、前記電子部品の電極と前記配線板の電極とを位置合わせした後に、前記電子部品と前記配線板を加熱して前記電子部品の電極と前記配線板の電極とをはんだ接合することを特徴とする電子部品の実装方法。 An electronic component mounting method for soldering by aligning an electrode of an electronic component and an electrode provided on one surface of the wiring board at a position facing the electrode,
Drilling a through-hole at the electrode position of the wiring board,
After supplying paste solder on the through-hole and aligning the electrode of the electronic component and the electrode of the wiring board, the electronic component and the wiring board are heated to heat the electronic component electrode and the wiring An electronic component mounting method comprising soldering a plate electrode to a solder.
JP2010131941A 2010-06-09 2010-06-09 Mounting method of electronic component, removing method of electronic component, and wiring board Pending JP2011258749A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110574156A (en) * 2017-05-02 2019-12-13 西门子股份公司 electronic assembly with a component mounted between two substrates and method for producing the same
CN111586990A (en) * 2020-05-07 2020-08-25 中国航空无线电电子研究所 Protection processing method for ceramic column grid array device of printed circuit board
EP4040925A1 (en) 2021-02-08 2022-08-10 Aisin Corporation Circuit board

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110574156A (en) * 2017-05-02 2019-12-13 西门子股份公司 electronic assembly with a component mounted between two substrates and method for producing the same
JP2020520553A (en) * 2017-05-02 2020-07-09 シーメンス アクチエンゲゼルシヤフトＳｉｅｍｅｎｓ Ａｋｔｉｅｎｇｅｓｅｌｌｓｃｈａｆｔ Electronic assembly having a device inserted between two substrates and method of making the same
CN111586990A (en) * 2020-05-07 2020-08-25 中国航空无线电电子研究所 Protection processing method for ceramic column grid array device of printed circuit board
EP4040925A1 (en) 2021-02-08 2022-08-10 Aisin Corporation Circuit board

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