JP2011258607A - Electronic component module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress deterioration of insulation resistance in an electronic component module in which an electronic component chip is joined, with solder, to a multilayer substrate having a ferrite base layer.SOLUTION: The electronic component module includes: a multilayer substrate 12 having base layers 12a-12c made of ferrite; land electrodes 21-24 provided on an upper surface of the multilayer substrate 12; electronic component elements 13 and 14 mounted on the multilayer substrate 12 to be electrically connected with the land electrodes 21-24 and joined to the land electrodes 21-24 with solder; and an insulative material layer 51 formed to extend from at least a part of outer peripheral edges of land electrodes 21-24 onto a part of upper surfaces of the land electrodes 21-24.

Description

  The present invention relates to an electronic component module in which an electronic component element such as an IC chip is mounted on a multilayer substrate. More specifically, the electronic component element is bonded to the multilayer substrate having a ferrite substrate layer using solder. The present invention relates to an electronic component module having a structure.

  Conventionally, various electronic component modules in which a plurality of electronic component chips are mounted on a substrate have been proposed in order to reduce the size of electronic devices. For example, Patent Document 1 below discloses a ceramic laminated substrate used in such an electronic component module. FIGS. 7A and 7B are a partially cutaway plan view and a partially cutaway sectional view of the ceramic laminated substrate described in Patent Document 1. FIG.

  In the ceramic multilayer substrate 101, a plurality of ceramic layers 102 made of glass ceramics are laminated. An internal electrode is formed in the ceramic multilayer substrate 101. A via hole electrode 103 is provided so as to be electrically connected to the internal electrode. The via-hole electrode 103 reaches the upper surface of the ceramic multilayer substrate 101. Electrode lands 104 are formed on the upper surface of the ceramic multilayer substrate 101. The high frequency electronic component chip is mounted on the ceramic multilayer substrate 101, and the electrode of the high frequency electronic component chip is bonded onto the electrode land 104.

  An overcoat layer 105 is provided outside the electrode land 104 so as to cover at least a part of the outer edge of the electrode land 104.

  In Patent Document 1, the formation of the overcoat layer 105 increases the adhesion strength of the electrode land 104 to the ceramic multilayer substrate 101.

  The overcoat layer 105 is formed of the same material as that of the substrate or a material obtained by adding a small amount of a colorant to an insulating material.

  In Patent Document 1, the vicinity of the outer periphery of the electrode land 104 is embedded in the substrate so that the surface of the overcoat layer 105 and the exposed portion of the electrode land 104 not covered by the overcoat layer 105 are on the same plane. Has been. Thereby, it is said that the stability at the time of mounting electronic components can be enhanced, and removal of cleaning residues such as flux is easy.

JP2002-198637

  As described above, in Patent Document 1, the insulating layer is merely formed in order to improve the adhesion between the laminated ceramic substrate made of glass ceramics and the electrode land.

  Further, in order to eliminate the step between the overcoat layer and the electrode land, the exposed portion of the electrode land and the surface of the overcoat layer are positioned in the same plane. That is, the corrosion of the electrode land due to the flux residue at the step between the overcoat layer and the electrode land, that is, chemical migration is prevented, and the flux is simply cleaned.

  On the other hand, the present inventors, among electronic component modules, in an electronic component module using a multilayer substrate having a substrate layer made of ferrite, when the electronic component chip is joined to the land electrode by solder, the ferrite is eroded by the flux. It has been found for the first time that the insulation resistance IR deteriorates between the land electrode and the internal conductor provided in the inner layer of the multilayer substrate and connected to the land electrode at a different potential. Japanese Patent Application Laid-Open No. H10-228688 does not describe any particular problems at the time of soldering of a module substrate composed of a multilayer substrate having a substrate layer composed of ferrite.

  An object of the present invention is an electronic component module in which an electronic component element is mounted on a multilayer substrate having a substrate layer made of ferrite in view of the above-described state of the prior art, and is provided on the inner layer of the land electrode and the multilayer substrate. It is an object of the present invention to provide an electronic component module that can suppress deterioration of insulation resistance IR between a land electrode and an internal conductor connected to a different potential.

  An electronic component module according to the present invention includes a multilayer substrate having a top surface and a bottom surface and having a substrate layer made of ferrite, a land electrode provided on the top surface of the multilayer substrate, and an electric current connected to the land electrode of the multilayer substrate. An electronic component element mounted on the multilayer substrate so as to be connected to each other, a bonding agent made of solder for bonding the electronic component element and the land electrode, and an upper surface of the multilayer substrate. And an insulating material layer formed so as to enter a part of the upper surface of the land electrode from a region outside the land electrode beyond at least a part of the outer peripheral edge of the land electrode.

  On the specific situation with the electronic component module concerning this invention, the said insulating material layer consists of ferrite. In that case, the insulating material layer can be formed using ferrite as in the multilayer substrate. Therefore, the types of materials can be reduced. Therefore, the manufacturing process and cost can be reduced.

  In another specific aspect of the electronic component module according to the present invention, first and second internal conductors connected to a potential different from the land electrode in the multilayer substrate are provided, and the first The distance between the internal conductor and the land electrode is smaller than the distance between the second internal conductor and the land electrode. At the edge of the land electrode on the first internal conductor side, the length of the portion where the insulating material layer extends from the edge to the inside of the land electrode is the second internal of the land electrode. The length of the insulating material layer at the edge on the conductor side is longer than the length of the portion extending beyond the edge and reaching the inside of the land electrode. In this case, at the edge of the land electrode that is relatively close to the internal conductor, the length of the portion where the insulating material layer reaches the inside of the land electrode is relatively long. Resistance degradation can be more reliably suppressed.

  In still another specific aspect of the electronic component module according to the present invention, the upper surface of the multilayer substrate is an upper surface of a ferrite substrate layer. Thus, even if the ferrite substrate layer is located at the uppermost part of the multilayer substrate, it is possible to reliably suppress the deterioration of the insulation resistance.

  In still another specific aspect of the electronic component module according to the present invention, the multilayer substrate includes a non-magnetic ferrite substrate layer and a magnetic ferrite substrate layer. Thus, in the present invention, the multilayer substrate may have a structure having a non-magnetic ferrite substrate layer and a magnetic ferrite substrate layer. In particular, the multilayer substrate preferably has a magnetic ferrite substrate layer and a non-magnetic ferrite substrate layer laminated above and below the magnetic ferrite substrate layer. In this case, since the magnetic ferrite substrate layer is sandwiched between the nonmagnetic ferrite substrate layers on both sides, a coil having a high inductance value can be formed in the magnetic ferrite substrate layer.

  In the electronic component module according to the present invention, a coil conductor may be provided in the multilayer substrate. Since the multilayer substrate has a ferrite layer, when a coil conductor is provided inside, a coil having a high inductance value can be configured.

  In the electronic component module according to the present invention, since the insulating material layer is provided so as to enter a part of the upper surface of the land electrode from at least a part of the outer peripheral edge of the land electrode, the land material is provided below the insulating material layer. In the portion where the electrode is located, even if the insulating material layer is eroded by the flux, the lower land electrode hardly erodes the multilayer substrate layer below the land electrode. In addition, since the insulating material layer is eroded by the flux at the outer peripheral edge portion of the land electrode in the portion where the insulating material layer is provided, the lower multilayer substrate layer is hardly eroded by the flux. Therefore, it is possible to reliably suppress the deterioration of the insulation resistance between the land electrode and the internal conductor provided in the inner layer of the multilayer substrate and connected to a potential different from that of the land electrode.

(A) And (b) is the partial notch top view and partial notch front sectional drawing for demonstrating the principal part of the electronic component module of one Embodiment of this invention. It is a schematic circuit diagram which shows the circuit structure of the electronic component module of one Embodiment of this invention. It is front sectional drawing of the electronic component module of one Embodiment of this invention. FIG. 4 is a schematic plan view showing a structure in which an illustration of an insulating material layer is omitted in the electronic component module of the embodiment shown in FIG. 3. It is a typical top view for demonstrating the laminated structure of the electronic component module of embodiment shown in FIG. FIG. 4 is a partially cutaway front sectional view for explaining a relationship among a land electrode, an insulating material layer, and an internal conductor in the electronic component module of the embodiment shown in FIG. 3. (A) is the partial notch top view of the conventional ceramic laminated substrate, (b) is the partial notch front sectional drawing.

  Hereinafter, the present invention will be clarified by describing specific embodiments of the present invention with reference to the drawings.

  FIGS. 1A and 1B are a partially cutaway plan view and a partially cutaway front sectional view for explaining the main part of an electronic component module according to an embodiment of the present invention.

  As shown in FIG. 1B, land electrodes 2 are formed on a ceramic multilayer substrate 1. The ceramic multilayer substrate 1 has substrate layers 1a to 1c made of magnetic ferrite.

  The ceramic multilayer substrate 1 may have a structure in which a ferrite substrate layer other than the ferrite substrate layers 1a to 1c and / or a substrate layer made of an insulating material other than ferrite is laminated. The ceramic multilayer substrate 1 may have a structure in which only magnetic or nonmagnetic ferrite substrate layers are laminated.

  The land electrode 2 is made of an appropriate metal or alloy such as Al, Cu, Ag, or Au. The land electrode 2 is an electrode on which an electronic component chip is mounted. In mounting, the solder 3 is applied on the land electrode 2. The solder 3 is melted by heating, and the land electrode 2 is bonded to the bump or terminal electrode on the lower surface of the electronic component chip by a bonding material made of the solder 3. The planar shape of the land electrode 2 is not particularly limited, but in the present embodiment, it has a rectangular planar shape. That is, the land electrode 2 has two sides 2a and 2c that face each other and two sides 2b and 2d that face each other.

  In the present embodiment, the insulating material layers 4 and 5 are formed so as to cover the inside of the land electrode 2 from the regions outside the sides 2b and 2d. The insulating material layers 4 and 5 are made of an appropriate insulating material. Preferably, like the ferrite substrate layers 1a to 1c, the insulating material layers 4 and 5 are made of ferrite. In that case, the insulating material layers 4 and 5 can be formed using the same material as the ferrite substrate layer 1a. Therefore, the types of materials can be reduced.

  The solder 3 is applied when an electronic component chip is mounted. Accordingly, the solder 3 shown in FIGS. 1A and 1B is not applied before mounting the electronic component chip. At the time of soldering, a solder paste containing the solder 3 is applied onto the land electrode 2 by a known method such as a dispensing method or a transfer method. Next, an electronic component chip is mounted. The electronic component chip is soldered to the land electrode by heating.

  In FIGS. 1A and 1B, the portions on the sides 2 b and 2 d side of the land electrode 2 are covered with insulating material layers 4 and 5. The portions on the sides 2a and 2c are not covered with an insulating material layer. Accordingly, the flux contained in the solder paste spreads, and the flux reaches the surface of the multilayer substrate from the sides 2a and 2c of the land electrode 2. Accordingly, the ferrite substrate layer 1a is eroded by the flux in the vicinity of the sides 2a and 2c.

  On the other hand, in the portions on the sides 2b and 2d side covered with the insulating resin layers 4 and 5, the flux wets and spreads on the surfaces of the insulating resin layers 4 and 5. In this case, the insulating resin layers 4 and 5 are eroded by the flux. However, in the portion where the land electrode 2 is located below the insulating resin layers 4 and 5, the land electrode 2 is provided below the land electrode 2. Corrosion of the ferrite substrate layer 1a is prevented. In addition, the insulating resin layers 4 and 5 are eroded by the flux in the sides 2b and 2d and in the vicinity of the outside thereof, so that the ferrite substrate layer 1a below the insulating resin layers 4 and 5 is reliably prevented from being eroded. The That is, since the insulating resin layers 4 and 5 are provided, the erosion of the ferrite substrate layers 1a to 1c constituting the multilayer substrate 1 can be reliably suppressed.

  The sides on the sides 2a and 2c that are not covered with the insulating material layer erode to the inner layer, but the lower land electrodes are on the sides 2b and 2d that are covered with the insulating resin layers 4 and 5. Stop the erosion.

  Specifically, in FIG. 1B, the surplus flux travels on the insulating material layers 4 and 5 as shown by the arrow A, and is opposite to the land electrode 2 of the insulating material layers 4 and 5. Proceed toward the end of the side. In this case, the insulating material layers 4 and 5 are eroded by the flux. However, in the portion where the land electrode 2 is located below the insulating material layers 4 and 5, the land electrode 2 prevents the lower ferrite substrate layer 1a from being eroded. Further, since the insulating material layers 4 and 5 are eroded by the flux in the vicinity of the sides 2b and 2d of the land electrode 2 and the outside thereof, the ferrite substrate positioned immediately below the insulating material layers 4 and 5 Erosion due to the flux of the layer 1a is reliably suppressed. That is, intrusion of the flux into the ferrite substrate layer 1a of the ceramic multilayer substrate 1 can be reliably suppressed in the side 2b of the land electrode 2 and in the vicinity of the outside thereof.

  In a portion where the sides 2 a and 2 c of the land electrode 2 where the insulating material layer is not provided is located, surplus flux penetrates into the ferrite substrate layer 1 a of the ceramic multilayer substrate 1. When the flux enters the ferrite substrate layer 1a of the ceramic multilayer substrate 1, the oxide component in the ferrite is dissolved by the flux, and the ferrite substrate layer 1a is eroded. As a result, the erosion of the ferrite multilayer substrate separates the land electrode 2 from the land electrode 2, and the insulation resistance between the land electrode 2 and the internal conductor connected to a different potential is lowered.

  Note that the flux may reach the end 4 a of the insulating material layer 4 opposite to the land electrode 2 or the end 5 a of the insulating material layer 5. However, even if the surface of the ferrite substrate layer 1a is eroded at the end portions 4a and 5a, the insulation resistance IR between the land electrode 2 and the internal conductors 6 and 7 is hardly affected. Further, when the insulating material layer 4 is connected to the insulating material layer formed on the adjacent land electrode, the insulating material layer is eroded by the flux, so that the ferrite substrate layer positioned immediately below the insulating material layer It is difficult for the flux to erode to 1a.

  As described above, in the present embodiment, at least a part of the outer peripheral edge of the land electrode 2 provided on the ceramic multilayer substrate 1 exceeds a part of the outer peripheral edge of the land electrode 2 from a region outside the land electrode 2. Since the insulating material layers 4 and 5 are provided so as to reach the land electrode 2, a decrease in insulation resistance can be reliably suppressed.

  As described above, the insulating material layers 4 and 5 are eroded by the flux and act to suppress the intrusion of the ferrite substrate layer 1a below the insulating material layers 4 and 5 of the flux. In this case, it is preferable that the height of the insulating material layers 4 and 5 increases from the end in the land electrode 2 toward the sides 2b and 2d of the land electrode 2. Thereby, the spread of the flux toward the sides 2b and 2d of the land electrode 2 can be suppressed.

  Of the internal conductors 6 and 7 connected to a potential different from that of the land electrode 2, the distance X between the internal conductor 6 and the land electrode 2 is between the land electrode 2 and the internal conductor 7. It is shorter than the distance Y. In such a structure, the overcoat length L1 of the insulating material layer 5 is preferably set to the side 2b on the side where the distance between the land electrode 2 and the internal conductor is short, that is, on the side 2d side of the land electrode 2. It is desirable to make it longer than the overcoat length L2 on the side. Thereby, a decrease in insulation resistance can be more effectively suppressed. This is because, on the side of the internal conductor 6 close to the land electrode 2, a decrease in insulation resistance due to the adhesion of the flux has a greater influence. Therefore, preferably, when there are a plurality of internal conductors connected to different potentials with respect to the land electrode 2, as shown in FIG. In the portion, it is desirable to make the overcoat length relatively long.

  The overcoat length refers to the length of the portion where the insulating material layers 4 and 5 extend beyond the outer peripheral edge of the land electrode 2 and reach the inner side of the electrode land.

  As described above, the inventors of the present invention, in the ceramic multilayer substrate having the ferrite substrate layer, when the flux reaches the surface of the ceramic multilayer substrate, the ceramic multilayer substrate surface is eroded, thereby connecting to the land electrode at a different potential. This is the first finding of the problem that the insulation resistance with the internal conductor is deteriorated. By providing the insulating material layers 4 and 5 as in the present embodiment, such a decrease in insulation resistance can be reliably suppressed.

  Japanese Patent Laid-Open No. 2005-209881 discloses an insulating material layer that is partially overcoated on the electrode, as in the case of the insulating material layers 4 and 5, and the insulating material layer is made of glass ceramics. It is only provided to increase the adhesion strength of the electrode to the substrate. That is, the problem that is the premise of the present invention that the insulation resistance of a substrate made of ferrite is lowered is not disclosed in Japanese Patent Laid-Open No. 2005-209881. Further, Patent Document 1 described above discloses a configuration in which the overcoat layer and the electrode surface are flush with each other in order to suppress the influence caused by the flux remaining in the steps. However, the configuration of Patent Document 2 merely facilitates flux removal, and Patent Document 1 does not show any deterioration in insulation resistance due to flux erosion in a substrate made of ferrite.

  As shown in FIGS. 1A and 1B, the present invention suppresses a decrease in insulation resistance due to flux erosion at the outer peripheral edge of the land electrode 2 in the ceramic multilayer substrate 1 having the ferrite substrate layer 1a. It is a feature. Therefore, an insulating material layer may be formed so as to extend from the outer peripheral edge to the inner side along the entire outer peripheral edge of the land electrode 2.

  Next, a second embodiment of the present invention in which an insulating material layer is provided on a ceramic multilayer substrate will be described with reference to FIGS. The electronic component module of the second embodiment has a circuit configuration shown in FIG.

  As shown in FIG. 3, the electronic component module 11 includes a ceramic multilayer substrate 12, an IC chip 13 and a capacitor 14 mounted on the ceramic multilayer substrate 12.

  In the electronic component module 11, a coil 15 is built in the ceramic multilayer substrate 12.

  The IC chip 13 is a control IC chip for a DC-DC converter.

  The electronic component module 11 is a DC-DC converter module including a control IC chip 13, a coil 15, and a capacitor 14.

  One end of a coil 15 built in the ceramic multilayer substrate 12 is connected to the switching terminal 13 f of the IC chip 13. The other end of the coil 15 is connected to the output terminal 16. A capacitor 14 is connected between a connection point 17 between the coil 15 and the output terminal 16 and a ground terminal 18. The capacitor 14 is mounted on the ceramic multilayer substrate 12.

  A battery is connected to the input voltage terminal 13d. A constant voltage is output from the output terminal 16 regardless of variations in battery voltage. When the input signal of the EN terminal 13g is high, the DC-DC converter is operated, and when low, the operation is stopped.

  A specific structure of the electronic component module 11 will be described with reference to FIGS.

  As shown in FIG. 3, in the electronic component module 11, the IC chip 13 and the capacitor 14 are mounted on a ceramic multilayer substrate 12.

  In the present embodiment, the ceramic multilayer substrate 12 has a structure in which a non-magnetic ferrite substrate layer 12a, a magnetic ferrite substrate layer 12b, and a non-magnetic ferrite substrate layer 12c are sequentially stacked from the top. Such a laminated structure can be obtained by laminating an appropriate number of non-magnetic ferrite green sheets above and below the laminated body of magnetic green sheets, integrating them, and firing.

  In the ceramic multilayer substrate 12, the coil 15 described above is constituted by a coil conductor provided so as to connect a plurality of magnetic ferrite layers. Such a coil 15 can be obtained by printing an appropriate conductive paste such as Al, Cu, Ag or the like on a magnetic green sheet and sintering it by a firing step to obtain the ceramic multilayer substrate 12. More specifically, a coil winding portion is formed on a plurality of magnetic green sheets by printing a conductive paste. Next, the coil conductor which comprises the coil 15 can be formed by connecting each winding part by a via-hole electrode. Such a coil 15 incorporated in the ceramic multilayer substrate 12 can be realized by a known laminated coil manufacturing method.

  In the present embodiment, the coil 15 is formed in the magnetic ferrite substrate layer 12b, and the upper and lower sides of the magnetic ferrite substrate layer 12b are made of the nonmagnetic ferrite substrate layers 12a and 12c. Can be obtained.

  However, in the present invention, the substrate layer constituting the ceramic multilayer substrate 12 is not limited to the structure of this embodiment. That is, an insulating substrate layer other than the ferrite substrate layer may be laminated. Further, the ceramic multilayer substrate 12 may be formed of only the magnetic ferrite substrate layer, not limited to the laminate of both the nonmagnetic ferrite substrate layer and the magnetic ferrite substrate layer, or the nonmagnetic ferrite substrate. The ceramic multilayer substrate 12 may be formed of only layers.

  As shown in FIG. 3, land electrodes 21 to 24 are formed on the upper surface of the ceramic multilayer substrate 12. However, as shown in a plan view in FIG. 4, in addition to the land electrodes 21 to 24, land electrodes 25 and 26 are also formed on the upper surface of the ceramic multilayer substrate 12.

  In FIG. 4, the illustration of the insulating material layer in FIG. 3 is omitted for easy understanding. That is, FIG. 4 is a plan view showing a state where the insulating material layer is removed on the ceramic multilayer substrate 12, and FIG. 5 described later is used in the present embodiment in which the insulating material layer is formed. 2 is a schematic plan view of a ceramic multilayer substrate 12. FIG.

  Of the land electrodes 21 to 26, the land electrodes 21, 22, 25, and 26 are portions joined to the terminal electrodes on the lower surface of the IC chip 13. Among these, the land electrode 25 corresponds to the input voltage terminal 13d in FIG. The land electrode 21 is connected to the EN terminal of the IC chip 13. On the other hand, the land electrode 26 corresponds to the switching terminal 13f of FIG. The land electrode 22 corresponds to the ground terminal 13e in FIG. Further, the land electrode 23 corresponds to the connection point 17 in FIG. 2, and the land electrode 24 corresponds to the ground terminal 18 to which the capacitor 14 in FIG. 2 is connected.

  3 schematically shows a cross section of a portion where the land electrodes 21, 22, 23, and 24 of FIG. 4 are provided.

  4 and 5, the land electrodes 31 to 33 formed on the lower surface 12e of the ceramic multilayer substrate 12 are indicated by a one-dot chain line through the schematic ceramic multilayer substrate 12 by a one-dot chain line. 4 and 5, the winding portion of the coil 15 provided in the ceramic multilayer substrate 12 is schematically shown by a broken line.

  First, the structure in the ceramic multilayer substrate 12 will be described with reference to FIGS. 3 and 4, and the ceramic multilayer substrate 12 provided with the insulating material layer will be described with reference to FIG.

  Returning to FIG. 3, in the ceramic multilayer substrate 12, an internal conductor 41 connected to one end of the coil 15 is formed at an intermediate height position of the ceramic multilayer substrate 12. The internal conductor 41 is extended in the paper back direction of the drawing, and is connected to the land electrode 26 of FIG. 4 by a via hole electrode (not shown). The land electrode 26 corresponds to the switching terminal 13f in FIG. On the other hand, the other end of the coil 15 is connected to an internal conductor 43 provided below the internal conductor 41.

  One end of the via hole electrode 48 is connected to the land electrode 22. The other end of the via hole electrode 48 is connected to the via hole electrode 47 by an internal conductor (not shown). The via hole electrode 47 is connected to the lower land electrode 33.

  One electrode 14 a of the capacitor 14 is connected to the land electrode 23. The land electrode 23 is connected to a via hole electrode 44 provided on the ceramic multilayer substrate 12. The via-hole electrode 44 is connected to an internal conductor 45 embedded in the ceramic multilayer substrate 12. An internal conductor 45 is connected to the via hole electrode 46. Therefore, the end of the coil 15 and the electrode 14a of the capacitor 14 are electrically connected. The via hole electrode 46 is connected to the land electrode 32 on the lower surface. The land electrode 32 on the lower surface corresponds to the output terminal 16 in FIG.

  The electrode 14 b of the capacitor 14 is connected to the lower land electrode 33 by a via hole electrode 47.

  One end of a via-hole electrode 49 is connected to the land electrode 21 to which the EN terminal is connected. The other end of the via hole electrode 49 is connected to a via hole electrode (not shown) by an internal conductor (not shown). The via hole electrode is connected to the lower land electrode 34.

  In FIG. 4, in order to facilitate understanding of the electrode shape on the upper surface of the ceramic multilayer substrate 12, an insulating material layer that can enter the land electrodes 21 to 24 from at least a part of the outer peripheral edge of the land electrodes 21 to 24. Not shown. However, as shown in FIG. 3, each land electrode 21 to 24 is provided with an insulating material layer 51 that can enter the inside from the outer peripheral edge of the land electrodes 21 to 24. A plan view in which the insulating material layer 51 is provided is shown in FIG. In FIG. 5, the insulating material layer 51 is shown with hatching.

  As shown in FIG. 5, in the planar shape shown in FIG. 4, the insulating material layer 51 further extends into at least part of the outer peripheral edge of the land electrodes 21 to 24 and reaches the land electrodes 21 to 24. Is formed.

  In FIGS. 4 and 5, the portion where the coil 15 is positioned below is indicated by a broken line. A portion where the internal conductor 45 is located below is indicated by a two-dot chain line.

  The insulating material layer 51 will be described as a representative of the land electrode 24. As shown in FIG. 6, the coil 15 is located below the land electrode 24 as an internal conductor connected to different potentials.

  Accordingly, when the capacitor 14 is mounted on the land electrode 24 using solder, the flux may travel along the upper surface of the land electrode 24 and reach the ceramic multilayer substrate 12 side. In this case, in this embodiment, the insulating material layer 51 is provided on the end 24a side of the land electrode 24 on the side where the coil 15 is located. That is, the insulating material layer 51 is located on the land electrode 24 from the region outside the land electrode 24 over the end 24 a on the upper surface of the ceramic multilayer substrate 12. Therefore, the flux does not reach the end 24a side, but moves on the insulating material layer 51 as indicated by an arrow B. Therefore, in this embodiment, since the insulating material layer 51 is provided in the same manner as the insulating material layer shown in FIGS. 1A and 1B, the end portion of the land electrode 24 of the ceramic multilayer substrate 12 is provided. Erosion in the vicinity of 24a can be reliably suppressed. Therefore, a decrease in insulation resistance can be suppressed.

  The same applies to the other land electrodes 21 to 23. That is, as shown in FIG. 3, in the land electrode 23, the coil 15 connected to the different potentials is positioned below, and therefore, in the land electrode 23, the insulating material layer 51 is formed over the entire outer periphery. Is formed.

  The land electrode 21 is also provided with insulating material layers 51a and 51b. However, in the land electrode 21, the above-described overcoat length of the insulating material layer 51b on the end 21a side close to the internal conductor 45 connected to a different potential is equal to the insulating material on the opposite end 21b side. It is longer than the overcoat length of the layer 51a.

  In the land electrode 22, the insulating material layer 51 is formed so as to extend over the entire outer peripheral edge of the land electrode 22 and reach the land electrode 22. That is, since the internal conductor 45 connected to different potentials is formed below the land electrode 22, the insulating material layer 51 is formed over the entire circumference of the land electrode 22.

  In the land electrodes 25 and 26, the insulating resin layer 51 is similarly formed.

  The land electrode 26 and one end of the coil 15 are connected to each other and have the same potential. Therefore, it is not necessary to provide the insulating material layer 51 in the portion of the land electrode 26 on the side close to the coil 15. On the other hand, the land electrode 26 and the internal conductor 45 are connected to different potentials. Therefore, the insulating material layer 51 is provided on the portion of the land electrode 26 closer to the internal conductor 45.

  Thus, in the electronic component module 11 of the present embodiment, the land electrodes 21 to 26 formed on the upper surface of the ceramic multilayer substrate 12 are insulative so as to reach at least the part of the outer peripheral edge and reach the upper surface of the land electrode. Since the material layer 51 is formed, a decrease in insulation resistance can be effectively suppressed as in the embodiment shown in FIG.

  Further, although not shown in particular, an insulating material layer may be similarly formed in the land electrodes 31 to 34 on the lower surface side. That is, when the electronic component module 11 is further mounted on another substrate, the land electrodes 31 to 34 on the lower surface side are used. When the land electrodes 31 to 34 are joined to another circuit board by soldering, similarly, in order to prevent the ceramic multilayer substrate 12 from being eroded by the flux at the outer peripheral edge portions of the land electrodes 31 to 34, an insulating material layer is used. Is preferably provided.

  The land electrode 33 and the coil 15 are connected to different potentials. Therefore, the insulating material layer 52 is provided on the portion of the land electrode 33 on the side close to the coil 15.

  In the present invention, it is not necessary to provide the insulating material layer on all of the plurality of land electrodes in the ceramic multilayer substrate. However, it is preferable to provide the insulating material layer in all land electrodes.

  In the above embodiment, a rectangular land electrode is shown as a land electrode for mounting the IC chip 13. However, a land electrode for mounting an IC chip usually has a circular planar shape in many cases. Accordingly, the planar shape of the land electrode may be circular.

  Further, the EN terminal 13g is connected to the land electrode 21, the ground terminal 13e is connected to the land electrode 22, the voltage input terminal 13d is connected to the land electrode 31, and the switching terminal 13f is connected to the land electrode 26. However, the present invention is not necessarily limited to such a configuration. . Further, the number of terminals of the IC chip 13 is not particularly limited.

  In the above embodiment, the IC chip 13 and the capacitor 14 are mounted on the ceramic multilayer substrate 12. However, in the present invention, the electronic component chips mounted on the ceramic multilayer substrate are limited to the IC chip 13 and the capacitor 14. It is not something.

  In addition, the coil 15 constituting the inductance is formed in the ceramic multilayer substrate 12. However, in addition to the coil 15, other coils and other electronic component elements may be formed in the ceramic multilayer substrate 12. Good. In addition, electronic component elements such as coils may not be formed in the ceramic multilayer substrate 12.

  A specific experimental example will be described.

  As the ceramic multilayer substrate, a multilayer substrate having the following multilayer structure and having the coil 15 and the internal conductor shown in FIGS. 3 to 5 described above was prepared.

  Configuration of substrate layer of ceramic multilayer substrate: A laminate composed of a non-magnetic ferrite layer 12a, a ferrite substrate layer 12b, and a non-magnetic ferrite substrate layer 12c was used. The number of non-magnetic ceramic green sheets positioned above the internal conductor 45 in the non-magnetic ferrite layer 12a was one, two, four, or six. Thus, a plurality of types of ceramic multilayer substrates were prepared in which the distance between the land electrode 22 and the internal conductor 45 was changed to 25 μm, 50 μm, 100 μm, or 150 μm, respectively.

  On the ceramic multilayer substrate, the insulating material layer 51 was formed as described above in the portion where the land electrode 22 provided was formed. However, three types of structures were prepared in which the distance between the end 24a of the land electrode 22 and the internal conductor 45 connected to a different potential was 25, 50, or 100 μm. Then, the insulating material layer 51 was formed on the three types of ceramic multilayer substrates so that the overcoat length of the insulating material layer 51 was 50, 100, or 150 μm. In the electronic component module 11 of each example obtained in this way, the high temperature and high humidity environment test is performed, and the land electrode 33 to which the land electrode 22 is connected is connected to the other end of the internal conductor 45. The insulation resistance with the land electrode 32 is measured. In measuring the insulation resistance, the insulation resistance was calculated as a ratio of voltage to current by measuring the current flowing by applying DC 15V between the land electrode 32 and the land electrode 33. The insulation resistance between the land electrode 22 and the internal conductor 45 was evaluated based on the insulation resistance.

  Since the insulation resistance of the IC chip 13 is small, only the solder paste was applied without mounting the IC chip 13 and the capacitor 14.

  The results are shown in Table 1 below.

  For comparison, electronic component modules of Comparative Examples 1 to 4 shown in Table 1 below in which the insulating material layer was not formed were prepared. The insulation resistance was similarly measured for the electronic component modules of Comparative Examples 1 to 4. The results are shown in Table 1 below.

  In Table 1 below, in Comparative Example 1, the insulation resistance between the land electrode 22 and the internal conductor 45 before the flux is applied and the insulation resistance between the land electrode 32 and the land electrode 33 are measured as described above. This value was used as a reference insulation resistance value. The insulation resistance between the land electrode 22 and the internal conductor 45 after applying the flux to the land electrode 24 and performing the high-temperature and high-humidity test, that is, the insulation resistance value measured as described above is the reference insulation. When the amount of decrease in log 10 (insulation resistance value) was 1 or more compared to the resistance value, the insulation resistance was considered to be deteriorated. Further, when the decrease in the insulation resistance was less than 1 for log 10 (insulation resistance value), the insulation resistance was not deteriorated.

  As is clear from Table 1, in Comparative Examples 2 to 4, since the insulating material layer was not provided, the insulation resistance deteriorated.

  In contrast, in each of Examples 1 to 8, the distance between the internal conductor 45 and the land electrode 22 was as small as 100 μm or less, but the insulation resistance was not deteriorated. However, in Example 6, the distance between the internal conductor 45 and the land electrode 22 was as short as 25 μm and the overcoat length of the insulating material layer 51 was as small as 50 μm. The amount of decrease in log 10 (insulation resistance value) was 3.

  Furthermore, in Example 6 and Example 7, although the distance between the internal conductor 45 and the land electrode 22 is as very small as 25 μm, the deterioration of the insulation resistance is 1 log 10 (insulation resistance value). It was less and was hardly recognized. Therefore, it can be seen that the ceramic multilayer substrate can be reduced in size and density while suppressing deterioration of the insulation resistance.

DESCRIPTION OF SYMBOLS 1 ... Ceramic multilayer substrate 1a-1c ... Ferrite board | substrate layer 2 ... Land electrode 2a-2d ... Side 3 ... Solder 4, 5 ... Insulating material layer 4a, 5a ... End part 6, 7 ... Internal conductor 11 ... Electronic component module DESCRIPTION OF SYMBOLS 12 ... Ceramic multilayer substrate 12a, 12c ... Nonmagnetic ferrite substrate layer 12b ... Magnetic ferrite substrate layer 12e ... Bottom surface 13 ... IC chip 13d ... Input voltage terminal 13e ... Ground terminal 13f ... Switching terminal 13g ... EN terminal 14 ... Capacitor 14a , 14b ... Electrode 15 ... Coil 16 ... Output terminal 17 ... Connection point 18 ... Ground terminal 21-26 ... Land electrode 21a, 21b ... End 22a, 22b ... End 24a ... End 31-34 ... Land electrode 41, 43 , 45, 48, 49 ... internal conductors 44, 46, 47 ... via hole electrodes 51, 52 ... insulation Insulating material layers 51a, 51b ... insulating material layers

Claims (7)

A multilayer substrate having a top surface and a bottom surface and having a substrate layer made of ferrite;
Land electrodes provided on the upper surface of the multilayer substrate;
An electronic component element mounted on the multilayer substrate so as to be electrically connected to the land electrode of the multilayer substrate;
Bonding the electrical component element and the land electrode, and a bonding agent made of solder;
An insulating property provided on the upper surface of the multilayer substrate and formed so as to enter a part of the upper surface of the land electrode from a region outside the land electrode beyond at least a part of the outer peripheral edge of the land electrode. An electronic component module comprising a material layer.   The electronic component module according to claim 1, wherein the insulating material layer is made of ferrite.   First and second internal conductors connected to a potential different from that of the land electrode are provided in the multilayer substrate, and a distance between the first internal conductor and the land electrode is set to the second electrode. The distance between the inner conductor and the land electrode is smaller than the distance between the land electrode and the first inner conductor side edge of the land electrode. Is longer than the length of the portion of the land electrode on the second inner conductor side where the insulating material layer extends beyond the edge and reaches the inside of the land electrode. The electronic component module according to claim 1, wherein the electronic component module is lengthened.   The electrical component module according to claim 1, wherein the upper surface of the multilayer substrate is an upper surface of a ferrite substrate layer.   5. The electronic component module according to claim 1, wherein the multilayer substrate includes a non-magnetic ferrite substrate layer and a magnetic ferrite substrate layer.   6. The electronic component module according to claim 5, wherein the multilayer substrate includes a magnetic ferrite substrate layer and nonmagnetic ferrite substrate layers laminated on and under the magnetic ferrite substrate layer. 7.   The electronic component module according to claim 1, wherein a coil conductor is provided in the multilayer substrate.

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