JP2011243678A - Interposer and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an interposer which is easily manufactured and has a wiring pattern on both sides.SOLUTION: The interposer 10 includes a first wiring substrate 20 and a second wiring substrate 30. The first and second substrates 20 and 30 respectively include wiring patterns 22 and 32 formed on one surface, through vias 25 and 35 which are electrically connected with the wiring patterns 22 and 32, and electrodes 26 and 36 which are electrically connected with the through vias 25 and 35 and provided on a surface opposite to the surface in which the wiring patterns 22 and 32 are formed. The surface of the first wiring substrate 20 in which the electrode 26 is provided faces the surface of the second wiring substrate 30 in which the electrode 36 is provided. The electrode 26 of the first wiring substrate 20 is electrically connected with the electrode 36 of the second wiring substrate 30.

Description

  The present invention relates to an interposer having wiring patterns formed on both sides, and a method for manufacturing the interposer.

  For example, a technique has been proposed in which an interposer is interposed between an electronic component such as an IC chip and a printed board (mounting board) to join the electronic component and the printed board. Japanese translations of PCT publication No. 2003-503855 (hereinafter referred to as Patent Document 1) discloses an interposer in which a wiring layer is provided only on one surface. A solder ball as an external terminal is provided on the other surface of the interposer, and the wiring layer and the solder ball are electrically connected by a through via.

  Japanese Patent Laying-Open No. 2006-173251 (hereinafter referred to as Patent Document 2) discloses a wiring board (interposer) having electric circuits formed on both sides. The wiring board is formed with through vias that electrically connect the electric circuits on both sides to each other. In order to realize a complicated and high-density wiring pattern, it is preferable that the wiring pattern is formed on both surfaces of the interposer.

Special table 2003-503855 gazette JP 2006-173251 A

  The through via is formed by forming a through hole in the interposer by etching, for example, and filling the through hole with a conductor. When the thickness of the interposer is large, there is a problem that it is difficult to form a through hole. There is also a problem that it is difficult to fill the inside of the deep through hole with a conductor. Thus, it is preferable that the interposer is thin to some extent for forming the through via. However, with a thin interposer, the mechanical strength of the interposer decreases, and it becomes difficult to form a wiring pattern on both sides of the interposer.

  Further, when the wiring pattern is provided only on one surface of the interposer, the interposer is warped due to a difference in thermal expansion coefficient between the wiring pattern and the interposer. The warp of the interposer increases as the interposer becomes thinner. In order to suppress warping of the interposer, it is conceivable to increase the thickness of the interposer sufficiently. However, as described above, it is difficult to form a through via in a thick interposer.

  Thus, it is difficult to manufacture an interposer having wiring patterns formed on both sides. Therefore, an improved interposer in which a wiring pattern is formed on both sides and a manufacturing method thereof are desired.

  The interposer in one aspect includes a first wiring board and a second wiring board. The first wiring board is electrically connected to the first wiring pattern formed on the one surface, the first through via electrically connected to the first wiring pattern, and the first through via. And a first electrode provided on a surface opposite to the surface on which the first wiring pattern is formed. The second wiring board is electrically connected to the second wiring pattern formed on one surface, the second through via electrically connected to the second wiring pattern, and the second through via. And a second electrode provided on a surface opposite to the surface on which the second wiring pattern is formed. The surface of the first wiring board on which the first electrode is provided faces the surface of the second wiring board on which the second electrode is provided. The first electrode and the second electrode are electrically connected to each other.

  In the method of manufacturing an interposer in one aspect, first, a first wiring board and a second wiring board are prepared. The first wiring board includes a first wiring pattern formed on one surface, a first through via electrically connected to the first wiring pattern, and electrically connected to the first through via. A first electrode is provided on a surface that is connected and opposite to the surface on which the first wiring pattern is formed. The second wiring board has a second wiring pattern formed on one surface, a second through via electrically connected to the second wiring pattern, and an electrical connection to the second through via. The second electrode is provided on the surface opposite to the surface on which the second wiring pattern is formed. Then, the surface of the first wiring board on which the first electrode is provided is opposed to the surface of the second wiring board on which the second electrode is provided, so that the first electrode and the second electrode Are electrically connected to each other.

  The above interposer can be manufactured by bonding two wiring boards each having a wiring pattern formed on one surface. Thereby, since it is not necessary to form a wiring pattern on both surfaces of a single board | substrate, an interposer can be manufactured easily.

It is process drawing which shows the manufacturing method of the interposer in 1st Embodiment. It is a figure which shows a part of process which shows the manufacturing method of the wiring board which comprises the interposer shown in FIG. It is a figure which shows the process performed following the process of FIG. It is a schematic sectional drawing of the interposer with which the electronic component was mounted. It is a schematic sectional drawing of the interposer with which the semiconductor chip was mounted. It is a schematic sectional drawing which shows another example of the interposer in 1st Embodiment. It is process drawing which shows the manufacturing method of the interposer in 2nd Embodiment. It is process drawing which shows the manufacturing method of the interposer in 3rd Embodiment.

  Embodiments of the present invention will be described below with reference to the drawings. Fig.1 (a)-FIG.1 (c) have shown the manufacturing method of the interposer in 1st Embodiment, FIG.1 (c) has shown schematic sectional drawing of the interposer.

  The interposer 10 includes a first wiring board 20 and a second wiring board 30. Each wiring board 20, 30 has insulating base materials 21, 31 and wiring patterns 22, 32 disposed on the insulating base materials 21, 31. For example, silicon can be used as the material of the insulating base materials 21 and 31. As will be described later, the thickness of each of the wiring boards 20 and 30 is preferably about 10 μm to 50 μm.

  A wiring pattern (first wiring pattern) 22 is provided on one surface of the first wiring board 20. An internal electrode (first electrode) 26 is provided on the other surface of the first wiring substrate 20, that is, the surface opposite to the surface on which the wiring pattern 22 is formed. The wiring pattern 22 and the internal electrode 26 are electrically connected to each other by through vias (first through vias) 25 formed in the first wiring board 20.

  A wiring pattern (second wiring pattern) 32 is formed on one surface of the second wiring board 30. An internal electrode (second electrode) 36 is provided on the other surface of the second wiring substrate 30, that is, the surface opposite to the surface on which the wiring pattern 32 is formed. The wiring pattern 32 and the internal electrode 36 are electrically connected to each other by a through via (second through via) 35 formed in the second wiring substrate 30.

  One surface of the first wiring board 20 on which the internal electrode 26 is provided faces the one surface of the second wiring board 30 on which the internal electrode 36 is provided. The internal electrode 26 of the first wiring board 20 and the second internal electrode 26 of the second wiring board 30 are electrically connected to each other by, for example, solder.

  The wiring pattern 22 of the first wiring board 20 and the wiring pattern 32 of the second wiring board 30 are directed outward. That is, the wiring patterns 22 and 32 are disposed on both surfaces of the interposer 10. Therefore, the interposer 10 enables high-density wiring and can be suitably used for a package substrate that requires high-density mounting.

  In order to improve the bonding reliability between the first wiring board 20 and the second wiring board 30, an under bonding as an insulating adhesive member is provided between the first wiring board 20 and the second wiring board 30. A fill 12 is preferably provided.

  External electrodes 27 and 37 are provided on the surfaces of the first and second wiring boards 20 and 30 on which the wiring patterns 22 and 32 are formed. The external electrode 27 of the first wiring board 20 is provided with an external terminal 14 made of, for example, a solder ball. The external terminal 14 is used for connection with a printed circuit board (mounting mother board). The external electrode 37 of the second wiring board 30 is used for mounting an electronic component such as a semiconductor chip.

  Next, the manufacturing method of said interposer 10 is demonstrated. First, the first and second wiring boards 20 and 30 are prepared. Below, an example of the method of manufacturing the wiring boards 20 and 30 is demonstrated with reference to FIG. 2 and FIG. 2 and 3 specifically show the production of the first wiring board 20, the second wiring board 30 can be produced in the same manner.

  Fig.2 (a) has shown schematic sectional drawing of the insulating base material 21 before a process. The insulating base material 21 is made of silicon, for example. The insulating base material 21 is preferably prepared using a wafer (not shown) in which a plurality of product formation regions, which are product regions, are partitioned.

  First, at least one wiring pattern 22 is formed on the insulating base 21 by using a metal film 23 such as aluminum or copper and an insulating film 24 such as a silicon oxide film or a silicon nitride film. The wiring pattern 22 is formed by an arbitrary method used for forming a wiring such as an LSI. In this way, the wiring board 20 having the wiring pattern 22 formed on one surface is obtained. FIG. 2B shows a schematic cross-sectional view of the insulating base material 21 on which the one-layer wiring pattern 22 is formed. Thereafter, an external electrode 27 electrically connected to the metal film 23 in the wiring pattern 22 is attached (see FIG. 2C).

  Next, the surface of the wiring substrate 20 on which the wiring pattern 22 is formed is attached to the support 40 with an adhesive. The support 40 is made of glass, for example. FIG. 2D shows a state immediately before the wiring board 20 is attached to the support body 40, and FIG. 2E shows a state immediately after the wiring board 20 is attached to the support body 40.

  After the wiring substrate 20 is attached to the support 40, the surface of the wiring substrate 20 opposite to the surface on which the wiring pattern 22 is formed is ground to adjust the thickness of the wiring substrate 20 (FIG. 2F). reference.). The thinner the wiring substrate 20 is, the shorter the time for forming the hole in a later process, which is convenient. However, if the wiring board 20 is too thin, the strength of the wiring board 20 is reduced, and the possibility of breakage when the interposer is assembled increases. Therefore, the thickness of the wiring board 20 is preferably about 10 μm or more and 50 μm or less.

  Next, a hole 42 is formed in the wiring board 20 (see FIG. 3A). Specifically, a mask pattern (not shown) for dry etching is formed with a resist or the like on the surface of the wiring substrate 20 where the wiring pattern 22 is not formed, and the hole 42 is formed in the wiring substrate 20 by etching. Form. The hole 42 reaches the metal film 23 through the insulating base material 21 and the insulating film 24 of the wiring pattern 22. After the formation of the hole 42, the above mask pattern is removed.

  Next, an insulating film 44 such as a silicon oxide film or a silicon nitride film is deposited on the side wall of the hole 42 by, for example, CVD (Chemical Vapor Deposition) (see FIG. 3B). Next, a seed film 46 is formed on the side wall of the hole 42 by sputtering (see FIG. 3C). As the seed film 46, for example, Ti / Cu can be used.

  Thereafter, a plating resist 48 in which only the hole 42 is opened is formed on the wiring board 20, and a conductor (for example, Cu) to be the through via 25 is filled into the hole 42 by electroplating. After the through via 25 is formed, the internal electrode 26 is formed on the surface of the through via 25. The internal electrode 26 is made, for example, by applying a solder such as Sn—Ag by about 2 to 3 μm by electroplating (see FIG. 3D). Next, the resist 48 is removed, and the seed film 46 is removed by wet etching (see FIG. 3E). Thereafter, the wiring board 20 is peeled from the support body 40 (see FIG. 3F).

  When the above-described series of steps is performed in the state of a wafer having a plurality of product formation regions, a step of cutting and separating the wafer is performed for each product formation region. In this way, the wiring pattern 22 formed on one surface, the through via 25 electrically connected to the wiring pattern 22, and the surface electrically connected to the through via 25 and formed with the wiring pattern 22 The wiring board 20 having the internal electrode 26 provided on the opposite surface can be manufactured.

  As described above, the first wiring board 20 and the second wiring board 30 are prepared. Next, the surface of the first wiring substrate 20 on which the internal electrode 26 is provided and the surface of the second wiring substrate 30 on which the internal electrode 36 is provided are opposed to each other, so that the inside of the first wiring substrate 20 is The electrode 26 and the internal electrode 36 of the second wiring board 30 are electrically connected to each other (see FIGS. 1A and 1B). In this way, the wiring patterns 22 and 32 of the two wiring boards 20 and 30 are arranged outward.

  Next, as shown in FIG. 1C, between the surface of the first wiring board 20 on which the internal electrode 26 is provided and the surface of the second wiring board 30 on which the internal electrode 36 is provided. It is preferable to fill an underfill 12 as an insulating adhesive member in the gap. Thereby, the connection reliability between the 1st wiring board 20 and the 2nd wiring board 30 can be improved. Instead, the underfill 12 may be applied to one of the wiring boards before the first wiring board 20 and the second wiring board 30 are bonded.

  Next, the external terminal 14 is mounted on the external electrode 27 of the first wiring board 20 (see FIG. 1C). For example, a solder ball can be used as the external terminal 14.

  The interposer 10 can be used as a package substrate on which an electronic component such as a semiconductor chip is mounted and connected to a printed circuit board (mounting mother board). In this case, the external terminals 14 provided on the first wiring board 20 are connected to the printed board. An electronic component is connected to the external electrode 37 provided on the second wiring board 30.

  As described above, it is difficult to form wiring patterns on both surfaces of a single substrate, and the yield may be reduced. On the other hand, in this embodiment, the interposer 10 having the wiring patterns 22 and 32 on both surfaces can be easily manufactured by bonding the two wiring boards 20 and 30 having the wiring patterns on one surface to each other. . Moreover, since each wiring board 20 and 30 may be thin, formation of the through vias 25 and 35 is easy.

  The wiring pattern 22 of the first wiring board 20 and the wiring pattern 32 of the second wiring board 30 are directed oppositely, and the material configuration of the interposer is symmetric. Therefore, the warp direction of the first wiring board 20 and the warp direction of the second wiring board 30 are reversed. Therefore, one wiring board suppresses the warping of the other wiring board, and the warping of the entire interposer 10 is suppressed. Even if each wiring board 20 and 30 is thin, there is an advantage that the warp of the interposer 10 is reduced.

  The metal film 23 and the insulating film 24 constituting the wiring patterns 22 and 32 may be made of any material. For example, copper may be used for the metal layer 23 and an organic resin such as polyimide may be used for the insulating layer 24. The insulating layer 24 may be an organic resin having a larger coefficient of thermal expansion than the insulating base materials 21 and 31. In this case, the end portions of the first and second wiring boards 22 and 32 tend to bend in a direction in which they are pressed against each other due to heat. Therefore, the effect of reducing warpage is further improved as compared with an interposer having a wiring pattern only on one side.

  However, when an inorganic material is used as the insulating film 24, there is an advantage that the wiring density can be improved as compared with the case where an organic material is used. The materials of the wiring patterns 22 and 32 and the insulating base materials 21 and 31 may be appropriately selected according to desired characteristics of the interposer.

  As shown in FIG. 4, the interposer 10 can also be used as a SIP component. In this case, passive components such as resistors, coils and capacitors, and electronic components 50 such as semiconductor chips are mounted on the second wiring board 30. Specifically, the external terminal 52 of the electronic component 50 is connected to the external electrode 37 of the second wiring board 30.

  FIG. 5 shows the interposer 10 on which three semiconductor chips 90a to 90d are mounted. Specifically, the semiconductor chips 90a to 90d as electronic components include a circuit pattern 92 formed on one surface, a through via 95 electrically connected to the circuit pattern 92, and the through via 95 electrically. And an electrode 96 provided on a surface opposite to the surface on which the circuit pattern 92 is formed. An external electrode 37 is provided on the surface of the second wiring board 30 on which the wiring pattern 32 is formed, and the external electrode 37 and the electrode 96 of the semiconductor chip 90a are electrically connected to each other. Note that any number of semiconductor chips may be mounted on the interposer 10.

  In the interposer 10 shown in FIG. 1, the same number of through vias 25 and 35 are arranged in the first wiring board 20 and the second wiring board 30. However, as shown in FIG. 6, the number of through vias 25b and 35b formed in the first wiring board 20b and the second wiring board 30b may be different.

  An interposer requires electrodes arranged at high density on a surface on which electronic components are mounted, and there are often fewer electrodes connected to a mounting mother board such as a printed circuit board. In such a case, the number of through vias 25b of the first wiring board 20b connected to a printed circuit board or the like may be smaller than the number of through vias 35b of the second wiring board 30b. In this case, only the internal electrodes 26b and 36b that need to be connected to each other need be joined.

  Hereinafter, the manufacturing method of the interposer in 2nd Embodiment is demonstrated. FIG. 7 shows a method of manufacturing an interposer by a WoW (Wafer on Wafer) method. As shown in FIG. 7A, a first wafer 70 in which a plurality of first wiring substrates 20 as product forming regions are partitioned and a plurality of second wiring substrates 30 as product forming regions are partitioned. A second wafer 72 is prepared. Each wafer 70, 72 is formed with a dicing line 74 that divides each product formation region.

  The wiring boards 20 and 30 formed on the wafers 70 and 72 have the same configuration as the wiring board described with reference to FIG. That is, each of the wafers 70 and 72 includes the insulating base materials 21 and 31, the wiring patterns 22 and 32 formed on one surface of the insulating base materials 21 and 31, and the through via 25 penetrating the insulating base materials 21 and 31. , 35. External electrodes 27 and 37 are provided on the surfaces of the wafers 70 and 72 where the wiring patterns 22 and 32 are formed. Internal electrodes 26 and 36 are provided on the surface of each of the wafers 70 and 72 opposite to the surface on which the wiring patterns 22 and 32 are formed.

  Next, as shown in FIG. 7B, an underfill 12 as an insulating adhesive member is applied to the surface of one wafer, for example, the first wafer 70, on which the wiring pattern 22 is not formed. The underfill can be formed with a uniform thickness by spin coating.

  Next, as shown in FIG. 7C, the first wafer 70 and the second wafer 72 are bonded. At this time, the wiring patterns 22 and 32 of the wafers 70 and 72 are directed outward. Specifically, the internal electrode (bump electrode) 26 formed on the through via 25 of the first wafer 70 and the internal electrode 36 formed on the through via 35 of the second wafer 72 are thermocompression bonded. Join by etc. Thereby, the first wafer 70 and the second wafer 72 are electrically connected to each other. The underfill 12 can bond the first wafer 70 and the second wafer 72 and can protect the internal electrodes 26 and 36 of the wafers 70 and 72.

  Thereafter, the individual interposers 10 can be manufactured by cutting and separating the wafers 70 and 72 along the dicing line 74. By manufacturing the interposer 10 collectively using the WoW method as in the present embodiment, the manufacturing efficiency of the interposer 10 can be improved. Further, by performing each manufacturing process in the state of a wafer, it is possible to efficiently carry out processes such as conveyance and bonding during the manufacturing process.

  Further, since stress is generated in the first wafer 70 and the second wafer 72 in directions opposite to each other due to heat, there is an advantage that warpage of the entire interposer 10 is reduced.

  Next, an interposer manufacturing method according to the third embodiment will be described. FIG. 8 shows how an interposer is manufactured by a CoW (Chip on Wafer) method. First, as shown in FIG. 8A, a wafer 70 in which a plurality of first wiring substrates 20 as product forming regions are partitioned, and a plurality of second wiring substrates 30 separated for each product forming region, prepare. The first wiring board 20 and the second wiring board 30 have the same configuration as that described in the first embodiment and the second embodiment. A dicing line 74 that divides each product formation region is formed on the wafer 70.

  Next, as shown in FIG. 8B, the second wiring board 30 is bonded to the surface of the wafer 70 opposite to the surface on which the wiring pattern 22 is formed. Specifically, the second wiring board 30 is flip-chip bonded to the wafer 70. As a result, the internal electrode 26 formed on the through via 25 of the wafer 70 and the internal electrode 36 provided on the through via 35 of the second wiring substrate 30 are electrically connected to each other by thermocompression bonding or the like. The

  In the present embodiment, it is possible to prevent the second wiring substrate 30 from being mounted in a defective product formation region among the plurality of first wiring substrates (product formation regions) 20 constituting the wafer 70. Thereby, the material which becomes useless can be reduced.

  Next, as shown in FIG. 8C, the gap between the wafer 70 and the second wiring substrate 30 is filled with an underfill 12 as an insulating adhesive member. The underfill 12 is supplied to the surface of the wafer 70 by a dispenser (not shown), for example. The underfill 12 supplied to the surface of the wafer 70 is filled in a gap between the wafer 70 and the second wiring substrate 30 by capillary action. The underfill 70 can bond the wiring boards 20 and 30 together and can protect the internal electrodes 26 and 36 provided on the wiring boards 20 and 30. Alternatively, the wafer 70 and the second wiring board 30 may be bonded after the underfill 12 is applied to the wafer 70.

  After bonding the second wiring board 30 to the wafer 70, the wafer 70 can be cut along the dicing line 74 to obtain individual interposers 10.

  As in the second embodiment and the third embodiment, at least one of the first wiring substrate 20 and the second wiring substrate 30 is divided into a plurality of product formation regions that are regions to be products. You may prepare using a wafer. In this case, it is preferable to finally perform a step of cutting and separating the wafer into individual product formation regions. Thereby, manufacturing efficiency can be improved.

  As mentioned above, although the invention made | formed by this inventor was demonstrated based on the Example, this invention is not limited to the said Example, It cannot be overemphasized that it can change variously in the range which does not deviate from the summary.

DESCRIPTION OF SYMBOLS 10 Interposer 12 Underfill 14 External terminal 20 1st wiring board 21 Insulating base material 22 1st wiring pattern 23 Metal film 24 Insulating film 25 1st penetration via 26 Internal electrode (1st electrode)
27 External electrode 30 Second wiring substrate 31 Insulating base material 32 Second wiring pattern 35 Second through via 36 Internal electrode (second electrode)
37 external electrode 40 support 42 hole 44 insulating film 46 seed film 48 plating resist 50 electronic component 52 external terminal

Claims (5)

A first wiring pattern formed on one surface; a first through via electrically connected to the first wiring pattern; and the first through via electrically connected to the first through via; A first wiring board having a first electrode provided on a surface opposite to the surface on which the wiring pattern is formed;
A second wiring pattern formed on one surface; a second through via electrically connected to the second wiring pattern; and the second through via electrically connected to the second through via, A second wiring board having a second electrode provided on the surface opposite to the surface on which the wiring pattern is formed,
The surface of the first wiring board on which the first electrode is provided and the surface of the second wiring board on which the second electrode is provided are opposed to each other, and the first electrode and the An interposer in which the second electrode is electrically connected to each other.   The interposer according to claim 1, wherein an insulating adhesive member is provided in a gap between the first wiring board and the second wiring board. A first wiring pattern formed on one surface; a first through via electrically connected to the first wiring pattern; and the first through via electrically connected to the first through via; A first wiring board having a first electrode provided on a surface opposite to the surface on which the wiring pattern is formed; a second wiring pattern formed on one surface; the second wiring pattern; A second through-via that is electrically connected, and a second electrode that is electrically connected to the second through-via and provided on a surface opposite to the surface on which the second wiring pattern is formed A step of preparing a second wiring board having:
The surface of the first wiring board on which the first electrode is provided and the surface of the second wiring board on which the second electrode is provided are opposed to each other, and the first electrode and the And a step of electrically connecting the second electrodes to each other. Preparing at least one of the first wiring board and the second wiring board by using a wafer in which a plurality of product formation regions which are regions to be products are partitioned;
The method of manufacturing an interposer according to claim 3, further comprising a step of cutting and separating the wafer into individual product formation regions.   An insulating adhesive member is filled between the surface of the first wiring board on which the first electrode is provided and the surface of the second wiring board on which the second electrode is provided. The method for producing an interposer according to claim 3 or 4, further comprising a step of:

Images