JP2011223390A - Attenuator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an attenuator that can improve the frequency dependence of attenuation.SOLUTION: An attenuator 10 includes field-effect transistors (FET) 11 to 13, inductors 14 and 15, a resistance 16, an input terminal 17, and an output terminal 18. A drain electrode of the FET 11, a drain electrode of the FET 12, and one end of the inductor 14 are connected to the input terminal 17, and a source electrode of the FET 11, a drain electrode of the FET 13, and one end of the inductor 15 are connected to the output terminal 18. The inductor 14, the resistance 16, and the inductor 15 are connected in series between the drain electrode and source electrode of the FET 11.

Description

  The present invention relates to an attenuator used in, for example, a radio communication apparatus and a measurement apparatus that handle a frequency signal in a microwave band or a millimeter wave band.

  Conventionally, an attenuator in which a field effect transistor (hereinafter referred to as “FET”) is connected in a π-type or a T-type is known as this type of attenuator (see, for example, Patent Documents 1 to 3). For example, the attenuator constituted by the FET is obtained by replacing the resistors 31 to 33 of the fixed attenuator 30 having the π-type configuration as shown in FIG. 4A with an FET or a combination of an FET and a resistor. It is.

  4B to 4D show circuit examples of a π-type attenuator using FETs. FIG. 4B shows a case where the resistors 31 to 33 are replaced with FETs 34 to 36, respectively. FIG. 4C shows a configuration in which a resistor 37 is connected between the source electrode and the drain electrode of the FET 34 in addition to the configuration of FIG. FIG. 4D shows a configuration in which resistors 38 and 39 are connected between the source or drain electrode of the FETs 35 and 36 and the ground, in addition to the configuration of FIG. 4C.

Incidentally, in the FET, the impedance between the source electrode and the drain electrode changes depending on the voltage applied to the gate electrode. For example, in an FET operating in the D (Depletion) mode, as shown in FIG. 5A, when the gate voltage Vc = 0 [V], the FET is turned on and is in a resistive low impedance state. An on-state FET can be equivalently expressed by a low resistance _RON . Further, when the gate voltage Vc is equal to or lower than the pinch-off voltage Vp (Vc ≦ Vp), the FET is turned off and a capacitive high impedance state is obtained. An off-state FET can be equivalently expressed by a circuit in which a high resistance R _OFF and a parasitic capacitance C _OFF are connected in parallel.

  Therefore, in FIGS. 4B to 4D, when the gate voltage Vc2 = 0 [V] is applied to the FET 34 and the gate voltage Vc1 <Vp [V] is applied to the FETs 35 and 36, the attenuator in the low attenuation state is applied. It becomes. Further, when a gate voltage Vc1 = 0 [V] is applied to the FETs 35 and 36 and a gate voltage Vc2 <Vp [V] is applied to the FET 34, the attenuator is in a high attenuation state.

  Specifically, for example, the conventional attenuator shown in FIG. 4B is represented by an equivalent circuit shown in FIGS. 5B and 5C in a low attenuation state and a high attenuation state, respectively.

That is, as shown in FIG. 5B, in the equivalent circuit in the low attenuation state, the FET 34 is a resistor R34 _ON , the FET 35 is a parallel circuit of a resistor R35 _OFF and a parasitic capacitance C35 _OFF, and the FET 36 is a parasitic resistor R36 _OFF. Each is replaced with a parallel circuit with the capacitor C36 _OFF .

Further, as shown in FIG. 5C, in the equivalent circuit in the high attenuation state, the FET 34 is a parallel circuit of a resistor R34 _OFF and a parasitic capacitance C34 _OFF , the FET 35 is a resistor R35 _ON , the FET 36 is a resistor R36 _ON , Each is replaced.

  As a result, as shown in FIG. 6, the conventional attenuator has a frequency characteristic of the pass characteristic (S21) in the low attenuation state and the high attenuation state, a pass characteristic (S21) in the low attenuation state, and a pass characteristic in the high attenuation state. It has a frequency characteristic of attenuation which is a difference from (S21). The characteristics shown in FIG. 6 are the same as those shown in FIG. 4C. The FETs 35 and 36 use FETs having the same structure, and the FET 34 has a gate electrode width four times the gate electrode width of the FETs 35 and 36. The resistance 37 is set to 30 [Ω].

Japanese Patent No. 3362931 JP-A-9-135102 Japanese Patent Laid-Open No. 10-41774

However, as shown in FIG. 6, in the conventional attenuator, as the frequency becomes higher, the parasitic capacitance _C34 for impedance of the parallel circuit consisting of the parasitic capacitance _{C34 OFF} and the resistor _{R34 OFF} under the influence of _OFF is low attenuation There was a problem that the amount decreased. That is, the conventional attenuator has a problem that the amount of attenuation depends on the frequency.

  The present invention has been made to solve the conventional problems, and an object of the present invention is to provide an attenuator that can improve the frequency dependency of the attenuation.

  The attenuator of the present invention includes first, second, and third field effect transistors, and one of the drain electrode and the source electrode of the second field effect transistor and the drain of the third field effect transistor. One of an electrode and a source electrode is connected to the drain electrode and the source electrode of the first field effect transistor, respectively, and the other of the drain electrode and the source electrode of the second field effect transistor; In the attenuator in which one of the drain electrode and the source electrode of the third field effect transistor is grounded, an element having an inductance component between the drain electrode and the source electrode of the first field effect transistor Are connected.

  With this configuration, in the attenuator of the present invention, since an element having an inductance component is connected between the drain electrode and the source electrode of the first field effect transistor, the parasitic capacitance of the first field effect transistor is reduced. , Elements having inductance components are connected in parallel. As a result, the attenuator of the present invention increases the impedance of the element having the inductance component even if the impedance of the parasitic capacitance of the first field effect transistor decreases as the frequency increases. Changes can be compensated. Therefore, the attenuator of the present invention can improve the frequency dependence of the attenuation.

  In the attenuator of the present invention, the element having the inductance component, the resistor, and the element having the inductance component are sequentially connected in series between the drain electrode and the source electrode of the first field effect transistor. It has the structure which was made.

  With this configuration, the attenuator of the present invention can determine the amount of attenuation by the impedance and resistance between the drain electrode and the source electrode of the first field effect transistor.

  In addition, this configuration is preferable because the attenuator of the present invention can match input / output impedances because the circuit is symmetrical with respect to input / output.

  Furthermore, the attenuator of the present invention may be one in which the element having the inductance component is formed of a transmission line.

  With this configuration, since the attenuator of the present invention can form an element having an inductance component by a transmission line formed on a dielectric substrate, the frequency dependence of the attenuation amount can be achieved with an easy structure and low cost. Can improve sex.

  The present invention can provide an attenuator having an effect of improving the frequency dependency of attenuation.

The figure which shows the structure in one Embodiment of the attenuator which concerns on this invention, and the equivalent circuit in a low attenuation | damping state and a high attenuation | damping state The figure which shows the passage characteristic and attenuation amount in one Embodiment of the attenuator which concerns on this invention The figure which shows the structure in the other aspect of the attenuator which concerns on this invention. Diagram showing the configuration of a conventional attenuator The figure which shows the equivalent circuit of the low attenuation state and the high attenuation state of the conventional attenuator The figure which shows the passage characteristic and the amount of attenuation of the conventional attenuator

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  First, the configuration of an embodiment of an attenuator according to the present invention will be described.

  As shown in FIG. 1A, the attenuator 10 in this embodiment includes FETs 11 to 13, inductors 14 and 15, a resistor 16, an input terminal 17, and an output terminal 18, and is formed on, for example, a dielectric substrate. The

  The input terminal 17 is connected to the drain electrode of the FET 11, the drain electrode of the FET 12, and one end of the inductor 14, and the source electrode of the FET 12 is grounded. The output terminal 18 is connected to the source electrode of the FET 11, the drain electrode of the FET 13, and one end of the inductor 15, and the source electrode of the FET 13 is grounded. Note that the drain electrode and the source electrode of the FETs 11 to 13 may be replaced with those shown in FIG.

  Further, two inductors 14 and 15 and a resistor 16 connected to the other end of the inductor 14 and the other end of the inductor 15 are provided between the drain electrode and the source electrode of the FET 11. The inductor 14, the resistor 16, and the inductor 15 are connected in series from the input terminal 17 to the output terminal 18, and this configuration is hereinafter referred to as “inductors 14, 15 and resistor 16”. I write.

  In the above configuration, the FETs 11, 12, and 13 respectively constitute the first, second, and third FETs according to the present invention. The inductors 14 and 15 constitute an element having an inductance component according to the present invention.

Each of the FETs 11 to 13 is composed of, for example, an FET that operates in the D mode, and the impedance between the source electrode and the drain electrode changes depending on the gate voltage applied to the gate electrode. Specifically, FET11～13 are respectively turned on when the gate voltage Vc = 0 [V], the FET in the ON state and is capable of replacing the equivalently low resistance _{R ON.} Each of the FETs 11 to 13 is turned off when the gate voltage Vc is equal to or lower than the pinch-off voltage Vp [V], and each FET in the off state is equivalently a circuit in which a high resistance R _OFF and a parasitic capacitance C _OFF are connected in parallel. It can be replaced with.

Here, the low resistance R _ON , the high resistance R _OFF , and the parasitic capacitance C _OFF are values determined according to the structure of each FET, for example, the width of the gate electrode of each FET. As the gate electrode width of each FET increases, the low resistance R _ON and the high resistance R _OFF decrease, and the parasitic capacitance C _OFF increases. Therefore, it is preferable to predetermine the width of the gate electrode of each FET so that the values of the low resistance R _ON , the high resistance R _OFF , and the parasitic capacitance C _OFF become desired values at the operating frequency.

  The inductors 14 and 15 are, for example, an air-core inductor in which a conductor such as a copper wire is spirally wound, an inductor formed of a transmission line, or a thin film conductor pattern on a dielectric substrate having a square or round shape. It consists of a thin film spiral inductor formed in a spiral shape. In particular, when the attenuator 10 is used at a quasi-millimeter wave band or a millimeter-wave band frequency, the inductors 14 and 15 can be replaced with a transmission line such as a microstrip line or a coplanar line.

  Next, an equivalent circuit of the attenuator 10 is shown in FIGS.

  FIG. 1B shows an equivalent circuit when the gate voltage Vc4 = 0 [V] is applied to the FET 11 and the gate voltage Vc3 <Vp [V] is applied to the FETs 12 and 13, respectively. That is, FIG. 1B shows an equivalent circuit in the low attenuation state of the attenuator 10 with the FET 11 in the on state and the FETs 12 and 13 in the off state.

As shown in FIG. 1B, an equivalent circuit in the low attenuation state of the attenuator 10 includes a resistor R11 _{ON in} which the FET 11 is replaced, a parallel circuit of a resistor R12 _OFF and a parasitic capacitance C12 _OFF in which the FET 12 is replaced, A parallel circuit of a resistor R13 _OFF and a parasitic capacitance C13 _OFF in which the FET 13 is replaced, and inductors 14 and 15 and a resistor 16 connected to both ends of the resistor R11 _ON .

  FIG. 1C shows an equivalent circuit when the gate voltage Vc4 <Vp [V] is applied to the FET 11 and the gate voltage Vc3 = 0 [V] is applied to the FETs 12 and 13, respectively. That is, FIG. 1C shows an equivalent circuit in the high attenuation state of the attenuator 10 with the FET 11 in the off state and the FETs 12 and 13 in the on state.

As shown in FIG. 1C, the equivalent circuit in the high attenuation state of the attenuator 10 includes a parallel circuit of a resistor R11 _OFF and a parasitic capacitance C11 _OFF in which the FET 11 is replaced, a resistor R12 _{ON in} which the FET 12 is replaced, The resistor 13 is replaced by a resistor R13 _ON, and inductors 14 and 15 and a resistor 16 connected to both ends of a parallel circuit of the resistor R11 _OFF and the parasitic capacitance C11 _OFF .

  Next, operation | movement of the attenuator 10 in this embodiment is demonstrated using Fig.1 (a)-(c). In the following description, a parallel circuit of the FET 11, the inductors 14 and 15 and the resistor 16 is referred to as “series element side”, and the FETs 12 and 13 are referred to as “parallel element side”.

  First, when the gate voltage Vc4 = 0 [V] is applied to the FET 11 and the gate voltage Vc3 <Vp [V] is applied to the FETs 12 and 13, respectively, the FET 11 is turned on and the FETs 12 and 13 are turned off. Low attenuation state.

In the attenuator 10 in the low attenuation state, on the series element side, the impedance of the inductors 14 and 15 increases as the frequency increases, but the resistor R11 _ON has a low resistance, and the inductors 14, 15 and the resistor 16 are connected in series. If the value is sufficiently smaller than the impedance of the circuit, the influence on the impedance of the entire series element is small. On the other hand, on the parallel element side, as the frequency increases, the impedance decreases due to parasitic capacitances C12 _OFF and C13 _OFF .

  Next, when the gate voltage Vc4 <Vp [V] is applied to the FET 11 and the gate voltage Vc3 = 0 [V] is applied to the FETs 12 and 13, respectively, the FET 11 is turned off and the FETs 12 and 13 are turned on. Becomes a high attenuation state.

In the attenuator 10 in the high attenuation state, on the series element side, the impedance of the parasitic capacitance C11 _OFF of the FET 11 decreases as the frequency increases, but the impedances of the inductors 14 and 15 increase. On the other hand, on the parallel element side, the resistance R12 _ON and the resistance R13 _ON are low resistance, so the influence of the parasitic capacitances of the FETs 12 and 13 is small.

Therefore, by appropriately setting the inductances of the inductors 14 and 15 such that the impedance change of the parasitic capacitance C11 _OFF is canceled by a desired value based on the result of simulation or experiment, for example, The frequency characteristic of the impedance of the entire series element side can be changed to a desired characteristic, and the attenuation amount of the attenuator 10 can be a constant value independent of the frequency.

  Next, based on FIG. 2, the simulation result regarding the characteristic of the attenuator 10 in this embodiment is demonstrated.

  FIG. 2 shows the frequency characteristic of the pass characteristic (S21) in the low attenuation state and the high attenuation state of the attenuator 10, and the frequency characteristic of the attenuation amount. Here, S21 refers to an S parameter indicating a pass characteristic in a scattering matrix. The attenuation amount means a difference between the low attenuation state pass characteristic (S21) and the high attenuation state pass characteristic (S21).

  The characteristics shown in FIG. 2 are obtained when the FET structure is the same as the conventional one having the characteristics shown in FIG. That is, FETs 12 and 13 are FETs having the same structure, and FET 11 having a gate electrode whose width is four times the width of the gate electrodes of FETs 12 and 13 is used. The inductances of the inductors 14 and 15 are 0.035 [nH] and the resistance 16 is 30 [Ω].

As shown in FIG. 2, the pass characteristic (S21) in the low attenuation state in the present embodiment is a frequency characteristic substantially equivalent to the conventional characteristic (see FIG. 6). This is because the impedance of the inductors 14 and 15 increases as the frequency increases on the series element side in this embodiment, but the resistor R11 _ON has a low resistance, and the inductors 14, 15 and the resistor 16 are connected in series. This is because the value is sufficiently smaller than the impedance, and the influence on the impedance on the series element side is small.

On the other hand, the passing characteristic (S21) in the high attenuation state in this embodiment is not as small as the passing amount even when the frequency is increased, as compared with the conventional one. This is because the impedance of the parasitic capacitance C11 _OFF of the FET 11 decreases as the frequency increases, but the impedance of the inductors 14 and 15 increases as the frequency increases on the series element side in the present embodiment, so that changes in frequency characteristics can be compensated. .

  As described above, the attenuation amount of the attenuator 10 in this embodiment is 0 to 50 [GHz] due to the difference between the pass characteristic in the low attenuation state (S21) and the pass characteristic in the high attenuation state (S21). In the frequency range, the frequency characteristics are almost flat.

  As described above, according to the attenuator 10 in the present embodiment, the inductors 14 and 15 are provided between the drain electrode and the source electrode of the FET 11, so that the impedance of the parasitic capacitance of the FET 11 increases as the frequency increases. Even if becomes smaller, the impedances of the inductors 14 and 15 become larger, so that changes in frequency characteristics can be compensated. Therefore, the attenuator 10 in this embodiment can improve the frequency dependency of the attenuation.

  In addition, since the attenuation level depends on the frequency in the conventional attenuator, the signal level changes depending on the level of the frequency. Therefore, in the wireless communication device equipped with the conventional attenuator, the deterioration of the wireless communication quality, for example, BER (Bit (Error Rate) characteristics sometimes deteriorated. On the other hand, according to the attenuator 10 in the present embodiment, the frequency dependency of the attenuation can be improved, so that the wireless communication quality can be improved.

  In addition, since the attenuation amount depends on the frequency in the conventional attenuator, for example, in a wireless communication device that handles high-frequency signals of 10 [GHz] and 40 [GHz], 10 [GHz] and 40 [GHz] respectively. Some configurations used a separate attenuator. On the other hand, according to the attenuator 10 in the present embodiment, a configuration including one attenuator may be used, so that the circuit scale can be reduced and the manufacturing cost can be reduced. This effect becomes more prominent in a measuring apparatus that handles a wider range of frequency signals than a wireless communication device.

  In addition, some conventional attenuators employ FETs for high frequency bands in which parasitic capacitance is suppressed to a relatively high frequency, but the manufacturing cost increases. On the other hand, according to the attenuator 10 in the present embodiment, the frequency dependency of the attenuation can be improved. Therefore, by using a relatively inexpensive low frequency band FET, the manufacturing cost can be reduced. Reduction can be achieved.

  Further, according to the attenuator 10 of the present embodiment, the inductor 14, the resistor 16, and the inductor 15 are connected in series between the drain electrode and the source electrode of the FET 11, so that the drain of the FET 11 The frequency characteristic of the impedance between the electrode and the source electrode can be set to a desired value, and input / output impedances can be matched, which is preferable.

  Further, according to the attenuator 10 of the present embodiment, the inductors 14 and 15 can be formed by transmission lines provided on a dielectric substrate, so that the frequency of attenuation can be reduced with a simple structure and low cost. Dependency can be improved.

  In the above-described embodiment, the two inductors 14 and 15 and the resistor 16 are provided between the drain electrode and the source electrode of the FET 11, but the present invention is not limited to this. For example, one inductor 14 and a resistor 16 may be provided between the drain electrode and the source electrode of the FET 11. Further, for example, only an element having an inductance component may be provided between the drain electrode and the source electrode of the FET 11.

  Further, for example, a configuration in which a desired amount of attenuation can be obtained can be obtained by providing two or more attenuators 10 in the above-described embodiment and configuring a plurality of step attenuators having different amounts of attenuation.

  Next, another aspect of the attenuator 10 in this embodiment will be described. The attenuator 20 shown in FIG. 3 is different from the attenuator 10 described above (see FIG. 1A) in that resistors 21 and 22 are provided. That is, the attenuator 20 includes a resistor 21 between the source electrode of the FET 12 and the ground, and a resistor 22 between the source electrode of the FET 13 and the ground.

  With this configuration, the attenuator 20 can obtain a desired attenuation frequency characteristic according to the values of the resistors 21 and 22.

  As described above, the attenuator according to the present invention has an effect that the frequency dependency of the attenuation amount can be improved, such as a radio communication device or a measurement device that handles a frequency signal in a microwave band or a millimeter wave band. It is useful as an attenuator used in the above.

10, 20 Attenuator 11 FET (first field effect transistor)
12 FET (second field effect transistor)
13 FET (third field effect transistor)
14, 15 Inductor (element having an inductance component)
16, 21, 22 Resistance 17 Input terminal 18 Output terminal

Claims (3)

1st, 2nd, and 3rd field effect transistor are provided, and any one of the drain electrode and source electrode of said 2nd field effect transistor, and either of the drain electrode and source electrode of said 3rd field effect transistor One of which is connected to the drain electrode and the source electrode of the first field effect transistor, respectively, the other of the drain electrode and the source electrode of the second field effect transistor, and the third field effect transistor. In the attenuator in which either one of the drain electrode and the source electrode is grounded,
An attenuator, wherein an element having an inductance component is connected between a drain electrode and a source electrode of the first field effect transistor.   The element having the inductance component, the resistor, and the element having the inductance component are sequentially connected in series between a drain electrode and a source electrode of the first field effect transistor. The attenuator according to 1.   The attenuator according to claim 1 or 2, wherein the element having an inductance component is formed of a transmission line.

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