JP2011222627A - Semiconductor laser device and method for manufacturing the same - Google Patents

Semiconductor laser device and method for manufacturing the same Download PDF

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JP2011222627A
JP2011222627A JP2010087925A JP2010087925A JP2011222627A JP 2011222627 A JP2011222627 A JP 2011222627A JP 2010087925 A JP2010087925 A JP 2010087925A JP 2010087925 A JP2010087925 A JP 2010087925A JP 2011222627 A JP2011222627 A JP 2011222627A
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semiconductor laser
frame
solder
submount
laser device
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JP5644160B2 (en
JP2011222627A5 (en
Inventor
Yoshihiro Hisa
義浩 久
Hideyuki Tanaka
秀幸 田中
Masakazu Yashiro
正和 八代
Noriyoshi Yukinaga
則善 幸長
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Priority to TW99147226A priority patent/TWI438991B/en
Priority to CN 201110083417 priority patent/CN102214894B/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector

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  • Semiconductor Lasers (AREA)
  • Die Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor laser device excellent in high temperature characteristics that can be easily manufactured at low cost, and also to provide a method for manufacturing the same.SOLUTION: A lead 3 is fixed to a frame 1 with mold resin 2. A submount 5 is joined to a frame 1 with solder 4, and a semiconductor laser chip 7 is joined to the submount 5 with solder 6. Since the frame 1 and the submount 5 are joined with the solder 4 as just described, heat dissipation can be improved. Also, the mold resin 2 has a heat resistant temperature higher than the melting point of the solders 4 and 6. Thus, the frame 1, the submount 5, and the semiconductor laser chip 7 can be joined to one another at the same time by heating the frame 1, the submount 5, and the semiconductor laser chip 7, as mounted, so as to melt the solders 4 and 6.

Description

本発明は、DVDドライブ、CDドライブ、又はレーザTV等に用いられる半導体レーザ装置及びその製造方法に関する。   The present invention relates to a semiconductor laser device used for a DVD drive, a CD drive, a laser TV, or the like, and a manufacturing method thereof.

製造コストが低い半導体レーザ装置として、モールド樹脂成型により製造されたモールドパッケージが用いられている(例えば、特許文献1参照)。従来のモールドパッケージでは、フレームにモールド樹脂によりリードが固定され、フレーム上にAgペースト又はエポキシ樹脂によりサブマウントが接合され、サブマウント上にAuSn又はSnAg半田により半導体レーザチップが接合されている。   A mold package manufactured by molding resin molding is used as a semiconductor laser device with a low manufacturing cost (see, for example, Patent Document 1). In a conventional mold package, a lead is fixed to a frame by a mold resin, a submount is bonded to the frame by Ag paste or epoxy resin, and a semiconductor laser chip is bonded to the submount by AuSn or SnAg solder.

従来のモールドパッケージの製造方法について説明する。まず、サブマウント上に半田により半導体レーザチップを接合する。次に、この半導体レーザを接合させたサブマウントをAgペーストによりフレーム上に接着し、ベークによりAgペーストの溶剤を蒸発させて固化する。次に、この蒸発させた溶剤によるパッケージ表面汚染を除去するためにOプラズマ処理を行う。その後、ワイヤボンドを行い、複数の装置が並んだフレームから半導体レーザ装置を個片化し、検査工程に送る。 A conventional mold package manufacturing method will be described. First, a semiconductor laser chip is bonded onto the submount with solder. Next, the submount to which the semiconductor laser is bonded is bonded onto the frame with an Ag paste, and the solvent of the Ag paste is evaporated and solidified by baking. Next, O 2 plasma treatment is performed in order to remove the package surface contamination by the evaporated solvent. Thereafter, wire bonding is performed, and the semiconductor laser device is separated from a frame in which a plurality of devices are arranged, and sent to the inspection process.

特開2003−31885号公報JP 2003-31885 A 特開2007−19470号公報JP 2007-19470 A

従来の製造工程は複雑であったため、幾つもの製造装置を用いなければならず、各製造装置間のキャリアカセット移動のための要員も必要であった。カセット移動を自動化することもできるが、設備費用が膨大になる。また、Agペーストやエポキシ樹脂は半田に比べて熱伝導が悪いために、素子の高温特性が劣化するという問題もあった。   Since the conventional manufacturing process was complicated, several manufacturing apparatuses had to be used, and personnel for moving the carrier cassette between the manufacturing apparatuses were also required. Although the cassette movement can be automated, the equipment cost is enormous. In addition, Ag paste and epoxy resin have a problem that the high temperature characteristics of the element deteriorate due to poor heat conduction compared to solder.

なお、CANパッケージの製造方法として、サブマウントの上面と下面に半田を付け、フレーム上にサブマウントと半導体レーザチップを順次載せ、パッケージ全体を加熱して半田を溶融させて互いを同時に接合する方法が知られている(例えば、特許文献2参照)。硝子封止のCANパッケージは耐熱温度が400℃以上あるため、このような製造方法が用いられる。しかし、モールドパッケージは樹脂部分があるために耐熱温度が非常に低い。従って、パッケージ全体を加熱する製造方法は用いられていなかった。   As a method of manufacturing the CAN package, solder is applied to the upper and lower surfaces of the submount, the submount and the semiconductor laser chip are sequentially placed on the frame, the entire package is heated, and the solder is melted to simultaneously bond each other. Is known (see, for example, Patent Document 2). Since the glass-sealed CAN package has a heat-resistant temperature of 400 ° C. or higher, such a manufacturing method is used. However, since the mold package has a resin portion, the heat resistant temperature is very low. Therefore, a manufacturing method for heating the entire package has not been used.

本発明は、上述のような課題を解決するためになされたもので、その目的は、安価で簡単に製造することができる高温特性に優れた半導体レーザ装置及びその製造方法を得るものである。   The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a semiconductor laser device excellent in high-temperature characteristics that can be manufactured inexpensively and easily, and a manufacturing method thereof.

本発明は、フレームと、前記フレームにモールド樹脂により固定されたリードと、前記フレーム上に、第1の半田により接合されたサブマウントと、前記サブマウント上に、第2の半田により接合された半導体レーザチップとを備え、前記モールド樹脂の耐熱温度は、前記第1及び第2の半田の融点よりも高いことを特徴とする半導体レーザ装置である。   The present invention includes a frame, a lead fixed to the frame by a mold resin, a submount bonded to the frame by a first solder, and a second solder on the submount. A semiconductor laser device comprising: a semiconductor laser chip, wherein a heat resistance temperature of the mold resin is higher than a melting point of the first and second solders.

本発明により、安価で簡単に製造することができる高温特性に優れた半導体レーザ装置及びその製造方法を得ることができる。   According to the present invention, it is possible to obtain a semiconductor laser device excellent in high temperature characteristics that can be easily manufactured at low cost, and a manufacturing method thereof.

実施の形態1に係る半導体レーザ装置を示す平面図である。1 is a plan view showing a semiconductor laser device according to a first embodiment. 実施の形態1に係る半導体レーザ装置を示す断面図である。1 is a cross-sectional view showing a semiconductor laser device according to a first embodiment. 実施の形態1に係る半導体レーザ装置の製造方法を説明するための平面図である。6 is a plan view for illustrating the method for manufacturing the semiconductor laser device according to the first embodiment. FIG. 実施の形態1に係る半導体レーザ装置の製造方法を説明するための断面図である。8 is a cross-sectional view for illustrating the method of manufacturing the semiconductor laser device according to the first embodiment. FIG. 実施の形態1に係る半導体レーザ装置の製造方法を説明するための平面図である。6 is a plan view for illustrating the method for manufacturing the semiconductor laser device according to the first embodiment. FIG. 実施の形態1に係る半導体レーザ装置の製造方法を説明するための平面図である。6 is a plan view for illustrating the method for manufacturing the semiconductor laser device according to the first embodiment. FIG. 実施の形態1に係る半導体レーザ装置の製造方法を説明するための断面図である。8 is a cross-sectional view for illustrating the method of manufacturing the semiconductor laser device according to the first embodiment. FIG. 実施の形態1に係る半導体レーザ装置の製造方法を説明するための平面図である。6 is a plan view for illustrating the method for manufacturing the semiconductor laser device according to the first embodiment. FIG. 実施の形態1に係る半導体レーザ装置の製造方法を説明するための平面図である。6 is a plan view for illustrating the method for manufacturing the semiconductor laser device according to the first embodiment. FIG. 比較例に係る半導体レーザ装置を示す断面図である。It is sectional drawing which shows the semiconductor laser apparatus which concerns on a comparative example. 実施の形態3に係る半導体レーザ装置を拡大した断面図である。FIG. 6 is an enlarged cross-sectional view of a semiconductor laser device according to a third embodiment. 実施の形態3に係る半導体レーザ装置を試作して信頼性試験を実施した結果を示す図である。It is a figure which shows the result of having prototyped the semiconductor laser apparatus which concerns on Embodiment 3, and implementing the reliability test. 実施の形態3に係る半導体レーザ装置を試作して信頼性試験を実施した結果を示す図である。It is a figure which shows the result of having prototyped the semiconductor laser apparatus which concerns on Embodiment 3, and implementing the reliability test. 実施の形態4に係る半導体レーザ装置を拡大した断面図である。FIG. 6 is an enlarged cross-sectional view of a semiconductor laser device according to a fourth embodiment.

本発明の実施の形態に係る半導体レーザ装置及びその製造方法について図面を参照して説明する。同じ構成要素には同じ符号を付し、説明の繰り返しを省略する場合がある。   A semiconductor laser device and a manufacturing method thereof according to an embodiment of the present invention will be described with reference to the drawings. The same components are denoted by the same reference numerals, and repeated description may be omitted.

実施の形態1.
図1は実施の形態1に係る半導体レーザ装置を示す平面図であり、図2はその断面図である。
Embodiment 1 FIG.
FIG. 1 is a plan view showing the semiconductor laser device according to the first embodiment, and FIG. 2 is a sectional view thereof.

フレーム1にモールド樹脂2によりリード3が固定されている。フレーム1上に、半田4(第1の半田)によりサブマウント5が接合されている。サブマウント5上に、半田6(第2の半田)により半導体レーザチップ7が接合されている。半導体レーザチップ7の上面とフレーム1がワイヤ8により接続され、リード3とサブマウント5上の配線がワイヤ9により接続されている。このサブマウント5の配線は半導体レーザチップ7の下面に接続されている。   Leads 3 are fixed to the frame 1 by mold resin 2. A submount 5 is joined to the frame 1 by solder 4 (first solder). A semiconductor laser chip 7 is bonded onto the submount 5 by solder 6 (second solder). The upper surface of the semiconductor laser chip 7 and the frame 1 are connected by a wire 8, and the lead 3 and the wiring on the submount 5 are connected by a wire 9. The wiring of the submount 5 is connected to the lower surface of the semiconductor laser chip 7.

モールド樹脂2は熱硬化性樹脂である。熱硬化性樹脂の耐熱温度は種類を選ぶと400℃と高い。この温度に保った状態でモールド樹脂2に荷重を加えてもほとんど変形しない。   The mold resin 2 is a thermosetting resin. The heat-resistant temperature of the thermosetting resin is as high as 400 ° C. when the type is selected. Even when a load is applied to the mold resin 2 while maintaining this temperature, it hardly deforms.

半田4,6は、半導体レーザ装置において一般的に使用されるAuSn系半田である。Au組成比が80%のAuSn半田の融点は280℃である。従って、モールド樹脂2の耐熱温度は、半田4,6の融点よりも高い。   Solders 4 and 6 are AuSn solders generally used in semiconductor laser devices. The melting point of AuSn solder having an Au composition ratio of 80% is 280 ° C. Accordingly, the heat resistant temperature of the mold resin 2 is higher than the melting point of the solders 4 and 6.

続いて、実施の形態1に係る半導体レーザ装置の製造方法について説明する。図3,5,6,8,9は実施の形態1に係る半導体レーザ装置の製造方法を説明するための平面図であり、図4,7はその断面図である。   Next, a method for manufacturing the semiconductor laser device according to the first embodiment will be described. 3, 5, 6, 8, and 9 are plan views for explaining the method of manufacturing the semiconductor laser device according to the first embodiment, and FIGS. 4 and 7 are sectional views thereof.

まず、フレーム1にプレス工程を行って、図3及び図4に示すように、フレーム1に抜きパターンを形成し、ダウンセットを設ける。   First, a pressing process is performed on the frame 1 to form a punching pattern on the frame 1 and to provide a downset as shown in FIGS.

次に、図5に示すように、フレーム1にリード3をモールド樹脂2により固定する。モールド樹脂2は熱硬化性樹脂である。熱硬化性樹脂は成型時の粘度が低いためにフレーム1上に薄いバリができる場合が多く、この薄いバリを除去するために成型後にブラスト処理を行う。この時にメッキにもダメージが入り、組立時のワイヤボンド未着不良に繋がる。そこで、安定なワイヤボンド性を実現するために、モールド樹脂2の成型後にフレーム1及びリード3のメッキを行う。その後、モールドパッケージを個片化する。   Next, as shown in FIG. 5, the lead 3 is fixed to the frame 1 with the mold resin 2. The mold resin 2 is a thermosetting resin. Since the thermosetting resin has a low viscosity at the time of molding, a thin burr is often formed on the frame 1, and a blasting process is performed after the molding in order to remove the thin burr. At this time, the plating is also damaged, leading to a failure to adhere the wire bond during assembly. Therefore, in order to realize stable wire bondability, the frame 1 and the lead 3 are plated after the molding resin 2 is molded. Thereafter, the mold package is separated into pieces.

次に、パッケージをサブマウント搭載ステージに移動させる。そして、図6及び図7に示すように、上面と下面にそれぞれ半田4と半田6を付けたサブマウント5を位置合わせしてフレーム1上に載せる。   Next, the package is moved to the submount mounting stage. Then, as shown in FIGS. 6 and 7, the submount 5 with the solder 4 and the solder 6 attached to the upper surface and the lower surface is aligned and placed on the frame 1.

次に、パッケージをダイボンドステージに移動させる。そして、図8に示すように、半導体レーザチップ7を位置合わせしてサブマウント5上に載せる。   Next, the package is moved to the die bond stage. Then, as shown in FIG. 8, the semiconductor laser chip 7 is aligned and placed on the submount 5.

その後、ダイボンドステージの温度を上げて、積載されたフレーム1、サブマウント5、及び半導体レーザチップ7を加熱して半田4,6を溶融させる。これにより、フレーム1上に半田4によりサブマウント5を接合し、サブマウント5上に半田6により半導体レーザチップ7を接合する。   Thereafter, the temperature of the die bond stage is raised and the loaded frame 1, submount 5 and semiconductor laser chip 7 are heated to melt the solder 4 and 6. As a result, the submount 5 is joined to the frame 1 by the solder 4, and the semiconductor laser chip 7 is joined to the submount 5 by the solder 6.

次に、パッケージをワイヤボンドステージに移動させる。そして、図9に示すように、半導体レーザチップ7とリード3とをワイヤ8により接続する。以上の工程により製造された半導体レーザ装置を収納トレイに納める。   Next, the package is moved to the wire bond stage. Then, as shown in FIG. 9, the semiconductor laser chip 7 and the lead 3 are connected by a wire 8. The semiconductor laser device manufactured by the above process is placed in a storage tray.

本実施の形態に係る半導体レーザ装置の効果について比較例と比較しながら説明する。図10は、比較例に係る半導体レーザ装置を示す断面図である。比較例では、フレーム1とサブマウント5がAgペースト10により接合されている。なお、Agペースト10の代わりにエポキシ樹脂を用いる場合もある。以下の表1に接合材の熱伝導率の一覧を示す。

Figure 2011222627
Agペーストやエポキシ樹脂は半田に比べて熱伝導が悪いために、比較例では素子の高温特性が劣化する。 The effect of the semiconductor laser device according to the present embodiment will be described in comparison with a comparative example. FIG. 10 is a cross-sectional view showing a semiconductor laser device according to a comparative example. In the comparative example, the frame 1 and the submount 5 are joined by an Ag paste 10. An epoxy resin may be used in place of the Ag paste 10. Table 1 below shows a list of thermal conductivity of the bonding material.
Figure 2011222627
Since Ag paste and epoxy resin have poor heat conduction compared to solder, the high-temperature characteristics of the device deteriorate in the comparative example.

一方、本実施の形態に係る半導体レーザ装置では、フレーム1とサブマウント5が半田4により接合されている。これにより、比較例に比べて放熱性を大幅に改善できる。発明者のシミュレーションよると、実際の実装形態及び使用状態において半導体レーザ装置のAgペーストをSnAg又はAuSn半田に変えることで、1℃以上から数℃程度まで高温特性を改善できることが分かっている。よって、実施の形態に係る半導体レーザ装置は高温特性に優れている。   On the other hand, in the semiconductor laser device according to the present embodiment, the frame 1 and the submount 5 are joined by the solder 4. Thereby, compared with a comparative example, heat dissipation can be improved significantly. According to the inventor's simulation, it has been found that the high-temperature characteristics can be improved from 1 ° C. or more to about several degrees C. by changing the Ag paste of the semiconductor laser device to SnAg or AuSn solder in the actual mounting form and usage state. Therefore, the semiconductor laser device according to the embodiment is excellent in high temperature characteristics.

また、本実施の形態に係る半導体レーザ装置では、耐熱温度が半田4,6の融点よりも高いモールド樹脂2を用いている。このため、積載されたフレーム1、サブマウント5、及び半導体レーザチップ7を加熱して半田4,6を溶融させて、フレーム1、サブマウント5、及び半導体レーザチップ7を互いに同時に接合することができる。そして、接着にAgペーストやエポキシ樹脂を使用しないので、ベーク炉は必要ない。さらに、溶剤汚染を除去するためのOプラズマ処理も必要ない。よって、本実施の形態に係る半導体レーザ装置は、簡単に製造することができる。 In the semiconductor laser device according to the present embodiment, the mold resin 2 having a heat resistant temperature higher than the melting points of the solders 4 and 6 is used. For this reason, the mounted frame 1, submount 5 and semiconductor laser chip 7 are heated to melt the solders 4 and 6, and the frame 1, submount 5 and semiconductor laser chip 7 can be bonded simultaneously to each other. it can. And since no Ag paste or epoxy resin is used for bonding, a baking furnace is not necessary. Furthermore, O 2 plasma treatment for removing solvent contamination is not necessary. Therefore, the semiconductor laser device according to the present embodiment can be easily manufactured.

また、上記の図6〜図9の工程は、現在CANパッケージ製品の生産で主流になっているダイボンド−ワイヤボンド一括製造装置で実施することができる。即ち、既存のCANパッケージ用の製造装置のホルダー部や搬送系を変更することでモールドパッケージもCANパッケージと同様に組立てられる。さらに、CANよりもモールドパッケージの方がダイボンドを安定に行うことができる。   6 to 9 can be performed by a die bond-wire bond batch manufacturing apparatus which is currently mainstream in the production of CAN package products. That is, the mold package can be assembled in the same manner as the CAN package by changing the holder part and the transport system of the existing manufacturing apparatus for the CAN package. Further, die bonding can be performed more stably in the mold package than in CAN.

また、CANパッケージの場合、アイレット外周部を加熱し、熱伝導により素子付け面を加熱する。しかし、クリアランスを確保するためにアイレット外径よりヒーター外径を若干大きくする必要があるため、アイレットの上面と下面のみがヒーターに接触し、アイレットの側面はほとんど接触しない。パッケージ寸法が小さくなると、この接触面積がほとんど確保できず、安定なダイボンド温度が得られない。一方、本実施の形態に係る半導体レーザ装置の場合、フレームの下部の平らな広い部分を加熱すればよいので、ヒーター形状が簡単になり、容易に安定性よく加熱できる。   In the case of a CAN package, the outer periphery of the eyelet is heated, and the element mounting surface is heated by heat conduction. However, since it is necessary to make the heater outer diameter slightly larger than the outer diameter of the eyelet in order to ensure clearance, only the upper and lower surfaces of the eyelet are in contact with the heater, and the side surfaces of the eyelet are hardly in contact. When the package size is reduced, this contact area can hardly be secured, and a stable die bonding temperature cannot be obtained. On the other hand, in the case of the semiconductor laser device according to the present embodiment, it is only necessary to heat a flat wide portion at the bottom of the frame, so that the shape of the heater is simplified and heating can be performed easily and stably.

また、従来のモールドパッケージの製造装置と本実施の形態に係るモールドパッケージの製造装置を比較すると、生産数が少ない場合は、本実施の形態の方が製造装置への投資費用が安い。生産数が増加するほど両者の差は小さくなる。しかし、本発明の適用製品は少量カスタム仕様の製品である。また、製品形状を変更する場合、従来のモールドパッケージの製造装置では全てのホルダー部を変更する必要があり、カスタム対応が難しく、かつコストもかかる。一方、本実施の形態では、一つの組立装置のホルダー形状を変更するだけでよい。よって、本実施の形態は、製造装置への投資費用を安くすることができる。   Further, when the conventional mold package manufacturing apparatus and the mold package manufacturing apparatus according to the present embodiment are compared, the investment cost to the manufacturing apparatus is lower in the present embodiment when the number of production is small. The difference between the two decreases as the number of production increases. However, the product to which the present invention is applied is a product with a small amount of custom specifications. In addition, when changing the product shape, it is necessary to change all the holder parts in the conventional mold package manufacturing apparatus, which makes custom handling difficult and costly. On the other hand, in this embodiment, it is only necessary to change the holder shape of one assembling apparatus. Therefore, this embodiment can reduce the investment cost to the manufacturing apparatus.

実施の形態2.
実施の形態2では、実施の形態1と異なり、モールド樹脂2は熱可塑性樹脂である。半田4,6はSnAg半田である。フレーム1及びリード3の表面にメッキを形成した後に、プレスによりフレーム1にダウンセットを形成する。その他の構成は実施の形態1と同様である。
Embodiment 2. FIG.
In the second embodiment, unlike the first embodiment, the mold resin 2 is a thermoplastic resin. The solders 4 and 6 are SnAg solders. After the plating is formed on the surface of the frame 1 and the lead 3, a downset is formed on the frame 1 by pressing. Other configurations are the same as those of the first embodiment.

熱可塑性樹脂としてLCP樹脂(液晶ポリマー樹脂)を用いた場合、軟化温度は280℃程度で、変形が始まる温度は350℃程度である。従って、組立時にモールド樹脂2に負荷がかからないようなヒーター構造にしておく必要がある。   When an LCP resin (liquid crystal polymer resin) is used as the thermoplastic resin, the softening temperature is about 280 ° C., and the temperature at which deformation starts is about 350 ° C. Therefore, it is necessary to have a heater structure that does not apply a load to the mold resin 2 during assembly.

熱可塑性樹脂は、熱硬化性樹脂に比べて材料価格が安い。熱可塑性樹脂のモールド成型に要する時間(20秒)は、熱硬化性樹脂のモールド成型に要する時間(2分)に比べて非常に短い。従って、樹脂単価も安く、スループットも高いため、装置単価を安価にできる。   Thermoplastic resins are less expensive than thermosetting resins. The time required for molding the thermoplastic resin (20 seconds) is much shorter than the time required for molding the thermosetting resin (2 minutes). Accordingly, the unit price of the apparatus can be reduced because the unit price of the resin is low and the throughput is high.

Agの組成比が3%のSnAg半田の融点は221℃である。従って、モールド樹脂2の軟化温度が半田4,6の融点よりも高いため、組立が非常に容易である。例えば、フレームパッケージを小型化した場合、組立時のつかみ代がないため、モールド樹脂2に治具が接触する。これに対して、低融点のSnAg半田を用いることで組立温度を低くできるので、治具接触に伴うモールド樹脂2の変形を防止できる。   The melting point of SnAg solder having a composition ratio of Ag of 3% is 221 ° C. Therefore, since the softening temperature of the mold resin 2 is higher than the melting point of the solders 4 and 6, assembly is very easy. For example, when the frame package is reduced in size, there is no gripping allowance during assembly, so the jig contacts the mold resin 2. On the other hand, since the assembly temperature can be lowered by using the low melting point SnAg solder, the deformation of the mold resin 2 accompanying the jig contact can be prevented.

また、SnAg半田を用いれば、高価なAuを含むAuSn半田を用いた場合に比べて、コストを大幅に削減できる。   Further, if SnAg solder is used, the cost can be greatly reduced as compared with the case where AuSn solder containing expensive Au is used.

ダウンセットを形成したフレーム1をフープ状態でメッキする場合、メッキ送り用のローラー形状をダウンセットを避ける構造にしなければならない。そして、フープ巻取り時に層間紙を入れてダウンセットが変形しないようにしなければならない。そこで、フレーム1及びリード3の表面にメッキを形成した後に、プレスによりフレーム1にダウンセットを形成する。これにより、フレーム1は平板であるためにメッキ送りローラーはいかなる形状のものでもいいし、メッキの膜厚を高精度に制御できる。また、部分メッキも容易に行え、メッキ材料の貴金属の使用量も削減できる。   When the frame 1 on which the downset is formed is plated in a hoop state, the roller shape for plating feeding must be structured to avoid the downset. And when winding the hoop, it is necessary to insert an interlayer paper so that the downset is not deformed. Therefore, after plating is formed on the surfaces of the frame 1 and the leads 3, a downset is formed on the frame 1 by pressing. Thereby, since the frame 1 is a flat plate, the plating feed roller may have any shape, and the thickness of the plating can be controlled with high accuracy. Also, partial plating can be easily performed, and the amount of noble metal used as a plating material can be reduced.

実施の形態3.
図11は、実施の形態3に係る半導体レーザ装置を拡大した断面図である。サブマウント5と半導体レーザチップ7との接合部以外の構成は実施の形態1と同様である。
Embodiment 3 FIG.
FIG. 11 is an enlarged cross-sectional view of the semiconductor laser device according to the third embodiment. The configuration other than the junction between the submount 5 and the semiconductor laser chip 7 is the same as that of the first embodiment.

半導体レーザチップ7の表面の半田付け部にはAuメッキ層11が形成されている。サブマウント5の表面にはバリアメタル12が形成されている。半導体レーザチップ7は、ジャンクションダウンでSnAg半田6によりサブマウント5に接合されている。   An Au plating layer 11 is formed on the soldered portion on the surface of the semiconductor laser chip 7. A barrier metal 12 is formed on the surface of the submount 5. The semiconductor laser chip 7 is joined to the submount 5 by SnAg solder 6 at junction down.

ここで、SnAg半田6とAuメッキ層11が直接接触している場合、SnAg半田を融点温度(Ag組成比が3%の場合、221℃)まで加熱すると、瞬時にSnAgとAuメッキが相互拡散し、0.1秒程度で融点温度が280℃以上に上昇して再凝固する。従って、十分な溶融時間を保持できないため、半田ヌレ不良等のトラブルに繋がる。また、加熱温度を280℃以上にすると半田は再び溶融するが、今度は熱可塑性モールド樹脂の軟化温度280℃を超えてしまい、モールドパッケージが変形してしまう。また、組立時の融点温度が高いほど、半導体レーザ動作温度での半田中の残留応力が大きくなり、素子の光学特性、特に偏光特性が悪化する。   Here, when the SnAg solder 6 and the Au plating layer 11 are in direct contact, when the SnAg solder is heated to the melting point temperature (221 ° C. when the Ag composition ratio is 3%), the SnAg and Au plating instantaneously diffuse each other. Then, in about 0.1 second, the melting point temperature rises to 280 ° C. or more and re-solidifies. Therefore, a sufficient melting time cannot be maintained, leading to troubles such as solder deficiency failure. Further, when the heating temperature is set to 280 ° C. or higher, the solder is melted again, but this time exceeds the softening temperature 280 ° C. of the thermoplastic mold resin, and the mold package is deformed. Further, the higher the melting point temperature at the time of assembly, the larger the residual stress in the solder at the semiconductor laser operating temperature, and the optical characteristics, particularly the polarization characteristics, of the device deteriorate.

そこで、本実施の形態では、半導体レーザチップ7のAuメッキ層11とサブマウント5の半田4との間に高融点のPt層13(第1のPt層)が設けている。これによりAuとSnAgの相互拡散を防止できる。従って、融点上昇が起きないので、SnAg半田6の融点を221℃に1秒以上の保持時間を容易に確保できる。これにより、半導体レーザチップ7の接合面全面に渡ってきれいな半田接合を得ることができる。   Therefore, in the present embodiment, a high melting point Pt layer 13 (first Pt layer) is provided between the Au plating layer 11 of the semiconductor laser chip 7 and the solder 4 of the submount 5. Thereby, mutual diffusion of Au and SnAg can be prevented. Accordingly, since the melting point does not rise, the melting time of the SnAg solder 6 can be easily secured at 221 ° C. for 1 second or longer. Thereby, a clean solder joint can be obtained over the entire joint surface of the semiconductor laser chip 7.

ここで、Pt層13の厚みが不十分な場合、SnAg半田とAuが相互拡散し、一瞬にして融点が280℃以上になり、安定なダイボンドを実現できない。一方、Pt層13が厚いほど形成時の材料の使用量が増え、かつ処理時間が長くなるため、コストアップに繋がる。さらに、Pt層13の硬度が高いために、Pt層13自身が応力原因になって素子の信頼性を低下させる。そこで、Pt層13の厚みを150nm以上、350nm以下にする。この数値範囲について以下に詳細に説明する。   Here, when the thickness of the Pt layer 13 is insufficient, SnAg solder and Au are mutually diffused, and the melting point becomes 280 ° C. or higher instantaneously, so that stable die bonding cannot be realized. On the other hand, as the Pt layer 13 is thicker, the amount of material used at the time of formation increases and the processing time becomes longer, leading to an increase in cost. Furthermore, since the hardness of the Pt layer 13 is high, the Pt layer 13 itself causes a stress and decreases the reliability of the element. Therefore, the thickness of the Pt layer 13 is set to 150 nm or more and 350 nm or less. This numerical range will be described in detail below.

図12及び図13は、実施の形態3に係る半導体レーザ装置を試作して信頼性試験を実施した結果を示す図である。図12は熱処理履歴に対するDVD部の偏光角(PA)の変化率を示し、図13は熱処理履歴に対するCD部の偏光角の変化率を示す。   FIG. 12 and FIG. 13 are diagrams showing the results of performing a reliability test by making a prototype of the semiconductor laser device according to the third embodiment. FIG. 12 shows the change rate of the polarization angle (PA) of the DVD part with respect to the heat treatment history, and FIG. 13 shows the change rate of the polarization angle of the CD part with respect to the heat treatment history.

まず、組立直後に偏光角を測定した。次に、180℃で2時間の高温保存の後に偏光角を測定した。次に、−40℃〜+125℃のヒートサイクル(HC)を行い、50回目と200回目で偏光角を測定した。なお、Pt層13の厚みが100nm、200nm、300nmの場合についてそれぞれ測定を行った。   First, the polarization angle was measured immediately after assembly. Next, the polarization angle was measured after high-temperature storage at 180 ° C. for 2 hours. Next, a heat cycle (HC) of −40 ° C. to + 125 ° C. was performed, and the polarization angle was measured at the 50th and 200th times. In addition, it measured about the case where the thickness of Pt layer 13 is 100 nm, 200 nm, and 300 nm, respectively.

測定の結果、Pt層13の厚みに関わらず、偏光角は、高温保存で悪化し、ヒートサイクルで改善することが分かった。Pt層13の厚みが100nmの素子は高温保存及びHCによる変動が非常に大きい。Pt層13の厚みが200nmの素子と300nmの素子は、ほぼ同じような変化傾向を示している。   As a result of the measurement, it was found that regardless of the thickness of the Pt layer 13, the polarization angle was deteriorated by high temperature storage and improved by heat cycle. An element having a Pt layer 13 having a thickness of 100 nm has a large variation due to high temperature storage and HC. An element having a Pt layer 13 having a thickness of 200 nm and an element having a thickness of 300 nm show almost the same change tendency.

Pt層13の断面をSEMで観察した結果、Pt層13の厚みが100nmの素子では、Pt層13が部分的に決壊していることが確認できた。Pt層13の厚みが200nmの素子と300nmの素子はPt層13の決壊は確認されなかった。   As a result of observing the cross section of the Pt layer 13 with an SEM, it was confirmed that the Pt layer 13 was partially broken in an element having a Pt layer 13 thickness of 100 nm. No failure of the Pt layer 13 was confirmed in the element having a Pt layer 13 thickness of 200 nm and the element having a thickness of 300 nm.

これらの結果とPt層13の厚みの測定精度を考慮すると、Pt層13の厚みを150nm以上とすることで、相互拡散を十分に防止できる。そして、Pt層13の厚みを350nm以下とすることで、Pt層13の応力による光学特性及び信頼性への悪影響を防ぐことができる。   Considering these results and the measurement accuracy of the thickness of the Pt layer 13, the mutual diffusion can be sufficiently prevented by setting the thickness of the Pt layer 13 to 150 nm or more. Then, by setting the thickness of the Pt layer 13 to 350 nm or less, it is possible to prevent an adverse effect on the optical characteristics and reliability due to the stress of the Pt layer 13.

実施の形態4.
図14は、実施の形態4に係る半導体レーザ装置を拡大した断面図である。サブマウント5以外の構成は実施の形態2と同様である。
Embodiment 4 FIG.
FIG. 14 is an enlarged cross-sectional view of the semiconductor laser device according to the fourth embodiment. The configuration other than the submount 5 is the same as that of the second embodiment.

サブマウント5の表面にTi層14(高融点金属層)が形成されている。Ti層14上にPt層15(第2のPt層)が形成されている。半田4,6はSnAg半田である。Pt層15が半田4,6に接する。   A Ti layer 14 (refractory metal layer) is formed on the surface of the submount 5. A Pt layer 15 (second Pt layer) is formed on the Ti layer 14. The solders 4 and 6 are SnAg solders. The Pt layer 15 is in contact with the solders 4 and 6.

一般にコスト低減のために貴金属のPt層をNi層に変える場合がある。半田がAuSn半田の場合、Pt層13,15をNi層に変えても半田の溶融時間が極端に長くならない。しかし、SnAg半田を使用した場合、半田溶融と同時にNi層が拡散し融点が若干下がるが、Ti層も拡散し瞬時に融点が上昇してしまう。この拡散の速度は非常に速く、正常な半田接合を得るための溶融保持時間1秒以上を確保できない。従って、SnAg半田を使用する場合はTi層14のバリア層としてPt層15を用いる必要がある。   In general, the Pt layer of noble metal may be changed to a Ni layer for cost reduction. When the solder is AuSn solder, the melting time of the solder does not become extremely long even if the Pt layers 13 and 15 are changed to Ni layers. However, when SnAg solder is used, the Ni layer diffuses simultaneously with the melting of the solder and the melting point slightly decreases, but the Ti layer also diffuses and the melting point increases instantaneously. The diffusion speed is very high, and it is impossible to secure a melt holding time of 1 second or more for obtaining a normal solder joint. Therefore, when SnAg solder is used, it is necessary to use the Pt layer 15 as a barrier layer of the Ti layer 14.

1 フレーム
2 モールド樹脂
3 リード
4 半田(第1の半田)
5 サブマウント
6 半田(第1の半田)
7 半導体レーザチップ
11 Auメッキ層
13 Pt層(第1のPt層)
14 Ti層(高融点金属層)
15 Pt層(第2のPt層)
1 Frame 2 Mold resin 3 Lead 4 Solder (first solder)
5 Submount 6 Solder (first solder)
7 Semiconductor laser chip 11 Au plating layer 13 Pt layer (first Pt layer)
14 Ti layer (refractory metal layer)
15 Pt layer (second Pt layer)

Claims (9)

フレームと、
前記フレームにモールド樹脂により固定されたリードと、
前記フレーム上に、第1の半田により接合されたサブマウントと、
前記サブマウント上に、第2の半田により接合された半導体レーザチップとを備え、
前記モールド樹脂の耐熱温度は、前記第1及び第2の半田の融点よりも高いことを特徴とする半導体レーザ装置。
Frame,
A lead fixed to the frame by a mold resin;
A submount joined by first solder on the frame;
A semiconductor laser chip joined by second solder on the submount;
2. A semiconductor laser device according to claim 1, wherein a heat resistance temperature of the mold resin is higher than a melting point of the first and second solders.
前記モールド樹脂は熱硬化性樹脂又は熱可塑性樹脂であることを特徴とする請求項1に記載の半導体レーザ装置。   The semiconductor laser device according to claim 1, wherein the mold resin is a thermosetting resin or a thermoplastic resin. 前記モールド樹脂は熱可塑性樹脂であり、
前記第1及び第2の半田はSnAg半田であることを特徴とする請求項1に記載の半導体レーザ装置。
The mold resin is a thermoplastic resin,
2. The semiconductor laser device according to claim 1, wherein the first and second solders are SnAg solders.
前記半導体レーザチップはAuメッキ層を有し、
前記第1の半田はSnAg半田であり、
前記半導体レーザチップの前記Auメッキ層と前記サブマウントの前記第1の半田との間に第1のPt層が設けられていることを特徴とする請求項1に記載の半導体レーザ装置。
The semiconductor laser chip has an Au plating layer,
The first solder is SnAg solder,
2. The semiconductor laser device according to claim 1, wherein a first Pt layer is provided between the Au plating layer of the semiconductor laser chip and the first solder of the submount.
前記第1のPt層の厚みは150nm以上、350nm以下であることを特徴とする請求項4に記載の半導体レーザ装置。   5. The semiconductor laser device according to claim 4, wherein a thickness of the first Pt layer is 150 nm or more and 350 nm or less. 前記第1及び第2の半田はSnAg半田であり、
前記サブマウントの表面に高融点金属層が形成され、
前記高融点金属層上に第2のPt層が形成され、
前記第2のPt層が前記第1及び第2の半田に接することを特徴とする請求項1に記載の半導体レーザ装置。
The first and second solders are SnAg solders,
A refractory metal layer is formed on the surface of the submount,
A second Pt layer is formed on the refractory metal layer;
The semiconductor laser device according to claim 1, wherein the second Pt layer is in contact with the first and second solders.
フレームにリードをモールド樹脂により固定する工程と、
上面と下面にそれぞれ第1の半田と第2の半田を付けたサブマウントを前記フレーム上に載せる工程と、
前記フレーム上に半導体レーザチップを載せる工程と、
積載された前記フレーム、前記サブマウント、及び前記半導体レーザチップを加熱して前記第1及び第2の半田を溶融させて、前記フレーム上に前記第1の半田により前記サブマウントを接合し、前記サブマウント上に前記第2の半田により前記半導体レーザチップを接合する工程とを備え、
前記モールド樹脂の耐熱温度は、前記第1及び第2の半田の融点よりも高いことを特徴とする半導体レーザ装置の製造方法。
Fixing the lead to the frame with mold resin;
Placing a submount having a first solder and a second solder on the upper surface and the lower surface, respectively, on the frame;
Placing a semiconductor laser chip on the frame;
Heating the loaded frame, the submount, and the semiconductor laser chip to melt the first and second solders, joining the submount on the frame with the first solder, Bonding the semiconductor laser chip onto the submount with the second solder,
A method of manufacturing a semiconductor laser device, wherein the heat resistance temperature of the mold resin is higher than the melting points of the first and second solders.
前記フレームに前記リードを前記モールド樹脂により固定した後に、前記フレーム及び前記リードの表面にメッキを形成する工程を更に備え、
前記モールド樹脂は熱硬化性樹脂であることを特徴とする請求項7に記載の半導体レーザ装置の製造方法。
After the lead is fixed to the frame by the mold resin, further comprising a step of forming plating on the surface of the frame and the lead,
8. The method of manufacturing a semiconductor laser device according to claim 7, wherein the mold resin is a thermosetting resin.
前記フレーム及び前記リードの表面にメッキを形成する工程と、
前記メッキを形成した後に、プレスにより前記フレームにダウンセットを形成する工程とを更に備えることを特徴とする請求項7に記載の半導体レーザ装置の製造方法。
Forming a plating on the surface of the frame and the lead;
The method of manufacturing a semiconductor laser device according to claim 7, further comprising a step of forming a downset on the frame by pressing after forming the plating.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9331453B2 (en) 2012-04-12 2016-05-03 Osram Opto Semiconductors Gmbh Laser diode device
US9356423B2 (en) 2012-03-19 2016-05-31 Osram Opto Semiconductors Gmbh Laser diode assembly

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102012102305A1 (en) * 2012-03-19 2013-09-19 Osram Opto Semiconductors Gmbh Laser diode device for projection system, has crystalline protective layer made of dielectric material is formed on radiation uncoupling surface of laser diode chip which is provided on mounting element
KR101581610B1 (en) * 2012-03-22 2016-01-11 미쓰비시덴키 가부시키가이샤 Semiconductor device and method for manufacturing same
US9008138B2 (en) 2012-04-12 2015-04-14 Osram Opto Semiconductors Gmbh Laser diode device
JP2014209508A (en) * 2013-04-16 2014-11-06 住友電気工業株式会社 Semiconductor device with solder, mounted semiconductor device with solder, and methods of manufacturing and mounting semiconductor device with solder
JP6572803B2 (en) * 2016-03-09 2019-09-11 三菱電機株式会社 Semiconductor laser device

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08213713A (en) * 1994-11-23 1996-08-20 At & T Corp Adaptation layer metallization
JP2004072048A (en) * 2002-08-09 2004-03-04 Sumitomo Electric Ind Ltd Sub-mount and semiconductor device
JP2004327982A (en) * 2003-04-11 2004-11-18 Matsushita Electric Ind Co Ltd Semiconductor device and its manufacturing method
JP2005190520A (en) * 2003-12-24 2005-07-14 Sankyo Seiki Mfg Co Ltd Optical head device
JP2005303169A (en) * 2004-04-15 2005-10-27 Renesas Technology Corp Semiconductor devide and manufacturing method of the same
JP2006135264A (en) * 2004-11-09 2006-05-25 Murata Mfg Co Ltd Method for manufacturing electronic component, and electronic component using the method
JP2006319109A (en) * 2005-05-12 2006-11-24 Matsushita Electric Ind Co Ltd Lead frame for semiconductor device, package for semiconductor device and using same lead frame, and manufacturing method of same package
JP2007019470A (en) * 2005-06-08 2007-01-25 Sharp Corp Manufacturing method for laser device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3607220B2 (en) * 2001-06-06 2005-01-05 松下電器産業株式会社 Semiconductor laser device
JP2006024812A (en) * 2004-07-09 2006-01-26 Sony Corp Lead frame mounted with semiconductor device and semiconductor apparatus using it
JP5095091B2 (en) * 2005-06-08 2012-12-12 シャープ株式会社 Laser device manufacturing method
CN100592585C (en) * 2006-03-28 2010-02-24 三菱电机株式会社 Optical device package and optical semiconductor device using the same

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08213713A (en) * 1994-11-23 1996-08-20 At & T Corp Adaptation layer metallization
JP2004072048A (en) * 2002-08-09 2004-03-04 Sumitomo Electric Ind Ltd Sub-mount and semiconductor device
JP2004327982A (en) * 2003-04-11 2004-11-18 Matsushita Electric Ind Co Ltd Semiconductor device and its manufacturing method
JP2005190520A (en) * 2003-12-24 2005-07-14 Sankyo Seiki Mfg Co Ltd Optical head device
JP2005303169A (en) * 2004-04-15 2005-10-27 Renesas Technology Corp Semiconductor devide and manufacturing method of the same
JP2006135264A (en) * 2004-11-09 2006-05-25 Murata Mfg Co Ltd Method for manufacturing electronic component, and electronic component using the method
JP2006319109A (en) * 2005-05-12 2006-11-24 Matsushita Electric Ind Co Ltd Lead frame for semiconductor device, package for semiconductor device and using same lead frame, and manufacturing method of same package
JP2007019470A (en) * 2005-06-08 2007-01-25 Sharp Corp Manufacturing method for laser device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9356423B2 (en) 2012-03-19 2016-05-31 Osram Opto Semiconductors Gmbh Laser diode assembly
US9331453B2 (en) 2012-04-12 2016-05-03 Osram Opto Semiconductors Gmbh Laser diode device

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