JP2011206185A - Endoscope system and failure detection method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To easily determine the presence or absence of a failure at a tip of an endoscope inserting part.SOLUTION: An endoscope system has an imaging device with a solid imaging element stored in the tip of the endoscope inserting part, and a processor device for forming an endoscope image from an imaging signal output from the solid imaging element and displaying on a monitor. The imaging device has a test-pattern generating means for generating a predetermined test pattern signal, while the processor device forms the image based on the test pattern signal generated by the test pattern generating means of the imaging device and displays on the monitor.

Description

  The present invention relates to an endoscope system in which an imaging apparatus having a solid-state imaging device is built in at the tip of an endoscope insertion portion, and a failure detection method thereof.

  Conventionally, examination using an endoscope, for example, an electronic endoscope, has been widely used in the medical field. An electronic endoscope has a solid-state imaging device such as a CCD image sensor at the tip of an insertion portion to be inserted into a subject. The electronic endoscope is connected to a processor device (signal processing device) via a cord or a connector. The processor device performs various processes on the imaging signal output from the solid-state imaging device, and generates an endoscopic image for diagnosis. The endoscopic image is displayed on a monitor connected to the processor device.

  In such an endoscope system, part of processing conventionally performed by a processor device has been performed by an electronic endoscope in accordance with higher image quality and higher functionality. For this reason, when a failure occurs in the endoscope system, it is necessary to be able to easily identify the failure location.

  For example, in Patent Document 1, a test pattern generation unit is provided in both an electronic endoscope and a processor device, and the presence or absence of a test pattern signal output from each test pattern generation unit is detected. An endoscopic system adapted to be specified is disclosed.

JP 2009-226169 A

  However, in the conventional endoscope system disclosed in Patent Document 1, since the test pattern generation unit of the electronic endoscope is provided in the connector portion on the base end side from the operation unit, for example, an endoscopic image is monitored. If it is not displayed normally, it is difficult to identify the fault location, whether the solid-state image sensor built in the tip of the insertion section is faulty, or whether the cable inserted through the insertion section is faulty. is there.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide an endoscope system and a failure detection method thereof that can easily determine whether or not there is a failure at the distal end of the endoscope insertion portion.

  In order to achieve the above object, an endoscope system according to the present invention includes an imaging device having a solid-state imaging device built in the distal end of an endoscope insertion portion, and an imaging signal output from the solid-state imaging device. An endoscope system comprising: a processor device that generates an endoscopic image and displays it on a monitor, wherein the imaging device includes a test pattern generation unit that generates a predetermined test pattern signal, and the processor device Is characterized in that it generates an image based on the test pattern signal generated by the test pattern generation means of the imaging apparatus and displays it on the monitor.

  According to the present invention, since an image (test pattern image) based on a test pattern signal generated in the imaging apparatus is displayed on the monitor, the user inserts an endoscope by confirming the test pattern image displayed on the monitor. It is possible to easily determine the presence or absence of a failure at the tip of the part.

  In the present invention, the processor device has test pattern generation means for generating a predetermined test pattern signal, and the processor device generates an image based on the test pattern signal generated by the test pattern generation means of the processor device. And displaying on the monitor is preferable. According to this aspect, it is possible to isolate the failure between the imaging device and the processor device.

  The processor device includes a patient circuit electrically connected to the imaging device, and a secondary circuit insulated from the patient circuit, and the patient circuit and the secondary circuit are respectively predetermined. Test pattern generation means for generating a test pattern signal for the patient circuit, and the processor device generates images based on the test pattern signals generated by the test pattern generation means for the patient circuit and the secondary circuit, respectively, on the monitor. The aspect to display is more preferable. According to this aspect, it becomes possible to isolate the failure between the patient circuit and the secondary circuit that constitute the processor device.

  Further, it is preferable that the processor device sequentially displays an image based on a test pattern signal generated by each test pattern generation unit in the order of the secondary circuit, the patient circuit, and the imaging device on the monitor. According to this aspect, quick failure isolation is possible.

  Further, it is preferable that the processor device simultaneously displays on the monitor images based on test pattern signals generated by at least two test pattern generation means. According to this aspect, the failure location can be easily identified by comparing the images (test pattern images) simultaneously displayed on the monitor.

  Moreover, the aspect with which the said imaging device is comprised so that removal from the front-end | tip of the said endoscope insertion part is preferable.

  Further, it is preferable that the solid-state imaging device is a CMOS type or CCD type solid-state imaging device.

  In order to achieve the above object, a failure detection method for an endoscope system according to the present invention includes an imaging device built in the distal end of an endoscope insertion portion and having a solid-state imaging device, and an output from the solid-state imaging device. A processor device that generates an endoscopic image from the captured imaging signal and displays the endoscopic image on a monitor, wherein the imaging device generates a predetermined test pattern signal. And generating an image based on the test pattern signal generated by the imaging apparatus and displaying the image on the monitor.

  According to the present invention, since an image (test pattern image) based on a test pattern signal generated in the imaging apparatus is displayed on the monitor, the user inserts an endoscope by confirming the test pattern image displayed on the monitor. It is possible to easily determine the presence or absence of a failure at the tip of the part.

  In the present invention, it is preferable that the processor device includes a step of generating a predetermined test pattern signal and a step of generating an image based on the test pattern signal generated by the processor device and displaying the image on the monitor. According to this aspect, it is possible to isolate the failure between the imaging device and the processor device.

  The processor device includes a patient circuit electrically connected to the imaging device, and a secondary circuit insulated from the patient circuit, and a predetermined test is performed in the patient circuit and the secondary circuit. It is preferable that the method includes a step of generating pattern signals, and a step of generating images based on the test pattern signals respectively generated in the patient circuit and the secondary circuit and displaying them on the monitor. According to this aspect, it becomes possible to isolate the failure between the patient circuit and the secondary circuit that constitute the processor device.

  Further, it is preferable that the method includes a step of sequentially displaying on the monitor images based on test pattern signals generated from the secondary circuit, the patient circuit, and the imaging device in this order. According to this aspect, quick failure isolation is possible.

  Further, an aspect including a step of simultaneously displaying an image based on at least two test pattern signals on the monitor is preferable. According to this aspect, the failure location can be easily identified by comparing the images (test pattern images) simultaneously displayed on the monitor.

  Moreover, the aspect in which the said solid-state imaging device is comprised so that removal from the front-end | tip of the said endoscope insertion part is preferable.

  Further, it is preferable that the solid-state imaging device is a CMOS type or CCD type solid-state imaging device.

  According to the present invention, since an image (test pattern image) based on a test pattern signal generated in the imaging apparatus is displayed on the monitor, the user inserts an endoscope by confirming the test pattern image displayed on the monitor. It is possible to easily determine the presence or absence of a failure at the tip of the part.

Overall configuration diagram showing schematic configuration of endoscope system Front view showing the tip of the electronic endoscope Side sectional view showing the tip of the electronic endoscope Block diagram showing the control system of the endoscope system Flow chart showing the flow of failure detection mode

  Hereinafter, preferred embodiments of an endoscope system and a failure detection method thereof according to the present invention will be described in detail with reference to the accompanying drawings.

  FIG. 1 is an overall configuration diagram showing a schematic configuration of an endoscope system according to an embodiment of the present invention. As shown in FIG. 1, the endoscope system 10 of the present embodiment includes an electronic endoscope 12, a processor device 14, a light source device 16, and the like. The electronic endoscope 12 includes a flexible insertion portion 20 that is inserted into a body cavity of a patient (subject), an operation portion 22 that is connected to a proximal end portion of the insertion portion 20, a processor device 14, and a light source. And a universal cord 24 connected to the device 16.

  A distal end portion 26 in which an imaging chip (imaging device) 54 (see FIG. 3) for in-vivo imaging is incorporated is connected to the distal end of the insertion portion 20. Behind the distal end portion 26 is provided a bending portion 28 in which a plurality of bending pieces are connected. The bending portion 28 is bent in the vertical and horizontal directions when the angle knob 30 provided in the operation portion 22 is operated and the wire inserted in the insertion portion 20 is pushed and pulled. Thereby, the front-end | tip part 26 is orient | assigned to the desired direction in a body cavity.

  The base end of the universal cord 24 is connected to the connector 36. The connector 36 is of a composite type, and the light source device 16 is connected to the connector 36 in addition to the processor device 14.

  The processor device 14 supplies power to the electronic endoscope 12 via a cable 68 (see FIG. 3) inserted into the universal cord 24, controls the driving of the imaging chip 54, and connects the cable 68 from the imaging chip 54. The received image signal is received, and various signal processing is performed on the received image signal to convert it into image data. The image data converted by the processor device 14 is displayed as an endoscopic image on a monitor 38 connected to the processor device 14 by a cable. The processor device 14 is electrically connected to the light source device 16 via the connector 36 and controls the operation of the endoscope system 10 in an integrated manner.

  FIG. 2 is a front view showing the distal end portion 26 of the electronic endoscope 12. As shown in FIG. 2, an observation window 40, an illumination window 42, a forceps outlet 44, and an air / water supply nozzle 46 are provided on the distal end surface 26 a of the distal end portion 26. The observation window 40 is disposed at the center on one side of the distal end portion 26. Two illumination windows 42 are arranged at symmetrical positions with respect to the observation window 40, and irradiate illumination light from the light source device 16 to a site to be observed in the body cavity. The forceps outlet 44 is connected to a forceps channel 70 (see FIG. 3) disposed in the insertion portion 20 and communicates with a forceps port 34 (see FIG. 1) provided in the operation portion 22. Various types of treatment tools having an injection needle, a high-frequency knife or the like disposed at the tip are inserted into the forceps port 34, and the tips of the various types of treatment tools are exposed from the forceps outlet 44. The air supply / water supply nozzle 46 is cleaned from the air supply / water supply device built in the light source device 16 in accordance with the operation of the air supply / water supply button 32 (see FIG. 1) provided in the operation unit 22. Water or air is jetted toward the observation window 40 or the body cavity.

  FIG. 3 is a side sectional view showing the distal end portion 26 of the electronic endoscope 12. As shown in FIG. 3, a lens barrel 52 that holds an objective optical system 50 for taking in image light of a site to be observed in the body cavity is disposed behind the observation window 40. The lens barrel 52 is attached so that the optical axis of the objective optical system 50 is parallel to the central axis of the insertion portion 20. Connected to the rear end of the lens barrel 52 is a prism 56 that guides the image light of the site to be observed via the objective optical system 50 toward the imaging chip 54 by bending it at a substantially right angle.

  The imaging chip 54 is a monolithic semiconductor (so-called CMOS sensor chip) in which a CMOS solid-state imaging device 58 and a peripheral circuit 60 that drives the solid-state imaging device 58 and inputs / outputs signals are integrally formed. Implemented above. The imaging surface 58 a of the solid-state imaging device 58 is disposed so as to face the emission surface of the prism 56. On the imaging surface 58a, a rectangular plate-like cover glass 64 is attached via a rectangular frame-like spacer 63. The imaging chip 54, the spacer 63, and the cover glass 64 are assembled through an adhesive. Thereby, the imaging surface 58a is protected from intrusion of dust or the like. In the present embodiment, a CMOS type is used as the solid-state imaging device 58, but the present invention is not limited to this, and a CCD type may be used.

  A plurality of input / output terminals 62 a are arranged in the width direction of the support substrate 62 at the rear end portion of the support substrate 62 extending toward the rear end of the insertion portion 20. The input / output terminal 62 a is joined to a signal line 66 for mediating various signals with the processor device 14 via the universal cord 24, and the input / output terminal 62 a is a wiring formed on the support substrate 62. And a peripheral circuit 60 in the imaging chip 54 through a bonding pad or the like (not shown). The signal lines 66 are collectively inserted into a flexible tubular cable 68. The cable 68 is inserted through each of the insertion unit 20, the operation unit 22, and the universal cord 24 and is connected to the connector 36.

  Although not shown, an illumination unit is provided in the back of the illumination window 42. The illumination unit is provided with an exit end of a light guide for guiding illumination light from the light source device 16. Like the cable 68, the light guide is inserted through each of the insertion unit 20, the operation unit 22, and the universal cord 24, and the incident end is connected to the connector 36.

  FIG. 4 is a block diagram showing a control system of the endoscope system 10. As shown in FIG. 4, the distal end portion 26 of the electronic endoscope 12 incorporates an imaging chip 54 in which a solid-state imaging device 58 and a peripheral circuit 60 are integrally formed. The peripheral circuit 60 includes analog signal processing. A circuit (AFE) 72, a selector 82, and the like are provided.

  The AFE 72 includes a correlated double sampling circuit (CDS) 74, an automatic gain circuit (AGC) 76, and an analog / digital converter (A / D) 78. The CDS 74 performs correlated double sampling processing on the image signal output from the solid-state image sensor 58 and removes reset noise and amplifier noise generated in the solid-state image sensor 58. The AGC 76 amplifies the imaging signal from which noise has been removed by the CDS 74 with a gain (amplification factor) specified by the processor device 14. The A / D 78 converts the imaging signal amplified by the AGC 76 into a digital signal having a predetermined number of bits and outputs the digital signal. An imaging signal (digital imaging signal) digitized and output by the A / D 78 is input to the selector 82, and is output from the selector 82 as an output signal during normal operation. The output signal output from the selector 82 is input to the patient circuit 100 via the cable 68 and the connector 36.

The processor device 14 includes a patient circuit 100 and a main circuit (secondary circuit) 102, and the patient circuit 100 and the main circuit 102 are connected via an isolation device 104 (for example, a photocoupler or a pulse transformer). Thereby, the patient circuit 100 and the main circuit 102 are insulated and separated, and electrical safety on the electronic endoscope 12 (scope) side is ensured.
The patient circuit 100 is provided with an image forming circuit (DSP) 106, a timing generator (TG) 108, a sub CPU 110, a selector 114, and the like.

  The sub CPU 110 controls the operation of each unit (such as the DSP 106 and the TG 108) of the patient circuit 100 and controls the operation of each unit (such as the solid-state imaging device 58 and the AFE 72) of the imaging chip 54. The sub CPU 110 performs various controls based on instructions from the main CPU 118 described later.

  The TG 108 has a function of generating various timing pulses (such as a clock signal), and the timing pulse generated by the TG 108 is supplied to each part of the imaging chip 54, the patient circuit 100, and the main circuit 102. Each part of the imaging chip 54, the patient circuit 100, and the main circuit 102 executes various operations in synchronization with the timing pulse supplied from the TG 108.

  The DSP 106 performs various signal processes for forming image data on the output signal output from the selector 82 (that is, the imaging signal output from the A / D 78 during normal operation). The signal processing performed by the DSP 106 includes color separation, color interpolation, gain correction, white balance adjustment, gamma correction, and the like. The DSP 106 performs the signal processing in synchronization with the timing pulse output from the TG 106. The image data formed by the DSP 106 is input to the selector 114, and is output from the selector 114 as an output signal during normal operation. An output signal output from the selector 114 is input to the main circuit 102 via the isolation device 104.

  The main circuit 102 includes an image processing circuit 116, a display circuit 128, a power supply circuit 120, a main CPU 118, a selector 124, and the like.

  The main CPU 118 controls each part of the processor device 14 in an integrated manner, controls the operation of each part (image processing circuit 116, display circuit 128, etc.) of the main circuit 102, and controls the patient circuit 100 and the patient circuit 100 through the sub CPU 110 of the patient circuit 100. Operation control of each part of the imaging chip 54 is performed.

  The power supply circuit 120 supplies power to each part of the main circuit 102 and supplies power to each part of the patient circuit 100 and the imaging chip 54.

  The image processing circuit 116 performs various types of image processing on the output signal output from the selector 114 of the patient circuit 100 (that is, image data output from the DSP 106 in the normal operation mode). Image processing performed by the image processing circuit 116 includes contour enhancement processing, enhancement processing of a specific color or region, brightness adjustment processing, and the like. The image data that has been subjected to image processing by the image processing circuit 116 is input to the selector 124 and is output from the selector 124 as an output signal during normal operation. The output signal output from the selector 124 is input to the display circuit 128.

  The display circuit 128 converts the output signal output from the selector 124 (that is, the image data output from the image processing circuit 116 during normal operation) into a video signal corresponding to the display format of the monitor 38. The video signal converted by the display circuit 128 is input to the monitor 38, and the monitor 38 displays an image.

  When observing the inside of a body cavity with the endoscope system 10 configured as described above, the electronic endoscope 12, the processor device 14, the light source device 16, and the monitor 38 are turned on, and the electronic endoscope is turned on. Twelve insertion portions 20 are inserted into the body cavity, and an image in the body cavity imaged by the solid-state imaging device 58 is observed on the monitor 38 while illuminating the body cavity with illumination light from the light source device 16.

  The imaging signal output from the solid-state imaging device 58 is subjected to various processes by the units 72 to 78 of the AFE circuit 72 and then input to the DSP 106 of the processor device 14 via the selector 82. In the DSP 106, various signal processes are performed on the input image pickup signal to generate image data. The image data generated by the DSP 106 is input to the image processing circuit 116 via the selector 114.

  The image processing circuit 116 performs various image processing on the input image data. The image data processed by the image processing circuit 116 is input to the display circuit 128 via the selector 124. In the display circuit 128, the input image data is subjected to conversion processing corresponding to the display format of the monitor 38, and a video signal is generated. The video signal generated by the display circuit 128 is output to the monitor 38. As a result, the image data is displayed on the monitor 38 as an endoscopic image.

  The endoscope system 10 of the present embodiment includes a failure detection mode for specifying a failure location when a failure occurs, in addition to the normal mode in which the normal operation described above is performed, and includes an imaging chip 54, a patient circuit 100, A test pattern signal is output from the main circuit 102 and an image based on the test pattern signal is displayed on the monitor 38. The user can identify the failure location by checking the test pattern image displayed on the monitor 38.

  As shown in FIG. 4, the imaging chip 54, the patient circuit 100, and the main circuit 102 are provided with test pattern generators 80, 112, and 122, respectively. Each test pattern generator 80, 112, 122 has a function of generating a predetermined test pattern signal, and the generated test pattern signal is input to the corresponding selector 82, 114, 124, respectively. Each of the selectors 82, 114, and 124 selects, as an input signal switching unit, one of the two input signals and outputs it as an output signal. The switching operation of each selector 82, 114, 124 is controlled by the main CPU 118 or the sub CPU 110.

  Here, the operation when the endoscope system 10 is switched to the failure detection mode will be described with reference to the flowchart shown in FIG. Note that switching to the failure detection mode is performed by a user operation.

  First, when the failure detection mode is started, the main CPU 118 instructs the selector 124 to output a test pattern signal (step S10). As a result, the selector 124 outputs the test pattern signal generated by the test pattern generator 122 instead of the signal (image data) output during the normal operation, and an image based on the test pattern signal is output to the monitor 38. Is displayed.

  At this time, the user determines whether or not the test pattern image is normally displayed on the monitor 38 (step S12). If the test pattern image is not normally displayed, a fault location is specified between the main circuit 102 and the monitor 38 (strictly, between the selector 124 and the monitor 38) (step S14). In this case, the failure detection mode is terminated according to the user's operation. On the other hand, when the test pattern image is not normally displayed, the process proceeds to the next step S16 according to the user's operation.

  Subsequently, the sub CPU 110 instructs the selector 114 to output a test pattern signal based on the instruction from the main CPU 118 (step S16). At the same time, the main CPU 118 instructs the selector 124 to output the signal input from the image processing circuit 116. As a result, the selector 114 outputs the test pattern signal generated by the test pattern generator 112 instead of the signal (image data) output during normal operation, and an image based on the test pattern signal is output to the monitor 38. Is displayed.

  At this time, the user determines whether or not the test pattern image is normally displayed on the monitor 38 (step S18). If the test pattern image is not normally displayed, a fault location between the patient circuit 100 and the main circuit 102 (strictly, between the selector 114 and the selector 124) is specified (step S20). In this case, the failure detection mode is terminated according to the user's operation. On the other hand, when the test pattern image is normally displayed, the process proceeds to the next step S22 according to the user's operation.

  Subsequently, based on an instruction from the main CPU 118, the sub CPU 110 instructs the selector 114 to output the signal input from the DSP 106 and instructs the selector 82 to output a test pattern signal (step S22). ). Thus, the selector 82 outputs the test pattern signal generated by the test pattern generator 80 instead of the signal (imaging signal) output during the normal operation, and an image based on the test pattern signal is output to the monitor 38. Is displayed.

  At this time, the user determines whether or not the test pattern image is normally displayed on the monitor 38 (step S24). If the test pattern image is not normally displayed, a fault location is specified between the imaging chip 54 and the patient circuit 100 (strictly, between the selector 82 and the selector 114) (step S26). On the other hand, when the test pattern image is displayed normally and an abnormality is recognized in the endoscope system 10, the imaging chip 54 (precedingly from the selector 82 (solid-state imaging device 58) is detected as a failure location. Side)) is identified (step S28). When the failure location is specified, the failure detection mode is terminated according to the user's operation.

  As described above, in the failure detection mode, the selectors 82, 114, and 124 are switched in a predetermined order in accordance with an instruction from the main CPU 118 or the sub CPU 110, and test patterns output from the selectors 82, 114, and 124 to the monitor 38, respectively. Images based on the signals are sequentially displayed, and a fault location is specified.

  According to the endoscope system 10 of the present embodiment, a test pattern signal is output from each block of the imaging chip 54, the patient circuit 100, and the main circuit 102, and an image (test pattern image) based on the test pattern signal is generated. Since the information is displayed on the monitor 38, the user can easily and quickly identify the abnormal part simply by confirming whether or not the test pattern image is normally displayed.

  In particular, in the endoscope system 10 of the present embodiment, an image (test pattern image) based on the test pattern signal generated by the imaging chip 54 built in the distal end portion 26 of the electronic endoscope 12 is displayed on the monitor 38. Therefore, the user can easily determine the presence or absence of a failure (for example, the solid-state imaging device 58) in the distal end portion 26 of the electronic endoscope 12 by confirming the test pattern image displayed on the monitor.

  In the endoscope system 10 of the present embodiment, the order in which the test pattern images are displayed on the monitor 38 is the order of the main circuit 102, the patient circuit 100, and the imaging chip 54. Thus, according to the aspect which displays a test pattern image in an order from the block by the side of the monitor 38, a failure location can be identified rapidly and efficiently, without taking a useless step. The present invention is not limited to the above order, and may be the order of the imaging chip 54, the patient circuit 100, and the main circuit 102, for example.

  In the endoscope system 10 of the present embodiment, the test pattern images from each block are sequentially displayed on the monitor 38. However, the present invention is not limited to this, and the test pattern from each block is displayed. At least two test pattern images of the images may be displayed on the monitor 38 at the same time. In this case, the failure isolation can be easily performed by comparing at least two test pattern images displayed on the monitor 38.

  In the endoscope system 10 of the present embodiment, although not shown, it is preferable that the imaging chip 54 is configured to be removable (replaceable) from the distal end portion 26 of the electronic endoscope 12. When the imaging chip 54 is identified as a failure location by the failure detection mode, the endoscope inspection can be performed immediately by replacing the imaging chip 54 with a new one without preparing a replacement electronic endoscope 12 anew. Can be done.

  As described above, the endoscope system and the failure detection method of the present invention have been described in detail. However, the present invention is not limited to the above examples, and various improvements and modifications can be made without departing from the gist of the present invention. Of course you can go.

  DESCRIPTION OF SYMBOLS 10 ... Endoscopy system, 12 ... Electronic endoscope, 14 ... Processor apparatus, 16 ... Light source device, 20 ... Insertion part, 22 ... Operation part, 26 ... Tip part, 28 ... Bending part, 36 ... Connector, 38 ... Monitor 54 ... Imaging chip 58 ... Solid-state imaging device 60 ... Peripheral circuit 68 ... Cable 72 ... AFE 80 ... Test pattern generator 82 ... Selector 100 ... Patient circuit 102 ... Main circuit 104 ... Iso 106 ... DSP, 108 ... TG, 110 ... sub CPU, 112 ... test pattern generator, 114 ... selector, 116 ... image processing circuit, 118 ... main CPU, 120 ... power supply circuit, 122 ... test pattern generator, 124: selector, 128: display circuit

Claims (14)

An imaging device built in the distal end of the endoscope insertion portion and having a solid-state imaging device;
An endoscopic system comprising: a processor device that generates an endoscopic image from an imaging signal output from the solid-state imaging device and displays the endoscopic image on a monitor;
The imaging apparatus has a test pattern generating means for generating a predetermined test pattern signal,
The endoscope system, wherein the processor device generates an image based on a test pattern signal generated by a test pattern generation unit of the imaging device and displays the image on the monitor. The processor device has a test pattern generating means for generating a predetermined test pattern signal,
The endoscope system according to claim 1, wherein the processor device generates an image based on a test pattern signal generated by a test pattern generator of the processor device and displays the image on the monitor. The processor device includes a patient circuit electrically connected to the imaging device, and a secondary circuit insulated and separated from the patient circuit,
Each of the patient circuit and the secondary circuit has a test pattern generating means for generating a predetermined test pattern signal,
3. The endoscope according to claim 2, wherein the processor device generates an image based on a test pattern signal generated by a test pattern generation unit of the patient circuit and the secondary circuit, and displays the image on the monitor. Mirror system.   4. The processor device according to claim 3, wherein the processor device sequentially displays on the monitor images based on test pattern signals generated by the respective test pattern generation means in the order of the secondary circuit, the patient circuit, and the imaging device. The endoscope system described.   The endoscope system according to claim 2 or 3, wherein the processor device simultaneously displays on the monitor images based on test pattern signals generated by at least two test pattern generation means.   The endoscope system according to any one of claims 1 to 5, wherein the imaging device is configured to be removable from a distal end of the endoscope insertion portion.   The endoscope system according to any one of claims 1 to 6, wherein the solid-state imaging device is a CMOS type solid-state imaging device. An imaging device built in the distal end of the endoscope insertion portion and having a solid-state imaging device;
A failure detection method for an endoscope system comprising: a processor device that generates an endoscope image from an imaging signal output from the solid-state imaging device and displays the endoscope image on a monitor;
Generating a predetermined test pattern signal in the imaging apparatus;
Generating an image based on a test pattern signal generated in the imaging device and displaying the image on the monitor;
A failure detection method for an endoscope system, comprising: Generating a predetermined test pattern signal in the processor device;
Generating an image based on a test pattern signal generated by the processor device and displaying the image on the monitor;
The failure detection method for an endoscope system according to claim 8, comprising: The processor device includes a patient circuit electrically connected to the imaging device, and a secondary circuit insulated and separated from the patient circuit,
Generating predetermined test pattern signals in the patient circuit and the secondary circuit, respectively.
Generating images based on test pattern signals generated in the patient circuit and the secondary circuit, respectively, and displaying them on the monitor;
The failure detection method for an endoscope system according to claim 9, comprising:   The endoscope system according to claim 10, further comprising a step of sequentially displaying on the monitor images based on test pattern signals generated from the secondary circuit, the patient circuit, and the imaging device in this order. Fault detection method.   The failure detection method for an endoscope system according to claim 9 or 10, further comprising a step of simultaneously displaying an image based on at least two test pattern signals on the monitor.   The endoscope system failure detection method according to any one of claims 8 to 12, wherein the solid-state imaging device is configured to be removable from a distal end of the endoscope insertion portion.   The endoscope system failure detection method according to any one of claims 8 to 13, wherein the solid-state imaging device is a CMOS solid-state imaging device.

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