JP2011205105A - Thin film transistor and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To protect the channel region of a semiconductor film against radiation damage when patterning by plasma etching.SOLUTION: An ohmic contact layer-forming film 25 of n-type amorphous silicon is deposited on the top surface of a semiconductor film-forming film 21 of intrinsic amorphous silicon, containing a first channel protective film 5 of silicon nitride and a second channel protective film 6 of shading metal. The ohmic contact layer-forming film 25 and the semiconductor film-forming film 21 are subjected to plasma etching for patterning, using resist patterns 26 and 26 and the second channel protective film 6 as masks. In this case, radiations, such as ultraviolet rays, X-rays, etc., emitted from the plasma of an etching source can be prevented by the second channel protective film 6 of shading metal, so that a channel region of the semiconductor film 4 can be protected against radiation damage. Moreover, the second channel protective film 6 of shading metal is separated into two halves in a succeeding process.

Description

  The present invention relates to a thin film transistor and a method for manufacturing the same.

  For example, in a thin film transistor used as a switching element of an active matrix liquid crystal display device, a gate electrode is provided on the upper surface of a glass substrate, a gate insulating film is provided on the upper surface of the glass substrate including the gate electrode, and a gate on the gate electrode is provided. A semiconductor film made of intrinsic amorphous silicon is provided on the upper surface of the insulating film, a channel protective film is provided at a predetermined position on the upper surface of the semiconductor film, and an n-type amorphous film is formed on both sides of the upper surface of the channel protective film and on the upper surface of the semiconductor film on both sides. There is one in which an ohmic contact layer made of silicon is provided, and a source / drain electrode is provided on the upper surface of each ohmic contact layer (see, for example, Patent Document 1).

  When manufacturing the above-described conventional thin film transistor, a semiconductor film forming film made of intrinsic amorphous silicon is formed on the upper surface of the gate insulating film, and a channel protective film made of silicon nitride is formed at a predetermined position on the upper surface of the semiconductor film forming film. An ohmic contact layer forming film made of n-type amorphous silicon is formed on the upper surface of the semiconductor film forming film including the channel protective film, and a resist is formed on each ohmic contact layer forming region on the upper surface of the ohmic contact layer forming film. A pair of ohmic contact layers and a semiconductor film is formed by patterning and patterning the ohmic contact layer forming film and the semiconductor film forming film by plasma etching using the resist pattern and the channel protective film as a mask.

JP 2000-180896 A

  By the way, in the conventional thin film transistor manufacturing method, when plasma etching is performed, the semiconductor film forming film and the ohmic contact layer forming film are formed on the gate insulating film, whereas the ohmic contact is formed on the channel protective film. Since only the layer formation film is formed, plasma etching is continued even if the ohmic contact layer formation film on the channel protective film in the region other than under the resist pattern is completely removed. Large over-etching is performed in the protective film portion. In this case, the channel protective film is for protecting the channel region of the semiconductor film from this overetching.

  However, since the channel protective film is a transparent film made of silicon nitride, radiation of ultraviolet rays and X-rays from the plasma of the etching source cannot be prevented, and the channel region of the semiconductor film under the channel protective film causes radiation damage. I will receive it. This radiation damage contributes to an increase in initial characteristic degradation and reliability degradation (increase in characteristic shift) of the thin film transistor. As a result, a liquid crystal display device using a thin film transistor as a switching element has a problem that the drive voltage (amplitude) has to be increased so that it can be driven even with deteriorated characteristics. In addition, in an electric circuit such as a shift register using a thin film transistor as a constituent element, there is a problem that circuit operation becomes unstable due to a characteristic shift (a lifetime cannot be secured).

  SUMMARY OF THE INVENTION An object of the present invention is to provide a thin film transistor and a method for manufacturing the same that can prevent a channel region of a semiconductor film from being damaged by radiation.

  In order to achieve the above object, for example, a first channel protective film made of a transparent insulating material and a second channel protective film made of a light-shielding metal are stacked on a film for forming a semiconductor film. Forming an ohmic contact layer forming film on the semiconductor film forming film including the second channel protective film, and plasma etching the ohmic contact layer forming film and the semiconductor film forming film. Then, patterning is performed to form a pair of ohmic contact layers and a semiconductor film.

  According to this invention, since the second channel protective film made of a light shielding metal is formed on the first channel protective film made of a transparent insulating material, the second channel protective film made of the light shielding metal is used. Radiation such as ultraviolet rays and X-rays from the plasma of the etching source can be prevented, so that the channel region of the semiconductor film can be prevented from being damaged by radiation. In this case, the second channel protective film made of a light-shielding metal is separated into two in a later step.

Sectional drawing of the principal part of the liquid crystal display device provided with the thin-film transistor as 1st Embodiment (and 2nd Embodiment) of this invention. Sectional drawing of an original process in the case of manufacture of the liquid crystal display device shown in FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the principal part of the liquid crystal display device provided with the thin-film transistor as 3rd Embodiment of this invention. FIG. 10 is a cross-sectional view of an initial process in manufacturing the liquid crystal display device shown in FIG. 9. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG.

(First embodiment)
FIG. 1 shows a cross-sectional view of a main part of a liquid crystal display device having a thin film transistor as a first embodiment of the present invention. The liquid crystal display device includes a glass substrate (insulating substrate) 1. A gate electrode 2 made of chromium, aluminum or the like is provided at a predetermined location on the upper surface of the glass substrate 1. A gate insulating film 3 made of silicon nitride is provided on the upper surface of the glass substrate 1 including the gate electrode 2.

  A semiconductor film 4 made of intrinsic amorphous silicon is provided at a predetermined position on the upper surface of the gate insulating film 3 on the gate electrode 2. A first channel protective film 5 made of silicon nitride (transparent insulating material) is provided at a predetermined location on the upper surface of the semiconductor film 4. Second channel protective films 6 and 6 made of a light-shielding metal such as chromium or aluminum are provided on both sides of the upper surface of the first channel protective film 5.

  Ohmic contact layers 7 and 7 made of n-type amorphous silicon are provided on the upper surfaces of the second channel protective films 6 and 6 and the upper surface of the semiconductor film 4 on both sides thereof. Source / drain electrodes 8, 8 made of chromium, aluminum or the like are provided on the upper surfaces of the ohmic contact layers 7, 7.

  The gate electrode 2, the gate insulating film 3, the semiconductor film 4, the first channel protective film 5, the second channel protective films 6 and 6, the ohmic contact layers 7 and 7, and the source / drain electrodes 8 and 8 A gate type thin film transistor 9 is configured.

  An overcoat film 10 made of silicon nitride is provided on the upper surface of the gate insulating film 3 including the thin film transistor 9. A contact hole 11 is provided in the overcoat film 10 at a portion corresponding to a predetermined portion of the one source / drain electrode 8. A pixel electrode 12 made of a transparent conductive material such as ITO is connected to one source / drain electrode 8 through a contact hole 11 at a predetermined location on the upper surface of the overcoat film 10.

  Next, an example of a manufacturing method of this liquid crystal display device will be described. First, as shown in FIG. 2, a gate electrode 2 is formed by patterning a metal film made of chromium, aluminum or the like formed by sputtering at a predetermined location on the upper surface of the glass substrate 1 by photolithography. To do.

  Next, on the upper surface of the glass substrate 1 including the gate electrode 2, from the gate insulating film 3 made of silicon nitride, the semiconductor film forming film 21 made of intrinsic amorphous silicon, and silicon nitride (transparent insulating material) by plasma CVD. The first channel protective film forming film 22 is continuously formed. Next, a second channel protective film forming film 23 made of a light shielding metal such as chromium or aluminum is formed on the upper surface of the first channel protective film forming film 22 by sputtering.

  Next, a resist film 24 is formed by patterning a resist film applied by a printing method or the like on the channel protective film forming region on the upper surface of the second channel protective film forming film 23 to form a resist pattern 24. Next, by using the resist pattern 24 as a mask, the second and first channel protective film forming films 23 and 22 are sequentially etched, so that the second and first channels are formed under the resist pattern 24 as shown in FIG. The channel protective films 6 and 5 are stacked. Next, the resist pattern 24 is stripped using a resist stripping solution.

  Next, as shown in FIG. 4, an ohmic contact layer forming film 25 made of n-type amorphous silicon is formed on the upper surface of the semiconductor film forming film 21 including the second channel protective film 6 by plasma CVD. To do. Next, resist patterns 26 and 26 are formed by patterning a resist film applied by a printing method or the like in each ohmic contact layer forming region on the upper surface of the ohmic contact layer forming film 25 by a photolithography method.

  Next, the ohmic contact layer forming film 25 and the semiconductor film forming film 21 are patterned by plasma etching using the resist patterns 26 and 26 and the second channel protective film 6 as a mask. As shown in FIG. The ohmic contact layers 7 and 7 are formed under the patterns 26 and 26, and the semiconductor film 4 is formed under the ohmic contact layers 7 and 7 and the first channel protective film 5.

  In this case, as shown in FIG. 4, the semiconductor film forming film 21 and the ohmic contact layer forming film 25 are formed on the gate insulating film 3 in a region other than under the first channel protective film 5. Since only the ohmic contact layer forming film 25 is formed on the second channel protective film 6, the ohmic contact layer forming film on the second channel protective film 6 in a region other than under the resist patterns 26 and 26. Even if all 25 is removed, plasma etching is continued, and large over-etching is performed in the portion of the second channel protective film 6 in the region other than under the resist patterns 26 and 26.

  However, since the second channel protective film 6 is formed of a light-shielding metal such as chromium or aluminum, the second channel protective film 6 prevents radiation such as ultraviolet rays and X-rays from the plasma of the etching source. Therefore, the channel region of the semiconductor film 4 is not subjected to radiation damage. As a result, it is possible to suppress initial characteristic deterioration and reliability reduction (increase in characteristic shift) of the thin film transistor 9.

  Next, the second channel protective film 6 between the pair of ohmic contact layers 7 and 7 is removed by etching using the resist patterns 26 and 26 as a mask, and the second channel protective film 6 is separated into two. Then, as shown in FIG. 6, the second channel protective films 6, 6 remain on both sides of the upper surface of the first channel protective film 5 under the resist patterns 26, 26. In this case, the etching is preferably wet etching in order to prevent radiation damage to the channel region of the semiconductor film 4. Next, the resist patterns 26 and 26 are stripped using a resist stripping solution.

  Next, as shown in FIG. 7, a source / drain electrode forming film 27 made of chromium, aluminum, or the like is formed on the upper surface of the gate insulating film 3 including the ohmic contact layers 7, 7, etc. by sputtering. Next, resist patterns 28 and 28 are formed by patterning a resist film applied by a printing method or the like on the source / drain electrode forming region on the upper surface of the source / drain electrode forming film 27 by a photolithography method.

  Next, the source / drain electrode forming film 27 is patterned by wet etching using the resist patterns 28 and 28 as a mask, and the upper surfaces of the ohmic contact layers 7 and 7 are formed under the resist patterns 28 and 28 as shown in FIG. The source / drain electrodes 8 and 8 are formed. Next, the resist patterns 28 and 28 are stripped using a resist stripping solution.

  Next, as shown in FIG. 1, a silicon nitride film formed by the plasma CVD method is patterned on the upper surface of the gate insulating film 3 including the source / drain electrodes 8, 8 and the like by photolithography. An overcoat film 10 having a contact hole 11 is formed in a portion corresponding to a predetermined portion of the source / drain electrode 8.

  Next, by patterning a transparent conductive film made of an ITO film or the like formed by sputtering at a predetermined position on the upper surface of the overcoat film 10 by photolithography, the pixel electrode 12 is connected via the contact hole 11. It is formed by being connected to one source / drain electrode 8. Thus, a liquid crystal display device including the thin film transistor 9 shown in FIG. 1 is obtained.

  The second channel protective films 6 and 6 are etched by a light-shielding metal material that is the same as the source / drain electrodes 8 and 8 or a light-shielding metal that can be wet etched by the same etchant as the source / drain electrodes 8 and 8. Patterning may be performed. In the manufacturing method in such a case, after the ohmic contact layers 7 and 7 and the semiconductor film 4 forming step shown in FIG. 5, the second channel protective film 6 separating step shown in FIG. 7 is formed, a source / drain electrode forming film 27 shown in FIG. 7 is formed, and resist patterns 28 and 28 are formed. As shown in FIG. 8, by wet etching using the resist patterns 28 and 28 as a mask, At the same time when the source / drain electrodes 8 and 8 are formed, the second channel protective film 6 is separated into two.

(Second Embodiment)
Next explained is a liquid crystal display device comprising a thin film transistor as a second embodiment of the invention. The thin film transistor of the second embodiment has the same structure as that of FIG. 1 showing the first embodiment. In the second embodiment, the second channel protective film will be described with reference to FIG. 6 and 6 are different in that they are formed of the same material (intrinsic amorphous silicon) as the semiconductor film 4. In this case, the thickness of the second channel protective films 6 and 6 is substantially the same as the thickness of the semiconductor film 4.

  Next, an example of the manufacturing method of the second embodiment will be described with reference to the drawings used for the description of the manufacturing method of the first embodiment. In this case, in the manufacturing method of the second embodiment, as described below, Note that only FIGS. 2-8 except FIG. 5 are relevant. First, as shown in FIG. 2, after the gate electrode 2 is formed, the gate insulating film 3 made of silicon nitride, the semiconductor film forming film 21 made of intrinsic amorphous silicon, and the first made of silicon nitride are formed by plasma CVD. A channel protective film forming film 22 and a second channel protective film forming film 23 made of intrinsic amorphous silicon are successively formed.

  In this case, the film thickness of the second channel protective film forming film 23 is substantially the same as the film thickness of the semiconductor film forming film 21. Here, although it is not limited, when the range of almost the same thickness is examined, the film thickness of the second channel protective film forming film 23 is the same as the film thickness of the semiconductor film forming film 21 for the reason described later. Since the magnitude of the difference is proportional to the amount of radiation such as ultraviolet rays and X-rays received by the semiconductor thin film by plasma etching, this difference is preferably about 20%, but even about 50% has a sufficient effect. It can be obtained.

  Next, a resist pattern 24 is formed. Next, as shown in FIG. 3, second and first channel protective films 6 and 5 are formed under the resist pattern 24. Next, the resist pattern 24 is peeled off. Next, as shown in FIG. 4, an ohmic contact layer forming film 25 is formed by plasma CVD. Next, resist patterns 26 and 26 are formed.

  Next, as shown in FIG. 6, ohmic contact layers 7 and 7 are formed under the resist patterns 26 and 26 by plasma etching, and the upper surface of the first channel protective film 5 under the ohmic contact layers 7 and 7 is formed. Second channel protective films 6 and 6 are left on both sides, and semiconductor film 4 is formed below ohmic contact layers 7 and 7 and first channel protective film 5.

  In this case, as shown in FIG. 4, the semiconductor film forming film 21 and the ohmic contact layer forming film 25 are formed on the gate insulating film 3 in a region other than the area under the first channel protective film 5, and the first channel is formed. A second channel protective film 6 made of intrinsic amorphous silicon and an ohmic contact layer forming film 25 are formed on the protective film 5, and the film thickness of the second channel protective film 6 made of intrinsic amorphous silicon is formed as a semiconductor film. The film thickness of the working film 21 is almost the same.

  Therefore, the etching of the ohmic contact layer forming film 25 and the semiconductor film forming film 21 on the gate insulating film 3 in the region other than under the resist patterns 26 and 26 and the first channel in the region other than under the resist patterns 26 and 26 are performed. The etching of the ohmic contact layer forming film 25 on the protective film 5 and the second channel protective film 6 made of intrinsic amorphous silicon are completed almost simultaneously.

  As a result, over-etching in the portion of the first channel protective film 5 in a region other than the regions under the resist patterns 26 and 26 is minimized, and radiation damage received by the channel region of the semiconductor film 4 under the first channel protective film 5 is reduced. It can be minimized, and deterioration of the initial characteristics and reliability of the thin film transistor 9 (increase in characteristic shift) can be suppressed.

  During plasma etching, since the second channel protective film 6 exists on the first channel protective film 5 in regions other than the resist patterns 26 and 26, ultraviolet rays, X-rays, etc. from the plasma of the etching source are present. Radiation is absorbed by the second channel protective film 6 and can be reduced from being absorbed by the channel region of the semiconductor film 4 below the first channel protective film 5.

  Thereafter, through the same steps as in the first embodiment, a liquid crystal display device including the thin film transistor 9 as the second embodiment is obtained. By the way, in the second embodiment, as will be described with reference to FIG. 2, since the second channel protective film forming film 23 is formed of transparent intrinsic amorphous silicon, exposure when forming the resist pattern 24 is performed. The back exposure from the lower surface side of the glass substrate 1 using the gate electrode 2 as a mask can also be performed. As a result, it is possible to reduce the size of the thin film transistor 9 and reduce variations in processing.

(Third embodiment)
FIG. 9 shows a cross-sectional view of a main part of a liquid crystal display device having a thin film transistor as a third embodiment of the present invention. In this liquid crystal display device, the difference from the case shown in FIG. 1 is that a channel protective film 5 made of a light-shielding metal such as chromium or aluminum is formed at two predetermined positions on the upper surface of the semiconductor film 4 below the ohmic contact layers 7 and 7 Is that only 5

  Next, an example of a manufacturing method of the liquid crystal display device will be briefly described. First, as shown in FIG. 10, after forming the gate electrode 2, a gate insulating film 3 made of silicon nitride and a semiconductor film forming film 21 made of intrinsic amorphous silicon are successively formed by plasma CVD. Next, a channel protective film forming film 22 made of a light shielding metal such as chromium or aluminum is formed by sputtering. Next, a resist pattern 24 is formed.

  Here, when the channel protective film forming film 22 made of a metal such as chromium is formed directly on the upper surface of the semiconductor film forming film 21, an intermediate layer such as a metal silicide is formed at the interface, which causes the leakage current. Often becomes. Therefore, in order to avoid this, in the third embodiment, a thin oxide film (not shown) is formed on the upper surface of the formed semiconductor film forming film 21 by wet oxidation treatment such as acetic acid treatment. .

  Next, as shown in FIG. 11, the channel protective film 5 is formed under the resist pattern 24. Next, the resist pattern 24 is peeled off. Next, as shown in FIG. 12, an ohmic contact layer forming film 25 made of n-type amorphous silicon is formed by plasma CVD. Next, resist patterns 26 and 26 are formed. Next, as shown in FIG. 13, ohmic contact layers 7 and 7 are formed under the resist patterns 26 and 26 by plasma etching, and further, the semiconductor film 4 is formed under the ohmic contact layers 7 and 7 and the channel protective film 5. Form.

  In this case, as shown in FIG. 12, the semiconductor film forming film 21 and the ohmic contact layer forming film 25 are formed on the gate insulating film 3 in a region other than under the channel protective film 5, whereas the channel protection is performed. Since only the ohmic contact layer forming film 25 is formed on the film 5, plasma etching is performed even if the ohmic contact layer forming film 25 on the channel protective film 5 in the region other than under the resist patterns 26 and 26 is completely removed. Is continued, and large over-etching is performed in the portion of the channel protective film 5 in the region other than under the resist patterns 26 and 26.

  However, since the channel protective film 5 is formed of a light-shielding metal such as chromium or aluminum, the channel protective film 5 can prevent radiation of ultraviolet rays, X-rays, and the like from the plasma of the etching source. The 4 channel region is not subject to radiation damage. As a result, it is possible to suppress initial characteristic deterioration and reliability reduction (increase in characteristic shift) of the thin film transistor 9.

  Next, the channel protective film 5 between the pair of ohmic contact layers 7 and 7 is removed by etching using the resist patterns 26 and 26 as a mask, and the channel protective film 5 is separated into two, as shown in FIG. As described above, the channel protective films 5 and 5 remain at two predetermined positions on the upper surface of the semiconductor film 2 under the resist patterns 26 and 26. In this case, the etching is preferably wet etching in order to prevent radiation damage to the channel region of the semiconductor film 4. Next, the resist patterns 26 and 26 are peeled off.

  Thereafter, through the same steps as in the first embodiment, a liquid crystal display device including the thin film transistor 9 shown in FIG. 9 is obtained. Similarly to the case of the first embodiment, after the ohmic contact layers 7 and 7 and the semiconductor film 4 shown in FIG. 13 are formed, the resist protection pattern 26, without the channel protective film 5 separation step shown in FIG. 26 may be peeled off, and the source / drain electrodes 8 and 8 may be formed by wet etching, and at the same time, the channel protective film 5 may be separated into two.

(Other embodiments)
In each of the above-described embodiments, the liquid crystal display device using the thin film transistor as the switching element has been described. However, the present invention is not limited to this, and can be applied to an electric circuit such as a shift register using the thin film transistor as a constituent element. Further, it can be applied to a phototransistor having a MIS (MOS) structure.

DESCRIPTION OF SYMBOLS 1 Glass substrate 2 Gate electrode 3 Gate insulating film 4 Semiconductor film 5 1st channel protective film 6 2nd channel protective film 7 Ohmic contact layer 8 Source / drain electrode 9 Thin-film transistor 10 Overcoat film 11 Contact hole 12 Pixel electrode

Claims (24)

  In the thin film transistor in which a channel protective film is provided on a semiconductor film, a pair of ohmic contact layers is provided on the semiconductor film including the channel protective film, and a source / drain electrode is provided on each ohmic contact layer, The channel protective film includes a first channel protective film made of a transparent insulating material provided on the semiconductor film, and a second channel made of a light-shielding metal provided on both sides of the upper surface of the first channel protective film. A thin film transistor comprising a protective film.   2. The thin film transistor according to claim 1, wherein the pair of ohmic contact layers are provided on an upper surface of each of the second channel protective films and on an upper surface of the semiconductor film on both sides thereof.   2. The thin film transistor according to claim 1, wherein the second channel protective film is formed of a light-shielding metal capable of being wet-etched simultaneously with the metal forming the source / drain electrodes.   4. The thin film transistor according to claim 3, wherein the second channel protective film is made of the same light-shielding metal as the source / drain electrodes.   In the thin film transistor in which a channel protective film is provided on a semiconductor film, a pair of ohmic contact layers is provided on the semiconductor film including the channel protective film, and a source / drain electrode is provided on each ohmic contact layer, The channel protective film includes a first channel protective film made of a transparent insulating film provided on the semiconductor film, and the same material as the semiconductor film provided on both sides of the upper surface of the first channel protective film. And a second channel protective film.   6. The thin film transistor according to claim 5, wherein the pair of ohmic contact layers are provided on an upper surface of each second channel protective film and on an upper surface of the semiconductor film on both sides thereof.   6. The thin film transistor according to claim 5, wherein a difference between the film thickness of the second channel protective film and the film thickness of the semiconductor film is within 50%.   In the thin film transistor in which a channel protective film is provided on a semiconductor film, a pair of ohmic contact layers is provided on the semiconductor film including the channel protective film, and a source / drain electrode is provided on each ohmic contact layer, The channel protective film is made of a light-shielding metal provided at two locations on the semiconductor film.   9. The thin film transistor according to claim 8, wherein the pair of ohmic contact layers are provided on the upper surface of each channel protective film and on the upper surface of the semiconductor film on both sides thereof.   9. The thin film transistor according to claim 8, wherein the channel protective film is formed of a light-shielding metal capable of being wet-etched simultaneously with the metal forming the source / drain electrodes.   11. The thin film transistor according to claim 10, wherein the channel protective film is formed of the same light shielding metal as the source / drain electrodes.   9. The thin film transistor according to claim 8, wherein a thin oxide film is provided on an upper surface of the semiconductor film.   13. The thin film transistor according to claim 1, further comprising an overcoat film that covers the source / drain electrodes.   14. The thin film transistor according to claim 13, wherein a pixel electrode is provided on the overcoat film so as to be connected to the one source / drain electrode. A method of manufacturing a thin film transistor in which a channel protective film is provided on a semiconductor film, a pair of ohmic contact layers is provided on the semiconductor film including the channel protective film, and a source / drain electrode is provided on each ohmic contact layer Because
A step of stacking and forming a first channel protective film made of a transparent insulating material and a second channel protective film made of a light-shielding metal on the formed semiconductor film forming film;
Forming an ohmic contact layer forming film on the semiconductor film forming film including the second channel protective film;
Patterning the ohmic contact layer forming film and the semiconductor film forming film by plasma etching to form the pair of ohmic contact layers and the semiconductor film; and
Removing the second channel protective film between the pair of ohmic contact layers and separating the second channel protective film into two;
Forming the source / drain electrodes on the pair of ohmic contact layers;
A method for producing a thin film transistor, comprising:   16. The method of manufacturing a thin film transistor according to claim 15, wherein the step of separating the second channel protective film into two is performed by wet etching simultaneously with the step of forming the source / drain electrodes. . A method of manufacturing a thin film transistor in which a channel protective film is provided on a semiconductor film, a pair of ohmic contact layers is provided on the semiconductor film including the channel protective film, and a source / drain electrode is provided on each ohmic contact layer Because
Forming a first channel protection film made of a transparent insulating material and a second channel protection film made of the same material as the semiconductor film formation film on the deposited semiconductor film formation film; and ,
Forming an ohmic contact layer forming film on the semiconductor film forming film including the second channel protective film;
The ohmic contact layer forming film and the semiconductor film forming film are patterned by plasma etching to form the pair of ohmic contact layers and the semiconductor film, and the second channel between the pair of ohmic contact layers Removing the protective film and separating the second channel protective film into two;
Forming the source / drain electrodes on the pair of ohmic contact layers;
A method for producing a thin film transistor, comprising:   18. The method of manufacturing a thin film transistor according to claim 17, wherein the film thickness of the second channel protective film is substantially the same as the film thickness of the semiconductor film forming film.   18. The method of manufacturing a thin film transistor according to claim 17, wherein the first and second channel protective films are formed by a process including backside exposure. A method of manufacturing a thin film transistor in which a channel protective film is provided on a semiconductor film, a pair of ohmic contact layers is provided on the semiconductor film including the channel protective film, and a source / drain electrode is provided on each ohmic contact layer Because
Forming a channel protective film made of a light-shielding metal on the formed semiconductor film forming film;
Forming an ohmic contact layer forming film on the semiconductor film forming film including the channel protective film;
Patterning the ohmic contact layer forming film and the semiconductor film forming film by plasma etching to form the pair of ohmic contact layers and the semiconductor film; and
Removing the channel protective film between the pair of ohmic contact layers and separating the channel protective film into two;
Forming the source / drain electrodes on the pair of ohmic contact layers;
A method for producing a thin film transistor, comprising:   21. The method of manufacturing a thin film transistor according to claim 20, wherein the step of separating the channel protective film into two is performed by wet etching simultaneously with the step of forming the source / drain electrodes.   21. The method of manufacturing a thin film transistor according to claim 20, further comprising a step of forming a thin oxide film on an upper surface of the formed film for forming a semiconductor film.   23. The method of manufacturing a thin film transistor according to claim 15, further comprising a step of forming an overcoat film covering the source / drain electrodes.   24. The method of manufacturing a thin film transistor according to claim 23, further comprising: forming a pixel electrode on the overcoat film by connecting the pixel electrode to the one source / drain electrode.

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