JP2011200083A - Semiconductor device for dc-dc converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor device at low cost, having improved reliability in short-circuit release abnormal test between adjacent terminals.SOLUTION: All lead terminals 21-24 prepared in a side surface of a first heat sink 31 become a terminal D connected to one of main electrodes, through which a switching current is passed in a power semiconductor chip 11. Moreover, a lead terminal 25 prepared in a second side surface side serves as a terminal S connected to another of the main electrode. Moreover, a lead terminal 28 prepared in the second side-surface side becomes a terminal FB into which a control signal of a control IC chip 12 is inputted. Lead terminals 26, 27 prepared between the lead terminal 25 and the lead terminal 28 become a terminal Vcc, a terminal GND, respectively. In this configuration, safe result can be obtained, even if a short-circuit release abnormal test between the adjacent terminals is performed.

Description

  The present invention relates to a semiconductor device having a structure in which two semiconductor chips are both incorporated in a package. In particular, the device can be safely protected even when a short-circuit release abnormal test between lead terminals derived from the side of the package is performed. The present invention relates to a semiconductor device for a DC-DC converter.

  A power semiconductor module incorporating a power semiconductor element (such as a rectifier diode, power MOSFET, IGBT, etc.) that performs switching and rectification of a large current generates a large amount of heat during operation of the power semiconductor element. For this reason, in a power semiconductor module in which a semiconductor chip on which such a power semiconductor element is formed is incorporated in a package, a control IC chip for safely controlling the power semiconductor element may be incorporated together. Many. In such a case, for example, a temperature sensor is mounted on the control IC chip, and when the heat generated by the power semiconductor element increases, control is performed to automatically turn it off. As a result, the safety and reliability of the power semiconductor module that performs high power operation can be improved.

  Such a power semiconductor module is described in, for example, Patent Document 1 and the like. Here, in a single-line package, the power semiconductor chip and the control IC with a built-in temperature sensor are mounted in contact with each other on the same lead frame, so that the temperature of the power semiconductor chip by the control IC chip is The rise is detected quickly and accurately to ensure this control.

  In such a semiconductor module, a high voltage is applied to each terminal connected to the power semiconductor chip, and a large current flows between the terminals. For this reason, a high breakdown voltage and high insulation are required between these terminals, and there is a problem that the degree of freedom of layout is reduced. On the other hand, Patent Document 2 describes a power semiconductor module package in which lead terminals formed on both side surfaces of a power module are arranged so that one side has a high side and the other side has a low side. Has been.

  By using these technologies, it is possible to obtain a power semiconductor module with high safety and reliability.

JP 2006-44958 A JP 2008-125315 A

  As described above, the power semiconductor element is driven with a high voltage (for example, the voltage between terminals in the DC-DC converter is 400 V or more). Generally, a control IC (control IC chip) has a lower voltage of about 10 V. Operates on voltage. That is, the power semiconductor chip and the control IC chip are provided close to each other in the same package, but their operating voltages are greatly different.

FIG. 1 shows a flyback DC-DC converter including a power semiconductor module 10 on which a power semiconductor chip and its control IC chip are mounted.
Specifically, the DC power supply Vdc is connected to one terminal of the primary winding P1 of the transformer T1 through the fuse F, and the other terminal of the primary winding P1 is connected to the terminal of the power semiconductor module 10 (the drain of the power semiconductor chip). Terminal S) of the power semiconductor module 10 and a ground potential of the DC power source Vdc from the terminal S (source terminal of the power semiconductor chip) of the power semiconductor module 10 via the resistor R1. The capacitor C1 is connected between them, one end of the secondary winding S1 of the transformer T1 is connected to the anode of the diode D2, the cathode of the diode D2 is the positive terminal of the capacitor C4, the anode of the photocoupler PC1a, and the output voltage of the error amplifier IC2. Connected to the detection terminal and the load, the other end of the secondary winding S1 is in error with the negative terminal of the capacitor C4 SG width unit IC 2 (signal ground) and is connected to a load SG.
One end of the primary auxiliary winding P2 of the transformer T1 is connected to the anode of the diode D1 and the Vcc terminal of the control IC chip 12. The feedback terminal FB of the control IC chip 12 is connected to the collector terminal of the photocoupler PC1b. One end of the capacitor C2 is connected, the emitter terminal of the photocoupler PC1b and the other end of the capacitor C2 are connected to the other end of the primary auxiliary winding P2 of the transformer T1 to GND which is the ground potential of the DC power supply Vdc. .

Here, when a DC voltage is applied from the DC power supply Vdc to the DC-DC converter, a voltage is applied from the DC power supply Vdc to the terminal D of the power semiconductor module 10 via the fuse F and the primary winding P1 of the transformer T1. The capacitor C3 is charged through the terminal Vcc via a startup circuit built in the control IC chip 12 of the power semiconductor module 10 (not shown), the voltage of the capacitor C3 rises and the control IC chip 12 is started, and the control An on / off signal is output from the IC chip 12 to the power semiconductor chip 11. As a result, the power semiconductor chip 11 is controlled to be turned on / off, and energy is sequentially induced from the primary winding P1 provided in the transformer T1 to the secondary winding S1 and the primary auxiliary winding P2, and the secondary winding S1. The output voltage Vo is rectified and smoothed by the diode D2 and the capacitor C4 and the output voltage Vo is supplied to the load, and the primary auxiliary winding P2 is also rectified and smoothed by the diode D1 and the capacitor C3. The power supply voltage is supplied to the power supply terminal Vcc.
Further, the output voltage Vo generated at both ends of the capacitor C4 is detected by the error amplifier IC2, and the detection signal is fed back to the control IC chip 12 via the photocouplers PC1a and PC1b, so that the control IC chip 12 outputs. The ON period of the power semiconductor chip 11 is controlled so that the voltage Vo becomes constant.
Further, the voltage applied to the power supply terminal Vcc of the control IC chip 12 rectified and smoothed in the primary control winding P2 and the output voltage Vo obtained from the secondary winding S1 are the same as those in the primary control winding P2. The voltage is proportional to the turn ratio with the winding S1. Here, when an overvoltage of a voltage applied to the power supply terminal Vcc of the control IC chip 12 is detected by an overvoltage protection circuit built in the control IC chip 12 (not shown), the power semiconductor chip 11 is turned on / off. Stop and protect safely.

By the way, as an operation test item for a DC-DC converter, a short circuit release abnormal test including a terminal to which a high voltage is applied and a terminal between adjacent terminals is defined in a package on which a power semiconductor chip is mounted.
4 and 5 show an example of a short-circuit or open-abnormal test in a DC-DC converter circuit diagram configured using a power semiconductor module.
For example, the short-circuit release abnormal test between adjacent terminals is performed on the DC-DC converter shown in FIG. 1 according to the test items as shown in FIG. 4 or FIG. Here, even if a short-circuit release abnormal test is performed, there should be no ignition or smoke of the parts.

  In order to satisfy such an abnormal test, it is effective to separate the low voltage side and high voltage side terminals of Patent Document 2. However, according to this measure, the terminal intervals are unequal such as L1 <L2 ≦ L3, and the manufacturing process of this power semiconductor chip becomes complicated, or this structure is required separately. It becomes difficult to reduce the size of the semiconductor chip to a general DIP shape.

  That is, it is difficult to obtain a semiconductor device with improved safety and reliability at low cost.

  The present invention has been made in view of such problems, and an object thereof is to provide an invention that solves the above problems.

In order to solve the above problems, the present invention has the following configurations.
Switching semiconductor chip and switching semiconductor for configuring a DC-DC converter that switches a DC voltage input from a DC power source through a transformer having a plurality of windings, converts the DC voltage to another DC voltage, and outputs the DC voltage In a semiconductor device having the function of a control circuit that controls the on / off operation of a chip,
A first heat dissipating plate, a second heat dissipating plate disposed away from the first heat dissipating plate, a plurality of first lead terminals disposed on the first side surface side of the first heat dissipating, A second lead terminal disposed on the second side surface located on the opposite side of the first side surface of the first heat radiation plate, and a second heat radiation plate on the second side surface side than the second lead terminal. A pair of a plurality of third lead terminals arranged on the near side and a transformer mounted on the main surface of the first heat radiating plate and connected to a high voltage of the DC power source, and a main current in the switching operation is passed. A first semiconductor chip comprising a main electrode of
A second semiconductor chip mounted on the main surface of the second heat sink, controlling the switching operation of the first semiconductor chip, and operating at a lower voltage than the first semiconductor chip;
First heat radiation plate, second heat radiation plate, part of first lead terminal, part of second lead terminal, part of third lead terminal, first semiconductor chip, and second semiconductor A mold material covering the chip, and
The first lead terminal, the second lead terminal, and the third lead terminal are each a semiconductor device led out in the opposite direction from a pair of side surfaces in the molding material,
The first heat radiating plate includes an extending portion that extends toward a side where the second heat radiating plate is provided in the arrangement direction of the first lead terminals,
At least some of the plurality of first lead terminals are coupled to the first heat sink,
Of the pair of main electrodes in the first semiconductor chip, the main electrode on the high voltage input side is connected to the first lead terminal, and the voltage close to the ground potential side of the pair of main electrodes in the first semiconductor chip Is connected to the second lead terminal, the electrode in the second semiconductor chip is connected to the third lead terminal,
As a short-circuit release test between terminals of the semiconductor device, when the short-circuit release test is performed on the first or second lead terminal, the switching control is continued or stopped.
In the semiconductor device according to the present invention, the plurality of third lead terminals include
A lead terminal for inputting a power supply voltage in the second semiconductor chip, a lead terminal for inputting a ground potential, and a lead terminal for inputting a control signal for controlling the operation of the second semiconductor chip are provided. It is characterized by that.
Further, the semiconductor device for a DC-DC converter according to the present invention has at least one of a lead terminal to which the power supply voltage is input and a lead terminal to which the installation potential is input on the second side surface side of the first heat sink. One is characterized in that it is installed closer to the lead terminal to which the control signal is input as viewed from the second lead terminal.
In the semiconductor device according to the present invention, the power supply voltage for the second semiconductor chip, which is proportional to the converted DC output voltage, is applied to the second semiconductor chip, and the power supply for the second semiconductor chip. The switching is stopped when the voltage is overvoltage than a predetermined voltage.

  As described above, according to the present invention, the low-voltage side terminal and the high-voltage side terminal are separated from each other on the opposing side surfaces, so that a semiconductor device with improved safety and reliability can be obtained at low cost.

It is an example of the DC-DC converter circuit diagram comprised using the power semiconductor module which concerns on embodiment of this invention. It is a perspective view from the upper surface which shows the structure of the power semiconductor module which concerns on embodiment of this invention. 1 is an external perspective view of a power semiconductor module according to an embodiment of the present invention. It is an example of the short circuit abnormal test in the DC-DC converter circuit diagram comprised using the power semiconductor module which concerns on embodiment of this invention. It is an example of the release abnormal test in the DC-DC converter circuit diagram comprised using the power semiconductor module which concerns on embodiment of this invention.

  Hereinafter, a power semiconductor module will be described as a semiconductor device according to an embodiment of the present invention. In this power semiconductor module, two semiconductor chips (power semiconductor chip and control IC chip) are mounted on independent heat sinks, and the whole is covered with a molding material.

  FIG. 1 shows an example of a power supply circuit (for example, a standby power supply circuit) realized by using the semiconductor module 10. In this circuit, a region surrounded by an alternate long and short dash line corresponds to the power semiconductor module 10, and includes a power semiconductor chip (first semiconductor chip) 11, a control IC chip (second semiconductor chip) 12, and the like. Is included. In this circuit, the output voltage Vo is applied to the load shown in the upper right.

  The power semiconductor chip (first semiconductor chip) 11 includes a rectifying diode, a power MOSFET, an IGBT (Insulated Gate Bipolar Transistor), and the like, and a terminal D has a primary winding P1 of a transformer T1 connected to a high voltage. Is connected to one end. The terminal S is set to a potential closer to the ground voltage than this. By applying a control signal to the gate which is the control terminal of the power semiconductor chip 11, the power semiconductor chip 11 is turned on and off to control the switching current between the terminal D and the terminal S which are a pair of main electrodes. Here, the control IC chip 12 gives a control signal to the gate of the power semiconductor chip 11 to control this switching current.

  The control IC chip (second semiconductor chip) 12 has a function for detecting a temperature rise of the power semiconductor chip 11. For this reason, the control circuit formed in the control IC chip 12 performs control to forcibly turn off the power semiconductor chip 11 when the temperature rise detected here is higher than a predetermined temperature. A power supply voltage for operating the control IC chip 12 is applied between the terminal Vcc and the terminal GND (ground). The terminal FB is a terminal to which a feedback signal is applied to the control IC chip 12 for controlling the on / off operation of the power semiconductor chip 11. Here, the feedback signal is a feedback signal given from an error amplifier connected to the output terminal of the load so that the output voltage Vo of the load of the transformer T1 connected to the terminal D of the power semiconductor chip 11 is constant, for example. is there.

  For this reason, in the power semiconductor module 10, five terminals D, S, Vcc, FB, and GND are required, and these are distributed to the lead terminals. Here, in this semiconductor module, the highest voltage is applied between the terminals D and S, and the largest current flows.

  FIG. 2 is a perspective view of the power semiconductor module (semiconductor device) 10 as viewed from above. Here, a rectangular region surrounded by a broken line in the figure corresponds to a molding material made of resin. On the outside of the mold material, four lead terminals 21 to 24 are led out in the opposite direction from one side surface, and four lead terminals 25 to 28 are led out from the other side surface, respectively. That is, the semiconductor module 10 is a DIP (Dual Inline Package).

  FIG. 3 is an external perspective view of the power semiconductor module 10. As shown in the figure, the power semiconductor module 10 is subjected to lead forming (bending) on lead terminals derived from the molding material 100, and each lead terminal has its tip inserted into a through hole on the printed circuit board. It is fixed to the printed circuit board by soldering.

As shown in FIG. 2, in this power semiconductor module 10, two heat sinks 31 and 32 are used, and the first heat sink 31 having a large area includes a power semiconductor chip (first semiconductor chip). 11 is mounted, and the control IC chip (second semiconductor chip) 12 is mounted on the second heat radiating plate 32 having a small area.
The lead terminals 21 to 28 used here are the first lead terminals (lead terminals 21 to 24), the second lead terminals (lead terminals 25), and the third lead terminals (lead terminals 26 to 28). , Classified by its function.

The first heat radiating plate 31 includes an extending portion 31 </ b> A that extends toward the side where the second heat radiating plate 32 is provided in the arrangement direction of the first lead terminals (21 to 24). For this reason, in FIG. 2, the side a formed between the first side surface and the second side surface of the first heat radiating plate 31 faces the side c of the second heat radiating plate 32 so as to face each other. The side b constituting the extending portion 31 </ b> A in the first heat radiating plate 31 is close to and opposed to the side d in the second heat radiating plate 32.

In addition, the side e serving as the tip of the extending portion 31A and the side f located on the opposite side of the side c in the second heat radiating plate 32 are substantially on the same straight line. With this configuration, the heat dissipation effect of the power semiconductor chip 11 can be enhanced, and the temperature rise detected by the control IC chip 12 can be more accurately performed.

  However, the side e serving as the tip of the extending portion 31 </ b> A does not necessarily need to be on the same straight line as the side f of the second heat radiating plate 32. For example, the extending portion 31A extends in the direction along the first side surface of the first heat radiating plate 31 to a position where at least the side d of the second heat radiating plate on which the control IC chip 12 is mounted is formed. And if it is arrange | positioned through the edge | side d and the space | interval of the 2nd heat sink 32, there exists the same effect.

  Moreover, the 1st heat sink 31 is connected and integrated with the 1st lead terminal (lead terminals 21-24) provided in the 1st side surface side, and is on the opposite side to the 1st side surface. The second lead terminal and the third lead terminal (lead terminals 25 to 28) on the second side face are not connected.

  The 2nd heat sink 32 is made into the form along this 2nd side surface side. The second heat radiation plate 32 is connected to a lead terminal 27 which is one of a plurality of third lead terminals, but is not connected to the first lead terminals (lead terminals 21 to 24). .

  In addition, the 1st heat sinks 31 and 32 and each lead terminal are manufactured by patterning a single metal plate. This metal plate is made of copper or copper alloy having high conductivity and high thermal conductivity.

  On the surface of the power semiconductor chip 11, bonding pads 111 and 112 connected to elements inside the power semiconductor chip 11 are provided. Similarly, bonding pads 121 to 125 are provided on the surface of the control IC chip 12. Electrical connection to the power semiconductor chip 11 and the control IC chip 12 is performed by connecting bonding wires to these bonding pads. In FIG. 2, the bonding pad 111, the lead terminal 25 and the bonding pad 122, the bonding pad 112 and the bonding pad 121, the bonding pad 123 and the lead terminal 26, the bonding pad 124 and the first heat radiation plate 31, and the bonding pad 125 are aligned. Each terminal 28 is connected using a bonding wire 50. Further, the back surface of the power semiconductor chip 11 (the surface in contact with the first heat radiating plate 31) and the first heat radiating plate 31 are also electrically connected. Further, the back surface of the control IC chip 12 (the surface in contact with the second heat radiating plate 32) and the second heat radiating plate 32 can be electrically connected. Note that a plurality of bonding wires 50 are used in places where a large current flows, such as between the bonding pad 111 and the lead terminal 25.

  In the semiconductor module 10, all of the first lead terminals (lead terminals 21 to 24) are terminals D connected to one of the main electrodes through which a switching current flows in the power semiconductor chip 11. Further, the second lead terminal (lead terminal 25) provided on the second heat radiating plate 32 becomes a terminal S connected to the other of the main electrodes.

  Also, the lead terminal 28 that is one of the third lead terminals provided on the second side surface side is a terminal FB to which a control signal of the control IC chip 12 is input. Lead terminals 26 and 27 provided between the lead terminal 25 and the lead terminal 28 become terminals Vcc and GND, respectively. These are used to apply a power supply voltage for operating the control IC chip 12, respectively.

FIG. 4 is an example of a short-circuit abnormal test in a DC-DC converter circuit diagram configured using the power semiconductor module according to the embodiment of the present invention.
Next, the operation of the DC-DC converter according to the embodiment of the present invention when the short-circuit abnormal test of the adjacent terminals of the power semiconductor module 10 having the three types of items shown in FIG. Will be described with reference to FIG.

The terminal S in FIG. 2 is installed adjacent to the lead terminal 25, and the terminal Vcc is installed adjacent to the lead terminal 26. As shown in FIG. 4A, during operation of the DC-DC converter, the terminal S and the terminal Vcc are short-circuited using a switch or the like (not shown). At the time of short circuit, the power supply voltage of the control IC chip 12 is short-circuited to GND through the resistor R1 and becomes 0V. Therefore, the operation of the control IC chip 12 is stopped and the DC-DC converter is stopped.
Therefore, it does not lead to smoke and ignition.
Next, the terminal Vcc of FIG. 2 is installed adjacent to the lead terminal 26, and the terminal GND is installed adjacent to the lead terminal 27. As shown in FIG. 4 (2), the terminal Vcc and the terminal GND are short-circuited by using a switch or the like (not shown) during the operation of the DC-DC converter. At the time of a short circuit, the power supply voltage of the control IC chip 12 is shorted to GND and becomes 0 V. Therefore, the operation of the control IC chip 12 stops and the DC-DC converter stops.
Therefore, it does not lead to smoke and ignition.
Further, the terminal GND in FIG. 2 is installed adjacent to the lead terminal 27, and the terminal FB is installed adjacent to the lead terminal 28. As shown in FIG. 4 (3), during operation of the DC-DC converter, the terminal GND and the terminal FB are short-circuited using a switch or the like (not shown). At the time of short circuit, the control terminal FB of the control IC chip 12 is short-circuited to GND and becomes 0 V. Therefore, the ON period from the control IC chip 12 to the power semiconductor chip 11 is controlled to 0, and the DC-DC converter is controlled. Stop.
Therefore, it does not lead to smoke and ignition.
In addition, since the terminal D of the power semiconductor chip 11 is composed of the lead terminals 21 to 24, since the adjacent terminals are all at the same potential, even if a short circuit test between the adjacent terminals is performed, the DC-DC converter It continues to operate normally and does not lead to smoke or ignition.

FIG. 5 is an example of a release abnormal test in a DC-DC converter circuit diagram configured using the power semiconductor module according to the embodiment of the present invention.
Next, see FIG. 2 for the operation of the DC-DC converter according to the embodiment of the present invention when the terminal open abnormality test of the power semiconductor module 10 having the four types of items shown in FIG. 5 is performed. To explain.

The terminal S in FIG. 2 is installed on the lead terminal 25. As shown in FIG. 5 (4), during operation of the DC-DC converter, the terminal S, one end of the resistor R1, and one end of the capacitor C1 are released using a switch or the like (not shown). At the time of release, since the ground-side terminal of the power semiconductor chip 11 is released, the supply of energy to the transformer T1 is stopped, so that it is stopped as a DC-DC converter.
Therefore, it does not lead to smoke and ignition.
Next, the terminal Vcc of FIG. As shown in FIG. 5 (5), during operation of the DC-DC converter, the connection of the terminal Vcc is released using a switch or the like (not shown). Since the power supply voltage of the control IC chip 12 becomes 0 V due to the release, the operation of the control IC chip 12 stops and the DC-DC converter stops.
Therefore, it does not lead to smoke and ignition.
Further, the terminal GND in FIG. 2 is installed on the lead terminal 27. As shown in FIG. 5 (6), the connection of the terminal GND is released by using a switch or the like (not shown) during the operation of the DC-DC converter. Since the power supply voltage is not applied between the terminal Vcc and the terminal GND of the control IC chip 12 due to the release, the operation of the control IC chip 12 stops and the DC-DC converter stops.
Therefore, it does not lead to smoke and ignition.
Also, the terminal FB in FIG. As shown in FIG. 5 (7), during the operation of the DC-DC converter, the connection between the terminal FB and one end of the capacitor C2 and the collector of the photocoupler PC1b is released using a switch or the like (not shown). With the release, the terminal voltage of the control terminal FB of the control IC chip 12 increases, and the DC-DC converter is controlled to increase the output voltage Vo. Therefore, the output voltage Vo reaches an overvoltage. Here, as described above, the output voltage Vo and the power supply voltage Vcc of the control IC chip 12 are in a proportional relationship and increase in the same manner as the output voltage Vo. Therefore, an overvoltage protection circuit of the control IC chip 12 (not shown) Since it operates to stop the on / off operation of the power semiconductor chip 11, the DC-DC converter stops.
Therefore, it does not lead to smoke and ignition.
In addition, since the terminal D of the power semiconductor chip 11 is composed of lead terminals 21 to 24, and the lead terminals 21 to 24 are all at the same potential, the DC-DC converter is normal even if the release test of each terminal is performed. It continues to operate and does not lead to smoke or ignition.

  In the configuration of FIG. 2, when the first semiconductor chip is a power semiconductor chip having a large calorific value, the safety and reliability of the semiconductor module can be improved from a viewpoint other than the abnormal test. Is possible. This point will be described below.

  In the configuration of FIG. 2, the heat generated by the power semiconductor chip 11 is transmitted to the first heat radiating plate 31 to be radiated. At this time, it is connected to the first heat radiating plate 31 and shown in FIG. As described above, heat is also radiated by the first lead terminals (lead terminals 21 to 24) led out to the outside. Therefore, high heat dissipation efficiency can be obtained by the configuration shown in FIG. 2, and the temperature rise of the power semiconductor chip 11 can be suppressed. The control IC chip 12 is a normal IC chip, and it is preferable in terms of operation that the IC chip for control 12 is not heated to a high temperature. In the configuration of FIG. 2, it is possible to reduce the temperature of each of the heat radiating plates 31 and 32, which is preferable in terms of operation of the control IC chip 12.

  On the other hand, in order to increase the safety of the power semiconductor module 10, the temperature sensor 60 installed in the control IC chip may sensitively detect the temperature rise of the power semiconductor chip 11 or the first heat radiation plate 31. is necessary. For this purpose, it is effective to install the temperature sensor 60 present on the second heat radiation plate 32 on the first heat radiation plate 31 side in the control IC chip 12. Therefore, the side a in the first heat radiating plate 31 and the side c in the second heat radiating plate 32 in FIG. 2 or the side b in the first heat radiating plate 31 and the side d in the second heat radiating plate 32 are brought close to each other. It is particularly preferable to install the temperature sensor 60 at a location close to the side c or the side d. With this configuration, the control IC chip 12 can control the power semiconductor chip 11 particularly safely. That is, it becomes possible to control the power semiconductor chip 11 safely. Further, the safety of the power semiconductor module 10 can be improved.

  In addition, the shape of the 2nd heat sink 32 is arbitrary. Any shape can be used as long as the power semiconductor module having the above-described configuration can be configured and combined with the first heat radiation plate 31 having the above-described configuration. For example, the shape of the second heat radiating plate 32 can be a circular shape, a semicircular shape, or the like. The shape of the first heat radiating plate 31 may be matched with the shape of the second heat radiating plate 32 in the vicinity of one apex thereof.

  In the above example, the power semiconductor chip (first semiconductor chip) and the control IC chip (second semiconductor chip) are mounted on each heat dissipation plate. Can be mounted on a frame. Even in this case, it is preferable to mount the semiconductor chip having a high voltage on the first heat sink and mounting the semiconductor chip having a low voltage on the second heat sink.

1 0 Power semiconductor module (semiconductor device)
11 Power semiconductor chip (first semiconductor chip)
12 Control IC chip (second semiconductor chip)
21-28 Lead terminal 31 1st heat sink 31A Extension part 32 2nd heat sink 50 Bonding wire 60 Temperature sensor 100 Package 111, 112, 121-125 Bonding pad Vdc DC power supply F Fuse T1 Transformer P1 Primary winding P2 Primary auxiliary winding S1 Secondary winding C1 to C3 Capacitor D1, D2 Diode R1 Resistance PC1a, PC1b Photocoupler IC2 Secondary side control IC

Claims (4)

Switching semiconductor chip and switching semiconductor for configuring a DC-DC converter that switches a DC voltage input from a DC power source through a transformer having a plurality of windings, converts the DC voltage to another DC voltage, and outputs the DC voltage In a semiconductor device having the function of a control circuit that controls the on / off operation of a chip,
A first heat sink;
A second heat radiating plate disposed away from the first heat radiating plate;
A plurality of first lead terminals arranged on the first side surface of the first heat radiation;
A second lead terminal disposed on a second side surface located on the opposite side of the first side surface of the first heat dissipation plate;
A plurality of third lead terminals arranged closer to the second heat dissipation plate than the second lead terminal on the second side surface;
A first semiconductor chip comprising a pair of main electrodes mounted on the main surface of the first heat sink, for switching a transformer connected to the high voltage of the DC power supply and through which a main current flows in a switching operation; ,
A second semiconductor chip mounted on the main surface of the second heat sink, controlling a switching operation of the first semiconductor chip, and operating at a lower voltage than the first semiconductor chip;
The first heat sink, the second heat sink, a part of the first lead terminal, a part of the second lead terminal, a part of the third lead terminal, the first semiconductor chip And a molding material for covering the second semiconductor chip,
The first lead terminal, the second lead terminal, and the third lead terminal are respectively semiconductor devices led out in opposite directions from a pair of side surfaces in the molding material,
The first heat radiating plate includes an extending portion that extends toward a side where the second heat radiating plate is provided in the arrangement direction of the first lead terminals.
At least some of the plurality of first lead terminals are connected to the first heat dissipation plate,
Of the pair of main electrodes in the first semiconductor chip, the main electrode to which a high voltage is input is connected to the first lead terminal, and the ground potential side of the pair of main electrodes in the first semiconductor chip. A main electrode on the side to which a voltage close to is input is connected to the second lead terminal, an electrode in the second semiconductor chip is connected to the third lead terminal,
As a short-circuit release test between terminals of a semiconductor device, when a short-circuit release test is performed on the first lead terminal, the second lead terminal, and the third lead terminal, the switching control is continued or stopped. Semiconductor device. The plurality of third lead terminals include
A lead terminal for inputting a power supply voltage in the second semiconductor chip, a lead terminal for inputting a ground potential, and a lead terminal for inputting a control signal for controlling the operation of the second semiconductor chip are provided. 2. The semiconductor device according to claim 1, wherein the semiconductor device is formed. On the second side surface of the first heat sink,
At least one of the lead terminal to which the power supply voltage is input and the lead terminal to which the installation potential is input is closer to the lead terminal to which the control signal is input as viewed from the second lead terminal. 3. The semiconductor device according to claim 2, wherein the semiconductor device is installed. In the second semiconductor chip,
Switching is performed when a power supply voltage for the second semiconductor chip that is proportional to the converted DC output voltage is applied, and the power supply voltage for the second semiconductor chip is overvoltage than a predetermined voltage. The semiconductor device according to claim 2, wherein the semiconductor device is stopped.

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