JP2011200037A - Semiconductor power converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor power converter where voltage/current surge does not occur, when ON/OFF of a switching element is switched, by monitoring a change of gate voltage supplied to a gate of the switching element and stepwisely switching the gate voltage at optimum timing, when ON/OFF of the switching element is switched.SOLUTION: The semiconductor power converter for turning on/off the switching element includes a gate voltage change detecting means for detecting the change in the gate voltage supplied to the switching element and a gate drive means for outputting gate drive voltage to the gate of the switching means, based on an inputted drive signal, and the gate drive means controls the gate drive voltage with a timing when the gate voltage change detecting means detects the change in the gate voltage.

Description

  The present invention relates to a semiconductor power conversion device, and more particularly to a semiconductor power conversion device that suppresses generation of a voltage / current surge when switching elements are switched on and off.

  In recent years, insulated gate bipolar transistors (IGBTs) have been used as voltage-driven switching elements. IGBTs are used in power control devices in the environmental field, inverter circuits incorporated in power control units of hybrid vehicles and electric vehicles, and further performance improvements such as reduction of switching loss and high speed operation are required. .

  Thus, Patent Document 1 discloses a gate drive circuit in a conventional semiconductor power conversion device that suppresses increases in switching loss and switching time. FIG. 11 is a diagram showing a gate drive circuit 10 in a conventional semiconductor power conversion device. In FIG. 11, the gate drive circuit 10 includes an IGBT 11, a comparator 12, a delay circuit 13, and a one-shot circuit 14 as switching elements, and controls the gate voltage when the switching elements are switched on and off. Specifically, when switching the IGBT 11 from OFF to ON, the comparator 12 monitors the gate-emitter voltage Vge of the IGBT 11. When the gate-emitter voltage Vge reaches a predetermined threshold value, the one-shot circuit 14 outputs a gate drive condition control signal for a certain period after a predetermined delay time set in the delay circuit 13 has elapsed.

  FIG. 12 is a diagram illustrating the gate voltage Vge, the collector voltage Vce, and the IGBT current Ic when the switching element is switched from OFF to ON. As shown in FIG. 12, in the gate drive circuit 10 in the conventional semiconductor power conversion device, when the IGBT 11 is switched from OFF to ON, the gate voltage Vge for turning on the IGBT 11 is not rapidly supplied to the gate of the IGBT 11. Instead, the gate voltage Vge for turning on the IGBT 11 is supplied after a predetermined delay time set in the delay circuit 13 has elapsed.

  As described above, in the gate drive circuit 10 in the conventional semiconductor power conversion device, two paths for switching the IGBT 11 from OFF to ON are provided, and the IGBT 11 is gently switched by switching the gate voltage Vge step by step. Switching from off to on. Thereby, the gate drive circuit 10 in the conventional semiconductor power conversion device aims at reduction of switching loss.

JP 2000-83371 A

  However, in the gate drive circuit 10 in the conventional semiconductor power conversion device, by performing the on / off switching operation of the IGBT 11 in a stepwise manner, the switching loss at the time of on / off switching of the IGBT 11 and the occurrence of voltage / current surge are suppressed. However, the timing when the gate voltage Vge is switched stepwise depends on a predetermined delay time set in the delay circuit 13. For this reason, in the gate drive circuit 10 in the conventional semiconductor power conversion device, when the IGBT 11 is switched on and off, a voltage / current surge may occur as shown in FIG.

  Specifically, for example, even when an optimum delay time is set in the delay circuit 13 in advance so that a voltage / current surge does not occur when the IGBT 11 is switched on / off, the gate drive circuit 10 in the conventional semiconductor power conversion device is changed. The timing at which the gate voltage Vge is actually switched cannot be said to be the optimum timing because of the influence of the ambient temperature fluctuation in operation.

  Further, the gate drive circuit 10 in the conventional semiconductor power conversion device is provided with two paths for switching on and off the IGBT 11, and the IGBT 11 is turned on and off so that no voltage / current surge is generated when the IGBT 11 is switched on and off. Elements such as resistors for adjusting the switching operation speed are arranged in each path. In the gate drive circuit 10 in the conventional semiconductor power converter, although the elements arranged in the respective paths are adjusted, these elements have individual variations.

  As described above, in the gate drive circuit 10 in the conventional semiconductor power conversion device, an optimum delay time is set in advance in consideration of the environment such as ambient temperature fluctuations and individual variations of elements arranged in each path. It is difficult to completely suppress the occurrence of voltage / current surges when the IGBT 11 is switched on and off.

  Therefore, an object of the present invention is to monitor the change of the gate voltage supplied to the gate of the switching element when switching the switching element on and off, and to switch the gate voltage step by step at an optimum timing. It is an object of the present invention to provide a semiconductor power conversion device that does not generate a voltage / current surge during on / off switching.

In order to achieve the above object, a semiconductor power conversion device according to the present invention is a semiconductor power conversion device that turns on and off a switching element, and includes a gate voltage change detection unit that detects a change in a gate voltage supplied to the switching element, Gate drive means for outputting a gate drive voltage to the gate of the switching element based on the input drive signal, the gate drive means at the timing when a change in the gate voltage is detected by the gate voltage change detection means. The driving voltage is controlled.
With this configuration, when switching the switching element on / off, the gate voltage supplied to the gate of the switching element regardless of the environment such as ambient temperature fluctuations and the influence of individual variations of elements incorporated in the semiconductor power conversion device The gate voltage can be switched step by step at the optimal timing at which the change of the signal is detected. As a result, it is possible to completely suppress the occurrence of voltage / current surges when switching the switching elements on and off.

Further, the preferable gate driving means includes an operational amplifier whose gate voltage is fed back to the negative input terminal, and a target gate voltage setting means for setting the target gate voltage inputted to the positive input terminal of the operational amplifier.
With this configuration, the gate drive voltage output from the gate drive circuit can be variably controlled without the need for providing a plurality of on / off paths unlike the gate drive circuit in the conventional semiconductor power conversion device. It becomes.

Further, the preferable target gate voltage is a first gate drive voltage for turning on the switching element during the on period when the switching element is turned on, and a second gate drive for turning off the switching element during the off period when turning off the switching element. In the on-period, the off-on switching transient period from the start of the on-period until the gate voltage change detecting means detects that the gate voltage changes to the first gate driving voltage is the second gate driving voltage. The gate voltage is the first target gate voltage set in advance and lower than the first gate drive voltage, and the gate voltage changes from the start of the off period to the second gate drive voltage in the off period. The on / off switching transient period until the change detection means detects the time is equal to or more than the second gate drive voltage and the first Characterized in that there is a gate drive voltage below a second target gate voltage set in advance.
With such a configuration, the optimum target gate voltage in the on period, the off period, the off / on switching transient period, and the on / off switching transient period is set in advance, so that the optimum gate voltage can be switched in stages.

Further, the preferred target gate voltage setting means lowers the target gate voltage from the first target gate voltage after a preset time has elapsed from the start of the on period in the off-on switching transition period, and turns off in the on-off switching transition period. The target gate voltage is raised from the second target gate voltage after elapse of a preset time from the start of the period.
With this configuration, it is possible to more reliably suppress the occurrence of voltage / current surges while ensuring the switching speed when switching the switching elements on and off.

Further, a preferred gate voltage change detecting means monitors the differential value of the gate voltage supplied to the switching element.
With this configuration, it is not necessary to include a delay circuit and a comparator in the conventional semiconductor power conversion device, and a change in the gate voltage supplied to the switching element can be detected appropriately.

  Moreover, in order to achieve the said objective, each process which each structure of the semiconductor power converter device of this invention mentioned above can be considered as a semiconductor power conversion method which gives a series of processing procedures. This method is provided in the form of a program for causing a computer to execute a series of processing procedures. This program may be installed in a computer in a form recorded on a computer-readable recording medium.

  As described above, according to the semiconductor power conversion device of the present invention, at the time of switching on / off of the switching element, in order to monitor the change of the gate voltage supplied to the gate of the switching element, Regardless of the influence of individual variations of elements incorporated in the semiconductor power converter, the gate voltage can be switched stepwise at an optimal timing. Thereby, in the semiconductor power converter device of this invention, generation | occurrence | production of the voltage / current surge at the time of on-off switching of a switching element can be suppressed completely.

The figure which shows the semiconductor power converter device 100 which concerns on one Embodiment of this invention. Timing chart showing states of drive signal, target gate voltage Vm, gate drive voltage Vg1, gate voltage Vg, gate voltage change detection result Vg2, collector voltage Vce, and IGBT current Ic The figure which shows the operation | movement of the semiconductor power converter device 100 and the state of each voltage and electric current (signal) when IGBT110 switches from ON to OFF Enlarged view of part A1 shown in FIG. The figure which shows the mode of operation | movement of the semiconductor power converter device 100 when IGBT110 switches from OFF, and the mode of each voltage and electric current (signal) Enlarged view of part A2 shown in FIG. The gate voltage Vg, the collector voltage Vce, and the IGBT current when the target voltage is set to Vms (shown by a dotted line) and when the target voltage is set to Vms ′ that is closer to Vss than Vms (shown by a solid line) The figure which shows the mode of change with Ic Timing chart showing states of drive signal, target gate voltage Vm, gate drive voltage Vg1, gate voltage Vg, gate voltage change detection result Vg2, collector voltage Vce, and IGBT current Ic in the modified example Enlarged view of B1 part shown in FIG. Enlarged view of B2 part shown in FIG. The figure which shows the gate drive circuit 10 in the conventional semiconductor power converter device The figure which shows the gate voltage Vge, the collector voltage Vce, and IGBT current Ic at the time of switching a switching element from OFF to ON

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
<Configuration>
FIG. 1 is a diagram showing a semiconductor power conversion device 100 according to an embodiment of the present invention. In FIG. 1, the semiconductor power conversion device 100 includes an IGBT 110, a resistor 120, a gate drive circuit 130, and a gate voltage change detection unit 140. Further, the gate drive circuit 130 includes a target gate voltage setting unit 131 and an operational amplifier 132, and the operational amplifier 132 forms a negative feedback circuit by the gate voltage feedback circuit 133.

  A drive signal (ON / OFF) indicating ON / OFF control of the IGBT 110 serving as a switching element is input to the gate drive circuit 130. The target gate voltage setting unit 131 in the gate drive circuit 130 sets the target gate voltage Vm based on the input drive signal (ON / OFF) and outputs it to the positive input terminal of the operational amplifier 132.

  The operational amplifier 132 outputs the gate drive voltage Vg1. The gate drive voltage Vg1 is supplied as a gate voltage Vg to the gate of the IGBT 110 via the resistor 120. The gate voltage Vg is fed back to the negative input terminal of the operational amplifier 132 via the gate voltage feedback circuit 133.

  The gate voltage change detection unit 140 monitors the gate voltage Vg supplied to the gate of the IGBT 110, detects a change in the gate voltage Vg, and notifies the target gate voltage setting unit 131 of the gate voltage change detection result Vg2. For example, the gate voltage change detection unit 140 may detect the change in the gate voltage Vg by monitoring the differential value of the gate voltage Vg.

  The target gate voltage setting unit 131 sets the target gate voltage Vm according to the gate voltage change detection result Vg2 notified from the gate voltage change detection unit 140, whereby the gate drive voltage Vg1 output from the operational amplifier 132 is set. It is controlled.

  FIG. 2 is a timing chart showing the states of the drive signal, target gate voltage Vm, gate drive voltage Vg1, gate voltage Vg, gate voltage change detection result Vg2, collector voltage Vce, and IGBT current Ic. Vdd is the maximum voltage output from the gate drive circuit 130 and is a gate voltage for turning on the IGBT 110, and Vss is the minimum voltage output from the gate drive circuit 130 and is used to turn off the IGBT 110. Is the gate voltage. Further, Vms is a target gate voltage that does not generate a voltage / current surge when switching the IGBT 110 from ON to OFF, and is Vss or more and Vdd or less, and Vmd is used when the IGBT 110 is switched from OFF to ON. A target gate voltage that does not generate a voltage / current surge and is not less than Vss and not more than Vdd.

<On / off switching operation>
FIG. 3 is a diagram illustrating the operation of the semiconductor power conversion device 100 and the state of each voltage / current (signal) when the IGBT 110 is switched from on to off. The operation of the semiconductor power conversion device 100 and the state of each voltage / current (signal) when the IGBT 110 is switched from on to off will be described in detail with reference to FIGS. 2 and 3.

  First, at time T1, the driving signal (ON) changes to a driving signal (OFF), and here, an operation for switching the IGBT 110 from ON to OFF is started.

  In step S110, the target gate voltage setting unit 131 receives the drive signal (OFF).

  In step S120, the target gate voltage setting unit 131 sets the target gate voltage Vm from Vdd to Vms based on the received drive signal (OFF).

  Here, Vms set by the target gate voltage setting unit 131 is input to the positive input terminal of the operational amplifier 132. The gate voltage Vg is negatively fed back to the negative input terminal of the operational amplifier 132 via the gate voltage feedback circuit 133. Immediately before time T1, the gate voltage Vg is Vdd (≧ Vms), which is a gate voltage for turning on the IGBT 110. Therefore, at time T1, the gate drive voltage Vg1 is the minimum voltage output by the gate drive circuit 130. It becomes a certain Vss (C110).

  Since the gate drive voltage Vg1 drops from Vdd to Vss, the gate voltage Vg starts to drop from Vdd (C120). At the same time, the collector voltage Vce starts to rise, and the IGBT current Ic starts to drop (C130).

  Vms set by the target gate voltage setting unit 131 is input to the positive input terminal of the operational amplifier 132, and the gate voltage Vg is negatively fed back to the negative input terminal of the operational amplifier 132 via the gate voltage feedback circuit 133. Therefore, the gate drive voltage Vg1 and the gate voltage Vg gradually reach a steady state at Vms (C111, C121).

  On the other hand, the collector voltage Vce continues to rise and the IGBT current Ic continues to fall. Thereafter, at time T2, the collector voltage Vce finishes rising, and the IGBT current Ic finishes dropping (C131).

  When the rise of the collector voltage Vce is completed and the drop of the IGBT current Ic is completed, the gate voltage Vg starts dropping from the steady state of Vms through the mirror region (C122).

  Here, in step S130, the gate voltage change detection unit 140 detects a change in the gate voltage Vg and notifies the target gate voltage setting unit 131 of the gate voltage change detection result Vg2.

  Next, in step S140, the target gate voltage setting unit 131 sets the target gate voltage Vm from Vms to Vss based on the gate voltage change detection result Vg2 notified from the gate voltage change detection unit 140.

  Here, since Vss set by the target gate voltage setting unit 131 is input to the positive input terminal of the operational amplifier 132, the gate drive voltage Vg1 output from the operational amplifier 132 changes from Vms to Vss (C112), Vms. The gate voltage Vg starting to drop from the steady state becomes Vss (C123).

  As described above, when the drive signal (OFF) is input at time T1, an operation for switching the IGBT 110 from ON to OFF is started. At time T2, the gate voltage Vg drops to Vss, whereby the IGBT 110 is switched. The operation for switching from on to off ends.

  Furthermore, the operation of the target gate voltage setting unit 131 when the IGBT 110 is switched from on to off will be described in detail. 4 is an enlarged view of a portion A1 shown in FIG. In FIG. 4, a period in which the drive signal (ON) is input to the target gate voltage setting unit 131 is an ON period Ton, and a period in which the drive signal (OFF) is input is an OFF period Toff. Further, in the off period Toff, a period from when the drive signal (off) is input to the target gate voltage setting unit 131 until the gate voltage Vg becomes Vss is set as an on / off switching transient period Toff-c. In other words, the on / off switching transition period Toff-c is a period from time T1 to time T2 shown in FIG.

  In the on period Ton, the target gate voltage setting unit 131 sets Vdd as the target gate voltage Vm.

  At the timing when the drive signal (OFF) is input, the target gate voltage setting unit 131 sets the target gate voltage Vm from Vdd to Vms (time T1). Here, Vms is stored in advance in the target gate voltage setting unit 131 as a target gate voltage that does not generate a voltage / current surge when the IGBT 110 is switched from on to off.

  Thus, at the timing when the drive signal (OFF) is input, the target gate voltage setting unit 131 first sets the target gate voltage Vm to Vms instead of Vdd to Vss, as shown in FIG. When the IGBT 110 is switched from on to off (time T1), no voltage / current surge occurs.

  In the on / off switching transition period Toff-c, the target gate voltage setting unit 131 maintains the target gate voltage Vm at Vms (time T1 to T2).

  Next, at time T2, the gate voltage change detection unit 140 detects a change in the gate voltage Vg, and notifies the target gate voltage setting unit 131 of the gate voltage change detection result Vg2. The target gate voltage setting unit 131 sets the target gate voltage Vm from Vms to Vss at the timing of receiving the gate voltage change detection result Vg2.

  As described above, the target gate voltage setting unit 131 sets the target gate voltage Vm from Vms to Vss at the timing when the gate voltage change detection result Vg2 is received instead of the predetermined delay time set in advance. As shown in FIG. 2, when the IGBT 110 is switched from on to off (time T2), no voltage / current surge occurs. More specifically, the gate voltage change detection unit 140 monitors the change in the gate voltage Vg regardless of the environment such as ambient temperature fluctuations and the influence of individual variations of elements incorporated in the semiconductor power conversion device 100. The target gate voltage setting unit 131 controls the timing for switching the target gate voltage Vm. As a result, as shown in FIG. 2, when the IGBT 110 is switched from on to off (time T2), no voltage / current surge occurs.

<Off-on switching operation>
FIG. 5 is a diagram illustrating the operation of the semiconductor power conversion device 100 and the state of each voltage / current (signal) when the IGBT 110 is switched from OFF to ON. The operation of the semiconductor power conversion device 100 and the state of each voltage / current (signal) when the IGBT 110 is switched from OFF to ON will be described in detail with reference to FIGS. 2 and 5.

  First, at time T3, the driving signal (off) changes to a driving signal (on), and an operation for switching the IGBT 110 from off to on is started.

  In step S210, the target gate voltage setting unit 131 receives the drive signal (ON).

  In step S220, the target gate voltage setting unit 131 sets the target gate voltage Vm from Vss to Vmd based on the received drive signal (ON).

  Here, Vmd set by the target gate voltage setting unit 131 is input to the positive input terminal of the operational amplifier 132. The gate voltage Vg is negatively fed back to the negative input terminal of the operational amplifier 132 via the gate voltage feedback circuit 133. Immediately before time T3, the gate voltage Vg is Vss (≦ Vmd), which is a gate voltage for turning off the IGBT 110. Therefore, at time T3, the gate drive voltage Vg1 is the maximum voltage output by the gate drive circuit 130. It becomes a certain Vdd (C210).

  Since the gate drive voltage Vg1 rises from Vss to Vdd, the gate voltage Vg starts to rise from Vss (C220). At the same time, the collector voltage Vce starts to fall, and the IGBT current Ic starts to rise (C230).

  Vmd set by the target gate voltage setting unit 131 is input to the positive input terminal of the operational amplifier 132, and the gate voltage Vg is negatively fed back to the negative input terminal of the operational amplifier 132 via the gate voltage feedback circuit 133. Therefore, the gate drive voltage Vg1 and the gate voltage Vg gradually reach a steady state at Vmd (C211, C221).

  On the other hand, collector voltage Vce continues to decrease, and IGBT current Ic continues to increase. Thereafter, at time T4, collector voltage Vce completes decreasing and IGBT current Ic completes increasing (C231).

  When the fall of the collector voltage Vce is completed and the rise of the IGBT current Ic is completed, the gate voltage Vg starts to rise from the steady state of Vmd through the mirror region (C222).

  Here, in step S230, the gate voltage change detection unit 140 detects a change in the gate voltage Vg, and notifies the target gate voltage setting unit 131 of the gate voltage change detection result Vg2.

  Next, in step S240, the target gate voltage setting unit 131 sets the target gate voltage Vm from Vmd to Vdd based on the gate voltage change detection result Vg2 notified from the gate voltage change detection unit 140.

  Here, since Vdd set by the target gate voltage setting unit 131 is input to the positive input terminal of the operational amplifier 132, the gate drive voltage Vg1 output from the operational amplifier 132 changes from Vmd to Vdd (C212), and Vmd. The gate voltage Vg starting to rise from the steady state becomes Vdd (C223).

  As described above, when the drive signal (ON) is input at time T3, an operation for switching the IGBT 110 from OFF to ON is started. At time T4, the gate voltage Vg rises to Vdd, so that the IGBT 110 is switched. The operation for switching from OFF to ON ends.

  Furthermore, the operation of the target gate voltage setting unit 131 when the IGBT 110 is switched from OFF to ON will be described in detail. 6 is an enlarged view of a portion A2 shown in FIG. In FIG. 6, a period in which the drive signal (off) is input to the target gate voltage setting unit 131 is an off period Toff, and a period in which the drive signal (on) is input is an on period Ton. Further, in the ON period Ton, a period from when the drive signal (ON) is input to the target gate voltage setting unit 131 until the gate voltage Vg becomes Vdd is set as an OFF / ON switching transient period Ton-c. In other words, the off-on switching transition period Ton-c is a period from time T3 to T4 shown in FIG.

  In the off period Toff, the target gate voltage setting unit 131 sets Vss as the target gate voltage Vm.

  At the timing when the drive signal (ON) is input, the target gate voltage setting unit 131 sets the target gate voltage Vm from Vss to Vmd (time T3). Here, Vmd is stored in advance in the target gate voltage setting unit 131 as a target gate voltage that does not generate a voltage / current surge when the IGBT 110 is switched from OFF to ON.

  In this way, at the timing when the drive signal (ON) is input, the target gate voltage setting unit 131 first sets the target gate voltage Vm to Vmd instead of Vss to Vdd, as shown in FIG. When the IGBT 110 is switched from OFF to ON (time T3), no voltage / current surge occurs.

  In the off-on switching transition period Ton-c, the target gate voltage setting unit 131 maintains the target gate voltage Vm at Vmd (time T3 to T4).

  Next, at time T4, the gate voltage change detection unit 140 detects a change in the gate voltage Vg, and notifies the target gate voltage setting unit 131 of the gate voltage change detection result Vg2. The target gate voltage setting unit 131 sets the target gate voltage Vm from Vmd to Vdd at the timing of receiving the gate voltage change detection result Vg2.

  Thus, the target gate voltage setting unit 131 sets the target gate voltage Vm from Vmd to Vdd at the timing of receiving the gate voltage change detection result Vg2 instead of the predetermined delay time set in advance. As shown in FIG. 2, when the IGBT 110 is switched from OFF to ON (time T4), no voltage / current surge occurs. More specifically, the gate voltage change detection unit 140 monitors the change in the gate voltage Vg regardless of the environment such as ambient temperature fluctuations and the influence of individual variations of elements incorporated in the semiconductor power conversion device 100. The target gate voltage setting unit 131 controls the timing for switching the target gate voltage Vm. Thereby, as shown in FIG. 2, when the IGBT 110 is switched from OFF to ON (time T4), no voltage / current surge occurs.

  As described above, according to the semiconductor power conversion device 100 according to the embodiment of the present invention, the change in the ambient temperature is monitored in order to monitor the change in the gate voltage Vg supplied to the gate of the IGBT 110 when the IGBT 110 is switched on and off. The gate voltage Vg can be switched stepwise at the optimum timing regardless of the environment such as the above and the influence of individual variations such as the resistance 120 incorporated in the semiconductor power conversion device 100. Thereby, in the semiconductor power converter device 100 which concerns on one Embodiment of this invention, generation | occurrence | production of the voltage / current surge at the time of on-off switching of IGBT110 can be suppressed completely.

  In the semiconductor power conversion device 100 according to an embodiment of the present invention, the gate drive voltage Vg1 output from the gate drive circuit 130 can be variably controlled. Therefore, compared with the gate drive circuit in the conventional semiconductor power conversion device, There is no need to provide a plurality of routes for switching on / off. As a result, the number of elements constituting the circuit can be reduced, and the cost can be reduced and the circuit can be reduced.

  Further, since the operational amplifier 132 forms a negative feedback circuit and controls the gate voltage Vg, a stable operation can be realized during feedback control without being affected by external influences such as noise and temperature fluctuation.

  Furthermore, in the semiconductor power conversion device 100 according to an embodiment of the present invention, the gate voltage change detection unit 140 monitors the differential value of the gate voltage Vg supplied to the IGBT 110, so that the delay circuit in the conventional semiconductor power conversion device is used. And there is no need to provide a comparator.

  In the present embodiment, Vms and Vmd are stored in advance in the target gate voltage setting unit 131 as target gate voltages that do not generate voltage / current surges. However, the present invention is not limited to this. For example, Vms and Vmd may be separately stored in a storage unit or the like, and the target gate voltage setting unit 131 may acquire from the storage unit. Further, Vms and Vmd can be dynamically adjusted in accordance with, for example, the collector voltage Vce and the IGBT current Ic so as to have optimum values as a target gate voltage that does not generate a voltage / current surge. I do not care.

  Furthermore, the smaller the value of Vms, the larger the amount of change in which the collector voltage Vce increases and the amount of change in which the IGBT current Ic decreases. FIG. 7 shows the gate voltage Vg and the collector voltage when the target voltage is set to Vms (shown by a dotted line) and when the target voltage is set to Vms ′ that is closer to Vss than Vms (shown by a solid line). It is a figure which shows the mode of a change with Vce and IGBT electric current Ic. When the target voltage is set to Vms ′, the gate voltage Vg drops from Vdd to Vms ′. Accordingly, the amount of change in which the collector voltage Vce increases and the amount of change in which the IGBT current Ic decreases is greater when the target voltage is set to Vms ′ than when the target voltage is set to Vms. The on / off switching speed increases. Similarly, as the value of Vmd increases, the amount of change in which the collector voltage Vce decreases and the amount of change in which the IGBT current Ic increases increases, and the off / on switching speed of the IGBT 110 increases.

  Next, a modification of one embodiment of the present invention will be described. The configuration of the semiconductor power conversion device according to this modification is the same as that of the semiconductor power conversion device 100 according to the embodiment of the present invention shown in FIG.

  FIG. 8 is a timing chart showing the states of the drive signal, target gate voltage Vm, gate drive voltage Vg1, gate voltage Vg, gate voltage change detection result Vg2, collector voltage Vce, and IGBT current Ic in this modification. 8 is the same as FIG. 2 described in the embodiment of the present invention except for time T5 between times T1 and T2 and time T6 between times T3 and T4. Hereinafter, in the present modification, differences from the embodiment of the present invention will be described in detail.

<Modification of on / off switching operation>
FIG. 9 is an enlarged view of a portion B1 shown in FIG. In FIG. 9, the basic operation of the target gate voltage setting unit 131 is the same as that of the embodiment of the present invention shown in FIG. 4 for the on period Ton, the off period Toff, and the on / off switching transition period Toff-c. .

  In the embodiment of the present invention shown in FIG. 4, the target gate voltage setting unit 131 maintains the target gate voltage Vm at Vms in the on / off switching transition period Toff-c. In the example, at the target voltage increase timing (time T5), the target gate voltage setting unit 131 gradually increases the target gate voltage Vm from Vms.

  In the on / off switching excessive period Toff-c, the target gate voltage setting unit 131 keeps the target gate voltage Vm constant at Vms in the period from time T1 to T5, and the target gate voltage setting in the period from time T5 to T2. The unit 131 gradually increases the target gate voltage Vm from Vms. Thereby, on / off switching of the IGBT 110 is performed at a constant speed during the period of time T1 to T5, and the amount of change in which the collector voltage Vce increases and the amount of change in which the IGBT current Ic decreases is reduced during the period of time T5 to T2. This reliably suppresses the occurrence of voltage / current surges at time T2.

  The target voltage increase timing (time T5) is stored in advance in the target gate voltage setting unit 131 as a predetermined time after the drive signal (OFF) is input. Further, the target gate voltage Vm (the amount of increase and the speed of increase) that the target gate voltage setting unit 131 gradually increases from the target voltage increase timing (time T5) is also stored in the target gate voltage setting unit 131 in advance.

<Modification of off-on switching operation>
FIG. 10 is an enlarged view of a portion B2 shown in FIG. In FIG. 10, the basic operation of the target gate voltage setting unit 131 is the same as that of the embodiment of the present invention shown in FIG. 6 for the off period Toff, the on period Ton, and the off-on switching transition period Ton-c. .

  In the embodiment of the present invention shown in FIG. 6, the target gate voltage setting unit 131 maintains the target gate voltage Vm at Vmd in the off-on switching transition period Ton-c. In the example, at the target voltage drop timing (time T6), the target gate voltage setting unit 131 gradually decreases the target gate voltage Vm from Vmd.

  The target gate voltage setting unit 131 keeps the target gate voltage Vm constant at Vmd in the period from time T3 to T6 in the off-on switching excessive period Ton-c, and sets the target gate voltage in the period from time T6 to T4. The unit 131 gradually decreases the target gate voltage Vm from Vmd. As a result, the IGBT 110 is switched off and on at a constant speed during the period from time T2 to T6, and during the period from time T6 to T4, the amount of change in which the collector voltage Vce decreases and the amount of change in which the IGBT current Ic increases are reduced. Thus, the occurrence of voltage / current surge at time T4 is reliably suppressed.

  Note that the target voltage drop timing (time T6) is stored in advance in the target gate voltage setting unit 131 as a predetermined time after the drive signal (ON) is input. Further, the target gate voltage Vm (the amount of decrease and the rate of decrease) that the target gate voltage setting unit 131 gradually decreases from the target voltage drop timing (time T6) is also stored in the target gate voltage setting unit 131 in advance.

  As described above, according to the modification of the embodiment of the present invention, it is possible to more reliably suppress the occurrence of voltage / current surge while ensuring the switching speed when switching on / off the IGBT 110.

  In this modification, the predetermined time for determining the target voltage rise timing (time T5) and the target voltage rise timing (time T6) is stored in the target gate voltage setting unit 131 in advance. It is not limited. For example, the predetermined time for determining the target voltage rise timing (time T5) and the target voltage rise timing (time T6) is separately stored in a storage unit or the like, and the target gate voltage setting unit 131 acquires from the storage unit. It may be a configuration. Furthermore, the predetermined time is dynamically adjusted in accordance with, for example, the collector voltage Vce and the IGBT current Ic so that the switching time at the time of switching on / off of the IGBT 110 and an optimum value that does not generate a voltage / current surge are obtained. A configuration that can be used may be used.

  Similarly, in the present modification, the target gate voltage Vm (the amount of increase and the speed of increase) that the target gate voltage setting unit 131 gradually increases and the target gate voltage Vm (the amount of decrease and the rate of decrease) that gradually decrease are the target gate voltage. Although stored in the voltage setting unit 131 in advance, the present invention is not limited to this. For example, the target gate voltage Vm (the amount of increase and the speed of increase) that is gradually increased by the target gate voltage setting unit 131 and the target gate voltage Vm (the amount of decrease and the rate of decrease) that are gradually decreased are separately stored in a storage unit or the like. The target gate voltage setting unit 131 may be configured to acquire from the storage unit. Furthermore, the amount of increase and the rate of increase, and the amount of decrease and the rate of decrease are dynamically adjusted in accordance with, for example, the collector voltage Vce and the IGBT current Ic so as to have optimum values that do not cause a voltage / current surge. A configuration that can be used may be used.

  INDUSTRIAL APPLICABILITY The present invention is useful for a semiconductor power conversion device or the like that turns on / off a voltage-driven switching element incorporated in an inverter circuit or the like.

DESCRIPTION OF SYMBOLS 10 Gate drive circuit 12 Comparator 13 Delay circuit 14 One shot circuit 100 Semiconductor power converter 11, 110 IGBT
DESCRIPTION OF SYMBOLS 120 Resistance 130 Gate drive circuit 140 Gate voltage change detection part 131 Target gate voltage setting part 132 Operational amplifier 133 Gate voltage feedback circuit S110, S120, S130, S140, S210, S220, S230, S240 Each step which the semiconductor power converter device 100 performs C110, C111, C112, C210, C211, C212 Transition of gate drive voltage Vg1 C120, C121, C122, C123, C220, C221, C222, C223 Transition of gate voltage Vg C130, C131, C230, C231 Collector voltage Vce and IGBT current Ic transition

Claims (5)

A semiconductor power conversion device for turning on and off a switching element,
Gate voltage change detection means for detecting a change in gate voltage supplied to the switching element;
Gate drive means for outputting a gate drive voltage to the gate of the switching element based on the input drive signal;
The semiconductor power conversion device according to claim 1, wherein the gate driving unit controls the gate driving voltage at a timing when the change in the gate voltage is detected by the gate voltage change detecting unit. The gate driving means includes
An operational amplifier in which the gate voltage is fed back to the negative input terminal;
The semiconductor power conversion device according to claim 1, further comprising target gate voltage setting means for setting a target gate voltage input to a positive input terminal of the operational amplifier. The target gate voltage is
The on period during which the switching element is turned on is a first gate drive voltage that turns on the switching element,
The off period in which the switching element is turned off is a second gate drive voltage for turning off the switching element,
Of the on-period, an off-on switching transient period from the start of the on-period until the gate voltage change detecting unit detects that the gate voltage changes to the first gate drive voltage is the second gate. A preset first target gate voltage that is not less than the drive voltage and not more than the first gate drive voltage,
Of the off period, an on / off switching transient period from the start of the off period to when the gate voltage change detecting means detects that the gate voltage changes to the second gate drive voltage is the second gate. 3. The semiconductor power conversion device according to claim 2, wherein the semiconductor power conversion device is a second target gate voltage set in advance that is not less than a drive voltage and not more than the first gate drive voltage. The target gate voltage setting means includes
Of the off-on switching transition period, after elapse of a preset time from the start of the on-period, the target gate voltage is lowered from the first target gate voltage,
4. The semiconductor power conversion according to claim 3, wherein the target gate voltage is increased from the second target gate voltage after a preset time has elapsed from the start of the off period in the on / off switching transition period. apparatus.   The semiconductor power conversion device according to claim 1, wherein the gate voltage change detection unit monitors a differential value of a gate voltage supplied to the switching element.

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