JP2011197889A - Programmable controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the deterioration in characteristics of an electric double layer capacitor, the deterioration being caused by charging.SOLUTION: A programmable controller includes: a power supply circuit 1 which generates internal power by using external power, and outputs a power supply break-off prior notice signal when power supply is interrupted; an electric double layer capacitor 8; charging system 6, 7 which charge up the electric double layer capacitor 8 by using the internal power; an EEPROM 23; a RAM 24 which stores device data 25; and a control part 2 which updates the device data 25 that the RAM 24 stores, by using the internal power, and evacuates the device data 25, which the RAM 24 stores, to the EEPROM 23 by using electric power stored in the electric double layer capacitor 8 when the power supply break-off prior notice signal is output. The charging systems 6, 7 intermittently stop charging to the electric double layer capacitor 8 so that the voltage of the electric double layer capacitor 8 may be within a prescribed range.

Description

  The present invention relates to a programmable controller that controls a controlled apparatus.

  A programmable controller (hereinafter simply referred to as a PLC) includes input / output data to / from a controlled device and intermediate data necessary for executing a user program by executing a user program described in a ladder language or the like. Generate and update device data sequentially. In order for the PLC to realize high-speed control, device data is usually stored in a volatile memory such as a RAM (Random Access Memory).

  Many control systems using a PLC are required to return to the same state as that immediately before the power is turned off when the power is turned off. That is, when power is restored, it is necessary to be able to use device data immediately before the power is turned off. As one configuration for this purpose, a separate rewritable non-volatile memory such as an EEPROM (Electrically Erasable and Programmable Read Only Memory) is provided for backup, in addition to the volatile memory in which the device data is stored. A configuration in which device data stored in the volatile memory is transferred to the backup non-volatile memory upon disconnection (see, for example, Patent Document 1 and Patent Document 2) can be considered.

  In order to transfer the device data from the volatile memory to the nonvolatile memory, the PLC requires a backup power supply in addition to the power supplied from the main power supply circuit. As a backup power source, it is conceivable to employ a UPS, a battery, an aluminum electrolytic capacitor, a tantalum capacitor, an electric double layer capacitor, or the like. However, a write operation to the nonvolatile memory when transferring device data requires a relatively large amount of power. Further, the PLC is required to be compact and low cost. In view of these demands, it can be said that the electric double layer capacitor is most suitable for the backup power source in the group of backup power source candidates described above.

JP 2005-339151 A JP 2000-181510 A

  However, the electric double layer capacitor has a problem that, when a charging voltage is continuously applied, the characteristics deteriorate due to charging and the life is shortened. If the electric double layer capacitor has a short life, the electric double layer capacitor must be frequently replaced, which increases the burden on the user. Therefore, when an electric double layer capacitor is employed as a backup power source for the PLC, a device for reducing deterioration of characteristics of the electric double layer capacitor due to charging is required.

  The present invention has been made in view of the above, and an object of the present invention is to obtain a PLC in which characteristic deterioration due to charging of a backup power source is reduced.

  In order to solve the above-described problems and achieve the object, the present invention generates an internal power supply using an external power supply, outputs a power-off notice signal when the power is cut off, an electric double layer capacitor, A charging system that charges the electric double layer capacitor using the internal power supply; a nonvolatile first memory; and a volatile second memory that stores device data. The second power supply using the internal power supply. When the device data stored in the memory is updated and the power-off notice signal is output, the device data stored in the second memory is stored in the first memory using the electric power stored in the electric double layer capacitor. And a controller that evacuates, wherein the charging system intermittently stops the charging of the electric double layer capacitor so that the voltage of the electric double layer capacitor is within a predetermined range. And butterflies.

  According to the present invention, it is possible to obtain a PLC capable of reducing characteristic deterioration due to charging of an electric double layer capacitor for backup and substantially eliminating the need for replacement of the capacitor due to its lifetime.

FIG. 1 is a diagram showing a configuration of the PLC according to the first embodiment. FIG. 2 is a timing chart illustrating how the power mode changes in the PLC according to the first embodiment. FIG. 3 is a diagram illustrating a configuration of the PLC according to the second embodiment. FIG. 4 is a timing chart illustrating how the power supply mode changes in the PLC according to the second embodiment.

  Hereinafter, an embodiment of a programmable controller (PLC) according to the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited to the embodiments.

Embodiment 1 FIG.
FIG. 1 is a diagram showing a configuration of a first embodiment of a PLC according to the present invention. As shown in the figure, the PLC 100 according to the first embodiment includes a main power supply circuit 1 that generates a power supply (internal power supply) supplied to the entire PLC 100 from a commercial power supply (external power supply), and an electric double layer capacitor 8 as a backup power supply. It is equipped with. Further, the PLC 100 includes an EEPROM 23 as a rewritable nonvolatile memory that stores a user program and a system program (not shown) for controlling the entire PLC 100, an MPU 21 that operates based on the system program, and the user program ASIC 22 that generates / updates device data 25 based on the above, and RAM 24 that is a volatile memory used as a work area of MPU 21. The ASIC 22 stores the generated device data 25 in the RAM 24 and sequentially updates the device data 25 on the RAM 24.

  The MPU 21 executes backup processing for saving the device data 25 stored in the RAM 24 to the EEPROM 23 when the power is turned off. The MPU 21, the ASIC 22, the EEPROM 23, and the RAM 24 operate using the power supplied from the main power supply circuit 1 during normal operation, and perform the above-described backup processing using the power supplied from the electric double layer capacitor 8 when the power is turned off. Execute. Note that the MPU 21, the ASIC 22, the EEPROM 23, and the RAM 24 are collectively referred to as a backup target 2. The power mode in which power is supplied from the main power circuit 1 to the backup target 2 is referred to as a normal mode, and the power mode in which power is supplied from the electric double layer capacitor 8 to the backup target 2 is referred to as a power-off mode.

  The PLC 100 includes a first output control circuit 4 that is a circuit for switching a power supply to be supplied to the backup target 2 and a communication circuit, an I / O circuit, and the like that are components not related to the backup processing (non-backup target 3). A second output control circuit 5 is provided.

  The main power supply circuit 1 and the first output control circuit 4 and the first output control circuit 4 and the backup target 2 are connected by a power supply line, and the main power supply circuit 1 performs the first output control. The power supply in the normal mode is supplied to the backup target 2 via the circuit 4. A power supply line between the main power supply circuit 1 and the first output control circuit 4 branches in the middle and is connected to the non-backup target 3. The main power supply circuit 1 supplies power to the non-backup target 3 through the branched power supply line.

  The electric double layer capacitor 8 and the second output control circuit 5 and the second output control circuit 5 and the backup target 2 are connected by a power supply line. Power is supplied through the output control circuit 5 in the power-off mode.

  The first output control circuit 4 and the second output control circuit 5 are each provided with a switch for turning on / off the power supplied to the backup target 2, and the switches included in each switch operate exclusively. That is, when the switch of the first output control circuit 4 is on, the switch of the second output control circuit 5 is off, and when the switch of the first output control circuit 4 is off. The switch of the second output control circuit 5 is on.

  The main power supply circuit 1 transmits a power cut notice signal to the MPU 21 when the supply of commercial power is interrupted (that is, when the power is cut off). When the MPU 21 receives the power-off notice signal, the MPU 21 starts a backup process and transmits a mode switching signal for switching the respective switches to the first output control circuit 4 and the second output control circuit 5. When the first output control circuit 4 and the second output control circuit 5 receive the mode switching signal, the first output control circuit 4 and the second output control circuit 5 switch the state of the switch included in each from on to off or from off to on. That is, when the MPU 21 transmits a mode switching signal, the state of the switch included in each is switched, and the power supply mode of the PLC 100 shifts from the normal mode to the power-off mode.

  In the electric double layer capacitor 8, the discharge voltage decreases as the stored charge is discharged in the power-off mode. In order to keep the voltage supplied to the backup target 2 constant even when the discharge voltage decreases, the second output control circuit 5 supplies the power supply voltage supplied from the electric double layer capacitor 8 to the backup target 2 in addition to the switch. A voltage conversion function for stepping up or down to a voltage for driving is provided. Note that a D / D converter or the like may be provided outside the second output control circuit 5, and the voltage conversion function may be realized by the D / D converter.

  As described above, the electric double layer capacitor 8 promotes the deterioration of the capacitor characteristics as long as the charging voltage is continuously applied. Therefore, in the first embodiment of the present invention, in order to reduce the deterioration of the characteristics of the electric double layer capacitor 8, the charging is stopped when the electric double layer capacitor 8 is charged with sufficient power. It is the main feature.

  Specifically, the PLC 100 further includes a charging circuit 6 having a switch, and a charging control circuit 7 that controls on / off of the switch of the charging circuit 6. The main power supply circuit 1 and the charging circuit 6, the main power supply circuit 1 and the charging control circuit 7, and the charging circuit 6 and the electric double layer capacitor 8 are connected by power supply lines. The main power supply circuit 1 charges the electric double layer capacitor 8 through the charging circuit 6 in the normal mode. The charge control circuit 7 is operated by the power supplied from the main power supply circuit 1 through the power supply line. The charging control circuit 7 monitors the voltage of the electric double layer capacitor 8 and, based on the voltage, transmits a charging circuit control signal to the charging circuit 6 to turn on / off the switch of the charging circuit 6.

  More specifically, a predetermined voltage that can supply the amount of power required for backup processing is set to a lower limit level, a voltage that is higher than the lower limit level and does not exceed the rated charging voltage is set to an upper limit level, When the voltage of the electric double layer capacitor 8 falls below the lower limit level due to self-discharge of the electric double layer capacitor 8, the charge control circuit 7 turns on the switch of the charging circuit 6, and the voltage of the electric double layer capacitor 8 reaches the upper limit level. When exceeded, the switch of the charging circuit 6 is turned off. In this manner, the charging control circuit 7 intermittently stops the charging of the electric double layer capacitor 8 so that the voltage of the electric double layer capacitor 8 falls within a predetermined range.

  When the MPU 21 receives the power-off notice signal, the MPU 21 transmits a mode switching notification signal to the charging control circuit 7. When receiving the mode switching notification signal, the charging control circuit 7 operates the charging circuit control signal to turn off the charging circuit 6 and stops the on / off control performed in the normal mode. Thereby, charging / stopping of the electric double layer capacitor 8 is executed in the normal mode, and the electric double layer capacitor 8 is disconnected from the main power supply circuit 1 in the power-off mode.

  FIG. 2 is a timing chart illustrating how the power supply mode shifts from the normal mode to the power-off mode in the PLC 100 of the first embodiment. In the main power supply circuit 1, when the supply of commercial power is interrupted, the power supply voltage supplied to each component of the PLC 100 decreases as shown in FIG. Then, the main power supply circuit 1 transmits a power-off notice signal to the MPU 21 as shown in FIG. In FIG. 2B, the power-off notice signal is negative logic, but it may be constituted by positive logic.

  In the normal mode, as shown in FIGS. 2C and 2D, the switch of the first output control circuit 4 is on and the switch of the second output control circuit 5 is off. When the MPU 21 that has received the power-off notice signal issues a mode switching signal, the switch of the first output control circuit 4 is turned off and the switch of the second output control circuit 5 is turned on. As a result, the power mode shifts from the normal mode to the power-off mode.

  On the other hand, the switch of the charging circuit 6 is repeatedly turned on / off as shown in FIG. 2 (e) based on the charging circuit control signal from the charging control circuit 7 in the normal mode. As shown in FIG. 2 (f), the electric double layer capacitor 8 is charged when the switch of the charging circuit 6 is turned on, and the voltage rises. When the switch of the charging circuit 6 is turned off, the voltage is increased by self-discharge. Descend.

  The MPU 21 issues a mode switching notification signal together with the mode switching signal. Then, the charging control circuit 7 operates the charging circuit control signal to turn off the charging circuit 6. As a result, the voltage of the electric double layer capacitor 8 is supplied to the backup target 2 via the second output control circuit 5 because the switch of the second output control circuit 5 is turned on. As shown in 2 (f), the voltage decreases. Since the second output control circuit 5 has a D / D converter function, the voltage supplied from the electric double layer capacitor 8 is adjusted to a constant voltage as shown in FIG. Supplied. The MPU 21 performs backup processing using power supplied from the electric double layer capacitor 8 at a constant voltage.

  In the above description, the MPU 21 has been described as transmitting a mode switching signal and a mode switching notification signal when receiving a power-off notice signal. The power-off notice signal is directly connected to the first output control circuit 4 and the second output control circuit 5, and the first output control circuit 4 and the second output control circuit 5 respectively switch the switch based on the power-off notice signal. It may be. Alternatively, the power-off notice signal may be directly connected to the charge control circuit 7, and the charge control circuit 7 may switch the on / off control of the charging circuit 6 to the always-off control based on the power-off notice signal.

  Further, although the ASIC 22 has been described as generating / updating the device data 25, the ASIC 22 may be omitted, and the MPU 21 may generate / update the device data 25 instead.

  As described above, according to the first embodiment of the present invention, the charging control circuit 7 intermittently stops the charging of the electric double layer capacitor 8 so that the voltage of the electric double layer capacitor 8 falls within a predetermined range. Since the electric double layer capacitor 8 can reduce the time for which the charging voltage is applied compared to the case where the charging voltage is continuously applied in the normal mode, the electric double layer capacitor 8 is charged by charging. Characteristic deterioration can be reduced.

  The charging control circuit 7 monitors the voltage of the electric double layer capacitor 8, starts charging when the voltage reaches the lower limit of the predetermined range, and charges when the voltage reaches the upper limit of the predetermined range. Since the charging is stopped, the time during which the charging voltage is applied can be efficiently shortened.

  Further, since the voltage conversion function for converting the discharge voltage of the electric double layer capacitor 8 into the drive voltage of the backup target 2 is provided, even if the voltage of the electric double layer capacitor 8 drops due to discharge, the backup target 2 is backed up. Processing can be executed.

Embodiment 2. FIG.
FIG. 3 is a diagram showing a configuration of the second embodiment of the PLC according to the present invention. In the description of the second embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

  As shown in the figure, the PLC 200 according to the second embodiment includes a main power supply circuit 1, a backup target 9, a non-backup target 3, a first output control circuit 4, a second output control circuit 5, a charging circuit 6, and an electric double layer capacitor 8. It has.

  The backup target 9 includes an MPU 91, an ASIC 22, an EEPROM 23, and a RAM 24 in which device data 25 is stored. The MPU 91 includes a timer function unit 92 that transmits a charging circuit control signal for turning on / off a switch included in the charging circuit 6 to the charging circuit 6 in the normal mode. The timer function unit 92 executes a control to turn off the switch included in the charging circuit 6 after being turned on for a certain period of time, and to turn on the switch again after the lapse of a certain period in anticipation of the discharge time of the electric double layer capacitor 8. It should be noted that the voltage of the electric double layer capacitor 8 changes within the range between the upper limit level and the lower limit level described in the first embodiment during the switch on period (on time) and the switch off period (off time). It is good to set to.

  FIG. 4 is a timing chart for explaining how the power supply mode shifts from the normal mode to the power-off mode in the PLC 200 of the second embodiment. 4A, the power supply voltage of the main power supply circuit 1 shown in FIG. 4A, the power-off notice signal shown in FIG. 4B, the switch state of the first output control circuit 4 shown in FIG. The switch state of the second output control circuit 5 shown in FIG. 4D and the output voltage of the second output control circuit 5 shown in FIG. 4G transition at the same timing as in the first embodiment.

  The charging circuit 6 is on / off controlled by a charging circuit control signal received from the timer function unit 92, as shown in FIG. Since the timer function unit 92 is a timer realized by software, variation is included in the measurement time. Therefore, as shown in FIG. 4E, in the second embodiment, the on / off time of the switch provided in the charging circuit 6 varies.

  In the electric double layer capacitor 8, as shown in FIG. 4 (f), the voltage increases when the switch of the charging circuit 6 is on, and the voltage decreases due to self-discharge when the switch of the charging circuit 6 is off.

  In the above description, the switch included in the charging circuit 6 is turned on / off based on a timer realized by software. However, the PLC 200 includes a hardware timer, and charging is performed based on the hardware timer. A switch included in the circuit 6 may be turned on / off.

  As described above, according to the second embodiment of the present invention, the timer function unit 92 turns off the switch included in the charging circuit 6 after turning it on for a certain time, and allows for the discharge time of the electric double layer capacitor 8. Since the switch is turned on again after a certain period of time, the circuit for monitoring the voltage of the electric double layer capacitor 8 is unnecessary, and the electric double layer capacitor 8 has a simpler structure than that of the first embodiment. Characteristic deterioration due to charging can be reduced.

  As described above, the PLC according to the present invention is suitable for application to a programmable controller that controls a controlled apparatus.

DESCRIPTION OF SYMBOLS 1 Main power supply circuit 2 Backup object 3 Non-backup object 4 1st output control circuit 5 2nd output control circuit 6 Charging circuit 7 Charging control circuit 8 Electric double layer capacitor 9 Backup object 21 MPU
22 ASIC
23 EEPROM
24 RAM
25 Device data 91 MPU
92 Timer function

Claims (7)

A power supply circuit that generates an internal power supply using an external power supply and outputs a power-off notice signal when the power is turned off;
An electric double layer capacitor;
A charging system for charging the electric double layer capacitor using the internal power source;
A nonvolatile first memory and a volatile second memory for storing device data, the device data stored in the second memory is updated using the internal power supply, and the power-off notice signal is output A controller that saves the device data stored in the second memory to the first memory using the electric power stored in the electric double layer capacitor,
With
The charging system intermittently stops charging the electric double layer capacitor so that the voltage of the electric double layer capacitor falls within a predetermined range.
A programmable controller characterized by that. The charging system is
A switch circuit for charging / stopping charging of the electric double layer capacitor by connecting / cutting off a power supply line for supplying the internal power to the electric double layer capacitor;
The voltage of the electric double layer capacitor is monitored, and when the voltage reaches the lower limit of the predetermined range, the power supply line is connected to the switch circuit, and when the voltage reaches the upper limit of the predetermined range, A charge control circuit that causes the switch circuit to cut off the power supply line;
Comprising
The programmable controller according to claim 1. The charging system is
A switch circuit for charging / stopping charging of the electric double layer capacitor by connecting / cutting off a power supply line for supplying the internal power to the electric double layer capacitor;
When the first time has elapsed since the power supply line was connected, the switch circuit is configured to shut off the power supply line, and when the second time has elapsed since the power supply line was disconnected, the switch circuit A timer function unit for connecting the power supply line;
Comprising
The programmable controller according to claim 1. The charge control circuit stops the operation of connecting the power supply line to the switch circuit when the power-off notice signal is output;
The programmable controller according to claim 2. The timer function unit stops the operation of connecting the power supply line to the switch circuit when the power-off notice signal is output.
The programmable controller according to claim 3. A power supply switching circuit that switches between the internal power supply and the electric double layer capacitor as a power source for driving the control unit triggered by the power-off notice signal;
The programmable controller as described in any one of Claims 1-5 characterized by the above-mentioned. A voltage converter that converts a discharge voltage of the electric double layer capacitor into a drive voltage of the controller;
The programmable controller as described in any one of Claims 1-5 characterized by the above-mentioned.

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