JP2011186078A5 - - Google Patents
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- JP2011186078A5 JP2011186078A5 JP2010049678A JP2010049678A JP2011186078A5 JP 2011186078 A5 JP2011186078 A5 JP 2011186078A5 JP 2010049678 A JP2010049678 A JP 2010049678A JP 2010049678 A JP2010049678 A JP 2010049678A JP 2011186078 A5 JP2011186078 A5 JP 2011186078A5
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- JP
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- Prior art keywords
- interlayer insulating
- film
- insulating film
- electro
- optical device
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- 239000011229 interlayer Substances 0.000 claims description 28
- 239000000758 substrate Substances 0.000 claims description 11
- 238000009413 insulation Methods 0.000 claims 2
- 239000004020 conductor Substances 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 239000012528 membrane Substances 0.000 claims 1
- 230000003287 optical effect Effects 0.000 claims 1
- 239000012780 transparent material Substances 0.000 claims 1
Description
本発明の一態様の電気光学装置は、画素電極と、前記画素電極に対応するように配置されたトランジスタと、前記トランジスタのチャネル領域を少なくとも覆い、前記チャネル領域を挟んで基板に対向するように配置される遮光膜と、前記チャネル領域と前記遮光膜との間に配置される第1の層間絶縁膜及び第2の層間絶縁膜と、前記第1の層間絶縁膜及び前記第2の層間絶縁膜を貫くように設けられ、前記遮光膜と前記トランジスタとを電気的に接続するためのコンタクトホールと、前記第2の層間絶縁膜に設けられる凹部と、を含み、前記遮光膜は前記凹部の壁の少なくとも一部を覆うように配置され、前記チャネル領域に向かう光を遮ることを特徴とする。
また、本発明の別の一態様の電気光学装置は、前記凹部と前記第1の層間絶縁膜との間に配置されるストッパー膜をさらに含むことを特徴とする。
上記の本発明に係る電気光学装置は、基板上に、画素電極と、該画素電極に対応して設けられたトランジスタと、該トランジスタの少なくともチャネル領域を上側から覆う上側遮光膜と、該上側遮光膜及び前記トランジスタ間に設けられ、前記上側遮光膜を電気的に接続するためのコンタクトホールが形成されていると共に前記トランジスタの上方に凹部が形成されている、多層構造の層間絶縁膜と、該層間絶縁膜内における前記多層構造をなす複数の膜間に設けられており、前記凹部の底又は底の周囲に形成されているストッパー膜の少なくとも一片とを備え、前記上側遮光膜は、前記凹部内に形成されている壁部を含む。
The electro-optical device of one embodiment of the present invention includes a pixel electrode, a transistor disposed to correspond to the pixel electrode, a channel region of the transistor, and at least a substrate region facing the substrate with the channel region interposed therebetween. A light shielding film disposed; a first interlayer insulating film and a second interlayer insulating film disposed between the channel region and the light shielding film; the first interlayer insulating film and the second interlayer insulating film; A contact hole for electrically connecting the light shielding film and the transistor, and a recess provided in the second interlayer insulating film, wherein the light shielding film is formed on the recess. It is arrange | positioned so that at least one part of a wall may be covered, and the light which goes to the said channel area | region is interrupted | blocked, It is characterized by the above-mentioned.
The electro-optical device according to another aspect of the invention further includes a stopper film disposed between the concave portion and the first interlayer insulating film.
The electro-optical device according to the present invention includes, on a substrate, a pixel electrode, a transistor provided corresponding to the pixel electrode, an upper light shielding film that covers at least a channel region of the transistor from above, and the upper light shielding A multilayer interlayer insulating film provided between the film and the transistor, in which a contact hole for electrically connecting the upper light shielding film is formed and a recess is formed above the transistor; and Provided between the plurality of films forming the multilayer structure in the interlayer insulating film, and provided with at least one piece of a stopper film formed on or around the bottom of the recess, and the upper light-shielding film includes the recess Including a wall formed therein.
Claims (13)
前記画素電極に対応するように配置されたトランジスタと、
前記トランジスタのチャネル領域を少なくとも覆い、前記チャネル領域を挟んで基板に対向するように配置される遮光膜と、
前記チャネル領域と前記遮光膜との間に配置される第1の層間絶縁膜及び第2の層間絶縁膜と、
前記第1の層間絶縁膜及び前記第2の層間絶縁膜を貫くように設けられ、前記遮光膜と前記トランジスタとを電気的に接続するためのコンタクトホールと、
前記第2の層間絶縁膜に設けられる凹部と、
を含み、
前記遮光膜は前記凹部の壁の少なくとも一部を覆うように配置され、前記チャネル領域に向かう光を遮ることを特徴とする電気光学装置。 And the picture element electrode,
And transistors arranged so as to correspond to the pixel electrode,
A light-shielding film arranged to cover at least the channel region of the transistor and to face the substrate across the channel region;
A first interlayer insulating film and a second interlayer insulating film disposed between the channel region and the light shielding film;
A contact hole provided so as to penetrate the first interlayer insulating film and the second interlayer insulating film, and electrically connecting the light shielding film and the transistor;
A recess provided in the second interlayer insulating film;
Including
The electro-optical device, wherein the light-shielding film is disposed so as to cover at least a part of the wall of the concave portion, and shields light traveling toward the channel region.
前記第1層間絶縁膜、前記第2層間絶縁膜、及び前記遮光膜は、前記ゲート電極の存在に応じて凸状に盛り上がった箇所を有し、
前記基板の上から見て、前記凹部は、前記第2層間絶縁膜における、前記盛り上がった箇所から外れた箇所に、形成されていることを特徴とする請求項1から7のいずれか一項に記載の電気光学装置。 Between the first interlayer insulating film and the channel region , a gate electrode of the transistor exists at a position facing the channel region,
The first interlayer insulating film, the second interlayer insulating film, and the shielding light film has a portion of raised convex in response to the presence of said gate electrode,
When viewed from above the substrate, wherein the recess is in the second interlayer insulating film, at a position deviated from the raised position, that is formed in any one of claims 1 to 7, characterized in The electro-optical device described.
前記凹部は、前記第2層間絶縁膜における、前記基板上で平面的に見て、前記U字の切れた箇所を少なくとも部分的に塞ぐ箇所に、形成されていることを特徴とする請求項8に記載の電気光学装置。 The gate electrode is made of a light-shielding conductive material, and when viewed from above the substrate, a pixel electrode side source / drain which is a side electrically connected to the pixel electrode in a source / drain region of the transistor A U-shaped portion surrounding the region from the channel region side to the U-shape,
The recess, in the second interlayer insulating film, as viewed in plan on the substrate, the claim 8 U-shaped cut and the position to place at least partially blocked, characterized in that it is formed The electro-optical device according to 1.
前記トランジスタのチャネル領域の上に第1の層間絶縁膜を形成する工程と、 Forming a first interlayer insulating film on the channel region of the transistor;
前記第1層間絶縁膜の上に第2の層間絶縁膜を形成する工程と、 Forming a second interlayer insulating film on the first interlayer insulating film;
前記第1の層間絶縁膜及び前記第2の層間絶縁膜を貫くように設けられ、遮光膜と前記トランジスタとを電気的に接続するためのコンタクトホールを形成する工程と、 Forming a contact hole provided so as to penetrate the first interlayer insulating film and the second interlayer insulating film, and electrically connecting the light shielding film and the transistor;
前記第2の層間絶縁膜に凹部を形成する工程と、Forming a recess in the second interlayer insulating film;
前記遮光膜を形成する工程と、 Forming the light shielding film;
画素電極を、前記トランジスタが前記画素電極に対応するように配置されるように形成する工程と、 Forming a pixel electrode so that the transistor corresponds to the pixel electrode; and
を含み、Including
前記遮光膜は前記凹部の壁の少なくとも一部を覆うように配置され、前記チャネル領域に向かう光を遮ることを特徴とする電気光学装置の製造方法。 The method of manufacturing an electro-optical device, wherein the light-shielding film is disposed so as to cover at least a part of the wall of the recess, and shields light traveling toward the channel region.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010049678A JP2011186078A (en) | 2010-03-05 | 2010-03-05 | Electro-optical device, method for manufacturing the same, and electronic apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010049678A JP2011186078A (en) | 2010-03-05 | 2010-03-05 | Electro-optical device, method for manufacturing the same, and electronic apparatus |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011186078A JP2011186078A (en) | 2011-09-22 |
JP2011186078A5 true JP2011186078A5 (en) | 2013-03-21 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2010049678A Withdrawn JP2011186078A (en) | 2010-03-05 | 2010-03-05 | Electro-optical device, method for manufacturing the same, and electronic apparatus |
Country Status (1)
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JP (1) | JP2011186078A (en) |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3711781B2 (en) * | 1999-03-12 | 2005-11-02 | セイコーエプソン株式会社 | Electro-optical device and manufacturing method thereof |
JP2003140566A (en) * | 2001-10-31 | 2003-05-16 | Seiko Epson Corp | Electrooptical device, its manufacturing method and electronic equipment |
JP2005215646A (en) * | 2004-02-02 | 2005-08-11 | Seiko Epson Corp | Electro-optical device and electronic equipment |
JP5439722B2 (en) * | 2007-02-13 | 2014-03-12 | セイコーエプソン株式会社 | Electro-optic substrate, electro-optic device, electro-optic substrate design method, and electronic apparatus |
JP5176434B2 (en) * | 2007-08-28 | 2013-04-03 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
JP2009186877A (en) * | 2008-02-08 | 2009-08-20 | Seiko Epson Corp | Electro-optical device, method of manufacturing the same, and electronic apparatus |
-
2010
- 2010-03-05 JP JP2010049678A patent/JP2011186078A/en not_active Withdrawn
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