JP2005215646A - Electro-optical device and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electro-optical device, having an element whose leakage current is small. <P>SOLUTION: The electro-optical device has a light-emitting element having a light emission layer which is laminated on a substrate and emits light, a drive element which is an element for driving the light-emitting element and provided between the substrate and light-emitting layer and has a semiconductor layer, a 1st light-shielding layer which is provided between the drive element and light emission layer and blocks light incident on the semiconductor layer, and a 2nd light-shielding layer which is provided, at least partially, nearly in parallel to or oblique with respect to the laminating direction of the light-emitting layer and blocks the light incident on the drive element. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an electro-optical device and an electronic apparatus. In particular, the present invention relates to an electro-optical device with less leakage current of a transistor and an electronic apparatus including the same.

  As a display device for displaying an image, there is an organic EL display device using an organic EL element using an organic compound as a light emitting material. Organic EL elements can display (1) high luminous efficiency, (2) low driving voltage, (3) various colors (green, red, blue, yellow, etc.) by selecting the luminescent material. 4) Since it is self-luminous type, display is clear and no backlight is required, (5) Surface emission, no dependency on viewing angle, (6) Thin and lightweight, (7) Because the maximum temperature of the manufacturing process is low The substrate material is excellent in that it can use a soft material such as a plastic film. Therefore, in recent years, organic EL display devices using organic EL elements have attracted attention as liquid crystal display devices that replace CRTs and LCDs.

As a conventional display device using an organic EL element having such characteristics, there is one disclosed in Japanese Patent Laid-Open No. 10-214043 (Patent Document 1). Hereinafter, a conventional display device will be described with reference to FIG. The display device disclosed in Patent Document 1 includes a thin film transistor (TFT), a planarization insulating film formed over the TFT, and a black matrix having a light shielding property formed over the planarization insulating film. The TFT is composed of a polycrystalline polysilicon film, and the black matrix is disposed so as to cover the polycrystalline silicon film. The light emitted from the light emitting layer is blocked by the black matrix and is not irradiated to the polycrystalline silicon film.
Japanese Patent Laid-Open No. 10-214043

  However, in the conventional display device disclosed in Patent Document 1, the black matrix is only provided above the polycrystalline silicon film, and light is incident from the lateral gap, and the polycrystalline silicon film Will be irradiated. Therefore, in the above display device, the leakage current of the TFT increases as the polycrystalline silicon film is irradiated with light, and there is a problem that a display device with good image quality cannot be provided.

  In particular, in the case of an organic EL element, light having various angular components is radiated from the light emitting layer, unlike light having angular components in the vertical direction, which is radiated from a backlight in a liquid crystal display device. Therefore, in a display device using an organic EL element, a large amount of light is irradiated to the TFT from the gap in the horizontal direction, so that the leakage current of the TFT is particularly remarkable.

  In particular, when the pixel portion driving circuit of the display device is entirely composed of p-type TFTs, the manufacturing process of the display device can be simplified. However, although the dark current of the p-type TFT is considerably lower than that of the n-type TFT, the off-current of the p-type TFT is greatly increased by irradiating a small amount of incident light. Leakage current increases and the image quality of the display device deteriorates. Therefore, particularly in a display device having a self-luminous element such as an organic EL element, there is a problem that it is extremely difficult to achieve both simplification of the manufacturing process and display performance.

Furthermore, when the leakage current of the TFT increases, it is necessary to increase the area of the storage capacitor, so that the aperture ratio of the pixel decreases. In particular, in a bottom emission type display device, when the area of the storage capacitor increases, the aperture ratio of the pixel decreases significantly.

Therefore, an object of the present invention is to provide an electro-optical device and an electronic apparatus that can solve the above-described problems. This object is achieved by a combination of features described in the independent claims. The dependent claims define further advantageous specific examples of the present invention.

  In order to solve the above-described problem, according to the first aspect of the present invention, a light-emitting element that is laminated on an upper layer of a substrate and has a light-emitting layer that emits light, and an element for driving the light-emitting element, An element having a semiconductor layer provided between the light emitting layer, a first light shielding layer provided between the driving element and the light emitting layer, which blocks light incident on the semiconductor layer, and a stacking direction of the light emitting layer And an electro-optical device provided with a second light-shielding layer that is provided at least partially in parallel or obliquely and shields light incident on the drive element.

  In such a configuration, the light emitted from the light emitting layer or the light incident from the outside of the electro-optical device and having a component perpendicular or oblique to the stacking direction is also used for the first light shielding layer and the second light shielding layer. It is blocked by the shading layer. Therefore, according to such a configuration, even when the electro-optical device includes a self-emitting element that emits light having the component, light incident on the semiconductor layer can be blocked, so that the leakage current of the driving element is reduced. Can be made. As a result, the image quality of the electro-optical device can be improved.

  Here, the light emitted from the light emitting layer is light emitted from the light emitting layer and includes light reflected from other layers or the like constituting the electro-optical device. The light emitting layer includes a layer made of a self light emitting material that emits light by itself by applying energy such as a potential difference. The light emitting layer includes a layer formed of a material that emits light having a component oblique to the stacking direction and the stacking direction.

  The electro-optical device includes: a first interlayer insulating layer provided between the driving element and the first light shielding layer; a first recess provided in the first interlayer insulating layer around the semiconductor layer; It is preferable that at least a part of the second light shielding layer is provided in the first recess.

  According to such a configuration, light having a component perpendicular or oblique to the stacking direction can be blocked with a simple configuration, so that an electro-optical device having a drive element with less leakage current can be provided.

  In the electro-optical device, it is preferable that the first light shielding layer and the second light shielding layer are provided integrally.

  According to such a configuration, it is possible to efficiently block both light having a component parallel to the stacking direction and light having a vertical or oblique component with a simple configuration. An optical device can be provided.

  In the electro-optical device, the driving element is a thin film transistor having a gate electrode, and the second light shielding layer is provided continuously from the first light shielding layer around the first light shielding layer, The distance between the semiconductor layer and the end of the second light shielding layer in the extending direction of the gate electrode in plan view is based on the distance between the semiconductor layer and the end of the second light shielding layer in the direction substantially perpendicular to the extending direction. Longer is preferred.

  According to such a configuration, even when there is a region where the third light-shielding layer does not surround the semiconductor layer without a gap due to the provision of the gate electrode and the like around the semiconductor layer, the region is transferred from the region to the semiconductor layer. Incident light can be reduced.

  In the electro-optical device, it is preferable that the second light shielding layer is provided in the stacking direction at substantially the same height as the gate electrode or a position closer to the substrate than the gate electrode, that is, a lower position.

  According to this configuration, light having a direction component perpendicular to the stacking direction can be blocked more efficiently, so that light incident on the semiconductor layer can be further reduced.

  Preferably, the electro-optical device further includes a third light shielding layer that is provided between the first light shielding layer and the substrate around the semiconductor layer and blocks light incident on the semiconductor layer.

  According to such a configuration, it is possible to further reduce light incident on the semiconductor layer and having a component perpendicular or oblique to the stacking direction. Therefore, according to such a configuration, it is possible to provide an electro-optical device having a drive element with further less leakage current.

  The electro-optical device further includes a second interlayer insulating layer provided between the driving element and the substrate, and a second concave portion provided in the second interlayer insulating layer, and includes a third light shielding member. It is preferable that at least a part of the layer is provided in the second recess.

  According to such a configuration, it is possible to efficiently block both light having a component parallel to the stacking direction and a vertical or oblique component with a simple configuration. In addition, since the third light-shielding layer can be provided longer in the direction from the semiconductor layer to the substrate, light incident on the semiconductor layer can be further reduced.

  In the electro-optical device, it is preferable that the driving element is a thin film transistor having a gate electrode, and the third light shielding layer is made of the same material as the gate electrode.

  According to this configuration, the gate electrode and the third light shielding layer can be formed by the same process. Therefore, according to such a configuration, it is not necessary to separately provide a process for forming the third light shielding layer, so that an inexpensive electro-optical device can be provided.

  In the electro-optical device, it is preferable that at least a part of the third light shielding layer is provided at a position closer to the substrate than the gate electrode in a direction substantially perpendicular to the surface on which the gate electrode is provided.

  According to such a configuration, it is possible to further reduce the light incident on the semiconductor layer, and thus it is possible to provide an electro-optical device having a drive element with further less leakage current.

  In the electro-optical device, the bottom surface of the first recess is formed by the third light shielding layer, and the second light shielding layer is in contact with the third light shielding layer in the first recess. preferable.

  In such a configuration, the third light shielding layer is provided continuously from the second light shielding layer. Therefore, according to this configuration, it is possible to further reduce the light incident on the semiconductor layer, and thus it is possible to provide an electro-optical device having a drive element with further less leakage current.

  In the electro-optical device, it is preferable that the area of the surface of the third light shielding layer on which the first recess is formed is larger than the area of the bottom surface of the first recess.

  In such a configuration, the third light shielding layer protrudes from the bottom surface of the first recess in the surface direction in which the third light shielding layer is provided. Therefore, according to such a configuration, light that is reflected between the third light shielding layer and the substrate and is incident on the semiconductor layer can be blocked.

  In the electro-optical device, the driving element is a thin film transistor having a gate electrode, and the third light-shielding layer is a first region provided substantially parallel to the extending direction of the gate electrode in plan view. And a second region extending from the first region and provided in a direction substantially perpendicular to the first region, and the semiconductor layer and the second region in the extending direction Is preferably longer than the distance between the semiconductor layer and the first region in a substantially vertical direction. The electro-optical device may include a plurality of third light shielding layers provided with a semiconductor layer interposed therebetween.

  In addition, it is preferable that the electro-optical device further includes a fourth light shielding layer that is provided between the substrate and the driving element and blocks at least light incident on the driving element.

  According to such a configuration, it is possible to further block light having a component in a direction from the substrate toward the driving element, which is incident on the semiconductor layer, and therefore, the leakage current of the driving element can be further reduced.

  In the electro-optical device, the driving element is preferably a p-type thin film transistor having a source and a drain. In this case, all of the thin film transistors that drive the pixels in the electro-optical device may be p-type thin film transistors. In the electro-optical device, the driving element may be a thin film transistor made of amorphous silicon.

  In such a configuration, light incident on the p-type thin film transistor is blocked by the light shielding layer. Therefore, according to such a configuration, since the dark current of the driving element is extremely reduced, it is possible to provide an electro-optical device with further less leakage current. In addition, according to such a configuration, the manufacturing process of the electro-optical device can be reduced, so that an inexpensive electro-optical device can be provided.

  In addition, it is preferable that the electro-optical device further includes a capacitor element that accumulates charges necessary for light emission of the light-emitting element, and one of the source and the drain is electrically connected to the capacitor element. Here, the charge necessary for light emission includes the charge necessary for maintaining the light emitting state of the light emitting element for a predetermined time.

  In such a structure, the leakage current of the thin film transistor electrically connected to the capacitor can be reduced, so that the amount of leakage of charge accumulated in the capacitor is reduced. Therefore, according to such a configuration, the area of the capacitor can be reduced, so that the aperture ratio of the pixel can be increased. Further, according to such a configuration, a change in the potential of the capacitor can be suppressed. Therefore, the image quality of the electro-optical device can be further improved.

  In the electro-optical device, the light emitting element is preferably an organic EL element. In the electro-optical device, the semiconductor layer is preferably made of polycrystalline silicon. The electro-optical device may be a bottom emission type or a top emission type. When the electro-optical device is used for a large display, the electro-optical device is preferably a bottom emission type.

  According to the second aspect of the present invention, an electronic apparatus including the electro-optical device is provided. Here, the electronic device refers to a general device having a certain function provided with the electro-optical device according to the present invention, and there is no particular limitation on the configuration thereof, for example, a general computer device including the electro-optical device, Any device that requires an electro-optical device is included, such as a display device, a mobile phone, a PHS, a PDA, and an electronic notebook.

  Hereinafter, the present invention will be described through embodiments of the invention with reference to the drawings. However, the following embodiments do not limit the invention according to the claims, and are described in the embodiments. Not all combinations of features are essential for the solution of the invention.

  FIG. 1 is a diagram illustrating a configuration of a display device 10 which is an example of an electro-optical device according to the invention. In this embodiment, an example in which the present invention is applied to an organic EL display device will be described. The display device 10 includes a display area 15, a data line driver 11, a first scanning line driver 12, and a second scanning line driver 13.

  The display area 15 includes a plurality of pixels arranged in a matrix. Each pixel is electrically connected to the data line 16, the first scanning line 17, and the second scanning line 18, and the data line driver 11, the first scanning line driver 12, and the second scanning line are connected. The driver 13 controls the light emission of the organic EL element 20 provided in each pixel by controlling the potential of the data line 16, the first scanning line 17, and the second scanning line 18.

  FIG. 2 is a circuit diagram illustrating a configuration of each pixel in the display device 10. FIG. 3 is a plan layout diagram of the circuit shown in FIG. As shown in FIG. 2, the display device 10 of the present embodiment has a current-programmed pixel circuit configuration, but is not limited thereto, and may have a voltage-programmed pixel circuit configuration.

  In the display device 10, each pixel includes an organic EL element 20, TFTs (thin film transistors) 30, 50, 60, and 70 that are examples of driving elements, and a capacitor element 40. The TFTs 30, 50, 60, and 70 are thin film transistors having a source and a drain made of a semiconductor layer and a gate made of a conductive layer such as a semiconductor layer or a metal layer. In the present embodiment, the TFTs 30, 50, 60, and 70 have p-type conduction characteristics. In this embodiment, the case where all TFTs constituting each pixel have p-type conduction characteristics is described as an example. However, some of the TFTs constituting each pixel may be p-type. That is, each pixel may be configured to include both p-type and n-type TFTs.

  The organic EL element 20 is an example of a light emitting element, and one end is electrically connected to the drain of the TFT 60 and the other end is configured to have a predetermined potential such as a ground potential.

  In the TFT 30, the power supply voltage Vdd is supplied to the drain via the power supply line 19, and the source is electrically connected to the source of the TFT 60, the drain of the TFT 50, and the TFT 70. The gate of the TFT 30 is electrically connected to the source of the TFT 50 and one end of the capacitor 40, and the power supply voltage Vdd is supplied to the drain of the TFT 50, the source of the TFT 60, and the source of the TFT 70 in accordance with the gate potential. Control whether to do.

  The drain of the TFT 50 is electrically connected to the source of the TFT 70, and the source is electrically connected to one end of the capacitor 40. The drain of the TFT 70 is electrically connected to the data line 16. The TFTs 50 and 70 have gates electrically connected to the first scanning line 17, and electrically connect one end of the capacitor element 40 and the data line 16 in accordance with the potential of the first scanning line 17. Controls whether to connect. That is, the TFTs 50 and 70 charge the capacitor element 40 in accordance with the potential of the first scanning line 17.

  Further, in this embodiment, the periphery of the TFT 50 is covered with a plurality of light shielding layers in order to suppress the light emitted from the organic EL element 20 from entering the TFT 50. It is desirable that the periphery of the TFT 50 is covered with a light shielding layer in both the stacking direction and the extending direction of the semiconductor layer 110 (see FIG. 4).

  This is because the leakage current when the TFT 50 is turned off is reduced to prevent charge leakage from the capacitive element 40. If the leakage current is reduced, not only the area of the capacitive element 40 can be reduced and the bottom emission type aperture ratio can be increased, but also a highly accurate gradation reproducibility can be obtained. Not only is the light-emitting element very close to the amorphous silicon semiconductor film with high photosensitivity, but with light shielding as shown in the prior art, minute light leakage causes subtle changes in image quality. The advantage of adopting the embodiment of the present invention is great even if it is somewhat complicated.

  The capacitive element 40 is an element for accumulating charges necessary for light emission of the organic EL element 20, and one end is electrically connected to the source of the TFT 50, and Vdd is supplied to the other end. Specifically, the capacitive element 40 controls the light emission luminance of the organic EL element 20 by holding the potential of the gate of the TFT 30 with the accumulated charge.

  The drain of the TFT 60 is electrically connected to one end of the organic EL element 20, and the source is electrically connected to the source of the TFT 30, the drain of the TFT 50, and the source of the TFT 70. The TFT 60 has a gate electrically connected to the second scanning line 18, and controls the potential of one end of the organic EL element 20 according to the potential of the second scanning line 18.

  4 is a cross-sectional view taken along the line II in FIG. 3 of each pixel according to the first embodiment. In each pixel, the organic EL element 20 is provided above the substrate 140, and the TFT 50 is provided between the substrate 140 and the organic EL element 20. Each pixel includes a first light shielding layer 120, a second light shielding layer 122, a third light shielding layer 124, and a fourth light shielding layer 126 provided in the vicinity of the TFT 50.

  The TFT 50 includes a semiconductor layer 110 provided over the substrate 140, a gate electrode 119 (first scanning line 17), and a gate insulating layer 150 provided between the semiconductor layer 110 and the gate electrode 119. The semiconductor layer 110 includes a source region 112 and a drain region 114 doped with impurities at a high concentration, a channel region 116, and an LDD region 118 doped with impurities at a lower concentration than the source region 112 and the drain region 114. Have.

  The organic EL element 20 includes an anode 160, a cathode 170 provided on the upper layer of the anode 160, and an organic EL layer 180 that is an example of a light emitting layer provided between the anode 160 and the cathode 170. In the present embodiment, the display device 10 is a bottom emission type, and the organic EL element 20 emits light mainly in a direction from the organic EL layer 180 toward the substrate 140. In the present embodiment, the organic EL element 20 is used as an example of a light emitting element in the display device 10, but other self-light emitting elements such as an inorganic EL element may be used.

  The first light shielding layer 120 is provided between the TFT 50 and the organic EL element 20 and blocks light emitted from the organic EL element 20 and light incident from the outside, which is incident on the semiconductor layer 110. Specifically, the first light shielding layer 120 is formed on the first interlayer insulating layer 142 provided on the gate electrode 119 with respect to the stacking direction of the organic EL layer 180 (hereinafter referred to as “stacking direction”). And provided substantially in parallel with the extending direction of the organic EL layer 180.

  The second light shielding layer 122 is at least partially provided in parallel or obliquely with respect to the stacking direction, and light emitted from the organic EL element 20 or light incident on the display device 10 from the outside enters the semiconductor layer 110. Block incident. In the present embodiment, a first interlayer insulating layer 142 is provided between the TFT 50 and the first light shielding layer 120, and a first recess 132 is provided in the first interlayer insulating layer 142 around the TFT 50. It has been. The first recess 132 has a side surface and a bottom surface, and part of the second light shielding layer 122 is provided on the side surface and the bottom surface of the first recess 132. In the present embodiment, the side surface of the first recess 132 is formed obliquely with respect to the stacking direction, but the side surface may be formed substantially parallel to the stacking direction.

  According to this embodiment, the light emitted from the organic EL layer 180 and the like having a component perpendicular or oblique to the stacking direction is also used for the first light shielding layer 120 and the second light shielding layer 122. It will be blocked by. In particular, in an electro-optical device having the organic EL element 20 as a light-emitting element, the light has a larger amount of the vertical or oblique components than the light emitted from the liquid crystal display device, and is likely to enter the TFT 50. It becomes. Therefore, in the electro-optical device having the organic EL element 20, the second light shielding layer 122 that can block the light having a large amount of the vertical or oblique components is extremely important. According to the present embodiment, since the light incident on the TFT 50 can be blocked by providing the second light blocking layer 122, the leakage current of the TFT 50 can be reduced, and consequently the image quality of the electro-optical device. Can be improved.

  In the present embodiment, the first light shielding layer 120 and the second light shielding layer 122 are integrally formed. That is, the first light shielding layer 120 is provided in a region substantially perpendicular to the stacking direction in the first interlayer insulating layer 142, and the second light shielding layer 122 is continuous from the first light shielding layer 120. Provided around the first light shielding layer 120. In addition, the first light-blocking layer 120 and the second light-blocking layer 122 are formed in the same layer with the same material as the electrodes formed on the end portions (not shown) of the source region 112 and the drain region 114. It is preferable.

  The second light shielding layer 122 is preferably provided so that the distance from the substrate 140 in the stacking direction is substantially the same as or shorter than the distance of the gate electrode 119 from the substrate 140. That is, it is preferable that the second light-blocking layer 122 be provided at substantially the same height as the gate electrode 119 or at a position lower than the gate electrode 119 in the stacking direction.

  The third light shielding layer 124 is provided between the first light shielding layer 120 and the second light shielding layer 122 and the substrate 140 around the semiconductor layer 110, and is incident on the semiconductor layer 110. The light emitted by 20 and the light incident from the outside are blocked. In the present embodiment, a second interlayer insulating layer 144 having a function as a base layer is provided between the semiconductor layer 110 and the substrate 140, and the second interlayer insulating layer 144 is provided around the semiconductor layer 110. A second recess 134 is provided. The second recess 134 is provided with a gate insulating layer 150 extending from the semiconductor layer 110, and the third light shielding layer 124 is formed from the outside of the second recess 134 to the second recess 134. Over the gate insulating layer 150. The third light shielding layer 124 is preferably formed in the same layer with the same material as the gate electrode 119.

  The third light-shielding layer 124 is preferably provided so that the distance from the substrate 140 in the stacking direction is substantially the same as or shorter than the distance from the substrate 140 of the semiconductor layer 110. That is, the third light shielding layer 124 is preferably provided at a position lower than the semiconductor layer 110 in the stacking direction.

  In the present embodiment, the bottom surface of the first recess 132 is formed by the third light shielding layer 124. That is, the first interlayer insulating layer 142 is provided on the third light shielding layer 124, and the first recess 132 penetrates to the third light shielding layer 124 in the first interlayer insulating layer 142. It is a through hole provided. A first recess 132 is formed by the through hole and the third light shielding layer 124, and the second light shielding layer 122 is in contact with the third light shielding layer 124 in the first recess 132. . Here, the area of the surface forming the bottom surface of the third light shielding layer 124 is larger than the opening area of the through hole.

  The fourth light shielding layer 126 is provided between the TFT 50 and the substrate 140 and blocks light emitted from the organic EL element 20 and light incident from the outside, which is incident on the semiconductor layer 110. Specifically, the fourth light shielding layer 126 is provided in the surface direction of the substrate from the region where the semiconductor layer 110 is provided to the region where the third light shielding layer 124 is provided. The fourth light shielding layer 126 forms the bottom surface of the second recess 134, and is in contact with the gate insulating layer 150 in the second recess 134. In the present embodiment, the fourth light shielding layer 126 is in contact with the gate insulating layer 150 in the second recess 134, but by removing a part of the gate insulating layer 150, the fourth light shielding layer 126 is The second recess 134 may be provided so as to be in contact with the third light shielding layer 124. Alternatively, the fourth light shielding layer 126 may be provided directly in contact with the second light shielding layer 122 without using the light shielding layer 124.

  In the present embodiment, the light shielding layer is provided only around the TFT 50 which is a thin film transistor electrically connected to the capacitive element 40. However, the light shielding layer may be provided around the other thin film transistors as well.

  FIG. 5 is an enlarged view (planar layout diagram) of the region 200 in which the TFT 50 in FIG. 3 is provided. In the present embodiment, the TFT 50 is a p-type thin film transistor having a triple gate structure. Specifically, the TFT 50 has a configuration in which three thin film transistors each having a source region 112, a drain region 114, and a channel region 116 are connected in series. Each channel region 116 is configured to be positioned on substantially the same straight line, and a gate electrode is provided so as to extend on each channel region 116. That is, in the TFT 50, three thin film transistors are provided in a direction substantially perpendicular to the extending direction of the gate electrode, and the semiconductor layer 110 has one of the source region 112 and the drain region 114 of the predetermined thin film transistor and another adjacent one of the other thin film transistors. Between the source region 112 and the drain region 114 of the thin film transistor, there is a region continuously provided from the one side to the other side in the substantially vertical direction.

  Around the TFT 50, a third light-shielding layer 124 that shields the light emitted from the organic EL element 20 and the external light of the display region 15 (see FIG. 1) incident on the semiconductor layer 110 is provided (see FIG. 4). ). Further, the organic EL element 20 is provided above the TFT 50 and the third light shielding layer 124, and the first light shielding layer 120 and the second light shielding layer 124 are provided between the TFT 50 and the organic EL element 20. (See FIG. 4).

  A plurality of third light shielding layers 124 are provided so as to surround the semiconductor layer 110, and the gate electrode 119 is provided so as to intersect the semiconductor layer 110 between the plurality of third light shielding layers 124. Specifically, the plurality of third light shielding layers 124 are provided so as to surround a rectangular region including the semiconductor layer 110, and the gate electrode 119 is provided so as to cross the rectangular region. In other words, the third light shielding layer 124 is provided on each side forming the rectangular region.

  The third light shielding layer 124 includes a first region 124-1 extending in the extending direction of the gate electrode 119 and the first region 124-1 in a direction substantially perpendicular to the extending direction. And a second region 124-2 provided continuously. In the present embodiment, the second region 124-2 is provided continuously from one end to the other end of the corresponding side. On the other hand, the first region 124-1 is provided in a part of the corresponding side. The distance a between the semiconductor layer 110 and the first region 124-1 in the extending direction is longer than the distance b between the semiconductor layer 110 and the second region 124-2 in the substantially vertical direction.

  The first light shielding layer 120 and the second light shielding layer 122 are provided over a wider area than the rectangular area surrounded by the third light shielding layer 124. A distance c between the semiconductor layer 110 and the end of the second light shielding layer 122 (or the first light shielding layer 120) in the extending direction of the gate electrode 119 is in a direction substantially perpendicular to the extending direction. It is longer than the distance d between the semiconductor layer 110 and the end of the second light shielding layer 122 (or the first light shielding layer 120).

  With reference to FIG. 4, a method for manufacturing a pixel according to the present embodiment will be described. First, the substrate 140 is prepared. The substrate 140 is preferably a substrate that transmits light, such as a glass substrate.

  Next, the fourth light shielding layer 126 is formed over the substrate 140. First, a film that does not transmit light, such as a titanium film (Ti), a chromium film (Cr), or a laminated film of tantalum and tantalum oxide (Ta / TaOx), is formed on the substrate 140 to a thickness of, for example, 70 nm. Film. Then, the fourth light shielding layer 126 is formed by etching the film into a predetermined shape. Then, an insulating film such as a silicon oxide film (SiOx) is formed on the fourth light shielding layer 126 to a thickness of, for example, 500 nm, thereby forming the second interlayer insulating layer 144.

  Next, the semiconductor layer 110 is formed. On the second interlayer insulating layer 144, for example, a low-temperature polycrystalline silicon film is formed to a thickness of, for example, 50 nm. In the polycrystalline silicon film, the source region 112, the drain region 114, and the region to be the LDD region 118 are doped with an impurity that forms an acceptor such as boron (B). Then, the semiconductor layer 110 is formed by etching the polycrystalline silicon film into a predetermined shape.

  Next, the second recess 134 is formed in the second interlayer insulating layer 144 by etching around the region where the semiconductor layer 110 is provided, and then the gate insulating layer 150 is formed. On the semiconductor layer 110 and the second interlayer insulating layer 144, an insulating film (dielectric film) such as a silicon oxide film is formed to a thickness of, for example, 100 nm, thereby forming the gate insulating layer 150.

  Next, the gate electrode 119 and the third light shielding layer 124 are formed. First, a laminated film of, for example, a titanium film (Ti) and an aluminum / copper alloy film (AlCu) is formed on the gate insulating layer 150. The laminated film is, for example, a film (Ti / AlCu / Ti) in which a Ti film is laminated to 50 nm, an AlCu film is laminated to 200 to 300 nm, and a Ti film is laminated to 50 nm. Then, the stacked film is etched into a predetermined shape, whereby a gate electrode 119 is formed in a region including the semiconductor layer 110 and a third light shielding layer 124 is formed in a region including the second recess 134.

  Next, an insulating film such as a silicon oxide film is formed to a thickness of, for example, 600 nm on the gate insulating layer 150, the gate electrode 119, and the third light shielding layer 124, so that the first interlayer insulating layer is formed. 142 is formed. Then, in the region where the third light shielding layer 124 of the first interlayer insulating layer 142 is provided, the first recess 132 is formed in the first interlayer insulating layer 142 by etching. At this time, the first recess 132 is preferably formed by etching so as to penetrate the first interlayer insulating layer 142 using the third light shielding layer 124 as an etching stopper.

  Next, the first light shielding layer 120 and the second light shielding layer 122 are formed. First, for example, a laminated film (Ti / AlCu / Ti) having a Ti film of 50 nm, an AlCu film of 200 to 300 nm, and a Ti film of 50 nm is formed on the first interlayer insulating layer 142 and the first recess 132. Film. Then, by etching the laminated film into a predetermined shape, the first light shielding layer 120 and the second light shielding layer 122 are formed in the first interlayer insulating layer 142 and the first recess 132.

  Next, a third interlayer insulating layer 146 is formed over the first light-blocking layer 120, the second light-blocking layer 122, and the first interlayer insulating layer 142. The third interlayer insulating layer 146 is formed by forming an insulating film such as an acrylic resin film to a thickness of 1.5 to 2.0 μm, for example.

  Next, the organic EL element 20 is formed. First, an anode 160 is formed by depositing a light-transmitting conductive film such as an ITO film on the third interlayer insulating layer 146 to a thickness of 50 nm, for example. Then, an organic EL material is formed on the anode 160 to form the organic EL layer 180, and then, for example, a metal film in which Ca or Al is laminated or an electron injection layer is laid on the organic EL layer 180. A light-transmitting conductive film such as an ITO film is formed to a thickness of 50 nm, for example, and the cathode 170 is formed to form the organic EL element 20. The organic EL material may be a low molecular material or a polymer material.

  FIG. 6 is a cross-sectional view taken along the line II in FIG. 3 of each pixel according to the second embodiment. In the following, the configuration of the pixel of the second embodiment will be described focusing on differences from the first embodiment. In addition, about the structure which attached | subjected the code | symbol same as 1st Embodiment, it has a structure and function similar to 1st Embodiment.

  In the present embodiment, the display device 10 is a top emission type, and the organic EL element 20 emits light mainly in a direction from the substrate 140 toward the organic EL layer 180. That is, the cathode 170 is provided on the third interlayer insulating layer 146, and the anode 160 is provided on the organic EL layer 180.

  In the present embodiment, each pixel does not have the fourth light shielding layer 126 (see FIG. 4) provided between the substrate 140 and the semiconductor layer 110. As in this embodiment, when the display device 10 is a top emission type or when the amount of light incident on the surface opposite to the surface on which the gate electrode 119 is provided in the semiconductor layer 110 is small, The light shielding layer 126 may not be provided.

  In the present embodiment, each pixel does not have the second recess 134 (see FIG. 4) provided in the second interlayer insulating layer 144 around the semiconductor layer 110. When the amount of light incident from the side of the semiconductor layer 110 is small as in this embodiment, the second recess 134 may not be provided.

  Moreover, in the said embodiment, the example which comprised all the pixel circuits with the p-type thin-film transistor was shown. According to this configuration, since the display area 15 can be entirely configured as a p-type, the manufacturing process is simplified. However, the p-type transistor made of low-temperature polycrystalline silicon has a low leakage current in the dark state, but the leakage current increases rapidly when light is irradiated even slightly. This is thought to be because minority carriers are highly mobile electrons. According to the present invention, incident light can be almost completely prevented even when the light emitting element is very close to the transistor, and the low leakage current in the dark state of the p-type thin film transistor can be utilized. However, even when an n-type thin film transistor is used, not only can the area of the capacitive element 40 be reduced to increase the bottom emission type aperture ratio, but also the effect of obtaining highly accurate gradation reproducibility can be obtained.

  FIG. 7 is a perspective view showing a configuration of a personal computer 1000 which is an example of the electronic apparatus of the present invention. In FIG. 7, the personal computer 1000 is configured to include a display panel 1002 and a main body 1006 having a keyboard 1004. The electro-optical device of the present invention is used in the display panel 1002 of the personal computer 1000.

  The examples and application examples described through the embodiments of the present invention can be used in appropriate combination according to the application, or can be used with modifications or improvements, and the present invention is limited to the description of the above-described embodiments. It is not something. It is apparent from the description of the scope of claims that the embodiments added with such combinations or changes or improvements can be included in the technical scope of the present invention.

1 is a diagram illustrating a configuration of a display device 10 which is an example of an electro-optical device according to the invention. 3 is a circuit diagram illustrating a configuration of each pixel in the display device 10. FIG. FIG. 3 is a plan layout diagram of the circuit shown in FIG. 2. FIG. 4 is a cross-sectional view of each pixel according to the first embodiment taken along the line II in FIG. 3. FIG. 4 is an enlarged view (planar layout diagram) of a region where a TFT 50 in FIG. 3 is provided. It is II sectional drawing in FIG. 3 of each pixel which concerns on 2nd Embodiment. 1 is a perspective view illustrating a configuration of a personal computer 1000 which is an example of an electronic apparatus according to the invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 ... Data line driver, 12 ... 1st scanning line driver, 13 ... 2nd scanning line driver, 15 ... Display area, 16 ... Data line, 17 ... 1st 18 ... second scanning line, 19 ... power supply line, 20 ... element, 40 ... capacitor element, 110 ... semiconductor layer, 112 ... source region, 114. ..Drain region, 116... Channel region, 118... LDD region, 119... Gate electrode, 120... First light shielding layer, 122. 3rd light shielding layer, 126 ... 4th light shielding layer, 132 ... 1st recessed part, 134 ... 2nd recessed part, 140 ... board | substrate, 142 ... 1st interlayer insulation layer 144, second interlayer insulating layer, 146, third interlayer insulating layer, 150, gate insulating layer, 60 ... anode, 170 ... cathode, 180 ... organic EL layer

Claims (19)

A light-emitting element having a light-emitting layer that is laminated on an upper layer of the substrate and emits light;
An element for driving the light emitting element, the driving element being provided between the substrate and the light emitting layer and having a semiconductor layer;
A first light-shielding layer provided between the drive element and the light-emitting layer and blocking the light incident on the semiconductor layer;
An electro-optical device, comprising: a second light-shielding layer that is provided at least partially in parallel or obliquely with respect to the stacking direction of the light-emitting layer and shields the light incident on the drive element. A first interlayer insulating layer provided between the driving element and the first light shielding layer; and a first recess provided in the first interlayer insulating layer around the semiconductor layer;
The electro-optical device according to claim 1, wherein at least a part of the second light shielding layer is provided in the first recess.   The electro-optical device according to claim 1, wherein the first light shielding layer and the second light shielding layer are provided integrally. The driving element is a thin film transistor having a gate electrode,
The second light shielding layer is provided continuously from the first light shielding layer around the first light shielding layer,
In plan view, the distance between the semiconductor layer and the end of the second light shielding layer in the extending direction of the gate electrode is such that the semiconductor layer and the second light shielding in a direction substantially perpendicular to the extending direction. The electro-optical device according to claim 1, wherein the electro-optical device is longer than a distance from an end portion of the layer.   5. The device according to claim 1, wherein the second light shielding layer is provided in the stacking direction at substantially the same height as the gate electrode or at a position closer to the substrate than the gate electrode. The electro-optical device according to Item.   2. The semiconductor device according to claim 1, further comprising a third light-shielding layer provided between the first light-shielding layer and the substrate and shielding the light incident on the semiconductor layer around the semiconductor layer. 4. The electro-optical device according to any one of items 1 to 3. A second interlayer insulating layer provided between the driving element and the substrate;
A second recess provided in the second interlayer insulating layer,
The electro-optical device according to claim 6, wherein at least a part of the third light shielding layer is provided in the second recess. The driving element is a thin film transistor having a gate electrode,
The electro-optical device according to claim 6, wherein the third light shielding layer is made of the same material as the gate electrode.   The at least part of the third light shielding layer is provided at a position closer to the substrate than the gate electrode in a direction substantially perpendicular to a surface on which the gate electrode is provided. 9. The electro-optical device according to 8. The bottom surface of the first recess is formed by the third light shielding layer,
10. The electro-optical device according to claim 6, wherein the second light shielding layer is in contact with the third light shielding layer in the first recess. 11.   The electro-optical device according to claim 10, wherein an area of a surface forming the first recess in the third light shielding layer is larger than an area of a bottom surface of the first recess. The driving element is a thin film transistor having a gate electrode,
The third light shielding layer includes a first region provided substantially parallel to the extending direction of the gate electrode in a plan view, and extends from the first region to the first region. And a second region provided in a substantially vertical direction,
The distance between the semiconductor layer and the second region in the extending direction is longer than the distance between the semiconductor layer and the first region in the substantially vertical direction. Electro-optic device.   The electro-optical device according to claim 12, further comprising a plurality of the third light shielding layers provided with the semiconductor layer interposed therebetween.   The electro-optical device according to claim 1, further comprising a fourth light-shielding layer provided between the substrate and the drive element and configured to shield at least the light incident on the drive element.   The electro-optical device according to claim 1, wherein the driving element is a p-type thin film transistor having a source and a drain.   The electro-optical device according to claim 14, wherein the semiconductor layer is made of polycrystalline silicon. A capacitor element for accumulating charges necessary for light emission of the light emitting element;
17. The electro-optical device according to claim 15, wherein one of the source and the drain is electrically connected to the capacitive element.   The electro-optical device according to claim 1, wherein the light emitting element is an organic EL element. An electronic apparatus comprising the electro-optical device according to claim 1.

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