JP2001100654A - El display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an EL display device with which bright display may be obtained by suppressing the lowering of power source current by the resistance of drive lines VL occurring in the distances from drive power source input terminals and supplying the current to be intrinsically supplied to EL elements. SOLUTION: In the respective drive lines VL for supplying the drive current from the drive power source to the organic EL elements 20 formed in display pixel regions having display pixels, the respective drive lines VL arranged at the respective display pixels adjacent to each other are connected to bypass lines BL within the display pixel regions, by which the lowering of the power source current by the resistance of the drive lines VL is suppressed. The bypass lines are formed in the layers lower than the layers where the drive lines VL are formed, by which the superposition on anodes 6 is made possible.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electroluminescent display device having an electroluminescent element and a thin film transistor.

[0002]

2. Description of the Related Art In recent years, electroluminescence (Elec)
tro Luminescence: Hereinafter, referred to as “EL”. An EL display device using an element has attracted attention as a display device replacing a CRT or an LCD. For example, a thin film transistor (Th) is used as a switching element for driving the EL element.
in Film Transistor: Hereinafter, referred to as “TFT”. Research and development of an EL display device having ()) are also in progress.

FIG. 7 shows a display pixel of an organic EL display device, and FIG. 8 shows an equivalent circuit diagram of the organic EL display device. FIG. 9 is a cross-sectional view taken along the line AA of FIG.
FIG. 0 shows a cross-sectional view along the line BB in FIG.

As shown in FIG. 1, display pixels are formed in a region surrounded by a gate line GL and a drain line DL. A first TFT 1, which is a switching element, is provided near the intersection of the two signal lines, and the source of the TFT 1 also serves as a storage capacitor electrode 2 and a capacitor electrode 3 forming a capacitor, and drives an organic EL element. Second TFT
4 is connected to the gate 5. The source of the second TFT 4 is connected to the anode 6 of the organic EL element, and the other drain is connected to a drive line VL for driving the organic EL element.

The storage capacitor electrode 2 is made of chromium or the like, and is provided with a first TF through an upper gate insulating film 7.
The source is overlapped with the capacitance electrode 3 integrated with the source of T1, and charges are accumulated using the gate insulating film 7 as a dielectric layer. This storage capacitor 8 holds a voltage applied to the gate 5 of the second TFT 4.

Subsequently, a first TFT 1 for switching is used.
Will be described with reference to FIGS. 7 and 9.

First, a first gate electrode 11 made of a high melting point metal such as chromium (Cr) or molybdenum (Mo) is provided on a transparent insulating substrate 10 made of quartz glass, non-alkali glass or the like. This first gate electrode 11
As shown in FIG. 7, for example, a plurality of lines extend in parallel with the gate line GL, for example, left and right. On the right side of the first gate electrode 11 in FIG. 9, the storage capacitor electrode 2 formed in the same process as the first gate electrode 11 is formed. Since the storage capacitor electrode 2 forms a capacitor as shown in FIG.
Between the TFT 1 and the second TFT 4 has an enlarged portion, and these are formed integrally with a storage capacitor line CL extending left and right.

Subsequently, a first active layer 12 made of a polycrystalline silicon (p-Si) film is formed via a gate insulating film 7. The active layer 12 is formed by an LDD (Li
ghtly Doped Drain) structure. That is, low-concentration regions are provided on both sides of the gate, and high-concentration source and drain regions are further provided outside.
On the active layer 12, a stopper insulating film 13 is provided. This stopper insulating film 13 is a film for preventing ion implantation into the active layer 12, and is made of a Si oxide film here.

On the gate insulating film 7, the active layer 12, and the stopper insulating film 13, for example, an SiO ₂ film,
An interlayer insulating film 14 in which a SiN film and a SiO ₂ film are stacked is provided, and a drain line DL serving as a drain electrode is electrically connected through a contact hole C1 provided in the drain. Further, a flattening film PLN made of, for example, an organic resin is formed on the entire surface to flatten the unevenness of the surface. Since the EL display device is driven by current, the EL layer must have a uniform film thickness. This is because current concentration occurs in a portion where the film thickness is small. Therefore, since at least this formation region requires considerable flatness, the flattening film PLN is employed.

Next, the second TF for driving the organic EL element
T4 will be described with reference to FIG.

On the insulating substrate 10 described above, the first
A second gate electrode 15 made of the same material as that of the gate 11 is provided.
Is provided. As described above, a stopper insulating film 17 is provided on the active layer.

In the active layer 16, an intrinsic or substantially intrinsic channel is provided above the gate electrode 15, and a source region and a drain region of a p-type impurity are provided on both sides of the channel to constitute a p-type channel TFT. are doing.

On the entire surface, the above-mentioned interlayer insulating film 14 is formed.
Are formed. The drive line VL is electrically connected via the contact hole C2. Further, the above-mentioned flattening film PLN is formed on the entire surface, and the source is exposed by the contact hole C3. Then, through this contact hole, ITO (Indium Thin Oxid
The transparent electrode (anode of the organic EL element) 6 composed of e) is formed.

The organic EL element 20 includes the anode 6, the MTD
ATA (4,4-bis (3-methylphenylphenylamino) bipheny
l) and a TPD (4,4,4)
hole transport layer 22 composed of -tris (3-methylphenylphenylamino) triphenylanine, quinacridone
light-emitting layer 23 made of Bebq2 (10-benzo [h] quinolinol-beryllium complex) containing a derivative and Be
Light-emitting element layer E composed of an electron transport layer 24 composed of bq2
A cathode 25 made of M and a magnesium-indium alloy is laminated in this order, and is provided on substantially the entire surface of the organic EL element.

The light emitting principle and operation of the organic EL element are as follows. The holes injected from the anode 6 and the electrons injected from the cathode 25 are recombined inside the light emitting layer EM to form the organic molecules forming the light emitting layer EM. Excited to generate excitons. Light is emitted from the light emitting layer during the process of radiation deactivation of the excitons, and the light is emitted from the transparent anode to the outside through the transparent insulating substrate to emit light.

As described above, the charge supplied from the source S of the first TFT 1 is stored in the storage capacitor 8 and the second TF
It is applied to the gate 15 of T4, and the organic E
The L element is driven by current to emit light.

[0017]

However, as shown in FIG. 8, the drive lines VL for driving the organic EL elements are connected to a drive power supply input terminal T provided outside the display pixel area, and are arranged vertically. Are connected and arranged for each display pixel. Therefore, the resistance of the drive line VL increases in accordance with the length of the drive line VL as the distance from the drive power input terminal T increases. Are not supplied, the display becomes dark, and display unevenness occurs.

Therefore, the present invention has been made in view of the above-mentioned conventional drawbacks, and suppresses a decrease in power supply current due to the resistance of the drive line VL.
An object of the present invention is to provide an EL display device which can supply bright light to an element.

[0019]

According to the present invention, as described above, the resistance of a drive line located at each display pixel is made more uniform.
The problem is solved by providing the bypass line in a direction intersecting the extending direction and electrically connecting to the drive line, and providing a bypass line at a position lower than the drive line.

For example, in a layer where a gate line is formed,
If a bypass line made of chrome is provided and makes contact with the drive line, the drive line is formed in a lattice shape. Is suppressed.

Third, the problem is solved by forming the bypass line in a layer in which a gate is formed, a layer in which a semiconductor film is formed, or an insulating layer located between the semiconductor film and a drive line. .

Although the drive line and the bypass line can be originally formed in the same layer, the layout area of the bypass line is required accordingly. However, by placing it below the bypass line, for example, it can overlap with the anode. In addition, since a thick insulating layer is formed between the anode and the bypass line, the problem of parasitic capacitance is suppressed.

Fourth, by overlapping at least a part of the bypass line with the anode as described above, it is possible to suppress the enlargement of the display area which is enlarged due to the arrangement of the bypass line. In addition, other components can be enlarged by the amount of suppression.

Fifth, the problem is solved by forming a bypass line for each of the display pixels and forming a contact at a portion overlapping with the drive line.

Until now, at least one bypass line is effective. However, if there is no bypass line for each display pixel, unevenness of the display pixel also occurs depending on the presence or absence of the bypass line. Here, this is further suppressed.

Sixth, the present invention can be realized with a bottom gate type structure or a top gate type structure.

[0027]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An EL display according to the present invention will be described. FIG. 1 is a plan view showing a display pixel of an EL display device, and a region surrounded by a dotted line and hatched by a point is:
The region formed of the gate material, the portion surrounded by solid lines and not hatched is a P-Si layer, and the portion surrounded by solid lines and hatched at oblique points is a portion made of a transparent electrode material. Further, a portion surrounded by a solid line and hatched by an oblique line is a portion formed of a metal material containing Al as a main material.

FIG. 2 is a sectional view taken along line AA of FIG. 1, and FIG. 3 is a sectional view taken along line BB of FIG. FIG. 4 is an equivalent circuit diagram thereof. In FIG. 4, a portion surrounded by a dotted line indicates a display pixel area.

In this embodiment, the first and second TFTs 1 and 4 employ bottom gate type TFTs, and a p-Si film is used as an active layer. The gate electrodes 11 and 15 have a double gate structure.

Now, the organic EL display device will be specifically described with reference to FIGS.

First, there is a transparent substrate 10 having at least a surface having an insulating property. In this embodiment, in order to protect the EL element from moisture, a metal cap (can) is provided on the upper surface so as to seal the EL material. The metal cap is omitted in the figure. Since the metal cap is provided, the emitted light is extracted from the transparent substrate 10. Therefore, the substrate 10 needs to be transparent. However, when the emitted light is extracted from above, it is not necessary to be transparent. Here, a transparent substrate 10 made of glass, synthetic resin, or the like is employed.

On the transparent substrate 10, gate lines GL are provided on the left and right along the upper side of one display pixel in FIG. 1, and a bypass line BL extends on the lower side on the left and right. . In addition, a storage capacitor electrode 2 acting as a lower layer electrode of the storage capacitor 8 is provided, and a storage capacitor line CL extends left and right to connect the storage capacitor electrodes 2 to each other. These lines GL and CL are hatched because they are in the same layer. As a material, a high melting point metal such as Cr or Ta is used because P-Si is used for the upper layer. Here, about 1000-2000Å
Of Cr is formed by sputtering. In patterning, step coverage is taken into account, and the side is processed into a tapered shape.

Subsequently, a gate insulating film 7 and a semiconductor layer are laminated on the entire surface. Here, the gate insulating film 7, the active layers 12, 16 and the storage capacitor 8 are formed by plasma CVD including a-Si which is a material of the capacitor electrode 3 which is an upper layer electrode. Specifically, a Si nitride film of about 500 °, a Si oxide film of about 1300 °, and a-Si of about 500 ° are formed by continuous plasma CVD from the lower layer.

This a-Si is subjected to dehydrogenation annealing in a nitrogen atmosphere at about 400 ° C., and then converted into P-Si by an excimer laser. Symbols 13 and 17 are Si
A stopper insulating film made of an oxide film,
6 becomes a mask at the time of ion implantation. The first TFT 1 is
Using the stopper insulating film 13 as a mask, P (phosphorus) ions are implanted to form N-channel sources and drains, and the second TFT 4 is implanted with B (boron) ions to form P-channel sources and drains. A drain is formed.

As shown in FIG. 1, patterning is performed by photolithography. That is, the first TFT 1
The P-Si layer of the gate line GL and the drain line D
Below the upper left intersection of L, the capacitor electrode 3 overlaps with the drain line DL, extends over the gate electrode 11, and then extends as the capacitor electrode 3 overlapping with the storage capacitor electrode 2. The capacitance electrode 3 extends below the right end of the connection wiring 30 used to electrically connect to the gate electrode 15 of the second TFT 4. On the other hand, the P-Si layer of the second TFT 4 extends over the second gate electrode 15 from under the right drive line VL, and extends under the anode 6 made of a transparent electrode.

An interlayer insulating film 14 is formed on the entire surface. This interlayer insulating film 14 has a thickness of about 1000
Si oxide film, about 3000Å Si nitride film, 1000Å
Are formed by continuous CVD. This interlayer insulating film may have at least one layer. The film thickness is not limited to this.

Next, a drain line DL, a drive line VL, and a connection wiring 30 which are hatched by oblique lines in FIG. 1 are formed in the upper layer of the interlayer insulating film 14. Naturally, a contact is formed, the contact hole C1 between the drain line DL and the semiconductor layer of the first TFT 1, the drive line VL and the second hole.
The semiconductor layers of the contact hole C2 between the semiconductor layer of the TFT 4 and the contact hole C4 between the connection wiring 30 and the capacitor electrode 3 are exposed. Also, the contact hole C5 of the connection wiring 30 and the second gate electrode 15, and the contact hole C6 of the drive line VL and the bypass line BL, which is a feature of the present invention, are different from the above-mentioned contact holes, and an extra gate insulating film is laminated Has been further etched and
Is exposed. This line material has a lower layer of 1000
ÅMo, 7000ÅAl is laminated on the upper layer, and Mo is a barrier layer. Contact hole C3
Will be described later.

Further, a flattening film PLN of about 2-3 μm is formed on the entire surface. One of the reasons for using the flattening film PLN is the film for organic EL described in the conventional example.
This film includes a first hole transport layer 21, a second hole transport layer 22, a light emitting layer 23, and an electron transport layer 24. Further, the hole transport layer may be composed of a single layer. Therefore, the organic layer is a laminate of very thin films. The EL element is
Because of the current driving, if these film thicknesses are not formed very uniformly, a large amount of current flows through the thin film thickness portion, and a bright spot is generated in that portion,
This point causes degradation of the organic film, which in the worst case leads to destruction. Therefore, in order to prevent this destruction, the entire surface including the anode 6 needs to be as flat as possible. Here, an acrylic liquid resin is applied and becomes flat after curing. Needless to say, the flattening film PLN is not limited to this.

Here, since the anode 6 is connected to the source of the second TFT 4, the planarizing film PLN and the interlayer insulating film 14 are opened, and the contact hole C 3 exposing the second active layer 16 is formed. ing.

Further, an organic film constituting an EL element is formed on at least the anode 6. First, MTDATA (4,4-bis (3-methylphenylphenylamin
o) The first hole transport layer 21 composed of biphenyl) and TP
D (4,4,4-tris (3-methylphenylpheny lamino) tripheny
a second hole transport layer 22 composed of lanine, a light emitting layer 23 composed of Bebq2 (10-benzo [h] quinolinol-beryllium complex) containing a quinacridone derivative, and a light emitting element layer EM composed of an electron transport layer 24 composed of Bebq2. , A magnesium-indium alloy, an alloy of Al and Ti, or a LiF or the like, in which a cathode 25 is laminated in this order. For the thickness of the organic layer, refer to the above description. The cathode 25 is made of an alloy of Al and Ti, and has a thickness of 1000 to 2000 °.

Here, the anode 6 needs to be patterned for each pixel, but the film on the anode 6 is distinguished by the structure. : A first structure in which the anode 6 to the cathode 25 are patterned for each pixel. In the above, the second structure in which the cathode 25 is not patterned and is formed substantially entirely over the display area. A third structure of the solid structure in which only the anode 6 is patterned for each pixel as shown in FIG. 1 and the entire area from the upper layer to the cathode of the anode is energized.

However, since the cathode 6 does not need to be subjected to patterning, a generally solid structure is generally employed. In the drawings, the anode 6 and the cathode 25 are illustrated as being short-circuited. However, since the organic film of the EL element is completely covered including the periphery of the anode 6, short-circuiting is prevented. This is the same in the conventional example. Further, another flattening film may be formed on the flattening film PLN so as to cover the edge of the anode 6.

Further, the EL layer in the display area or all the E layers
A metal cap that covers the L layer is formed. E
This is because the L layer deteriorates when it absorbs water, and needs to be protected against water intrusion. Therefore, without deteriorating the EL layer,
A film having high moisture resistance, for example, a resin film may be used as a substitute for the cap, and a metal cap may be further provided thereon.

The light emitting principle and operation of the organic EL element are as follows. The holes injected from the anode 6 and the electrons injected from the cathode 25 are recombined inside the light emitting layer EM to form the organic molecules forming the light emitting layer EM. Excited to generate excitons. Light is emitted from the light emitting layer during the process of radiation deactivation of the excitons, and the light is emitted from the transparent anode to the outside through the transparent insulating substrate to emit light.

The feature of the present invention resides in the bypass line BL.

As is clear from the equivalent circuit shown in FIG. 4, the drive line VL extends in the column direction in the display area surrounded by the dotted line, and is connected to each display pixel in the column direction to drive current. Has been supplied. This display area has a very long length and generates a resistance as described in the column of the problem to be solved. However, the display area is adjacent to the display area by being connected to the bypass line BL extending in the row direction. The same potential voltage is applied to the display pixels. In addition, the current is also supplied from various directions by the drive lines VL and the bypass lines BL formed in a lattice shape, and the current that should be supplied to the organic EL elements provided in each display pixel can be supplied. Therefore, it is possible to prevent the display deterioration and the decrease in display brightness due to the resistance component described above.

If the gate is formed on the layer where the gate is formed as in the case of the bypass line BL in FIG. 3, it can be moved in the direction indicated by the arrow. That is, the anode 6 and the gate line G of FIG.
The bypass line BL formed at least partially overlaps with the anode 6, and by overlapping the bypass line BL, the area obtained by arranging the bypass line BL is reduced. The increase can be suppressed. Between the gate line GL and the anode 6, a gate insulating film 7, an interlayer insulating film 14, and a planarizing film P
Since the LN is interposed, the parasitic capacitance generated during this period is
Almost negligible.

The position of the bypass line BL only needs to be located below the drive line VL. Another example will be described with reference to FIGS.

FIG. 5 shows that the bypass line BL is formed on the gate insulating film 7. When the process is simplified here, it is made of P-Si, but may be the above-mentioned high melting point metal.

FIG. 6 shows that the bypass line BL is formed between the layers of the interlayer insulating film. Here, since the P-Si is formed, the temperature increase in the manufacturing process is not so severe. BL can be made of a material containing Al as a main component, a high melting point metal material, or P-Si. Since an Si oxide film, a Si nitride film, and a Si oxide film are formed from below the interlayer insulating film, the bypass line BL can be arranged between them. Of course, superposition with the anode is also possible. However, an increase in the parasitic capacitance is inevitable as it is arranged in the upper layer. The dotted line formed in the interlayer insulating film 14 indicates the interface between the layers.

Further, the number of bypass lines BL inserted will be described. That is, in FIG. 4, if at least one bypass line BL is formed, a decrease in resistance can be suppressed. However, if it is arranged for each pixel, the distribution of resistance,
The voltage distribution becomes more uniform, and the originally flowing current, that is, the luminance to emit light can be reproduced more faithfully.

Although the present invention has been described with reference to the bottom gate type structure, the present invention can be applied to a top gate type structure. In the case of a top gate type TFT, an active layer made of, for example, P-Si, a gate insulating film, a gate, an interlayer insulating film, and metal wiring are laminated on a transparent substrate (the upper layer has substantially the same structure as the bottom gate type structure). Therefore, on a transparent substrate, C
A wiring can be formed of r or a high melting point metal on the gate insulating film using the Al material or the high melting point metal material.

Finally, the bypass line BL0 arranged outside the display pixel area will be described. In FIG. 4, the outermost solid line is the outer shape of the EL display device, the thicker solid line is the bypass line BL0 connected to the drive power supply, and the rectangle below it is the area where the drive circuit is formed. . That is, the form from the display area to the outer shape of the transparent substrate is schematically shown. Here, the drive circuit is made of P-Si. As can be seen from the figure, the drain line DL is connected to the circuit in the drive circuit formation region and ends at one end, and no drain line DL is formed between the drive circuit formation region and the outer shape. Therefore, there is a space where the bypass line BL0 can extend to the left and right thickly as shown in the figure without intersection with the drain line DL. Moreover, bypass line B
L0 can be formed in the same layer as the drain line DL or the drive line VL, and a wiring can be formed using a material containing Al as a main component. Therefore, the resistance of the bypass line BL0 itself can be greatly reduced, and the resistance value of the drive line VL can be further reduced, and at the same time, a stable voltage can be supplied.

In the above-described embodiment, a p-Si film is used as a semiconductor film, but a semiconductor film such as a microcrystalline silicon film or an amorphous silicon film may be used.

Further, in the above-described embodiment, the organic EL display device has been described. However, the present invention is not limited to this.
The present invention can be applied to an L display device, and a similar effect can be obtained.

[0056]

As is clear from the above description, the first
By providing each of the drive lines in a direction intersecting with the extending direction, electrically connecting to the drive line, and providing a bypass line at a position lower than the drive line,
The drive line is formed in a lattice shape, and even if the drive line goes away from the drive power input terminal, the rate of decrease in the resistance value is as follows:
It can be suppressed more than the conventional one.

Although the drive line and the bypass line can be originally formed in the same layer, the layout area of the bypass line is required accordingly. However, by placing it below the bypass line, for example, it can overlap with the anode. In addition, since a thick insulating layer is formed between the anode and the bypass line, the problem of parasitic capacitance is suppressed.

Further, as described above, by overlapping at least a part of the bypass line with the anode, it is possible to suppress the enlargement of the display area which is enlarged due to the arrangement of the bypass line. In addition, other components can be enlarged by the amount of suppression.

Further, by forming a bypass line for each display pixel and forming a contact at a portion overlapping with the drive line, unevenness of each display pixel can be further suppressed.

Therefore, the increase in resistance due to the length of the drive line is reduced, and the current to be originally supplied is reduced by the E of each display pixel.
An EL display device that can be supplied to the L element and can prevent dark display can be obtained, and at the same time, enlargement of the EL display region can be suppressed.

[Brief description of the drawings]

FIG. 1 is a plan view of a display pixel of an EL display device according to the present invention.

FIG. 2 is a sectional view taken along line AA of FIG. 1;

FIG. 3 is a sectional view taken along line BB of FIG. 1;

FIG. 4 is an equivalent circuit diagram of the EL display device of the present invention.

FIG. 5 is a diagram illustrating an arrangement position of a bypass line BL in FIG. 3;

FIG. 6 is a diagram illustrating an arrangement position of a bypass line BL in FIG. 3;

FIG. 7 is a plan view of a display pixel of a conventional EL display device.

FIG. 8 is an equivalent circuit diagram of a conventional EL display device.

FIG. 9 is a sectional view taken along line AA of FIG. 7;

FIG. 10 is a sectional view taken along line BB of FIG. 7;

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 first TFT 2 storage capacitor electrode 3 capacitor electrode 4 second TFT 6 anode 7 gate insulating film 8 storage capacitor 14 interlayer insulating film 20 EL element GL gate line DL drain line CL storage capacitor line VL drive line VL BL bypass line BL

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference)

Claims (6)

[Claims] 1. An EL having a light emitting layer between an anode and a cathode.
A display pixel comprising a device and a thin film transistor having a drain of an active layer made of a semiconductor film electrically connected to a drive line of the EL device, and a thin film transistor having a source of the active layer electrically connected to the EL device An EL display device having a bypass line extending in a direction intersecting with the drive line and electrically connected to the drive line, and provided in a lower layer than the drive line. An EL display device characterized by the above-mentioned. 2. An EL having a light emitting layer between an anode and a cathode.
A first thin film transistor in which a drain of an active layer made of a semiconductor film is connected to a drain line and a gate is connected to a gate line; and a drain of the active layer made of the semiconductor film is connected to a drive line of the EL element. Connected, the gate is electrically connected to the source of the first thin film transistor, and the source is the E thin film transistor.
An EL display device in which display pixels each including a second thin film transistor connected to an L element are arranged in a matrix. The EL display device extends in a direction intersecting with the drive line and is electrically connected to the drive line. An EL display device having a bypass line connected thereto and provided below the driving line. 3. The bypass line is formed between a layer on which the gate is formed, a layer on which the semiconductor film is formed, or an insulating layer located between the semiconductor film and the driving line. 3. The EL display device according to claim 1 or 2. 4. The EL display device according to claim 3, wherein the bypass line is at least partially overlapped with the anode. 5. The device according to claim 1, wherein the bypass line is formed for each of the display pixels, and a contact is formed for each of the display pixels at a portion where the bypass line overlaps with the drive line. Item 5. An EL display device according to item 4. 6. The EL display device according to claim 1, wherein the thin film transistor has a top gate type structure.