JP2011175419A - Interface device and image forming device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an interface device and an image forming device, capable of reducing latency produced when an interrupt request, relayed by a functional module adjacent to a control module, is given to the control module, when multi-stage connection of functional modules to the control module is made by use of predetermined high-speed serial buses. <P>SOLUTION: Before interruption processing is requested by first request units 31, 32, a second functional module 3 accesses a memory unit 12 of a control module 1, and writes interruption cause information which represents an interruption cause of the interruption processing. When the interruption processing request is received by a first request reception unit 11, a control unit 10 of the control module 1 accesses the memory unit 12 and reads out the interruption cause information, so as to recognize the interruption cause represented by the interruption cause information. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an interface device and an image forming apparatus.

  Recently, in an image forming apparatus, the speed of the image forming apparatus is increased by connecting a control module and a functional module or between a plurality of functional modules through a high-speed serial bus compliant with the PCIE (PCI Express) standard. Is planned.

  An example of this type of image forming apparatus is described in Patent Document 1. In the image forming apparatus disclosed in Patent Document 1, a serial communication control unit, which is a control module, is connected as a functional module through a high-speed serial bus conforming to the PCIE standard as a printer controller, an image input unit, an image processing unit, a storage unit, and an image. The output unit is connected.

  In general, as in Patent Document 1, the configuration of the PCIE system shown in FIG. 7 is used to connect each functional module to a control module. In the PCIE system shown in FIG. 7, the control module 400 includes route complexes RC1 to RC3. The route complexes RC1 to RC3 are provided with ports for connecting the functional modules 300 (# 1) to 300 (# 4), respectively.

  The functional modules 300 (# 1) to 300 (# 4) have end points EP1 to EP4 for connecting the functional modules to the control module 400, respectively. These end points EP1 to EP4 respectively constitute I / O devices in the PCIE system.

  In the control module 400, the end point EP1 is connected to the root complex RC1 through a high-speed serial bus (hereinafter referred to as PCIE serial bus) B conforming to the PCIE standard, so that the functional module 300 (# 1) 400 is connected. In addition, the functional module 300 (# 2) is connected to the control module 400 by connecting the endpoint EP2 to the root complex RC2 through the PCIE serial bus B.

  Furthermore, a switch SW is connected to the root complex RC3 through the PCEI serial bus B, and end points EP3 and EP4 are connected to the switch SW, respectively. Thereby, the control module 400 can selectively communicate with any one of the functional modules 300 (# 3) and 300 (# 4).

  As described above, one-to-one communication is possible between the control module 400 and each functional module.

JP 2005-354658 A

  Recently, a configuration in which a plurality of functional modules are sequentially connected in series via a PCIE serial bus from one control module as a starting point may be used. The configuration of this type of PCIE system is shown in FIG.

  In the configuration illustrated in FIG. 8, the control module 100 includes a CPU 101, a root complex 102, and an IRQC (interrupt controller) 103. The functional module 200 includes an end point 201, a route complex 202, and an IRQC 203. Furthermore, the functional module 300 includes an end point 301, an IRQC 302, and a master 303.

  In such a configuration, the endpoint 201 of the functional module 200 is connected to the root complex 102 of the control module 100 through the PCIE serial bus B1. The end point 301 of the functional module 300 is connected to the root complex 202 of the functional module 200 through the PCIE serial bus B2. Thus, a so-called non-transparent bridge is configured in which a plurality of functional modules are sequentially connected in series starting from one control module.

  In such a non-transparent bridge, when an interrupt request is relayed to a control module from a functional module adjacent to the control module, the so-called transparent bridge shown in FIG. Problems that did not arise. This will be described below.

  For example, when a signal requesting an interrupt is output from the master 303 in the functional module 300, the signal reaches the root complex 202 through the IRQC 302 and the PCIE serial bus B2. The signal that has reached the root complex 202 is once input to the IRQC 203 and output from the IRQC 203 to the end point 201. The signal reaching the end point 201 is relayed to the PCIE serial bus B1.

  The signal relayed to the PCIE serial bus B1 is received by the route complex 102, temporarily input to the IRQC 103, and output from the IRQC 103 to the CPU 101.

  As a result, an interrupt request signal output from the master 303 in the functional module 300 reaches the CPU 101 of the control module 100 through the functional module 200. When receiving a signal from the master 303, the CPU 101 determines an interrupt factor according to a predetermined procedure, and performs an interrupt process corresponding to the determined factor.

  The procedure for determining the interrupt factor by the CPU 101 will be described below. The CPU 101 refers to the IRQC 103 in the control module 100 and confirms that the interrupt request is caused by the root complex 102.

  Next, the CPU 101 accesses the IRQC 203 in the functional module 200 and confirms that the interrupt request is caused by the root complex 202.

  Next, the CPU 101 accesses the IRQC 302 in the functional module 300 and confirms that the interrupt request is caused by the master 303. At this time, the CPU 101 confirms that an interrupt has been requested by the master 303 and the cause of the interrupt.

  As described above, in the non-transparent bridge, when there is a request for interrupt processing from the functional module 300, the CPU 101 needs to access IRQC 103, 203, and 301 in order in order to confirm the interrupt factor of the interrupt processing. There is.

  Therefore, as in the case of the transparent bridge shown in FIG. 7, compared to the case where the interrupt factor is confirmed by one-to-one communication between the control module 400 and the functional module, the interrupt request is made and the actual interrupt is made. Latency until processing is performed is increased.

  The present invention is proposed in order to solve the above problem, and when a functional module is connected to a control module in multiple stages using a predetermined high-speed serial bus, an interrupt that relays the functional module adjacent to the control module. It is an object of the present invention to provide an interface device and an image forming apparatus that can reduce latency when the above request is made to a control module.

  An interface device according to an aspect of the present invention includes: a first request receiving unit that receives an interrupt processing request from a plurality of functional modules; and the interrupt processing interrupt when the first request receiving unit receives the request A control module that performs the interrupt processing after recognizing the factor, a storage module that stores interrupt factor information representing the interrupt factor, and a second module that receives the request from another functional module. A request receiving unit, a first relay unit connected to the first request receiving unit through a predetermined high-speed serial bus, and relaying the request received by the second request receiving unit to the first request receiving unit; Connected to the second request accepting unit through the high-speed serial bus, the first function module comprising: a first functional module comprising: A second relay module comprising: a second relay module that relays the request to the second request receiver when the request is made by one request module; The first request unit further includes a first information writing unit that accesses the storage unit of the control module and writes the interrupt factor information before making the request, and the control unit of the control module includes the first request unit. When one request reception unit receives the request, the storage unit is accessed, the interrupt factor information is read, and the interrupt factor represented by the interrupt factor information is recognized. Item 1).

  According to this configuration, the second function module accesses the storage unit of the control module before making an interrupt process request relaying the first function module to the control module, and represents an interrupt factor indicating the interrupt factor of the interrupt process. Write information.

  In the control module, when the request from the second function module that relays the first function module is received by the first request reception unit, the control unit reads the interrupt factor information with reference to the storage unit, Recognizes the interrupt factor represented by the interrupt factor information.

  As a result, the control unit of the control module can determine the interrupt factor when a request is received from the second function module that relays the first function module.

  For this reason, the control unit of the control module can check the interrupt factor at the time when the interrupt processing request is received from the second function module that relays the first function module, and can perform the interrupt processing.

  Therefore, when a function module is connected in multiple stages to a control module using a predetermined high-speed serial bus, latency is reduced when an interrupt request is relayed to the control module and the function module adjacent to the control module. can do.

  In the above configuration, a plurality of the first functional modules are connected to each other through the high-speed serial bus, and any one of the first functional modules is connected to the control module, The functional module includes a second request unit that makes the request, and a second information writing unit that accesses the storage unit of the control module and writes the interrupt factor information before the second request unit makes the request It is preferable to further comprise (Claim 2).

  According to this configuration, a plurality of first function modules are sequentially connected to the control module. Each of the first function modules includes a second request unit that requests an interrupt process, and the second request unit requests an interrupt. Before performing the above, the information processing device further includes a second information writing unit that accesses the storage unit of the control module and writes interrupt factor information indicating an interrupt factor of the interrupt processing.

  As a result, the control unit of the control module knows the interrupt factor when it receives a request for interrupt processing that relays the first functional module adjacent to the control module. Further, the control unit of the control module can determine the interrupt factor even when an interrupt processing request is received from the first function module adjacent to the control module.

  That is, the control unit of the control module confirms the interrupt factor when receiving the interrupt processing request from each first function module because the interrupt factor is known when the interrupt processing request is received from each first function module. Thus, interrupt processing can be performed.

  Therefore, when a functional module is connected in multiple stages to a control module using a predetermined high-speed serial bus, latency when an interrupt request is issued from each functional module to the control module can be reduced.

  In the above configuration, the first functional module and the second functional module are preferably functional modules for forming an image on recording paper.

  According to this configuration, since the first functional module and the second functional module are functional modules for forming an image on recording paper, the first functional module and the second functional module form an image on the recording paper. Thus, the latency when an interrupt request is made to the control module can be appropriately reduced.

  In the above configuration, it is preferable that the high-speed serial bus is a serial bus compliant with a PCIE (PCI Express) standard.

  According to this configuration, since the functional module is connected to the control module through a serial bus compliant with the PCIE standard, the life of the chip constituting the control module and the functional module is extended and the expandability of the functional module is appropriately secured. An image forming apparatus can be provided.

  An image forming apparatus according to another aspect of the present invention includes the interface device according to any one of claims 1 to 4, and the first functional module serves as an image of the document from a document. And an image forming section for forming the image data on a recording sheet as the second functional module. (Claim 5)

  According to this configuration, the interface device according to any one of claims 1 to 4 is provided, and the image reading unit that reads image data representing an image of the document from the document is provided as the first functional module. In addition, an image forming unit that forms image data on a recording sheet is provided as a second functional module.

  Accordingly, it is possible to provide an image forming apparatus capable of reducing the latency when an interrupt request relayed through the image reading unit is issued from the image forming unit to the control module.

  An image forming apparatus according to still another aspect of the present invention includes the interface device according to any one of claims 1 to 4 and represents an image of a document as the first functional module. An image forming unit that forms image data on a recording sheet is provided, and an image reading unit that reads image data of the document from the document is provided as the second functional module.

  According to this configuration, the interface device according to any one of claims 1 to 4 is provided, and an image forming unit that forms image data representing an image of a document on a recording sheet as the first functional module. And an image reading unit for reading image data of the document from the document as a second functional module.

  Accordingly, it is possible to provide an image forming apparatus capable of reducing the latency when an interrupt request relayed through the image forming unit is issued from the image reading unit to the control module.

  According to the present invention, the control unit of the control module can confirm the interrupt factor at the time when the interrupt processing request is received and can perform the interrupt processing.

  Therefore, when a function module is connected in multiple stages to a control module using a predetermined high-speed serial bus, latency is reduced when an interrupt request is relayed to the control module and the function module adjacent to the control module. can do.

1 is a schematic cross-sectional view of an image forming apparatus according to a first embodiment of the present invention. FIG. 2 is a functional block diagram illustrating a schematic configuration of the image forming apparatus illustrated in FIG. 1. It is a functional block diagram which shows schematic structure of the interface apparatus A which concerns on one Embodiment of this invention. It is the flowchart which showed an example of the basic process of the functional module. It is the flowchart which showed an example of the basic process of the control module. It is the functional block diagram which showed an example of schematic structure of interface apparatus A1 which concerns on 2nd Embodiment. It is a figure for demonstrating the conventional image forming apparatus, and is a figure which showed an example of the PCIE (PCI express) system. It is a figure for demonstrating the conventional image forming apparatus, and is the figure which showed the other example of the PCIE (PCI express) system.

Hereinafter, an embodiment according to the present invention will be described with reference to the drawings. In addition, the structure which attached | subjected the same code | symbol in each figure shows that it is the same structure, The description is abbreviate | omitted.
(First embodiment)
FIG. 1 is a schematic sectional view of an image forming apparatus according to the first embodiment of the present invention. As shown in FIG. 1, the image forming apparatus F includes an image reading unit 200 and an apparatus main body M. The image reading unit 200 includes a document feeding unit 210, a scanner unit 220, a CIS 231, a user interface unit I, and a reversing mechanism described later.

  The document feeder 210 includes an ADF (Automatic Document Feeder), and includes a document tray 211, a pickup roller 212, a platen 213, a paper discharge roller 214, and a paper discharge tray 215. A document to be read is placed on the document tray 211. Documents placed on the document tray 211 are picked up one by one by the pickup roller 212 and sequentially conveyed to the platen 213 through the gap. Documents that have passed through the platen 213 are sequentially discharged to the discharge tray 215 by the discharge rollers 214.

  Of the positions facing the peripheral surface of the platen 213, a timing sensor (not shown) for detecting paper is installed at a predetermined position before the reading position P in the document transport direction. The document transport timing to the reading position P is achieved based on the output request. The timing sensor is configured by, for example, a photo interrupter.

  The scanner unit 220 optically reads an image of a document and generates image data. The scanner unit 220 includes a glass 221, a light source 222, a first mirror 223, a second mirror 224, a third mirror 225, a first carriage 226, a second carriage 227, an imaging lens 228, and a CCD (Charged Coupled Device) 229. .

  In the scanner unit 220, a white fluorescent lamp such as a cold cathode fluorescent tube is used as the light source 222, and the first mirror 223, the second mirror 224, the third mirror 225, the first carriage 226, the second carriage 227, and the imaging. A lens 228 guides light from the document to the CCD 229. Since the scanner unit 220 is configured using a white fluorescent lamp such as a cold cathode fluorescent tube as the light source 222, the scanner unit 220 is superior in color reproducibility to a CIS 231 described later in which a three-color LED or the like is used as the light source.

  On the glass 221, a document is manually placed by the user when reading the document without using the document feeder 210. The light source 222 and the first mirror 223 are supported by the first carriage 226, and the second mirror 224 and the third mirror 225 are supported by the second carriage 227.

  As a document reading method of the image reading unit 200, the scanner unit 220 reads a document placed on the glass 221 and the document is read by the document feeding unit 210 (ADF). There is an ADF reading mode for reading.

  In the flatbed reading mode, the light source 222 irradiates a document placed on the glass 221, and reflected light for one line in the main scanning direction is reflected in the order of the first mirror 223, the second mirror 224, and the third mirror 225. Then, the light enters the imaging lens 228. The light incident on the imaging lens 228 is imaged on the light receiving surface of the CCD 229.

  The CCD 229 is a one-dimensional image sensor and simultaneously processes image data of a document for one line. The first carriage 226 and the second carriage 227 are configured to be movable in a direction orthogonal to the main scanning direction (sub-scanning direction, arrow Y direction). When reading for one line is completed, the first carriage 226 and the second carriage 227 are moved in the sub-scanning direction. The first carriage 226 and the second carriage 227 move, and the next line is read.

  In the ADF reading mode, the document feeder 210 takes in the documents placed on the document tray 211 one by one by the pickup roller 212. At this time, the first carriage 226 and the second carriage 227 are disposed at a predetermined reading position P located below the reading window 230.

  When the document is transported by the document feeder 210, when the document passes over the reading window 230 provided in the transport path from the platen 213 to the paper discharge tray 215, the light source 222 irradiates the document, and the main scanning one line. The reflected light is reflected in the order of the first mirror 223, the second mirror 224, and the third mirror 225 and enters the imaging lens 228. The light incident on the imaging lens 228 is imaged on the light receiving surface of the CCD 229. Subsequently, the document is conveyed by the document feeder 210 and the next line is read.

  Further, the document feeder 210 has a document reversing mechanism including a switching guide 216, a reversing roller 217, and a reversing conveyance path 218. This document reversing mechanism reverses the front and back of the original whose surface has been read by the first ADF reading and transports it again to the reading window 230, whereby the CCD 229 reads the back side again.

  This document reversing mechanism operates only when reading both sides, and does not operate when reading one side. After reading the back side during single-sided reading and double-sided reading, the switching guide 216 is switched to the upper side, and the document that has passed through the platen 213 is discharged to the discharge tray 215 by the discharge roller 214.

  After the front side reading at the time of double-sided reading, the switching guide 216 is switched to the lower side, and the document that has passed through the platen 213 is transported to the reverse transport path 218 by the reverse roller 217. Thereafter, the switching guide 216 is switched upward, and the reverse roller 217 rotates in the reverse direction to re-feed the document to the platen 213. Hereinafter, a mode in which both sides of a document are read using the document reversing mechanism is referred to as a double-sided reversal reading mode.

  Furthermore, in the ADF reading mode, the image reading unit 200 according to the present embodiment causes the CCD 229 (scanner unit 220) to read the surface of the document while the document is being transported, as described above. ), The back side of the document can be read by the CIS 231. In this case, the surface of the document conveyed from the document tray 211 by the document feeder 210 is read by the CCD 229 when passing through the reading window 230, and the back surface is read when passing through the location where the CIS 231 is arranged. In CIS231, RGB three-color LEDs or the like are used as light sources.

  By using the CCD 229 and the CIS 231 in this way, it is possible to read both the front and back sides of a document by a single document transport operation (one pass) from the document tray 211 to the discharge tray 215 by the document feeding unit 210. Hereinafter, a mode in which both sides of a document are read using the CCD 229 and the CIS 231 in this way is referred to as a double-sided simultaneous reading mode.

  The double-sided reverse reading mode and the double-sided simultaneous reading mode are provided as reading modes when performing double-sided reading of a document using the ADF reading mode. The double-sided reverse reading mode is used when you want to match the image quality of both-side printed images, while the double-sided simultaneous reading mode gives priority to shortening the reading time even if there is a difference in the image quality of both-side printed images Used in cases. Note that the image forming apparatus F according to the present embodiment is initially set to the double-sided simultaneous reading mode, and when an image forming instruction is input without performing any mode setting operation in the reading mode, the double-sided simultaneous reading mode is set. A document image reading operation is performed in the reading mode.

  The image forming apparatus F includes an apparatus main body M and a stack tray 6 disposed on the left side of the apparatus main body M. The apparatus body M includes a plurality of paper feed cassettes 461, a paper feed roller 462 that feeds recording paper from the paper feed cassette 461 one by one and transports it to the image forming unit 40, and a recording paper transported from the paper feed cassette 461. And an image forming unit 40 for forming an image. The apparatus main body M includes a paper feed tray 471 and a feeding roller 472 that feeds the originals placed on the paper feed tray 471 one by one toward the image forming unit 40.

  The image forming unit 40 includes a charge removing device 421 that removes residual charges from the surface of the photosensitive drum 43, a charging device 422 that charges the surface of the photosensitive drum 43 after charge removal, and image data acquired by the scanner unit 220. Based on the electrostatic latent image, an exposure device 423 that outputs a laser beam to expose the surface of the photosensitive drum 43 to form an electrostatic latent image on the surface of the photosensitive drum 43. Above, developing devices 44K, 44Y, 44M, and 44C that form toner images of cyan (C), magenta (M), yellow (Y), and black (K), and various colors formed on the photosensitive drum 43. A transfer drum 49 on which the toner image is transferred and superimposed, a transfer device 41 for transferring the toner image on the transfer drum 49 to the paper, and the paper on which the toner image is transferred to the toner by heating The and a fixing device 45 for fixing on the paper.

  Note that toner is supplied to cyan, magenta, yellow, and black colors from a toner cartridge (not shown). Further, conveyance rollers 463 and 464 that convey the recording paper that has passed through the image forming unit 40 to the stack tray 6 or the discharge tray 48 are provided.

  When forming images on both sides of the recording paper, the image forming unit 40 forms an image on one side of the recording paper, and then the recording paper is nipped by the conveyance roller 463 on the discharge tray 48 side. In this state, the conveyance roller 463 is reversed to switch back the recording paper, and the recording paper is sent to the paper conveyance path L and conveyed again to the upstream area of the image forming unit 40, and an image is formed on the other surface by the image forming unit 40. After the formation, the recording paper is discharged to the stack tray 6 or the discharge tray 48.

  Further, in front of the apparatus main body M, the display unit 5 constituted by a touch panel and the user interface unit I incorporating the operation unit 16 having various operation buttons are exposed in front of the apparatus main body M. Is provided.

  FIG. 2 is a functional block diagram showing a schematic configuration of the image forming apparatus shown in FIG. As shown in FIG. 2, the image forming apparatus F includes a control module 1, a ROM (Read Only Memory) 12, a RAM (Random Access Memory) 13, an image reading unit 200, and an image forming unit. 40, an image processing unit 11 for performing predetermined image processing on the image data, and a FAX communication unit 17 for performing facsimile communication through a public line. In the image forming apparatus F, the ROM 12 and the RAM 13 store various programs necessary for the operation of the image forming apparatus F.

  As shown in FIG. 2, in the image forming apparatus F, the control module 1 includes a user interface unit I, an image reading unit 200, an image forming unit 40, an image processing unit 11, a ROM 12, a RAM 13, and a FAX communication unit 17. It is connected. Thus, in order to connect each component to the control module 1, the image forming apparatus F includes the interface apparatus A according to an embodiment of the present invention.

  FIG. 3 is a functional block diagram showing a schematic configuration of the interface apparatus A according to the embodiment of the present invention.

  The interface device A shown in FIG. 3 is configured by connecting a plurality of functional modules 2 and 3 in series to a control module 1 through a serial bus compliant with the PCI standard (hereinafter referred to as PCIE serial bus). Non-transparent bridge. As an example of the functional modules 2 and 3, any one of the user interface unit I, the image reading unit 200, the image forming unit 40, the image processing unit 11, the ROM 12, the RAM 13, and the FAX communication unit 17 can be cited.

  In FIG. 3, the control module 1 includes a CPU 10, a root complex (first request receiving unit) 11, a storage unit 12 such as a memory and a register, an IRQC 13, and a DMA controller (Direct Memory Access Controller), for example. A master 14 that accesses the IRQC 13 and requests an interrupt is provided.

  In the control module 1, the CPU 10, the route complex 11, the storage unit 12, the IRQC 13, and the master 14 are connected by a bus.

  When the CPU 10 of the control module 1 receives an interrupt request, the storage unit 12 includes a storage area 12A for storing information indicating which master requests and information indicating an interrupt factor.

  The IRQC 13 has priorities set in advance for interrupts through the route complex 11 and interrupts by the master 14, and outputs a signal for requesting interrupts to the CPU 10 in accordance with the preset priorities.

  The functional module (first functional module) 2 is connected to the control module 1 via the PCIE serial bus B1, and is an endpoint (first relay unit) 20 that forms an I / O device, and a route complex (second request reception unit). 21, IRQC 22, and master 23. In this functional module 2, the end point 20, the route complex 21, the IRQC 22, and the master 23 are connected by a bus.

  The IRQC 22 has priorities set in advance for an interrupt through the route complex 21 and an interrupt by the master 23, and outputs a signal requesting an interrupt to the endpoint 20 in accordance with the preset priorities.

  The functional module (second functional module) 3 is connected to the functional module 2 via the PCIE serial bus B2, and includes an endpoint (second relay unit) 30, a master (first request unit) 31, and an I / O device. A master (first request unit) 32 and an IRQC 33 are provided. In this functional module 3, the end point 30, the master 31, the master 32, and the IRQC 33 are connected by a bus.

  The master 31 accesses the IRQC 33 to function as a first request unit that requests an interrupt, and also accesses the storage unit 12 of the control module 1 to write information representing an interrupt factor together with master information representing the master 31. It functions as a first information writing unit.

  The master 32 also accesses the IRQC 33 to function as a first request unit that requests an interrupt, and also accesses the storage unit 12 of the control module 1 to obtain information indicating an interrupt factor as master information indicating the master 32. It functions as a first information writing unit for writing together.

  In the IRQC 33, priorities are set in advance for the interrupt by the master 31 and the interrupt by the master 32, and the interrupt request signal is output to the endpoint 30 according to the preset priority.

  The basic operation of the interface device A having such a configuration will be described below with reference to FIGS. FIG. 4 is a flowchart showing an example of the basic process of the functional module 3, and FIG. 5 is a flowchart showing an example of the basic process of the control module 1.

  As shown in FIG. 4, in the functional module 3, for example, when a predetermined interrupt factor occurs in a component managed by the master 31 (YES in step S <b> 1), the master 31 accesses the storage unit 12 of the control module 1. Then, the interrupt factor is written in the storage area 12A together with the master information (step S2).

  Here, the interrupt factor is information indicating that reading of the document image is started when the functional module 3 constitutes the image reading unit 200, for example. The master information is information indicating the request source of the interrupt, for example, information indicating the master 31.

  Thereby, the master information “master 31” is stored in the storage area 12A of the storage unit 12, for example, as shown in FIG. The storage area 12A stores information indicating that scanning of a document image has started as information indicating an interrupt factor by storing information “scan start”.

  Then, the master 31 outputs a signal requesting an interrupt to the IRQC 33 (step S3). Then, in the IRQC 33, if the interrupt by the master 31 is set to have a higher priority than the interrupt by the master 32, a signal from the master 31 is output to the endpoint 30. The signal output to the end point 30 is output to the PCIE serial bus B2 and accepted by the route complex 21.

  The signal received by the route complex 21 is once input to the IRQC 22. In the IRQC 22, if the interrupt through the route complex 21 is set to have a higher priority than the interrupt by the master 23, a signal from the master 31 is output to the end point 20. The signal output to the end point 20 is output to the PCIE serial bus B1 and accepted by the route complex 11.

  The signal received by the route complex 11 is once input to the IRQC 13. In the IRQC 13, if the interrupt through the root complex 11 is set to have a higher priority than the interrupt by the master 14, a signal from the master 31 is output to the CPU 10.

  On the other hand, as shown in FIG. 5, when the CPU 10 of the control module 1 receives an interrupt request from a certain master (YES in step S10), the CPU 10 accesses the storage unit 12 (step S11) and requests an interrupt. A master is specified and an interrupt factor is specified (steps S12 and S13).

  Then, the CPU 10 performs an interrupt process corresponding to the interrupt factor (step S14), and clears the interrupt factor written in the storage unit 12 together with the master information (step S15).

  As shown in steps S1 to S3 above, the master 31 of the functional module 3 accesses the storage unit 12 of the control module 1 and outputs the interrupt to the storage area 12A before outputting the interrupt request signal to the IRQC 33. Write the factor with the master information.

  Thus, when the CPU 10 of the control module 1 receives an interrupt request from the master 31 of the functional module 3, the interrupt factor and master information are written in the storage unit 12.

  Therefore, the CPU 10 of the control module 1 knows the interrupt factor and master information when receiving the interrupt request. Therefore, the latency from when the function module 3 requests the control module 1 to the interrupt until the interrupt processing is executed. Can be reduced.

(Second Embodiment)
Next, an interface device according to a second embodiment of the present invention will be described with reference to FIG. The interface device A1 according to the second embodiment is different from the interface device A according to the first embodiment in that a plurality of function modules 2 constituting the first function module are connected to each other through the PCIE serial bus B1. Different.

  In addition, the interface device A1 according to the second embodiment includes a master 24 instead of the master 23 in each of the functional modules 2 (# 1), 2 (# 2),..., 2 (#n). This is different from the interface device A according to the first embodiment.

  Since the other configuration is the same as that of the interface device A according to the first embodiment, the description and illustration thereof are omitted. Hereinafter, characteristic points of the present embodiment will be described.

  FIG. 6 is a functional block diagram showing an example of a schematic configuration of the interface apparatus A1 according to the second embodiment.

  In the configuration shown in FIG. 6, among the functional modules 2 (# 1), 2 (# 2),..., 2 (#n), the functional module 2 (# 1) is transferred to the control module 1 through the PCIE serial bus B1. It is connected. Functional modules 2 (# 2),..., 2 (#n) are sequentially connected in series to the functional module 2 (# 1) through the PCIE serial bus B1.

  According to this configuration, in the functional modules 2 (# 1) to 2 (#n), the master 24 functions as the second request unit that requests the interrupt by accessing the IRQC 22, and the control module 1 The second storage unit 12 functions as a second information writing unit that writes information representing an interrupt factor together with master information representing the master 24.

  The master 24 accesses the storage unit 12 of the control module 1 and writes the information indicating the interrupt factor together with the master information of the master 24 before outputting the interrupt request signal to the IRQC 22.

  As a result, in any of the function modules 2 (# 1) to 2 (#n), when an interrupt request is made to the control module 1 by the master 24, the CPU 10 of the control module 1 accepts the request. At this point, the interrupt factor and the master information of the master 24 are known.

  Therefore, in any of the functional modules 2 (# 1) to 2 (#n), it is possible to reduce the latency from when the interrupt request is made to the control module 1 until the interrupt processing is executed.

1 Control module 2, 3 Function module 10 CPU
11, 21 Root complex 12 Storage unit 20, 30 Endpoint 14, 23, 24, 31, 32 Master A, A1 Interface device F Image forming device B1, B2 PCIE serial bus

Claims (6)

A first request receiving unit that receives an interrupt processing request from a plurality of functional modules, and when the first request receiving unit receives the request, the interrupt processing is performed after recognizing the interrupt factor of the interrupt processing. A control module comprising: a control unit; and a storage unit for storing interrupt factor information representing the interrupt factor;
The second request receiving unit that receives the request from another functional module and the first request receiving unit through a predetermined high-speed serial bus are connected to the first request receiving unit, and the request received by the second request receiving unit is transferred to the first request receiving unit. A first functional module comprising: a first relay unit that relays to the request receiving unit;
A first request unit that makes the request, and is connected to the second request reception unit through the high-speed serial bus, and when the request is made by the first request unit, the request is sent to the second request reception unit A second functional module comprising: a second relay unit that relays to
With
The second functional module is:
A first information writing unit that accesses the storage unit of the control module and writes the interrupt factor information before the first request unit makes the request;
The control unit of the control module includes:
When the first request receiving unit receives the request, the storage unit is accessed, the interrupt factor information is read, and the interrupt factor represented by the interrupt factor information is recognized. Interface device. A plurality of the first functional modules are connected to each other through the high-speed serial bus;
Any one of the first functional modules is connected to the control module;
Each of the first functional modules is
A second request unit that makes the request; and a second information writing unit that accesses the storage unit of the control module and writes the interrupt factor information before the second request unit makes the request. The interface device according to claim 1, further comprising:   The interface device according to claim 1, wherein the first functional module and the second functional module are functional modules for forming an image on a recording sheet.   The interface device according to any one of claims 1 to 3, wherein the high-speed serial bus is a serial bus conforming to a PCIE (PCI Express) standard. An interface device according to any one of claims 1 to 4 is provided,
The first functional module includes an image reading unit that reads image data representing an image of the document from a document, and the second functional module includes an image forming unit that forms the image data on a recording sheet. An image forming apparatus. An interface device according to any one of claims 1 to 4 is provided,
The first functional module includes an image forming unit that forms image data representing an image of a document on a recording sheet, and the second functional module includes an image reading unit that reads the image data of the document from the document. An image forming apparatus.

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