JP2011170170A - Display device, method for driving display, and method for driving display element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for driving a display device capable of controlling luminance without changing the amplitude of a video signal. <P>SOLUTION: The method is for driving the display device that has a display element having a driving circuit and a current drive type light-emitting section, the driving circuit having at least a driving transistor with a gate electrode and a source/drain area and a capacitance section. The method includes a step in which a writing process is performed such that while a prescribed driving voltage is applied to one of the source or drain area of the driving transistor, a prescribed fixed voltage is applied to the gate electrode, then, a gate electrode is brought into a floating state, thereby a current corresponding to the value of a voltage held by the writing process in a capacitance section, which holds the voltage of the gate electrode for the source area of the driving transistor, flows into a light-emitting part via the driving transistor to make the light-emitting section emit light. The luminance of light emitted by the light-emitting section is controlled by adjusting the length of a period for which the fixed voltage is applied to the gate electrode of the driving transistor in the writing period. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a display device, a display device driving method, and a display element driving method. More specifically, the present invention relates to a display device including a display element having a driving circuit and a current-driven light emitting portion, a driving method thereof, and a driving method of a display element having a driving circuit and a current-driven light emitting portion.

  A display element including a current-driven light emitting unit and a display device including the display element are well known. For example, a display element provided with an organic electroluminescence light emitting unit using electroluminescence of an organic material has attracted attention as a display element capable of high luminance emission by low voltage direct current drive.

  Similar to the liquid crystal display device, a simple matrix method and an active matrix method are well known as a driving method in a display device including a display element having a current-driven light-emitting portion. The active matrix method has a disadvantage that the structure is complicated, but has an advantage that the luminance of the image can be increased. A display element that is driven by an active matrix system and has a current-driven light emitting unit includes a drive circuit for driving the light emitting unit in addition to the light emitting unit.

  3B of Japanese Patent Application Laid-Open No. 2007-310311 (Patent Document 1) includes a light emitting element (light emitting unit) 3D, a sampling transistor (writing transistor) 3A, a driving transistor (driving transistor) 3B, and a storage capacitor ( A pixel circuit (display element) 101 including a capacitor portion 3C is disclosed, and a display device including the pixel circuit 101 is disclosed in FIG. 3A. The display device includes a scanning line WSL arranged for each row of pixel circuits 101 and a signal line (data line) DTL arranged for each column of pixel circuits 101. A control signal (scanning signal) is supplied from the main scanner (scanning circuit) 104 to the scanning line WSL, and a video signal and various reference voltages are supplied from the signal selector (signal output circuit) 103 to the signal line DTL. .

JP 2007-310311 A

  In the conventional display device as shown in FIG. 3A of Patent Document 1, a video signal or the like for controlling the luminance gradation of the display element is supplied to the data line. The luminance of the display element is controlled by the amplitude of the video signal supplied to the data line. For this reason, the signal output circuit for supplying a signal to the data line needs to include a D / A converter, an amplifier, and the like, and the circuit scale is large and the cost is high.

  Accordingly, it is an object of the present invention to provide a display device, a display device driving method, and a display element driving method capable of controlling the luminance of light emitted from a light emitting unit without changing the amplitude of a video signal. is there.

In order to achieve the above object, a method for driving a display device of the present invention includes:
A display element arranged in a two-dimensional matrix in a first direction and a second direction, each having a drive circuit and a current-driven light emitting unit;
With
The driving circuit includes a driving transistor having a gate electrode and a source / drain region, and a capacitor portion. The driving circuit is a driving method for a display device in which a current flows to a light emitting portion through the source / drain region of the driving transistor. And
In a state where a predetermined drive voltage is applied to one source / drain region of the drive transistor, a writing process is performed in which a predetermined fixed voltage is applied to the gate electrode of the drive transistor, and then the gate electrode of the drive transistor is brought into a floating state As a result, a current corresponding to the value of the voltage held by the writing process in the capacitor portion for holding the voltage of the gate electrode with respect to the source region of the driving transistor flows to the light emitting portion through the driving transistor, and the light emitting portion emits light. To
It has a process,
By adjusting the length of the period during which the fixed voltage is applied to the gate electrode of the driving transistor in the writing process, the luminance of light emitted from the light emitting unit is controlled.

In order to achieve the above object, the display device of the present invention comprises:
A signal output circuit, a scanning circuit and a power supply unit, and
A display element arranged in a two-dimensional matrix in a first direction and a second direction, each having a drive circuit and a current-driven light emitting unit;
With
The drive circuit includes a drive transistor having a gate electrode and a source / drain region, and a capacitor portion, and a display device in which current flows to the light emitting portion through the source / drain region of the drive transistor,
A predetermined fixed voltage is applied to the gate electrode of the drive transistor based on the operation of the signal output circuit while a predetermined drive voltage is applied to one source / drain region of the drive transistor based on the operation of the power supply unit. A writing process is performed, and then the gate electrode of the driving transistor is brought into a floating state based on the operation of the scanning circuit, whereby the capacitor for holding the voltage of the gate electrode with respect to the source region of the driving transistor is subjected to the writing process. A current corresponding to the value of the held voltage flows to the light emitting part through the driving transistor, and the light emitting part emits light,
The luminance of light emitted from the light emitting unit is controlled by adjusting the length of the period during which the fixed voltage is applied to the gate electrode of the driving transistor in the writing process based on the operation of the signal output circuit.

In order to achieve the above object, a method for driving a display element of the present invention is as follows.
It has a drive circuit and a current-driven light emitting part,
The drive circuit includes a drive transistor having a gate electrode and a source / drain region, and a capacitor portion, and is a method for driving a display element in which a current flows to a light emitting portion through the source / drain region of the drive transistor. And
In a state where a predetermined drive voltage is applied to one source / drain region of the drive transistor, a writing process is performed in which a predetermined fixed voltage is applied to the gate electrode of the drive transistor, and then the gate electrode of the drive transistor is brought into a floating state As a result, a current corresponding to the value of the voltage held by the writing process in the capacitor portion for holding the voltage of the gate electrode with respect to the source region of the driving transistor flows to the light emitting portion through the driving transistor, and the light emitting portion emits light. To
It has a process,
By adjusting the length of the period during which the fixed voltage is applied to the gate electrode of the driving transistor in the writing process, the luminance of light emitted from the light emitting unit is controlled.

  In the display device driving method or the display element driving method of the present invention, the luminance of light emitted from the light emitting unit is adjusted by adjusting the length of the period during which the fixed voltage is applied to the gate electrode of the driving transistor in the writing process. Can be controlled. Therefore, it is not necessary to change the amplitude of the signal applied to the gate electrode of the drive transistor in order to control the luminance of the light emitting portion. In the display device of the present invention, it is sufficient to supply a predetermined fixed voltage to the data line regardless of the luminance of the image to be displayed, so that a D / A converter or the like of the signal output circuit becomes unnecessary, and the cost is reduced. be able to.

FIG. 1 is a conceptual diagram of the display device according to the first and second embodiments. FIG. 2 is an equivalent circuit diagram of a display element including a driving circuit. FIG. 3 is a schematic block diagram for one channel of the signal output circuit. FIG. 4 is a schematic partial cross-sectional view of a part of the display device. FIG. 5 is a schematic timing chart for explaining the operation of the (n, m) th display element in the method for driving the display device according to the first embodiment. FIG. 6 is a schematic diagram of a timing chart for explaining the operation when the supply start timing of the fixed voltage to the data line is changed. FIGS. 7A to 7F are diagrams schematically illustrating a conductive state / non-conductive state of each transistor included in the drive circuit of the display element. FIGS. 8A to 8F are diagrams schematically showing a conduction state / non-conduction state of each transistor included in the driver circuit of the display element, following FIG. 7F. FIGS. 9A and 9B are diagrams schematically illustrating the conductive state / non-conductive state of each transistor included in the display element driving circuit, following FIG. 8F. FIG. 10 shows potential changes of the first node and the second node when the length of the period during which the fixed voltage is applied to the gate electrode of the driving transistor is changed in [Period-TP (2) ₇ ] shown in FIG. 4 is a schematic graph for explaining a change in a gate-source voltage of a driving transistor. 11 shows the length of a period during which a fixed voltage is applied to the gate electrode of the driving transistor in [Period-TP (2) ₇ ] shown in FIG. 5 and light emission in [Period-TP (2) ₈ ] shown in FIG. 6 is a schematic graph for explaining the relationship with the value of the drain current flowing in the section. FIG. 12 is a schematic diagram of a timing chart showing the potential change of the data line of the display device when the gradation from white display to black display is, for example, 16 gradations. FIG. 13 is a schematic timing chart for explaining the operation of the (n, m) th display element in the method for driving the display device according to the second embodiment. FIG. 14 is a schematic diagram of a timing chart for explaining the operation when the stop period of the fixed voltage to the data line is changed. FIGS. 15A to 15F are diagrams schematically illustrating a conductive state / non-conductive state of each transistor included in the drive circuit of the display element. FIG. 16 is a schematic diagram of a timing chart for explaining the potential change of the data line from the white display state to the black display state when the gray level from white display to black display is, for example, 16 gradations. FIG. 17 is an equivalent circuit diagram of a display element including a driving circuit.

Hereinafter, the present invention will be described based on examples with reference to the drawings. However, the present invention is not limited to the examples, and various numerical values and materials in the examples are examples. The description will be given in the following order.
1. 1. General description of display device, display device driving method, and display element driving method of the present invention Example 1
3. Example 2

[Description of Display Device, Display Device Driving Method, Display Element Driving Method, and General of the Present Invention]
In the display device driving method or the display element driving method of the present invention,
One electrode and the other electrode constituting the capacitor portion are connected to the other source / drain region and the gate electrode of the driving transistor, respectively.
In the writing process, when a fixed voltage is applied to the gate electrode of the drive transistor, a current flows through the drive transistor, and the other of the drive transistors depends on the length of the period during which the fixed voltage is applied to the gate electrode of the drive transistor. By changing the potential of the source / drain region, the voltage held in the capacitor portion can be adjusted. The display device of the present invention can have the same configuration.

  In the display device of the present invention or the display device used in the method for driving the display device of the present invention including the preferred configuration described above, a plurality of scanning lines extending in the first direction, and a second A plurality of data lines extending in the direction, and the driving circuit is connected to the gate electrode connected to the scanning line, one source / drain region connected to the data line, and the gate electrode of the driving transistor A writing transistor having the other source / drain region can be further provided. In the driving method of the display device of the present invention, the writing transistor is turned on by the scanning signal from the scanning line, and after applying the fixed voltage from the data line to the gate electrode of the driving transistor, the scanning signal is finished. Thus, the gate electrode of the driving transistor can be set in a floating state when the writing transistor is turned off. Further, in the display device of the present invention, the writing transistor is turned on by the scanning signal from the scanning line, and after the fixed voltage is applied from the data line to the gate electrode of the driving transistor, the scanning signal ends. When the writing transistor is turned off, the gate electrode of the driving transistor can be in a floating state.

  In this case, in the driving method of the display device of the present invention, the supply of the fixed voltage to the data line is started while the writing transistor is turned on by the scanning signal from the scanning line. The length of the period during which the fixed voltage is applied to the gate electrode of the driving transistor can be adjusted by changing the start timing of the supply of the fixed voltage to the data line. Similarly, in the display device of the present invention, the length of the period during which the fixed voltage is applied to the gate electrode of the driving transistor in the writing process is adjusted by changing the start timing of the supply of the fixed voltage to the data line. It can be set as a structure. Alternatively, in the driving method of the display device of the present invention, before the writing transistor is turned on by the scanning signal from the scanning line, or the writing transistor is turned on by the scanning signal from the scanning line. During this period, the supply of the fixed voltage to the data line is started, and after the start of the supply of the fixed voltage to the data line, the supply of the fixed voltage to the data line is stopped until the scanning signal ends. The length of the period during which the fixed voltage is applied to the gate electrode of the driving transistor in the writing process can be adjusted by changing the length of the stop period. Similarly, in the display device of the present invention, the length of the period in which the fixed voltage is applied to the gate electrode of the driving transistor in the writing process may be adjusted by changing the length of the stop period. it can.

  The display device of the present invention including the various preferable configurations described above or the display device used in the driving method of the display device of the present invention further includes a plurality of power supply lines extending in the first direction. In addition, one source / drain region of the driving transistor can be connected to the power supply line. In the driving method of the display device of the present invention including the various preferable configurations described above, a driving voltage can be applied from the feeder line to one source / drain region of the driving transistor. Similarly, in the display device of the present invention including the above-described preferable configuration, a driving voltage can be applied from the power supply line to one source / drain region of the driving transistor.

In the driving method of the display device of the present invention including the various preferable configurations described above, or the driving method of the display element of the present invention, before the writing process,
An initializing voltage whose difference from the reference voltage exceeds the threshold voltage of the driving transistor is applied to one source / drain region of the driving transistor, and the reference voltage is applied to the gate electrode of the driving transistor, whereby the gate electrode of the driving transistor And the potential of the other source / drain region of the driving transistor,
In a state where the reference voltage is applied to the gate electrode of the driving transistor, the driving voltage is applied to one source / drain region of the driving transistor, so that the potential of the other source / drain region of the driving transistor is changed from the reference voltage to the driving transistor. The threshold voltage canceling process can be performed in which the threshold voltage is made closer to the reduced potential. Similarly, in the display device of the present invention including the various preferable configurations described above, a configuration in which initialization and threshold voltage cancellation processing are performed can be employed.

  In the driving method of the display device that performs the initialization and threshold voltage canceling processing described above, the display device includes the plurality of scanning lines and the plurality of data lines described above, and the driving circuit includes the writing transistor described above. In this case, the writing transistor can be turned on by a scanning signal from the scanning line, and a fixed voltage and a reference voltage can be applied from the data line to the gate electrode of the driving transistor. When the display device includes the above-described plurality of power supply lines and one source / drain region of the drive transistor is connected to the power supply line, the drive voltage and the initialization voltage are supplied from the power supply line to the drive transistor. It can be configured to be applied to one source / drain region. Even when initialization and threshold voltage cancellation processing are performed in the display device of the present invention including the various preferable configurations described above, a configuration in which a fixed voltage and a reference voltage are applied from the data line to the gate electrode of the driving transistor is used. In addition, the driving voltage and the initialization voltage can be applied from the power supply line to one source / drain region of the driving transistor.

  When the potential of the other source / drain region of the driving transistor reaches the potential obtained by subtracting the threshold voltage of the driving transistor from the reference voltage by the threshold voltage canceling process, the driving transistor is turned off. On the other hand, when the potential of the other source / drain region of the driving transistor does not reach the potential obtained by subtracting the threshold voltage of the driving transistor from the reference voltage, the driving transistor is not turned off. As a result of the threshold voltage canceling process, the driving transistor does not necessarily need to be in a non-conductive state.

  The display device of the present invention including the various preferred configurations described above or the display device used in the driving method of the display device of the present invention (hereinafter, these may be collectively referred to simply as the display device of the present invention). (A) may have a so-called monochrome display configuration or a color display configuration. For example, one pixel is composed of a plurality of subpixels. Specifically, one pixel is composed of three subpixels: a red light emitting subpixel, a green light emitting subpixel, and a blue light emitting subpixel. Further, a color display configuration can be adopted. Furthermore, a set of these three types of sub-pixels plus one or more types of sub-pixels (for example, a set of sub-pixels that emit white light to improve brightness, a color reproduction range) A set of sub-pixels that emit complementary colors for enlargement, a set of sub-pixels that emit yellow for expanding the color reproduction range, and yellow and cyan for expanding the color reproduction range It can also be composed of a set of subpixels).

  As values of pixels (pixels) of the display device, VGA (640, 480), S-VGA (800, 600), XGA (1024, 768), APRC (1152, 900), S-XGA (1280, 1024), U-XGA (1600, 1200), HD-TV (1920, 1080), Q-XGA (2048, 1536), (1920, 1035), (720, 480), (1280, 960), etc. Although some of the resolutions can be exemplified, the present invention is not limited to these values.

  The display element constituting the display device of the present invention or the display element used in the display element driving method of the present invention (hereinafter, these may be collectively referred to simply as the display element of the present invention). Examples of the current-driven light emitting unit include an organic electroluminescence light emitting unit, an LED light emitting unit, and a semiconductor laser light emitting unit. These light emitting portions can be configured using known materials and methods. From the viewpoint of configuring a flat display device for color display, among these, the configuration in which the light emitting section is composed of an organic electroluminescence light emitting section is preferable. The organic electroluminescence light emitting unit may be a so-called top emission type or a bottom emission type. The organic electroluminescence light emitting part can be composed of an anode electrode, a hole transport layer, a light emitting layer, an electron transport layer, a cathode electrode, and the like.

  In the display device, various wirings such as a scanning line, a data line, and a power supply line can have a known configuration and structure. Various circuits such as a power supply unit, a scanning circuit, and a signal output circuit can be configured using well-known circuit elements.

  As an example of a transistor included in the driver circuit, an n-channel thin film transistor (TFT) can be given. The transistor constituting the driver circuit may be an enhancement type or a depletion type. In an n-channel transistor, an LDD structure (Lightly Doped Drain structure) may be formed. In some cases, the LDD structure may be formed asymmetrically. For example, since a large current flows through the driving transistor when the display element emits light, an LDD structure may be formed only in one of the source / drain regions that become the drain region during light emission. For example, a p-channel thin film transistor may be used.

  The capacitor portion constituting the drive circuit can be composed of one electrode, the other electrode, and a dielectric layer sandwiched between these electrodes. The above-described transistors and capacitors that constitute the drive circuit are formed in a certain plane (for example, formed on a support), and the light-emitting portion is a transistor that constitutes the drive circuit via an interlayer insulating layer, for example. And formed above the capacitor portion. In addition, the other source / drain region of the driving transistor is connected to one end of the light emitting unit (an anode electrode provided in the light emitting unit) via a contact hole, for example. In addition, the structure which formed the transistor in the semiconductor substrate etc. may be sufficient.

As a constituent material of a support or a substrate described later, high strain point glass, soda glass (Na ₂ O · CaO · SiO ₂ ), borosilicate glass (Na ₂ O · B ₂ O ₃ · SiO ₂ ), forsterite (2MgO・ In addition to glass materials such as SiO ₂ ) and lead glass (Na ₂ O · PbO · SiO ₂ ), flexible polymer materials such as polyethersulfone (PES), polyimide, polycarbonate (PC), polyethylene A polymer material exemplified by terephthalate (PET) can be exemplified. Various coatings may be applied to the surface of the support or the substrate. The constituent materials of the support and the substrate may be the same or different. If a support body and a substrate made of a plastic material having flexibility are used, a flexible display device can be formed.

  In two source / drain regions of one transistor, the term “one source / drain region” may be used to mean a source / drain region connected to the power supply side. In addition, the transistor being in a conductive state means a state in which a channel is formed between the source / drain regions. It does not matter whether current flows from one source / drain region of the transistor to the other source / drain region. On the other hand, the transistor being in a non-conductive state means a state in which no channel is formed between the source / drain regions. In addition, the source / drain regions can be composed of conductive materials such as polysilicon or amorphous silicon containing impurities, as well as metals, alloys, conductive particles, their laminated structures, organic materials (conductivity high Molecule).

  The conditions shown in the various expressions in this specification are satisfied not only when the expression is strictly mathematically established but also when the expression is substantially satisfied. Regarding the establishment of the expression, the existence of various variations that occur in the design or manufacture of the display element or the display device is allowed.

  In the timing chart used in the following description, the length of the horizontal axis (time length) indicating each period is a schematic one and does not indicate the ratio of the time length of each period. The same applies to the vertical axis. The waveform shape in the timing chart is also schematic.

  Example 1 relates to a display device, a display device driving method, and a display element driving method of the present invention.

  A conceptual diagram of the display device of Example 1 is shown in FIG. 1, and an equivalent circuit diagram of the display element 10 including the drive circuit 11 is shown in FIG. As shown in FIGS. 1 and 2, the display device according to the first embodiment is arranged in a signal output circuit 102, a scanning circuit 101, a power supply unit 100, and a two-dimensional matrix, and each includes a drive circuit 11 and a current drive type. The display element 10 having the light emitting portion ELP is provided.

  There are N display elements 10 in the first direction (X direction in FIG. 1, hereinafter referred to as row direction), and the second direction (Y direction in FIG. 1, hereinafter referred to as column direction). ) In a two-dimensional matrix with a total of N × M. The number of rows of the display elements 10 is M, and the number of display elements 10 constituting each row is N. In FIG. 1, 3 × 3 display elements 10 are illustrated, but this is merely an example.

The display device is further connected to the scanning circuit 101 and connected to the plurality of (M) scanning lines SCL and the signal output circuit 102 extending in the first direction, and the plurality (N) of data extending in the second direction. A plurality of (M) power supply lines PS1 connected to the line DTL and the power supply unit 100 and extending in the first direction are provided. The display elements 10 in the m-th row (where m = 1, 2,..., M) are connected to the m-th scanning line SCL _m and the m-th feeding line PS1 _m. One display element row is formed. In addition, the display element 10 in the nth column (where n = 1, 2,..., N) is connected to the _nth data line DTLn.

As shown in FIG. 2, the drive circuit 11 includes at least a drive transistor TR _D having a gate electrode and a source / drain region, and a capacitor C ₁ , via the source / drain region of the drive transistor TR _D. Thus, a current flows through the light emitting unit ELP. As will be described in detail later with reference to FIG. 4, the display element 10 has a structure in which a drive circuit 11 and a light emitting unit ELP connected to the drive circuit 11 are stacked. The light emitting part ELP is composed of an organic electroluminescence light emitting part.

Drive circuit 11, in addition to the driving transistor TR _D, further includes a writing transistor TR _W. The drive transistor TR _D and the write transistor TR _W are composed of n-channel TFTs. For example, the write transistor TR _W may be configured by a p-channel TFT. Further, the drive circuit 11 may further include another transistor as shown in FIG.

The capacitor unit C ₁ is used to hold the voltage of the gate electrode with respect to the source region of the driving transistor TR _D (so-called gate-source voltage). The “source region” in this case means a source / drain region on the side that functions as a “source region” when the light emitting unit ELP emits light. In the light emitting state of the display element 10, one source / drain region (the side connected to the feed line PS1 in FIG. 2) of the drive transistor TR _D functions as a drain region, and the other source / drain region (light emitting portion ELP). One end of the electrode, specifically, the side connected to the anode electrode) serves as a source region. One electrode and the other electrode constituting the capacitive part C ₁ are connected to the other source / drain region and the gate electrode of the driving transistor TR _D , respectively.

The write transistor TR _W includes a gate electrode connected to the scanning line SCL, one source / drain region connected to the data line DTL, and the other source / drain region connected to the gate electrode of the drive transistor TR _D. Have

The gate electrode of the drive transistor TR _D forms a first node ND _{1 in} which the other source / drain region of the write transistor TR _{W and} the other electrode of the capacitor C ₁ are connected. The other source / drain region of the driving transistor TR _D forms a second node ND _{2 in} which one electrode of the capacitor C ₁ and the anode electrode of the light emitting unit ELP are connected.

  The other end of the light emitting unit ELP (specifically, the cathode electrode) is connected to the second power supply line PS2. As shown in FIG. 1, the second power supply line PS <b> 2 is common to all the display elements 10.

A predetermined voltage V _Cat described later is applied from the second feeder line PS2 to the cathode electrode of the light emitting unit ELP. The capacity of the light emitting part ELP is represented by the symbol C _EL . Further, the threshold voltage required for light emission of the light emitting unit ELP is set to V _th-EL . That is, when a voltage equal to or higher than V _th-EL is applied between the anode electrode and the cathode electrode of the light emitting unit ELP, the light emitting unit ELP emits light.

  The light emitting unit ELP has a known configuration and structure including, for example, an anode electrode, a hole transport layer, a light emitting layer, an electron transport layer, and a cathode electrode. The configurations and structures of the power supply unit 100 and the scanning circuit 101 can be well-known configurations and structures. The configuration of the signal output circuit 102 will be described later.

Here, in the light emitting state of the display element 10, the driving transistor TR _D is set to a voltage so as to operate in the saturation region, and is driven so that the drain current I _ds flows according to the following formula (1). As described above, in the light emitting state of the display device 10, one source / drain region of the driving transistor TR _D works as a drain region, the other source / drain region acts as a source region. For convenience of description, in the following description, one source / drain region of the drive transistor TR _D may be simply referred to as a drain region, and the other source / drain region may be simply referred to as a source region. still,
μ: Effective mobility L: Channel length W: Channel width V _gs : Voltage of gate electrode with respect to source region V _th : Threshold voltage C _ox : (Relative permittivity of gate insulating layer) × (dielectric constant of vacuum) / (Gate insulation layer thickness)
k≡ (1/2) ・ (W / L) ・ C _ox
And

I _ds = k · μ · (V _gs −V _th ) ² (1)

When the drain current I _ds flows through the light emitting unit ELP, the light emitting unit ELP of the display element 10 emits light. Furthermore, the light emission state (luminance) in the light emitting portion ELP of the display element 10 is controlled by the magnitude of the drain current I _ds .

Conductive state / nonconductive state of the writing transistor TR _W, the scanning signal from the scanning line connected SCL to a gate electrode of the writing transistor TR _W, specifically, are controlled by a scanning signal from the scanning circuit 101.

Various voltages are applied to one source / drain region of the write transistor TR _W from the data line DTL based on the operation of the signal output circuit 102. Specifically, a predetermined fixed voltage V _Fix described later and a predetermined reference voltage V _Ofs described later are applied from the signal output circuit 102. A configuration in which another voltage is applied in addition to the fixed voltage V _Fix and the reference voltage V _Ofs may be employed.

As shown in FIG. 1, the signal output circuit 102 includes a fixed voltage generation unit 102A that generates a fixed voltage V _Fix , a reference voltage generation unit 102B that generates a reference voltage V _Ofs , a fixed voltage generation unit 102A, and a reference voltage generation unit 102B. The signal switching unit 102C having the switches SW ₁ and SW ₂ for connecting to the data line DTL and the various pulses generated by the pulse generation circuit 102E are appropriately selected, and the signal switching unit 102C receives the switching signal. As a selector 102D. The configuration of the signal output circuit 102 is an example, and is not limited to this.

The display device is line-sequentially scanned in units of rows, and in each horizontal scanning period, the switch SW ₁ in the signal switching unit 102C shown in FIG. ₁ is first turned on (the switch SW ₂ is non-conductive). Thereafter, the switch SW ₁ is turned off, and the switch SW ₂ is switched from the non-conductive state to the conductive state. In the first embodiment, the timing at which the switch SW ₂ is switched from the non-conductive state to the conductive state is controlled according to the value of the input signal that is supplied from the outside and is discretized, whereby the luminance of the light emitting unit ELP emits light. Be controlled.

FIG. 3 is a schematic block diagram for one channel of the signal output circuit 102. The pulse generation circuit 102E is supplied with a horizontal synchronization signal H _Sync and a reference clock CLK as a reference for the start of the horizontal scanning period, for example, from a control unit (not shown). Based on the horizontal synchronization signal H _Sync and the reference clock CLK, the pulse generation circuit 102E generates various pulses having different rising timings, for example, from the start of the horizontal synchronization signal H _Sync . The selector 102D appropriately selects a pulse based on the value of an input signal input from the outside, and supplies the pulse to the signal switching unit 102C as a switching signal. In the horizontal scanning period, the reference voltage V _Ofs is first supplied to the data line DTL, and then the fixed voltage V _Fix is supplied _instead of the reference voltage V _Ofs in response to the rising _edge of the switching signal.

FIG. 4 is a schematic partial sectional view of a part of the display device. The transistors TR _D and TR _W and the capacitor part C ₁ constituting the drive circuit 11 are formed on the support 20, and the light emitting part ELP is, for example, the transistor TR _D constituting the drive circuit 11 via the interlayer insulating layer 40. , TR _W and the capacitor C ₁ . The other source / drain region of the driving transistor TR _D is connected to an anode electrode provided in the light emitting unit ELP through a contact hole. In FIG. 4, only the drive transistor TR _D is shown. Other transistors are hidden from view.

More specifically, the drive transistor TR _D includes a gate electrode 31, a gate insulating layer 32, source / drain regions 35 and 35 provided in the semiconductor layer 33, and a semiconductor layer between the source / drain regions 35 and 35. The portion 33 is constituted by the corresponding channel forming region 34. On the other hand, the capacitor portion C ₁ includes the other electrode 36, a dielectric layer composed of the extending portion of the gate insulating layer 32, and one electrode 37. The gate electrode 31, a part of the gate insulating layer 32, and the other electrode 36 constituting the capacitor portion C ₁ are formed on the support 20. One source / drain region 35 of the drive transistor TR _D is connected to a wiring 38 (corresponding to the power supply line PS 1), and the other source / drain region 35 is connected to one electrode 37. The drive transistor TR _{D, the} capacitor C _{1, and the} like are covered with an interlayer insulating layer 40, and an anode electrode 51, a hole transport layer, a light emitting layer, an electron transport layer, and a cathode electrode 53 are formed on the interlayer insulating layer 40. A light emitting unit ELP is provided. In the drawing, the hole transport layer, the light emitting layer, and the electron transport layer are represented by one layer 52. A second interlayer insulating layer 54 is provided on the portion of the interlayer insulating layer 40 where the light emitting part ELP is not provided, and the transparent substrate 21 is disposed on the second interlayer insulating layer 54 and the cathode electrode 53. The light emitted from the light emitting layer passes through the substrate 21 and is emitted to the outside. The one electrode 37 and the anode electrode 51 are connected by a contact hole provided in the interlayer insulating layer 40. In addition, the cathode electrode 53 is connected to the wiring 39 (second wiring) provided on the extended portion of the gate insulating layer 32 through the contact holes 56 and 55 provided in the second interlayer insulating layer 54 and the interlayer insulating layer 40. (Corresponding to the feeder line PS2).

A method for manufacturing the display device shown in FIG. First, on the support 20, various wirings such as scanning lines SCL, the electrodes constituting the capacitance section C _1, the transistor comprising a semiconductor layer, an interlayer insulating layer, a contact hole or the like, is suitably formed by a known method. Next, film formation and patterning are performed by a known method to form light emitting portions ELP arranged in a matrix. And after making the support body 20 and the board | substrate 21 which passed through the said process oppose and sealing a periphery, it connects with an external circuit, for example, and a display apparatus can be obtained.

  The display device according to the first embodiment is a color display device including a plurality of display elements 10 (for example, N × M = 1920 × 480). Each display element 10 constitutes a subpixel, and one pixel is constituted by a group of a plurality of subpixels, and the pixels are arranged in a two-dimensional matrix in the row direction and the column direction. One pixel is composed of three types of sub-pixels arranged in the extending direction of the scanning line SCL: a red light-emitting subpixel that emits red light, a green light-emitting subpixel that emits green light, and a blue light-emitting subpixel that emits blue light. Has been.

  Next, a method for driving the display device according to the first embodiment and a method for driving a display element using the display device according to the first embodiment (hereinafter simply referred to as a driving method according to the first embodiment. In the second embodiment described later). It is the same.) The display device includes (N / 3) × M pixels arranged in a two-dimensional matrix. The display frame rate is FR (times / second). The display elements 10 constituting each of (N / 3) pixels (N sub-pixels) arranged in the m-th row are driven simultaneously. In other words, in the N display elements 10 arranged along the first direction, the light emission / non-light emission timing is controlled in units of rows to which they belong. The scanning period per line when the display device is line-sequentially scanned in units of rows, more specifically, one horizontal scanning period (so-called 1H) is less than (1 / FR) × (1 / M) seconds. .

The display element 10 located in the m-th row and the n-th column is hereinafter referred to as the (n, m) -th display element 10 or the (n, m) -th sub-pixel. Various processes (threshold voltages to be described later) are performed until a horizontal scanning period corresponding to each display element 10 arranged in the m-th row (hereinafter may be referred to as an m-th horizontal scanning period H _m ) ends. Cancel processing, write processing). The writing process is performed within the m-th horizontal scanning period H _m .

  In the following description, the voltage or potential value is as follows. However, this is merely a value for explanation, and is not limited to these values.

V _Fix : Fixed voltage ... 9 volts V _Ofs : Reference voltage applied to the gate electrode (first node ND ₁ ) of the drive transistor TR _D ... 0 volts V _CC-H : In order to pass a current through the light emitting part ELP Drive voltage of 20 volt V _CC-L : initialization voltage for initializing the potential of the other source / drain region (second node ND ₂ ) of the drive transistor TR _D -10 volts V _th : Threshold voltage of the drive transistor TR _D ... 3 volts V _Cat : voltage applied to the cathode electrode of the light emitting part ELP ... 0 volts V _th-EL : threshold voltage of the light emitting part ELP ... 4 volts

FIG. 5 is a timing chart for explaining the operation of the (n, m) th display element 10 in the driving method of the first embodiment. FIG. 6 is a schematic timing chart for explaining the operation when the supply start time of the fixed voltage V _Fix to the data line DTL _n is changed. 7A to 7F, FIGS. 8A to 8F, and FIG. 8A to FIG. 8F, and the conductive state / non-conductive state of each of the transistors constituting the driving circuit 11 in the driving method of the first embodiment. These are shown in FIGS. 9A and 9B.

As shown in FIG. 5, in each horizontal scanning period, the reference voltage V _Ofs and the fixed voltage V _Fix are sequentially supplied from the signal output circuit 102 to the data line DTL _n . More specifically, the reference voltage V _Ofs is first applied to the data line DTL _n in correspondence with the m-th horizontal scanning period H _m in the current display frame, and then the reference voltage V _Ofs is changed to the second. A fixed voltage V _Fix corresponding to the (n, m) -th sub-pixel (represented as V _{Fix_m} for convenience. The same _applies to other fixed voltages) is applied. Similarly, the reference voltage V _Ofs is applied to the data line DTL _n corresponding to the (m + 1) th horizontal scanning period H _{m + 1} , and then the (n, m + 1) th is replaced with the reference voltage V _Ofs. The fixed voltage V _{Fix — m + 1} corresponding to the) th sub-pixel is applied.

In the first embodiment, the length of the period during which the reference voltage V _Ofs is supplied to the data line DTL _n in the first half of each horizontal scanning period varies depending on the luminance of the image to be displayed. It is never shorter than the length of a certain period (hereinafter sometimes referred to as a reference voltage period). The start and end of [Period-TP (2) ₁ ], [Period-TP (2) ₃ ] and [Period-TP (2) ₅ ] shown in FIG. 5 coincide with the start and end of the reference voltage period. It is set to be.

In the display device according to the first embodiment, the signal output circuit 102 in a state where a predetermined drive voltage V _CC-H is applied to one source / drain region of the drive transistor TR _D based on the operation of the power supply unit 100. Based on the above operation, a predetermined fixed voltage V _Fix is applied to the gate electrode of the drive transistor TR _D to perform the writing process. Then, the gate electrode of the driving transistor TR _D is in a floating state on the basis of the operation of the scanning circuit 101, the write processing to the capacitor C ₁ for holding the voltage of the gate electrode to the source region of the drive transistor TR _D A current corresponding to the value of the voltage held by the light flows through the driving transistor TR _D to the light emitting unit ELP, and the light emitting unit ELP emits light.

Specifically, in the driving method of the first embodiment, a predetermined driving voltage V _CC-H is applied to one source / drain of the driving transistor TR _D in [Period-TP (2) ₇ ] shown in FIG. While being applied to the region, a writing process is performed in which a predetermined fixed voltage V _Fix is applied to the gate electrode of the drive transistor TR _D. Then, in the period -TP (2) _8], by the gate electrode of the driving transistor TR _D in a floating state, the capacitor C ₁ for holding the voltage of the gate electrode to the source region of the drive transistor TR _D current corresponding to the value of the voltage held by the writing process, the light emitting section ELP emits light via the driving transistor TR _D flows to the light emitting section ELP.

For convenience of explanation, first, the operation of [Period-TP (2) ₅ ] to [Period-TP (2) ₇ ] included in the m-th horizontal scanning period H _m and [Period-TP (2)] The operation of [ ₈ ] will be described. For the details of the overall operation of [Period-TP (2) _-1 ] to [Period-TP (2) ₈ ] shown in FIG. 5, refer to (A) to (B) of FIG. 7 later. I will explain.

[Period -TP (2) ₅ ] (see FIGS. 5 and 8 (B) and (C))
As will be described in detail later, in this [period-TP (2) ₅ ], the reference voltage V _Ofs is supplied from the signal output circuit 102 to the data line DTL _n . The drive voltage V _CC-H is applied to the other source / drain region of the drive transistor TR _D from the feeder line PS1 based on the operation of the power supply unit 100. The potential of the second node ND ₂ becomes (V _Ofs −V _th ) by a threshold voltage cancellation process described later. The potential of the second node ND ₂ is determined depending only on the threshold voltage V _th of the driving transistor TR _D and the reference voltage V _Ofs . Then, at the end of [Period -TP (2) ₅ ], based on the operation of the scanning circuit 101, the scanning signal from the scanning line SCL ends, and the writing transistor TR _W is changed from the conductive state to the non-conductive state.

[Period-TP (2) ₆ ] (see FIGS. 5 and 8D)
The non-conducting state of the write transistor TR _W is maintained during this period. In the first embodiment, the reference voltage V _Ofs is continuously supplied to the data line DTL _n after the reference voltage period has elapsed. If the driving transistor TR _D has reached the non-conducting state in [Period -TP (2) ₅ ], the potentials of the first node ND ₁ and the second node ND ₂ do not change substantially.

[Period-TP (2) ₇ ] (see (E) and (F) of FIGS. 5, 6, and 8)
In [Period-TP (2) ₇ ], scanning is performed in a state where the drive voltage V _CC-H is applied from the power supply line PS1 to one source / drain region of the drive transistor TR _D based on the operation of the power supply unit 100. Based on the operation of the circuit 101, the writing transistor TR _W is made conductive by the scanning signal from the scanning line SCL, and the fixed voltage V _Fix is applied from the data line DTL _n to the gate electrode of the driving transistor TR _D based on the operation of the signal output circuit 102. The writing process applied to is performed.

In the driving method of the first embodiment, the supply of the fixed voltage V _{Fix to} the data line DTL _n is started while the write transistor TR _W is turned on by the scanning signal from the scanning line SCL. The length of the period during which the fixed voltage V _Fix is applied to the gate electrode of the driving transistor TR _D in the writing process is adjusted by changing the start timing of the supply of the fixed voltage V _{Fix to} the data line DTL _n .

At the beginning of [Period -TP (2) ₇ ], the writing transistor TR _W is changed from a non-conducting state to a conducting state based on the operation of the scanning circuit 101. In the front part of [Period -TP (2) ₇ ], the reference voltage V _Ofs is continuously supplied to the data line DTL _n . If the driving transistor TR _D has reached the non-conducting state in [Period -TP (2) ₅ ], the potentials of the first node ND ₁ and the second node ND ₂ do not substantially change ((( E)).

Thereafter, based on the operation of the signal output circuit 102, supply of the fixed voltage V _{Fix to} the data line DTL _n is started. While the state where the source / drain regions in the application of the drive voltage V _CC-H from the feed line PS1 of the driving transistor TR _D, applies a fixed voltage V _Fix the gate electrode of the driving transistor TR _D. The gate of the driving transistor TR _D - source voltage exceeds the threshold voltage V _th, the driving transistor TR _D becomes conductive.

Therefore, in the writing process, a current flows through the driving transistor TR _D when the application of the fixed voltage V _Fix the gate electrode of the driving transistor TR _D, the potential of the other of the source / drain regions of the driving transistor TR _D changes (Rise) ((F) of FIG. 8). The amount of increase in potential (potential correction value) at the second node ND ₂ is represented by ΔV (t ₀ ).

Here, as shown in FIG. 6, the potential correction value ΔV (t ₀ ) is obtained by advancing the start timing of the supply of the fixed voltage V _{Fix to} the data line DTL _n within [period-TP (2) ₇ ]. The longer the period during which the fixed voltage V _Fix is applied to the gate electrode of the drive transistor TR _D , the larger it becomes. As described above, the value of the potential correction value ΔV (t ₀ ) can be adjusted by changing the start timing of the supply of the fixed voltage V _{Fix to} the data line DTL _n within [period-TP (2) ₇ ]. it can.

In other words, the potential of the other source / drain region of the drive transistor TR _D changes (rises) as the value of the length “t ₀ ” of the period for performing the writing process shown in FIG. 5 or FIG. 6 increases. The potential of the second node ND ₂ after the writing process is (V _Ofs −V _th + ΔV (t ₀ )). Then, a voltage such as V _Fix — _m − (V _Ofs −V _th + ΔV (t ₀ )) is held in the capacitor C ₁ by the writing process.

[Period -TP (2) ₈ ] (see FIGS. 5 and 9 (A) and (B))
At the end of [Period -TP (2) ₇ ], the scanning signal from the scanning line SCL ends and the writing transistor TR _W is turned off. In [Period -TP (2) ₈ ], the gate electrode of the drive transistor TR _D and the data line DTL _n are electrically disconnected, so that the gate electrode of the drive transistor TR _D is in a floating state. Since the capacitor C ₁ exists, a phenomenon similar to that in the so-called bootstrap circuit occurs in the gate electrode of the drive transistor TR _D and the potential of the first node ND ₁ also rises ((A) in FIG. 9). Then, according to the value of the voltage held in the capacitor section C _1, the current through the driving transistor TR _D is the luminescence part ELP emits light flow to the light emitting section ELP (in FIG. 9 (B)).

As described above, in the display element 10, a voltage such as V _Fix — _m − (V _Ofs −V _th + ΔV (t ₀ )) is held in the capacitor C ₁ by the writing process. This voltage, it is equal to the voltage V _gs of the gate electrode to the source region of the drive transistor TR _D, the drain current I _ds given by Equation (5) described later via the driving transistor TR _D flows through the light emitting section ELP The light emitting unit ELP emits light.

I _ds = k · μ · (V _{Fix — m} −V _Ofs −ΔV (t ₀ )) ² (5)

As is clear from this equation (5), the value of the drain current I _ds has a relationship such that it decreases as the potential correction value ΔV (t ₀ ) increases. The luminance emitted from the light emitting unit ELP is qualitatively proportional to the value of the drain current I _ds . Since the value of ΔV (t ₀ ) is adjusted by changing the start timing of the supply of the fixed voltage V _{Fix to} the data line DTL _n within [Period -TP (2) ₇ ], the luminance of the light emitting unit ELP is controlled. can do.

The gradation control of the light emitting unit ELP will be described in detail with reference to FIGS. FIG. 10 shows the first node ND ₁ and the first node ND ₁ when the length of the period during which the fixed voltage V _Fix is applied to the gate electrode of the drive transistor TR _D is changed in [Period-TP (2) ₇ ] shown in FIG. 6 is a schematic graph for explaining a change in potential of a second node ND _{2 and} a change in gate-source voltage of a drive transistor TR _D. 11 shows the length of a period during which a predetermined fixed voltage V _Fix is applied to the gate electrode of the drive transistor TR _D in [Period-TP (2) ₇ ] shown in FIG. 5, and [Period-TP ( 2) is a schematic graph for explaining the relationship with the value of the drain current I _ds flowing through the light emitting unit ELP in ₈ ].

When the fixed voltage V _Fix is applied to the gate electrode of the driving transistor TR _D, the voltage of the first node ND ₁ is V _Fix (9 volts in the first embodiment) and is constant. On the other hand, the potential of the second node ND ₂ is initially V _Ofs −V _th (−3 volts in the first embodiment). Immediately after application of a fixed voltage V _Fix the gate electrode of the driving transistor TR _D, the voltage V _gs of the gate electrode to the source region of the drive transistor TR _D is 12 volts. Therefore, the value of the drain current I _ds flowing through the drive transistor TR _D immediately after application of a fixed voltage V _Fix the gate electrode of the driving transistor TR _D is a value obtained by the 12 volts V _gs in formula (1) described above .

Then, the electric charge due to the drain current I _ds described above flows into the second node ND ₂ , whereby the potential of the second node ND ₂ rises. On the other hand, the value of the gate electrode voltage V _gs with respect to the source region of the driving transistor TR _D decreases as the potential of the second node ND ₂ increases. Therefore, as the period for applying a fixed voltage V _Fix the gate electrode of the driving transistor TR _D becomes longer, the value of the drain current I _ds flowing to the driving transistor TR _D is reduced, increase in the second node potential ND ₂ also moderate Become. As a result, as shown in FIG. 10, the potential of the second node ND ₂ changes in a substantially hyperbolic shape that is convex upward. Further, the voltage V _gs of the gate electrode with respect to the source region changes in a substantially hyperbolic shape convex downward.

Then, the drain current I _ds flowing through the driving transistor TR _D in [Period -TP (2) ₈ ] is determined according to the value of the gate electrode voltage V _gs with respect to the source region held in the capacitor portion in the writing process. Accordingly, as shown in FIG. 11, the value of the current flowing through the driving transistor TR _D in the period -TP (2) _8], when set to "t ₀ = 0" in the period -TP (2) _7] ( In other words, the maximum voltage (when no fixed voltage V _Fix is applied) is maximized, and decreases as “t ₀ ” increases. In FIG. 11, the value of the drain current I _ds is normalized and displayed with “t ₀ = 0” as a reference. Since the values are normalized, the unit of current is not displayed.

Here, in the design of the display device, when the length of the period during which the fixed voltage V _Fix is applied to the gate electrode of the drive transistor TR _D is a certain value “t _W ” determined in the design, the light emitting unit ELP Is the state of maximum brightness (white display), and the light emitting unit ELP has the minimum brightness (black display) when it is a certain value “t _b ” determined by design.

As described above, in the first embodiment, by changing the start timing of the supply of the fixed voltage V _{Fix to} the data line DTL _n within [period-TP (2) ₇ ], the above “t ₀ ”. The value of can be adjusted. A halftone display is performed by appropriately adjusting the length “t ₀ ” of the period during which the fixed voltage V _Fix is applied to the gate electrode of the driving transistor TR _D between “t _W ” and “t _b ”. Can do.

In FIG. 11, the application time of the fixed voltage V _Fix to be selected is shown by a broken line when the gradation from white display to black display is, for example, 16 gradations. 12, when formed into a, for example, 16 gray scale to black display from a white display, which is a schematic diagram of a timing chart showing a potential change of the data line DTL _n of the display device. In this example, the pulse generation circuit 102E shown in FIG. 3 generates 16 types of pulses having different rising timings, for example, from the start of the horizontal synchronization signal H _Sync , and the selector 102D appropriately changes according to the value of the input signal. A configuration may be adopted in which a pulse is selected and supplied as a switching signal to the signal switching unit 102C. Here, the description has been given of 16 gradations from white display to black display, but this is merely an example. The number of gradations from white display to black display can be appropriately set according to the design of the display device.

  Next, details of the operation of the (n, m) th display element 10 in the driving method of the first embodiment are shown in FIGS. 5 and 7A to 8F and FIGS. 8A to 8F. A detailed description will be given with reference to FIGS. 9A and 9B.

[Period -TP (2) ₋₁ ] (see FIGS. 5 and 7A)
This [period-TP (2) ₋₁ ] is, for example, an operation in the previous display frame, and is a period in which the (n, m) th display element 10 is in a light emitting state after the completion of various previous processes. . That is, the drain current I _ds ′ based on the formula (5) described later flows through the light emitting unit ELP in the display element 10 constituting the (n, m) th sub-pixel, and the (n, m) th sub-pixel flows. The luminance of the display element 10 constituting the sub-pixel is a value corresponding to the drain current I _ds ′. Here, the write transistor TR _W is in a non-conductive state, and the drive transistor TR _D is in a conductive state. The light emission state of the (n, m) th display element 10 is continued until immediately before the start of the horizontal scanning period of the display elements 10 arranged in the (m + m ′) th row.

As described above, the reference voltage V _Ofs and the fixed voltage V _Fix are supplied to the data line DTL _n corresponding to each horizontal scanning period. However, since the write transistor TR _W is in a non-conductive state, even _if the potential (voltage) of the data line DTL _n changes in [period -TP (2) ₋₁ ], the first node ND ₁ and the second node ND The potential of ₂ does not change (actually, a potential change due to electrostatic coupling such as parasitic capacitance may occur, but these can usually be ignored). The same applies to [period-TP (2) ₀ ] described later.

In [Period-TP (2) ₀ ] to [Period-TP (2) ₆ ] shown in FIG. 5, the next writing process is performed after the light emission state after the completion of the previous various processes is completed. -TP (2) ₇ ] is an operation period immediately before. In [Period-TP (2) ₀ ] to [Period-TP (2) ₇ ], the (n, m) th display element 10 is in a non-light emitting state in principle. As shown in FIG. 5, [Period-TP (2) ₅ ], [Period-TP (2) ₆ ] and [Period-TP (2) ₇ ] are included in the _mth horizontal scanning period H _m. The

An outline of the operation will be described. In Example 1, the [period -TP (2) _1], one of the initialization voltage V _CC-L to the driving transistor TR _D difference between the reference voltage V _Ofs exceeds the threshold voltage V _th of the driving transistor TR _D of it is applied to the source / drain regions, by applying a reference voltage V _Ofs to the gate electrode of the driving transistor TR _D, than Te, the gate electrode of the driving transistor TR _D potential and the driving transistor TR _D of the other of the source / drain regions of the Initialize the potential.

In [Period-TP (2) ₃ ] and [Period-TP (2) ₅ ], the drive voltage V _CC is applied while the reference voltage V _Ofs is applied from the data line DTL _n to the gate electrode of the drive transistor TR _D. the _-H is applied to one source / drain region of the drive transistor TR _D, than Te, the threshold voltage V _th of the driving transistor TR _D to the potential of the other of the source / drain regions of the driving transistor TR _D from the reference voltage V _Ofs A threshold voltage canceling process for approaching the reduced potential is performed.

In the first embodiment, the threshold voltage canceling process is performed in a plurality of horizontal scanning periods, more specifically, in the (m−1) th horizontal scanning period H _m−1 and the mth horizontal scanning period H _m . However, the present invention is not limited to this. Depending on the specifications of the display device, the threshold voltage canceling process may be performed in one horizontal scanning period. Alternatively, the threshold voltage canceling process may be performed in three or more horizontal scanning periods.

In FIG. 5, [Period -TP (2) ₁ ] coincides with the reference voltage period in the (m-2) th horizontal scanning period H _m-2 , and [Period -TP (2) ₃ ] The (m−1) th horizontal scanning period H _m−1 coincides with the reference voltage period, and [Period−TP (2) ₅ ] coincides with the mth horizontal scanning period H _m .

Next, with reference to FIG. 5 and the like, details of operations in each period of [Period-TP (2) ₀ ] to [Period-TP (2) ₈ ] will be described.

[Period -TP (2) ₀ ] (see FIGS. 5 and 7B)
This [period-TP (2) ₀ ] is, for example, an operation from the previous display frame to the current display frame. That is, this [period-TP (2) ₀ ] is the (m−3) th in the current display frame from the beginning of the (m + m ′) th horizontal scanning period H _{m + m ′} in the previous display frame. This is the period until the end of the horizontal scanning period H _m-3 . In this [period-TP (2) ₀ ], the (n, m) -th display element 10 is in a non-light emitting state in principle. At the beginning of [Period -TP (2) ₀ ], the voltage supplied from the power supply unit 100 to the feed line PS1 _m is switched from the drive voltage V _CC-H to the initialization voltage V _CC-L . As a result, the potential of the second node ND ₂ drops to V _CC-L , a reverse voltage is applied between the anode electrode and the cathode electrode of the light emitting unit ELP, and the light emitting unit ELP enters a non-light emitting state. Further, the potential of the floating first node ND ₁ (the gate electrode of the drive transistor TR _D ) is also lowered so as to follow the potential drop of the second node ND ₂ .

[Period -TP (2) ₁ ] (see FIGS. 5 and 7C)
Then, the (m−2) th horizontal scanning period H _m−2 in the current display frame starts. In this [period-TP (2) ₁ ], the scanning line SCL _{m is set} to the high level, and the writing transistor TR _W of the display element 10 is turned on. The voltage supplied from the signal output circuit 102 to the data line DTL _n is the reference voltage V _Ofs . As a result, the potential of the first node ND ₁ becomes V _Ofs (0 volts). Since the initialization voltage V _CC-L is applied to the second node ND ₂ from the power supply line PS1 _m based on the operation of the power supply unit 100, the potential of the second node ND ₂ is V _CC-L (−10 volts). Hold.

The first node ND ₁ and the potential difference between the second node ND ₂ is 10 volts, the threshold voltage V _th of the driving transistor TR _D because it is 3 volts, the driving transistor TR _D is conductive. The potential difference between the second node ND ₂ and the cathode electrode provided in the light emitting unit ELP is −10 volts, and does not exceed the threshold voltage V _th−EL of the light emitting unit ELP. As a result, the potential of the first node ND _{1 and} the potential of the second node ND ₂ are initialized.

[Period -TP (2) ₂ ] (see FIGS. 5 and 7D)
In this [period-TP (2) ₂ ], the scanning line SCL _{m is set} to the low level. The write transistor TR _W of the display element 10 is turned off. The potentials of the first node ND ₁ and the second node ND ₂ basically maintain the previous state.

[Period -TP (2) ₃ ] (see FIGS. 5 and 7 (E) and (F))
In this [period-TP (2) ₃ ], the first threshold voltage canceling process is performed. The write transistor TR _W of the display element 10 and the scanning line SCL _m a high level to a conducting state. The voltage supplied from the signal output circuit 102 to the data line DTL _n is the reference voltage V _Ofs . The potential of the first node ND ₁ is V _Ofs (0 volts).

Next, the voltage supplied from the power supply unit 100 to the power supply line PS1 _m is switched from the initialization voltage V _CC-L to the drive voltage V _CC-H . As a result, the potential of the first node ND ₁ does not change (V _Ofs = 0 is maintained), but the second node ND moves toward the potential obtained by subtracting the threshold voltage V _th of the drive transistor TR _D from the reference voltage V _Ofs. The potential of ₂ changes. That is, the potential of the second node ND ₂ increases.

If this [period-TP (2) ₃ ] is sufficiently long, the potential difference between the gate electrode of the drive transistor TR _D and the other source / drain region reaches V _th , and the drive transistor TR _D becomes non-conductive. . That is, the potential of the second node ND ₂ approaches (V _Ofs -V _th), and finally becomes (V _Ofs -V _th). However, in the example shown in FIG. 5, the length of [Period -TP (2) ₃ ] is insufficient to change the potential of the second node ND ₂ sufficiently, and [Period -TP (2) ₃ ], the potential of the second node ND ₂ reaches a certain potential V ₁ that satisfies the relationship of V _CC-L <V ₁ <(V _Ofs −V _th ).

[Period -TP (2) ₄ ] (see FIGS. 5 and 8A)
In [Period -TP (2) ₄ ], the scanning line SCL _{m is set} to the low level, and the writing transistor TR _W of the display element 10 is turned off. As a result, the first node ND ₁ is in a floating state.

Since the drive voltage V _CC-H is applied from the power supply unit 100 to one source / drain region of the drive transistor TR _D , the potential of the second node ND ₂ rises from the potential V ₁ to a certain potential V ₂ . . On the other hand, since the gate electrode of the driving transistor TR _D is in a floating state and the capacitance portion C ₁ exists, a bootstrap operation occurs on the gate electrode of the driving transistor TR _D. Therefore, the potential of the first node ND ₁ rises following the potential change of the second node ND ₂ .

As a premise of the operation in the next [period-TP (2) ₅ ], the potential of the second node ND ₂ is lower than (V _Ofs −V _th ) at the beginning of [period-TP (2) ₅ ]. Necessary. The length of [Period -TP (2) ₄ ] is set in the design of the display device so as to satisfy the condition of V ₂ <(V _Ofs−L −V _th ).

[Period -TP (2) ₅ ] (see FIGS. 5 and 8 (B) and (C))
In this [period-TP (2) ₅ ], the second threshold voltage canceling process is performed. Based on the scanning signal from the scanning line SCL _m, the writing transistor TR _W of the display element 10 is turned on. The voltage supplied from the signal output circuit 102 to the data line DTL _n is the reference voltage V _Ofs . The potential of the first node ND ₁ becomes V _Ofs (0 volts) again from the potential increased by the bootstrap operation.

Here, the value of the capacitor C ₁ is set as a value c _1, and the value of the capacitor C _EL of the light emitting unit ELP is set as a value c _EL . The value of the parasitic capacitance between the gate electrode of the driving transistor TR _D and the other source / drain region is defined as c _gs . If the capacitance value between the first node ND ₁ and the second node ND ₂ is represented by the symbol c _A , c _A = c ₁ + c _gs . In addition, if a capacitance value between the second node ND ₂ and the second power supply line PS2 is represented by a symbol c _B , c _B = c _EL . Note that both ends of the light emitting section ELP, although additional capacity portion may have a configuration that is connected in parallel, in which case, further capacitance value of the additional capacitance portion to c _B is added.

When the potential of the first node ND ₁ changes, also changes the potential difference between the first node ND ₁ and the second node ND _2. That is, the charge based on the change in the potential of the first node ND ₁ is caused by the capacitance value between the first node ND ₁ and the second node ND _2, and the second node ND ₂ and the second feeder line PS 2. Sorted according to the capacity value between them. However, if the value c _B (= c _EL ) is sufficiently larger than the value c _A (= c ₁ + c _gs ), the change in the potential of the second node ND ₂ is small. In general, the value c _EL of the capacitance C _EL of the light emitting unit ELP is larger than the value c ₁ of the capacitance unit C ₁ and the parasitic capacitance value c _{gs of the} driving transistor TR _D. Hereinafter, the description will be made without considering the potential change of the second node ND ₂ caused by the potential change of the first node ND ₁ . In the drive timing chart shown in FIG. 5, the change in the potential of the second node ND ₂ caused by the change in the potential of the first node ND ₁ is shown without consideration. The same applies to FIG. 6 and FIGS. 13 and 14 referred to in Example 2 described later.

Since the power supply unit 100 driving transistor TR one of the source / drain regions to the drive voltage V _CC-H for _D is applied, towards the potential obtained by subtracting the threshold voltage V _th of the driving transistor TR _D from the reference voltage V _Ofs The potential of the second node ND ₂ changes. That is, the potential of the second node ND ₂ rises from the potential V ₂ and changes toward the potential obtained by subtracting the threshold voltage V _th of the driving transistor TR _D from the reference voltage V _Ofs . When the potential difference between the gate electrode of the drive transistor TR _D and the other source / drain region reaches V _th , the drive transistor TR _D becomes non-conductive. In this state, the potential of the second node ND ₂ is approximately (V _Ofs −V _th ). Here, if the following formula (2) is guaranteed, in other words, if the potential is selected and determined so as to satisfy the formula (2), the light emitting unit ELP does not emit light.

(V _Ofs −V _th ) <(V _th−EL + V _Cat ) (2)

In this [period-TP (2) ₅ ], the potential of the second node ND ₂ is finally (V _Ofs −V _th ). That is, the potential of the second node ND ₂ is determined depending only on the threshold voltage V _th of the driving transistor TR _D and the reference voltage V _Ofs . And it is unrelated to the threshold voltage V _{th-EL of} the light emitting unit ELP. At the end of [Period -TP (2) ₅ ], the writing transistor TR _W is changed from the conductive state to the non-conductive state based on the scanning signal from the scanning line SCL _m .

[Period-TP (2) ₆ ] (see FIGS. 5 and 8D)
The non-conducting state of the write transistor TR _W is maintained during this period. Although the reference voltage period has elapsed, in the first embodiment, the reference voltage V _Ofs is continuously supplied to the data line DTL _n . If the driving transistor TR _D has reached the non-conducting state in [Period -TP (2) ₅ ], the potentials of the first node ND ₁ and the second node ND ₂ do not change substantially. If the drive transistor TR _D does not reach the non-conducting state in the threshold voltage cancel process performed in [Period-TP (2) ₅ ], a bootstrap operation occurs in [Period-TP (2) ₆ ], The potentials of the first node ND ₁ and the second node ND ₂ slightly increase.

[Period -TP (2) ₇ ] (see FIGS. 5 and 8 (E) and (F))
In this [period-TP (2) ₇ ], the above-described writing process is performed. As shown in FIG. 5, the potential of the second node ND ₂ is changed in in the display device 10 [Period -TP (2) _7]. Since the amount of increase in potential (ΔV (t ₀ ) shown in FIG. 5) is as described above, description thereof is omitted.

When potential V _g of the gate electrode of the driving transistor TR _D (the first node ND _1), the potential of the other of the source / drain regions of the driving transistor TR _D (the second node ND ₂₎ was V _s, the above-described If the increase in the potential of the two-node ND ₂ is not taken into consideration, the values of V _g and V _s are as follows. The potential difference between the first node ND ₁ and the second node ND ₂ , that is, the potential difference V _gs between the gate electrode of the driving transistor TR _{D and} the other source / drain region serving as the source region is expressed by the following equation (3). Can be represented.

V _g = V _{Fix_m}
V _s ≈V _Ofs −V _th
V _gs ≒ V _{Fix_m-} (V _Ofs- V _th ) (3)

That is, if the above-described increase in the potential of the second node ND ₂ is not taken into consideration, V _gs obtained in the writing process for the driving transistor TR _D is the fixed voltage V _{Fix — m} , the threshold voltage V _th of the driving transistor TR _D , and It depends only on the reference voltage V _Ofs . And it is unrelated to the threshold voltage V _{th-EL of} the light emitting unit ELP.

In the driving method described above, the fixed voltage V is applied to the gate electrode of the driving transistor TR _D while the driving voltage V _CC-H is applied from the power supply unit 100 to one source / drain region of the driving transistor TR _{D. Fix} is applied. For this reason, as shown in FIG. 5, the potential of the second node ND ₂ rises in the writing process. When the value of the length “t ₀ ” of the period for performing the writing process is large, the amount of increase in the potential (that is, the potential of the second node ND ₂ ) in the other source / drain region of the driving transistor TR _D becomes large. Conversely, when the value of “t ₀ ” is small, the amount of increase in potential in the other source / drain region of the drive transistor TR _D is small. Here, the potential difference V _gs between the gate electrode of the driving transistor TR _{D and} the other source / drain region serving as the source region is transformed from the equation (3) into the following equation (4).

V _gs ≈ V _Fix — _m − (V _Ofs −V _th ) −ΔV (t ₀ ) (4)

Further, the length of the period during which the writing process is performed so that the potential (V _Ofs −V _th + ΔV (t ₀ )) in the other source / drain region of the driving transistor TR _D satisfies the following expression (2 ′): The upper limit of “t ₀ ” has been determined. In [Period -TP (2) ₇ ], the light emitting unit ELP does not emit light.

(V _Ofs −V _th + ΔV (t ₀ )) <(V _th−EL + V _Cat ) (2 ′)

[Period -TP (2) ₈ ] (see FIGS. 5 and 9 (A) and (B))
The state in which the drive voltage V _CC-H is applied from the power supply unit 100 to one source / drain region of the drive transistor TR _D is maintained. In the display element 10, a voltage based on the fixed voltage V _{Fix_m} , the reference voltage V _Ofs , the threshold voltage V _th , and the potential correction value ΔV (t ₀ ) is held in the capacitor C ₁ by the writing process. Yes. Since the scanning signal from the scanning line SCL is completed, the writing transistor TR _W is turned off. When the gate electrode of the driving transistor TR _D is in a floating state, a current corresponding to the value of the voltage held in the capacitor C ₁ by the writing process flows to the light emitting unit ELP through the driving transistor TR _D and the light emitting unit ELP. Emits light.

The operation of the display element 10 will be described more specifically. The drive voltage V _CC-H is applied to one source / drain region of the drive transistor TR _D from the power supply unit 100, and the first node ND ₁ is electrically disconnected from the data line DTL _n. ing. As a result, the potential of the second node ND ₂ rises ((A) in FIG. 9).

Here, as described above, the gate electrode of the drive transistor TR _D is in a floating state, and since the capacitor portion C ₁ exists, the same phenomenon as that in the so-called bootstrap circuit occurs in the gate electrode of the drive transistor TR _D. As a result, the potential of the first node ND ₁ also rises. As a result, the potential difference V _gs between the gate electrode of the driving transistor TR _{D and} the other source / drain region serving as the source region maintains the value of the equation (4).

Further, since the potential of the second node ND ₂ rises and exceeds (V _th−EL + V _Cat ), the light emitting unit ELP starts to emit light (see FIG. 9B). At this time, since the current flowing through the light emitting unit ELP is the drain current I _ds flowing from the drain region to the source region of the driving transistor TR _D , it can be expressed by Expression (1). Here, from the formulas (1) and (4), the formula (1) can be transformed into the following formula (5).

I _ds = k · μ · (V _{Fix — m} −V _Ofs −ΔV (t ₀ )) ² (5)

Accordingly, the drain current I _ds flowing through the light emitting unit ELP is a value obtained by subtracting the value of the potential correction value ΔV (t ₀ ) from the value of the fixed voltage V _{Fix_m} when the reference voltage V _Ofs is set to 0 volt. It is proportional to the square. Stated words, the drain current I _ds flowing through the light emitting section ELP, the threshold voltage V _th-EL of the luminescence part ELP, and does not depend on the threshold voltage V _th of the driving transistor TR _D. That is, the light emitting quantity of the light emitting portion ELP (luminance), the influence of the threshold voltage V _th-EL of the luminescence part ELP, and not affected by the threshold voltage V _th of the driving transistor TR _D. The luminance of the display element 10 constituting the (n, m) th is a value corresponding to the drain current _Ids .

Then, the light emitting state of the light emitting unit ELP is continued until the (m + m′−1) th horizontal scanning period. The end of the (m + m′−1) th horizontal scanning period corresponds to the end of [period-TP (2) ₋₁ ]. Here, “m ′” satisfies a relationship of 1 <m ′ <M and is a predetermined value in the display device. In other words, the light emitting unit ELP is driven from the start of [Period -TP (2) ₈ ] to immediately before the (m + m ′)-th horizontal scanning period H _{m + m ′} , and this period becomes the light emission period.

  The second embodiment also relates to a display device, a display device driving method, and a display element driving method of the present invention.

In the first embodiment, the supply of the fixed voltage V _{Fix to} the data line DTL is started while the write transistor TR _W is turned on by the scan signal from the scan line SCL, and the drive transistor TR in the write process is started. The length of the period during which the fixed voltage V _Fix is applied to the gate electrode of _D is adjusted by changing the start timing of the supply of the fixed voltage V _{Fix to} the data line DTL. In contrast, in Example 2, before the writing transistor TR _W is in a conductive state by a scanning signal from the scanning line SCL, or the writing transistor TR _W by the scanning signal from the scanning line SCL and a conductive state It starts the supply to the data line DTL fixed voltage V _Fix while being, fixed voltage V _Fix the data until after the start scan signal supplied to the data line DTL fixed voltage V _Fix ends The point of adjusting the length of the period in which the fixed voltage V _Fix is applied to the gate electrode of the drive transistor TR _D in the write process by changing the length of the stop period is provided by stopping the supply to the line DTL. Is different.

  The structure and configuration of the display device are the same as those described in the first embodiment except that the pulses generated by the pulse generation circuit 102E that constitutes the signal output circuit 102 are different, and thus the description thereof is omitted.

FIG. 13 is a schematic timing chart for explaining the operation of the (n, m) th display element 10 in the method for driving the display device according to the second embodiment. FIG. 14 is a schematic timing chart for explaining the operation when the stop period of the fixed voltage V _Fix to the data line DTL _n is changed. FIGS. 15A to 15F are diagrams schematically showing the conductive state / non-conductive state of each transistor constituting the drive circuit 11 of the display element 10.

In the second embodiment, the fixed voltage V _Fix is supplied to the data line DTL _n instead of the reference voltage V _Ofs immediately after the end of the reference voltage period described in the first embodiment. Then, a stop period for stopping the supply of the fixed voltage V _{Fix to} the data line DTL _n is provided between the start of the supply of the fixed voltage V _{Fix to} the data line DTL _n and the end of the scanning signal. The length of the period during which the fixed voltage V _Fix is applied to the gate electrode of the transistor TR _D is adjusted by changing the length of the stop period.

Hereinafter, a driving method according to the second embodiment will be described. Although the timing at which the fixed voltage V _Fix is applied to the data line DTL _n is different from that in the first embodiment, the second embodiment has [period-TP (2) ₋₁ ] to [period-TP (2) shown in FIG. Since the operation in ₅ ] is basically the same as that in the first embodiment, the description thereof is omitted.

[Period -TP (2) ₆ ] (see FIGS. 13 and 15A)
At the beginning of [Period-TP (2) ₆ ], the supply of the fixed voltage V _{Fix to} the data line DTL _n is started based on the operation of the signal output circuit 102. If the driving transistor TR _D has reached the non-conducting state in [Period -TP (2) ₅ ], the potentials of the first node ND ₁ and the second node ND ₂ do not change substantially.

[Period -TP (2) ₇ ] (see FIGS. 13 and 15 (B) to (D))
In [Period-TP (2) ₇ ], scanning is performed in a state where the drive voltage V _CC-H is applied from the power supply line PS1 to one source / drain region of the drive transistor TR _D based on the operation of the power supply unit 100. Based on the operation of the circuit 101, the writing transistor TR _W is made conductive by the scanning signal from the scanning line SCL, and the fixed voltage V _Fix is applied from the data line DTL _n to the gate electrode of the driving transistor TR _D based on the operation of the signal output circuit 102. The writing process applied to is performed.

At the beginning of [Period-TP (2) ₇ ], based on the operation of the scanning circuit 101, the writing transistor TR _W is changed from a non-conductive state to a conductive state. While the state where the source / drain regions in the application of the drive voltage V _CC-H from the feed line PS1 of the driving transistor TR _D, applies a fixed voltage V _Fix the gate electrode of the driving transistor TR _D (1-time writing process) . Therefore, a current flows through the driving transistor TR _D, the potential of the other of the source / drain regions of the driving transistor TR _D changes (increases) (Fig. 15 (B)). The amount of increase in potential (potential correction value) at the second node ND _{2 at} this time is expressed as ΔV ₁ .

After a predetermined period has elapsed from the start of [Period -TP (2) ₇ ], the supply of the fixed voltage V _{Fix to} the data line DTL _n is stopped based on the operation of the signal output circuit 102 (in the stop period). start). Specifically, based on the operation of the signal switching unit 102C of the signal output circuit 102, the reference voltage V _Ofs is supplied to the data line DTL _n instead of the fixed voltage V _Fix .

As a result, the reference voltage V _Ofs is applied to the gate electrode of the drive transistor TR _D. The gate of the driving transistor TR _D - source voltage becomes smaller than the threshold voltage V _th of the driving transistor TR _D, the driving transistor TR _D becomes non-conductive. The potential of the second node ND ₂ maintains the previous value ((C) in FIG. 15).

Thereafter, based on the operation of the signal output circuit 102, the supply of the fixed voltage V _{Fix to} the data line DTL _n is resumed (end of the stop period). Until the end of [Period -TP (2) ₇ ], the drive voltage V _CC-H is applied to one source / drain region of the drive transistor TR _D from the feed line PS 1 and fixed to the gate electrode of the drive transistor TR _D. The voltage V _Fix is applied (second writing process). Therefore, a current flows through the driving transistor TR _D, the potential of the other of the source / drain regions of the driving transistor TR _D changes (increase) (in FIG. 15 (D)). The amount of increase in potential (potential correction value) at the second node ND _{2 at} this time is expressed as ΔV ₂ . By the first and second writing processes, a voltage such as V _Fix — _m − (V _Ofs −V _th + ΔV ₁ + ΔV ₂ ) is held in the capacitor C ₁ .

[Period -TP (2) ₈ ] (see FIGS. 13 and 15 (E) to (F))
At the beginning of [Period -TP (2) ₈ ], the scanning signal from the scanning line SCL ends and the writing transistor TR _W is turned off. Since the gate electrode of the drive transistor TR _D and the data line DTL _n are electrically disconnected, the gate electrode of the drive transistor TR _D is in a floating state. Since the capacitor C ₁ exists, the same phenomenon as in the so-called bootstrap circuit occurs in the gate electrode of the drive transistor TR _D and the potential of the first node ND ₁ also rises ((E) in FIG. 15). Then, according to the value of the voltage held in the capacitor section C _1, the current through the driving transistor TR _D is the luminescence part ELP flows to the light emitting section ELP emits light ((F) in FIG. 15).

As described above, in the display element 10, a voltage such as V _Fix — _m − (V _Ofs −V _th + ΔV ₁ + ΔV ₂ ) is held in the capacitor C ₁ by the writing process. This voltage corresponds to the voltage V _gs of the gate electrode to the source region of the drive transistor TR _D, the drain current I _ds given by equation (5) ', which will be described later, via the drive transistor TR _D flows through the light emitting section ELP The light emitting part ELP emits light.

I _ds = k · μ · (V _{Fix — m} −V _Ofs −ΔV ₁ −ΔV ₂ ) ² (5) ′

In Example 2, the length of the period excluding the stop period from the period from the start to the end of [Period -TP (2) ₇ ] is a fixed voltage applied to the gate electrode of the drive transistor TR _D in the writing process. This is the length of the period during which V _Fix is applied. Therefore, the potential correction value ΔV (t ₀ ) with respect to the length “t ₀ ” obtained by removing the stop period from the period from the start to the end of [Period−TP (2) ₇ ] is the sum of ΔV ₁ and ΔV ₂ . It becomes.

As shown in FIG. 14, the potential correction value ΔV (t ₀ ) is applied to the gate electrode of the drive transistor TR _{D at} a fixed voltage VV by accelerating the end of the stop period within [period-TP (2) ₇ ]. _The longer the time for applying the _Fix , the larger it becomes. In this manner, the value of the potential correction value ΔV (t ₀ ) can be adjusted by changing the length of the stop period within [period-TP (2) ₇ ].

FIG. 16 is a schematic diagram of a timing chart for explaining a potential change of the data line DTL _n of the display device when the gray level from white display to black display is, for example, 16 gradations. Also in this example, the pulse generation circuit 102E shown in FIG. 3 generates 16 types of pulses having different timings, and the selector 102D selects an appropriate pulse according to the value of the input signal, and sends a switching signal to the signal switching unit 102C. It may be configured to supply as. Here, the description has been made with 16 gradations from white display to black display, but this is merely an example. The number of gradations from white display to black display can be appropriately set according to the design of the display device.

In the description of the second embodiment, it has been described that the fixed voltage V _Fix is supplied to the data line DTL _n from the beginning of [Period-TP (2) ₆ ], but the beginning of [Period-TP (2) ₇ ]. Elapses and the write transistor TR _W becomes conductive, the fixed voltage V _Fix is supplied to the data line DTL _n , and a stop period is provided until the end of [period-TP (2) ₇ ]. It is also possible to adopt a configuration such as Further, the end of the stop period is constant, and the length of the stop period can be changed by changing the start period of the stop period. Further, the length of the stop period can be changed by changing both the start and end of the stop period.

  As mentioned above, although this invention was demonstrated based on the preferable Example, this invention is not limited to this Example. The configuration and structure of the display device described in the embodiments, the process of the display device manufacturing method, and the process of the display device and display element driving method are examples, and can be changed as appropriate.

In the embodiment, the drive transistor TR _D has been described as an n-channel type. In the case where the driving transistor TR _D is a p-channel transistor, the connection may be made by replacing the anode electrode and the cathode electrode of the light emitting unit ELP. In this configuration, since the direction in which the drain current I _ds flows changes, the value of the voltage supplied to the feeder line PS1 and the like may be changed as appropriate.

Further, the drive circuit 11 constituting the display element 10 may further include another transistor. FIG. 17 shows a configuration including a transistor (first transistor TR ₁ ), a second transistor TR ₂ , and a third transistor TR ₃ connected to the first node ND ₁ . In addition, the structure provided with one or two transistors among these three transistors may be sufficient.

In the first transistor TR ₁ , the reference voltage V _Ofs is applied to one source / drain region, and the other source / drain region is connected to the first node ND ₁ . A control signal from the first transistor control circuit 103 is applied to the gate electrode of the first transistor TR ₂ via the first transistor control line AZ1 to control the conduction state / non-conduction state of the first transistor TR ₁ . Thereby, the potential of the first node ND ₁ can be set.

In the second transistor TR ₂ , the initialization voltage V _CC-L is applied to one source / drain region, and the other source / drain region is connected to the second node ND ₂ . Control signal from the second transistor control circuit 104 via the second transistor control line AZ2 is applied to the gate electrode of the second transistor TR _2, and controls the conduction state / non-conductive state of the second transistor TR _1. Thereby, the potential of the second node ND ₂ can be initialized.

The third transistor TR ₃ is connected between one source / drain region of the driving transistor TR _D and the power supply line PS1, and receives a control signal from the third transistor control circuit 105 via the third transistor control line CL. Is applied to the gate electrode of the third transistor TR ₃ .

TR _W: Write transistor, TR _D: Drive transistor, TR _1: First transistor, TR _2: Second transistor, TR _3: Third transistor, C _1: Capacitor , ELP: organic electroluminescence light emitting unit, C _EL : capacitance of light emitting unit ELP, ND _1: first node, ND _2: second node, SCL: scanning line, DTL,. Data line, PS1 ... feed line, PS2 ... second feed line, AZ1 ... first transistor control line, AZ2 ... second transistor control line, CL ... third transistor control line DL ... display element row, 10 ... display element, 11 ... drive circuit, 20 ... support, 21 ... substrate, 31 ... gate electrode, 32 ... gate insulating layer 33 semiconductor layer 34 channel type 35, 35 ... source / drain region, 36 ... other electrode, 37 ... one electrode, 38 ... wiring, 39 ... wiring, 40 ... interlayer insulation layer, DESCRIPTION OF SYMBOLS 51 ... Anode electrode, 52 ... Hole transport layer, light emitting layer, and electron transport layer, 53 ... Cathode electrode, 54 ... 2nd interlayer insulation layer, 55, 56 ... Contact hole, 100 ... Power supply unit, 101 ... Scanning circuit, 102 ... Signal output circuit, 102A ... Fixed voltage generation unit, 102B ... Reference voltage generation unit, 102C ... Signal switching unit, 102D ... Selector, 102E ... pulse generation circuit, 103 ... first transistor control circuit, 104 ... second transistor control circuit, 105 ... third transistor control circuit

Claims (11)

A display element arranged in a two-dimensional matrix in a first direction and a second direction, each having a drive circuit and a current-driven light emitting unit;
With
The driving circuit includes a driving transistor having a gate electrode and a source / drain region, and a capacitor portion. The driving circuit is a driving method for a display device in which a current flows to a light emitting portion through the source / drain region of the driving transistor. And
In a state where a predetermined drive voltage is applied to one source / drain region of the drive transistor, a writing process is performed in which a predetermined fixed voltage is applied to the gate electrode of the drive transistor, and then the gate electrode of the drive transistor is brought into a floating state As a result, a current corresponding to the value of the voltage held by the writing process in the capacitor portion for holding the voltage of the gate electrode with respect to the source region of the driving transistor flows to the light emitting portion through the driving transistor, and the light emitting portion emits light. To
It has a process,
A method for driving a display device, wherein the luminance of light emitted from a light emitting unit is controlled by adjusting a length of a period during which a fixed voltage is applied to a gate electrode of a driving transistor in a writing process. One electrode and the other electrode constituting the capacitor portion are connected to the other source / drain region and the gate electrode of the driving transistor, respectively.
In the writing process, when a fixed voltage is applied to the gate electrode of the drive transistor, a current flows through the drive transistor, and the other of the drive transistors depends on the length of the period during which the fixed voltage is applied to the gate electrode of the drive transistor. The method for driving a display device according to claim 1, wherein the value of the voltage held in the capacitor portion is adjusted by changing the potential of the source / drain region. The display device further includes a plurality of scanning lines extending in the first direction and a plurality of data lines extending in the second direction.
The drive circuit further includes a write transistor having a gate electrode connected to the scan line, one source / drain region connected to the data line, and the other source / drain region connected to the gate electrode of the drive transistor. With
The writing transistor is turned on by the scanning signal from the scanning line, and after applying the fixed voltage from the data line to the gate electrode of the driving transistor, the scanning signal ends and the writing transistor becomes non-conductive. The method for driving a display device according to claim 1, wherein the electrode is in a floating state. The supply of the fixed voltage to the data line is started while the writing transistor is turned on by the scanning signal from the scanning line,
4. The method for driving a display device according to claim 3, wherein the length of the period during which the fixed voltage is applied to the gate electrode of the driving transistor in the writing process is adjusted by changing the start timing of the supply of the fixed voltage to the data line. Before the writing transistor is turned on by the scanning signal from the scanning line, or while the writing transistor is turned on by the scanning signal from the scanning line, supply of the fixed voltage to the data line is started. A stop period for stopping the supply of the fixed voltage to the data line is provided between the start of the supply of the fixed voltage to the data line and the end of the scanning signal.
4. The method for driving a display device according to claim 3, wherein the length of the period during which the fixed voltage is applied to the gate electrode of the driving transistor in the writing process is adjusted by changing the length of the stop period. The display device further includes a plurality of power supply lines extending in the first direction,
The display device driving method according to claim 1, wherein one source / drain region of the driving transistor is connected to a power supply line, and a driving voltage is applied from the power supply line to one source / drain region of the driving transistor. Before the write process
An initializing voltage whose difference from the reference voltage exceeds the threshold voltage of the driving transistor is applied to one source / drain region of the driving transistor, and the reference voltage is applied to the gate electrode of the driving transistor, whereby the gate electrode of the driving transistor And the potential of the other source / drain region of the driving transistor,
In a state where the reference voltage is applied to the gate electrode of the driving transistor, the driving voltage is applied to one source / drain region of the driving transistor, so that the potential of the other source / drain region of the driving transistor is changed from the reference voltage to the driving transistor. The display device driving method according to claim 1, wherein a threshold voltage canceling process is performed to bring the threshold voltage closer to a potential obtained by reducing the threshold voltage. The display device further includes a plurality of scanning lines extending in the first direction and a plurality of data lines extending in the second direction.
The drive circuit further includes a write transistor having a gate electrode connected to the scan line, one source / drain region connected to the data line, and the other source / drain region connected to the gate electrode of the drive transistor. Has
8. The method for driving a display device according to claim 7, wherein the writing transistor is turned on by a scanning signal from the scanning line, and a fixed voltage and a reference voltage are applied to the gate electrode of the driving transistor from the data line. The display device further includes a plurality of power supply lines extending in the first direction,
The one source / drain region of the drive transistor is connected to a power supply line, and a drive voltage and an initialization voltage are applied from the power supply line to one source / drain region of the drive transistor. A driving method of a display device. A signal output circuit, a scanning circuit and a power supply unit, and
A display element arranged in a two-dimensional matrix in a first direction and a second direction, each having a drive circuit and a current-driven light emitting unit;
With
The drive circuit includes a drive transistor having a gate electrode and a source / drain region, and a capacitor portion, and a display device in which current flows to the light emitting portion through the source / drain region of the drive transistor,
A predetermined fixed voltage is applied to the gate electrode of the drive transistor based on the operation of the signal output circuit while a predetermined drive voltage is applied to one source / drain region of the drive transistor based on the operation of the power supply unit. A writing process is performed, and then the gate electrode of the driving transistor is brought into a floating state based on the operation of the scanning circuit, whereby the capacitor for holding the voltage of the gate electrode with respect to the source region of the driving transistor is subjected to the writing process. A current corresponding to the value of the held voltage flows to the light emitting part through the driving transistor, and the light emitting part emits light,
A display device in which the luminance of light emitted from a light emitting unit is controlled by adjusting the length of a period during which a fixed voltage is applied to a gate electrode of a driving transistor in a writing process based on an operation of a signal output circuit. It has a drive circuit and a current-driven light emitting part,
The drive circuit includes a drive transistor having a gate electrode and a source / drain region, and a capacitor portion, and is a method for driving a display element in which a current flows to a light emitting portion through the source / drain region of the drive transistor. And
In a state where a predetermined drive voltage is applied to one source / drain region of the drive transistor, a writing process is performed in which a predetermined fixed voltage is applied to the gate electrode of the drive transistor, and then the gate electrode of the drive transistor is brought into a floating state As a result, a current corresponding to the value of the voltage held by the writing process in the capacitor portion for holding the voltage of the gate electrode with respect to the source region of the driving transistor flows to the light emitting portion through the driving transistor, and the light emitting portion emits light. To
It has a process,
A display element driving method for controlling luminance of light emitted from a light emitting unit by adjusting a length of a period during which a fixed voltage is applied to a gate electrode of a driving transistor in a writing process.

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