JP2011141467A - Method of manufacturing electrooptical device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To clean a substrate without peeling a relatively narrow resist pattern in a manufacturing process of an electrooptical device. <P>SOLUTION: This method of manufacturing the electrooptical device includes a resist coating process of applying resist (202) onto the substrate (10), a patterning process of patterning the applied resist into a predetermined shape, and a cleaning process of cleaning the substrate having the patterned resist (202a) using cleaning liquid. In the cleaning process, the cleaning liquid is supplied at 0.5 L/min or less while the substrate is rotated at 20-30 rpm. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a method for manufacturing an electro-optical device such as a liquid crystal display device, and more particularly to a technical field of a method for cleaning a substrate constituting the electro-optical device.

  As a method of this kind, the surface of the substrate to be treated is formed prior to the step of forming a sulfuric acid liquid film by supplying sulfuric acid to the surface of the substrate to be treated and piling up the sulfuric acid on the surface of the substrate. A method has been proposed in which sulfuric acid is supplied to the substrate and the surface of the substrate is wetted with the sulfuric acid (see Patent Document 1).

  Alternatively, a method has been proposed in which hot water is supplied to the surface of the substrate after the treatment with the resist stripping solution, and the resist stripping solution adhering to the surface of the substrate is washed away with warm water (see Patent Document 2). In particular, it is disclosed that the rotation speed of the substrate is 300 to 1500 rpm.

  Alternatively, the surface on which the aluminum wiring pattern is formed is cleaned by discharging from the nozzle two fluids mixed with ultrapure water, inert gas and ultrapure water, or a liquid containing at least ultrapure water. Has been proposed (see Patent Document 3).

  Alternatively, in order to remove SOG from the end surface of the outermost peripheral portion of the wafer after SOG application, a method has been proposed in which cleaning of the back surface of the wafer and subsequent shake-off drying are repeated a plurality of times (see Patent Document 4). Here, in particular, it is disclosed that the backside cleaning of the wafer supplies the cleaning liquid at 40 cc / min while rotating the wafer at 1200 rpm for 10 seconds. In addition, it is disclosed that the swing-off drying rotates the wafer at 3000 rpm.

JP 2005-26489 A JP 2005-32819 A JP 2006-411147 A JP 11-162964 A

  However, in the above-described background art, when the resist pattern formed on the substrate is relatively thin, there is a technical problem that the resist pattern may be peeled off due to cleaning of the substrate.

  SUMMARY An advantage of some aspects of the invention is that it proposes a method of manufacturing an electro-optical device capable of cleaning a substrate without peeling off a relatively thin resist pattern.

  In order to solve the above problems, a method of manufacturing an electro-optical device according to the present invention includes a resist coating process for coating a resist on a substrate, a patterning process for patterning the coated resist into a predetermined shape, and the patterning process. A cleaning step of cleaning the substrate having a resist with a cleaning liquid. In the cleaning step, the cleaning liquid is supplied at 0.5 L (liter) / min or less while the substrate is rotated at 20 to 30 rpm. The

  According to the method for manufacturing an electro-optical device of the present invention, first, a resist is applied on a substrate in a resist application process. Note that one or a plurality of conductive layers, insulating layers, and the like may be formed on the substrate before the resist is applied.

  Next, in the patterning step, the applied resist is patterned into a predetermined shape. Next, in the cleaning step, the substrate having the patterned resist is cleaned using a cleaning liquid such as pure water.

  In the present invention, in particular, in the cleaning step, the cleaning liquid is supplied at 0.5 L / min or less while the substrate is rotated at 20 to 30 rpm (rotation per minute).

  According to the inventor's research, the following matters have been found. That is, when the resist film is patterned by photoetching, water-soluble foreign matters often adhere to the substrate (ie, wafer) surface. For this reason, when etching is performed using the patterned resist, etching defects often occur. In order to avoid etching defects, it has been proposed to spin-clean the substrate surface after patterning the resist film. However, if the patterned resist is relatively thin, cleaning the substrate (for example, rotating the substrate at 150 rpm). However, the patterned resist may be peeled off due to the supply of the cleaning liquid at 2 L / min.

  However, in the present invention, as described above, the substrate is cleaned while the substrate is rotated at a relatively low rotational speed and the cleaning liquid is supplied at a relatively small flow rate. For this reason, it is possible to prevent the patterned resist from being peeled off or broken by the momentum of the cleaning liquid due to centrifugal force. In addition, since the substrate surface is cleaned, water-soluble foreign matters on the substrate surface can be removed.

  The effect | action and other gain of this invention are clarified from the form for implementing demonstrated below.

It is a top view which shows the whole structure of the liquid crystal device which concerns on embodiment of this invention. It is the HH 'sectional view taken on the line of FIG. FIG. 4 is an equivalent circuit diagram of a plurality of pixel units of the liquid crystal device according to the embodiment of the present invention. It is a top view of a plurality of pixel parts which adjoin mutually. It is AA 'sectional drawing of FIG. It is process sectional drawing which shows 1 process of the manufacturing method of the liquid crystal device which concerns on embodiment of this invention. FIG. 7 is a process cross-sectional view illustrating a process that follows the process in FIG. 6. FIG. 8 is a process cross-sectional view illustrating a process that follows the process in FIG. 7. It is an example of the evaluation result of a cleaning liquid discharge flow rate and a rotation speed. It is a conceptual diagram which shows the concept of a resist pattern cleaning.

  Hereinafter, an embodiment of a method for manufacturing an electro-optical device according to the invention will be described with reference to the drawings. In the following drawings, the scales are different for each layer and each member so that each layer and each member can be recognized on the drawing.

<Electro-optical device>
An embodiment of an electro-optical device according to the invention will be described with reference to FIGS. 1 to 5. In the present embodiment, as an example of the electro-optical device, an active matrix driving type liquid crystal device with a built-in driving circuit is cited.

  First, the overall configuration of the liquid crystal device according to the present embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 is a plan view of a liquid crystal device according to an embodiment of the present invention as viewed from the side of a counter substrate together with each component formed on a TFT (Thin Film Transistor) array substrate. It is a HH 'sectional view taken on the line.

  1 and 2, the liquid crystal device is composed of a TFT array substrate 10 and a counter substrate 20 which are arranged to face each other. A liquid crystal layer 50 is sealed between the TFT array substrate 10 and the counter substrate 20, and the TFT array substrate 10 and the counter substrate 20 are provided in a seal material provided in a seal region around the image display region 10a. 52 are bonded to each other.

  The sealing material 52 is made of, for example, an ultraviolet curable resin, a thermosetting resin, or the like for bonding the two substrates, and is applied on the TFT array substrate 10 in the manufacturing process and then cured by ultraviolet irradiation, heating, or the like. It is. Further, for example, in the sealing material 52, a gap material such as a glass fiber or a glass bead for dispersing the distance (that is, the gap) between the TFT array substrate 10 and the counter substrate 20 to a predetermined value is scattered.

  A light-shielding frame light-shielding film 53 that defines the frame area of the image display area 10a is provided on the counter substrate 20 side in parallel with the inside of the seal area where the sealing material 52 is disposed. However, part or all of the frame light shielding film 53 may be provided as a built-in light shielding film on the TFT array substrate 10 side.

  On the TFT array substrate 10, a data line driving circuit 101, a sampling circuit 7, a scanning line driving circuit 104, and an external circuit connection terminal 102 are formed in the peripheral area located around the image display area 10 a.

  In the peripheral region on the TFT array substrate 10, the data line driving circuit 101 and the external circuit connection terminal 102 are provided along one side of the TFT array substrate 10 on the outer peripheral side from the seal region. Further, a region located on the inner side of the seal region in the peripheral region on the TFT array substrate 10 is covered with the frame light shielding film 53 along one side of the image display region 10 a along one side of the TFT array substrate 10. Thus, the sampling circuit 7 is arranged.

  The scanning line driving circuit 104 is provided along two sides adjacent to one side of the TFT array substrate 10 so as to be covered with the frame light shielding film 53. Further, in order to electrically connect the two scanning line driving circuits 104 provided on both sides of the image display region 10a in this way, the TFT array substrate 10 is covered with the frame light shielding film 53 along the remaining side. A plurality of wirings 105 are provided.

  In the peripheral region on the TFT array substrate 10, vertical conduction terminals 106 are disposed in regions facing the four corners of the counter substrate 20, and vertical conduction is provided between the TFT array substrate 10 and the counter substrate 20. A material is provided corresponding to the vertical conduction terminal 106 and electrically connected to the terminal 106.

  In FIG. 2, in the image display region 10a on the TFT array substrate 10, a pixel electrode 9a is formed on a wiring such as a TFT as a pixel switching element, a scanning line, a data line, and an alignment film 16 is formed thereon. ing.

  On the other hand, a lattice-shaped or stripe-shaped light shielding film 23 is formed in the image display region 10a on the counter substrate 20, and a liquid crystal layer 50 is interposed on the light shielding film 23 (below the light shielding film 23 in FIG. 2). Thus, a counter electrode 21 facing the plurality of pixel electrodes 9a is formed, and an alignment film 22 is further formed.

  The liquid crystal layer 50 is made of, for example, a liquid crystal in which one or several types of nematic liquid crystals are mixed, and takes a predetermined alignment state between the pair of alignment films. A liquid crystal storage capacitor is formed between the pixel electrode 9 a and the counter electrode 21 by applying a voltage to each of the liquid crystal devices during driving.

  Although not shown here, in addition to the data line driving circuit 101 and the scanning line driving circuit 104, the TFT array substrate 10 is used for inspecting the quality, defects, and the like of the liquid crystal device during manufacturing or at the time of shipment. An inspection circuit or the like may be formed.

  Next, the fundamental configuration of the pixel portion of the liquid crystal device according to the present embodiment will be described with reference to FIG. FIG. 3 is an equivalent circuit diagram of various elements, wirings, and the like in a plurality of pixels formed in a matrix that constitutes a pixel region of the liquid crystal device.

  In FIG. 3, each of a plurality of pixels formed in a matrix that forms the image display region 10 a of the liquid crystal device according to the present embodiment includes a pixel electrode 9 a and a TFT 30 for controlling the switching of the pixel electrode 9 a. The data line 6 a formed and supplied with an image signal is electrically connected to the source of the TFT 30. The image signals S1, S2,..., Sn written to the data lines 6a may be supplied line-sequentially in this order, or may be supplied for each group to a plurality of adjacent data lines 6a. Good.

  Further, the scanning line 11a is electrically connected to the gate of the TFT 30, and the scanning signals G1, G2,..., Gm are applied to the scanning line 11a in a pulse-sequential manner in this order at a predetermined timing. It is configured. The pixel electrode 9a is electrically connected to the drain of the TFT 30, and the image signal S1, S2,..., Sn supplied from the data line 6a is obtained by closing the switch of the TFT 30 as a switching element for a certain period. Write at a predetermined timing.

  Image signals S1, S2,..., Sn written in a liquid crystal as an example of an electro-optical material via the pixel electrode 9a are held for a certain period with the counter electrode 21 formed on the counter substrate 20. The The liquid crystal modulates light and enables gradation display by changing the orientation and order of the molecular assembly depending on the applied voltage level. In the normally white mode, the transmittance for incident light is reduced according to the voltage applied in units of each pixel, and in the normally black mode, the light is incident according to the voltage applied in units of each pixel. The light transmittance is increased, and light having a contrast corresponding to an image signal is emitted from the liquid crystal device as a whole.

  In order to prevent the image signal held here from leaking, a storage capacitor 70 is added electrically in parallel with the liquid crystal capacitor formed between the pixel electrode 9 a and the counter electrode 21. One electrode of the storage capacitor 70 is electrically connected in parallel with the pixel electrode 9a and connected to the drain of the TFT 30, and the other electrode is connected to a fixed potential capacitor line 300 so as to have a constant potential.

  Next, a specific configuration of the pixel portion of the liquid crystal device according to the present embodiment will be described with reference to FIGS. 4 is a plan view of a plurality of adjacent pixel portions, and FIG. 5 is a cross-sectional view taken along the line AA ′ of FIG. In FIGS. 4 and 5, for convenience of explanation, illustration of a portion located above the pixel electrode 9a is omitted.

  In FIG. 4, a plurality of pixel electrodes 9 a are provided in a matrix on the TFT array substrate 10. Data lines 6a and scanning lines 11 (that is, scanning lines 11a and 11b) are provided along the vertical and horizontal boundaries of the pixel electrode 9a. In FIG. 4, the scanning lines 11a and 11b extend along the X direction, and the data line 6a extends along the Y direction so as to intersect each of the scanning lines 11a and 11b. A pixel switching TFT 30 is provided at each of the locations where the scanning line 11a and the data line 6a intersect each other.

  4 and 5, the TFT 30 includes the semiconductor layer 1a and the gate electrode 3a.

  The semiconductor layer 1a is made of, for example, polysilicon, and includes a channel region 1a ′, a low concentration source region 1b and a low concentration drain region 1c, and a high concentration source region 1d and a high concentration drain region 1e. That is, the TFT 30 has an LDD structure.

  The low-concentration source region 1b, the low-concentration drain region 1c, the high-concentration source region 1d, and the high-concentration drain region 1e are impurity regions formed by implanting impurities into the semiconductor layer 1a by impurity implantation such as ion implantation. According to such an impurity region, when the TFT 30 is not operating, it is possible to reduce the off current flowing in the source region and the drain region, and to suppress the decrease in the on current flowing when the TFT 30 is operating.

  The TFT 30 preferably has an LDD structure. However, the TFT 30 may have an offset structure in which no impurity is implanted into the low concentration source region 1b and the low concentration drain region 1c. It may be a self-aligned type in which a high concentration source region and a high concentration drain region are formed by implanting the film.

  As shown in FIGS. 4 and 5, the gate electrode 3a is formed as a part of the scanning line 11a, and is made of, for example, conductive polysilicon. The scanning line 11a includes a main line portion extending along the X direction in FIG. 4 and a portion extending from the main line portion along the Y direction so as to overlap with a region of the channel region 1a ′ of the TFT 30 where the main line portion does not overlap. Have. A portion of the scanning line 11a that overlaps the channel region 1a ′ functions as the gate electrode 3a. As shown in FIG. 5, the gate electrode 3a and the semiconductor layer 1a are insulated by the gate insulating film 2 in a direction perpendicular to the substrate surface of the TFT array substrate 10.

  4 and 5, the gate electrode 3b disposed on the lower layer side of the semiconductor layer 1a in FIG. 5 is formed as a part of the scanning line 11b. That is, in the present embodiment, for example, two types of scanning lines 11a and 11b are provided on the upper layer side and the lower layer side of the semiconductor layer 1a. The scanning line 11b on the lower layer side of the semiconductor layer 1a has a main line portion patterned along the X direction in FIG. 4 and a portion extending from the main line portion along the Y direction in plan view. ing. The portion of the scanning line 11b that overlaps the channel region 1a ′ functions as the gate electrode 3b on the lower layer side than the semiconductor layer 1a. Thus, in this embodiment, for example, the TFT 30 has a double gate structure. According to such a configuration, it is possible to increase the on-current of the TFT 30 as compared with the case where the gate electrode is formed only on one of the upper layer side and the lower layer side of the semiconductor layer 1a.

  The scanning line 11b is formed on the lower layer side than the semiconductor layer 1a by a light-shielding conductive material such as a refractory metal material such as tungsten (W), titanium (Ti), or titanium nitride (TiN). Of the return light to the TFT array substrate 10, light incident on the channel region 1a 'of the TFT 30 can be reduced.

  As shown in FIG. 5, the scanning line 11b on the lower layer side of the semiconductor layer 1a and the semiconductor layer 1a are insulated by a base insulating film 12. In addition to the function of insulating the TFT 30 from the scanning line 11b, the base insulating layer 12 is formed on the entire surface of the TFT array substrate 10 so that the surface of the TFT array substrate 10 is roughened when it is polished, or remains after cleaning. It has a function of preventing deterioration of the characteristics of the pixel switching TFT 30.

  In FIG. 5, the storage capacitor 70 and the relay electrode 200 are provided on the upper layer side of the TFT 30 on the TFT array substrate 10 via the interlayer insulating film 41. The relay electrode 200 is formed to include, for example, polysilicon having the same conductivity type as that of the semiconductor layer 1a.

  The storage capacitor 70 is formed by disposing the lower electrode 71 and the upper electrode 300 to face each other with the dielectric film 75 interposed therebetween.

  4 and 5, the detailed structure of the upper electrode 300 is not shown in the drawings. However, the upper electrode 300 extends, for example, from the image display region 10a where the pixel electrode 9a is disposed to the periphery of the image display region 10a. By being connected to each other, it is configured to function as a fixed potential side capacitor electrode while being maintained at a fixed potential. The upper electrode 300 is formed of a non-transparent metal film containing a metal or alloy such as Al (aluminum) or Ag (silver), for example, and is an upper light-shielding film (built-in light-shielding film) capable of shielding light incident on the TFT 30. ). The upper electrode 300 includes at least one of refractory metals such as Ti (titanium), Cr (chromium), W (tungsten), Ta (tantalum), Mo (molybdenum), and Pd (palladium). You may be comprised from the metal single-piece | unit, an alloy, metal silicide, polysilicide, what laminated | stacked these, etc.

  The lower electrode 71 is electrically connected to the high concentration drain region 1e of the TFT 30 and the pixel electrode 9a, and is configured to function as a pixel potential side capacitor electrode. More specifically, the lower electrode 71 is electrically connected to the high-concentration drain region 1 e through the contact hole 83 and electrically connected to the relay layer 93 through the contact hole 84. Further, the relay layer 93 is electrically connected to the pixel electrode 9 a through the contact hole 85. That is, the lower electrode 71 relays the electrical connection between the high concentration drain region 1e and the pixel electrode 9a together with the relay layer 93. The lower electrode 71 is made of, for example, conductive polysilicon. The lower electrode 71 can function as a light absorbing layer or a light shielding film disposed between the upper electrode 300 as the upper light shielding film and the TFT 30 in addition to the function as the pixel potential side capacitance electrode.

  The dielectric film 75 has a single-layer structure or a multilayer structure composed of a silicon oxide film such as an HTO (High Temperature Oxide) film, an LTO (Low Temperature Oxide) film, a silicon nitride film, or the like.

  The relay electrode 200 is electrically connected to the high concentration source region 1 d through the contact hole 81 and is connected to the data line 6 a through the contact hole 82. That is, the relay electrode 200 relays the electrical connection between the data line 6a and the high concentration source region 1d.

  In FIG. 5, a data line 6 a and a relay layer 93 are provided on the upper layer side of the storage capacitor 70 on the TFT array substrate 10 via the interlayer insulating film 42.

  The data line 6a is electrically connected to the high concentration source region 1d of the semiconductor layer 1a through a contact hole 81 formed through the interlayer insulating film 41 and the interlayer insulating film. The data line 6a can also function as a light shielding film that shields the TFT 30 from light.

  The relay layer 93 is formed on the interlayer insulating film 42 in the same layer as the data line 6a, for example, by the same film. Accordingly, when manufacturing the liquid crystal device, the data line 6a and the relay layer 93 can be formed in the same process, so that the device manufacturing process can be simplified.

  In FIG. 5, the pixel electrode 9a is formed on the upper layer side of the data line 6a via the interlayer insulating film 43. The pixel electrode 9a is electrically connected to the high-concentration drain region 1e of the semiconductor layer 1a via the lower electrode 71, contact holes 83, 84 and 85, and the relay layer 93. The contact hole 85 is formed by depositing a conductive material constituting the pixel electrode 9a such as ITO (Indium Tin Oxide) on the inner wall of the hole formed so as to penetrate the interlayer insulating layer 43. An alignment film 16 subjected to a predetermined alignment process such as a rubbing process is provided on the upper surface of the pixel electrode 9a.

  The configuration of the pixel portion described above is common to each pixel portion as shown in FIG. Such pixel portions are periodically formed in the image display area 10a (see FIG. 1). On the other hand, in such a liquid crystal device, as described with reference to FIGS. 1 and 2, the scanning line driving circuit 104, the data line driving circuit 101, and the like are driven in the peripheral area located around the image display area 10a. A circuit is formed.

<Method of manufacturing electro-optical device>
Next, an embodiment of a method for manufacturing an electro-optical device according to the present invention will be described with reference to FIGS. In the present embodiment, a manufacturing method for forming a semiconductor layer on the TFT array substrate 10 is taken as an example.

  FIG. 6 is a process cross-sectional view showing one process of the manufacturing method of the liquid crystal device according to the present embodiment, FIG. 7 is a process cross-sectional view showing a process following the process of FIG. 6, and FIG. FIG. 9 is a process cross-sectional view illustrating a process that follows the process of 7.

  As shown in FIG. 6, in the resist coating process, a resist is coated on the semiconductor film 201 formed on the base insulating film 12 on the TFT array substrate 10 to form a resist film 202.

  Next, as shown in FIG. 7, in the patterning step, the formed resist film 202 is patterned into a predetermined shape by, for example, photoetching to form a resist pattern 202a. At this time, water-soluble foreign matter R often adheres to the surface.

  Next, as shown in FIG. 8, in order to remove the water-soluble foreign matter R, the TFT array substrate 10 (that is, the wafer) having the resist pattern 202 a is set in the spin cleaning machine 300.

  In the cleaning process, first, the TFT array substrate 10 is rotated at 50 rpm by the spin base 301 of the spin cleaner 300, and a cleaning liquid such as pure water is supplied from the rinse nozzle 302 of the spin cleaner 300 at a rate of 0.5 L / min or less. Supplied. As a result, the cleaning liquid can be spread over the entire surface of the TFT array substrate 10.

  The cleaning liquid is not limited to pure water as long as it is a liquid that does not etch the resist pattern 202a and the semiconductor film 201.

  Subsequently, for example, the cleaning liquid is supplied from the rinse nozzle 302 at 0.5 L / min or less while the TFT array substrate 10 is rotated at 20 to 30 rpm by the spin base 301 for 5 to 6 seconds. Thereby, a liquid film of the cleaning liquid can be formed on the surface of the TFT array substrate 10 (so-called liquid accumulation).

  Subsequently, the cleaning liquid is supplied from the rinse nozzle 302 at 0.5 L / min while the TFT array substrate 10 is rotated at 50 rpm by the spin base 301. Thereby, the water-soluble foreign matter R is removed.

  After the cleaning process, the TFT array substrate 10 is dried by rotating the TFT array substrate 10 at a high speed by the spin base 301 in the drying process.

  Next, the discharge (supply) flow rate and the rotation speed of the cleaning liquid in the cleaning process will be described with reference to FIGS. FIG. 9 is an example of an evaluation result of the cleaning liquid discharge flow rate and the number of rotations, and FIG. 10 is a conceptual diagram showing the concept of resist pattern cleaning.

  As can be seen from FIG. 9, if the discharge flow rate of the cleaning liquid is 0.5 L / min or less and the rotational speed is 20 to 30 rpm, the TFT array substrate 10 is cleaned without peeling off the fine resist pattern (that is, It can be seen that the water-soluble foreign matter R can be removed.

  That is, if the discharge flow rate of the cleaning liquid is 0.5 L / min or less and the rotation speed is 20 to 30 rpm, the surface of the TFT array substrate 10 on which the fine resist pattern 202a as shown in FIG. As shown in FIG. 10B, the adhering water-soluble foreign matter R can be removed without peeling off the fine resist pattern 202a.

  On the other hand, for example, when the cleaning liquid discharge flow rate is 2.0 L / min and the rotation speed is 250 rpm, a part (or all) of the fine resist pattern 202a is peeled off as shown in FIG.

  The present invention is not limited to the above-described embodiments, and various modifications can be made as appropriate without departing from the spirit or concept of the invention that can be read from the claims and the entire specification. The manufacturing method is also included in the technical scope of the present invention.

  DESCRIPTION OF SYMBOLS 10 ... TFT array substrate, 12 ... Base insulating film, 201 ... Semiconductor film, 202 ... Resist film, 202a ... Resist pattern, 300 ... Spin cleaning machine, 301 ... Spin base, 302 ... Rinse nozzle

Claims (2)

A resist coating process for coating a resist on a substrate;
A patterning step of patterning the applied resist into a predetermined shape;
A cleaning step of cleaning the substrate having the patterned resist with a cleaning liquid,
In the cleaning step, the cleaning liquid is supplied at a rate of 0.5 L / min or less while the substrate is rotated at 20 to 30 rpm. The washing step includes
A first rotational cleaning process in which the cleaning liquid is supplied at 0.5 L / min or less while the substrate is rotated at 50 rpm;
A second rotational cleaning process in which the cleaning liquid is supplied at 0.5 L / min or less while the substrate is rotated at 20 to 30 rpm;
The method of manufacturing an electro-optical device according to claim 1, further comprising: a third rotational cleaning step in which the cleaning liquid is supplied at 0.5 L / min or less while the substrate is rotated at 50 rpm.

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