JP2011141390A - Electrophoretic display device and drive method of the same, and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electrophoretic display device displaying a high-quality image and achieving low power consumption. <P>SOLUTION: The electrophoretic display device includes: a first switching element (24a) outputting an image signal from a first data line (51) in accordance with a scanning signal; a first memory circuit (27a) comprising a capacitive element connected to a pixel electrode and holding the image signal outputted from the first switching element; a second switching element (26a) electrically connecting a first capacitive line to the first memory circuit in accordance with the image signal held by the first memory circuit; a third switching element (24b) outputting an inverted image signal from a second data line in accordance with a scanning signal; a second memory circuit (27b) holding the inverted image signal outputted from the third switching element; and a fourth switching element (26b) electrically connecting a second capacitive line to the first memory circuit in accordance with the inverted image signal held in the second memory circuit. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an electrophoretic display device, a driving method thereof, and a technical field of electronic equipment.

  As an electrophoretic display device of this type, a pixel circuit (so-called so-called capacitor) that includes one TFT (Thin Film Transistor) that functions as a pixel switching element and one capacitance element (that is, a capacitor) that functions as a memory circuit. Some have a 1T1C type pixel circuit). In such an electrophoretic display device, an image signal is written from a data line to a capacitor element as a memory circuit via a TFT as a pixel switching element, and a pixel electrode is generated by a potential according to the image signal written in the capacitor element. Is driven to generate a potential difference with the common electrode. Thus, display is performed by moving the electrophoretic particles contained in the electrophoretic element between the pixel electrode and the common electrode to the pixel electrode side or the common electrode side.

  By the way, electrophoretic display devices are required to have low power consumption from the viewpoints of characteristics and environment of applied electronic devices. On the other hand, since the data line is driven at a high frequency and a high voltage is required for driving the electrophoretic element, an image signal having a high voltage is generally supplied to the data line.

  In order to meet such a demand for low power consumption, for example, in Patent Document 1, in a liquid crystal display device, after a low-voltage image signal is written to a capacitive element provided for each pixel via a data line, the capacitance There has been proposed a technique for increasing the potential of a pixel electrode electrically connected to the other capacitor electrode of a capacitor element by changing the potential of one capacitor electrode of the element to a higher potential side by a capacitor line driving circuit. For example, in Patent Document 2, in a liquid crystal display device, a low-potential capacitor line and a high potential that are maintained at a low potential after a low-voltage image signal is written to a capacitor provided for each pixel via a data line. A technique has been proposed in which one of the high-potential capacitor lines maintained at the same is selected and electrically connected to one capacitor electrode of the capacitor.

JP 2001-255851 A JP 2002-196358 A

  However, according to the techniques disclosed in Patent Documents 1 and 2 described above, regardless of whether the image signal written in the capacitive element is a low potential or a high potential, the capacitive element is uniformly applied to a plurality of pixels. The potential of one of the capacitor electrodes fluctuates. For this reason, when the technique disclosed in Patent Documents 1 and 2 described above is applied to an electrophoretic display device, for example, a pixel in which an image signal having the same potential as the potential of the common electrode is written to the capacitor element. When the potential of one capacitor electrode of the capacitor element fluctuates, a potential difference is generated between the pixel electrode and the common electrode, and the electrophoretic particles may move between the pixel electrode and the common electrode. As a result, the contrast of the display image may be reduced.

  The present invention has been made in view of, for example, the above-described problems. For example, an electrophoretic display device capable of displaying a high-quality image and reducing power consumption, a driving method thereof, and the electrophoresis It is an object to provide an electronic device including a display device.

  In order to solve the above-described problems, an electrophoretic display device of the present invention is an electrophoretic display device including a display unit including a plurality of pixels, in which an electrophoretic element is sandwiched between a pair of substrates. A pixel electrode formed for each pixel; a common electrode facing the pixel electrode via the electrophoretic element; a scanning line for supplying a scanning signal; a first data line for supplying an image signal; And a first switching element that outputs the image signal input from the first data line in response to the scanning signal, and a capacitive element electrically connected to the pixel electrode. , A first memory circuit that holds the image signal output from the first switching element, a first capacitor line that supplies a first capacitance potential, and the first memory circuit that holds the image signal. Depending on the image signal, A second switching element for electrically connecting the first capacitor line to the first memory circuit, and a second data line for supplying an inverted image signal obtained by inverting the polarity of the image signal with respect to a reference potential A third switching element that is provided for each pixel and that outputs the inverted image signal input from the second data line according to the scanning signal, and is output from the third switching element. In accordance with the second memory circuit that holds the inverted image signal, the second capacitor line that supplies the second capacitance potential, and the inverted image signal that is held in the second memory circuit, And a fourth switching element that electrically connects the second capacitor line to the memory circuit.

  According to the electrophoretic display device of the present invention, during the operation, the electrophoretic element sandwiched between the pair of substrates is provided for each pixel, and for each pixel on one of the pair of substrates, for example, the element substrate. A voltage corresponding to an image signal is applied between the formed pixel electrode and, for example, a common electrode provided, for example, in a solid shape on the other substrate which is a counter substrate, for example, of a pair of substrates. An image is displayed on the screen.

  More specifically, for example, a plurality of white particles that are negatively charged and a plurality of black particles that are positively charged are included in the inside of the electrophoretic element that is a microcapsule, for example. . In the electrophoretic element, one of a plurality of negatively charged white particles and a plurality of positively charged black particles moves to the pixel electrode side according to a voltage applied between the pixel electrode and the common electrode (that is, the pixel electrode side). ), And the other moves to the common electrode side. Thus, an image corresponding to the moved electrophoretic particles is displayed on the other substrate side (that is, the common electrode side) of the pair of substrates.

  The image signal is supplied for each pixel by the first data line. Further, from the second data line, for each pixel, an inverted image signal obtained by inverting the polarity of the image signal with respect to the reference potential (in other words, a signal complementary to the image signal, that is, the potential of the image signal, When the signal inverted to the potential for displaying a different color tone, for example, the potential of the image signal is at a high level (for example, 5V), the potential of the image signal has a low level (for example, 0V). In the case of a low level (for example, 0 V), a signal having a high level (for example, 5 V) potential is supplied. The first and second data lines are provided, for example, on one of a pair of substrates so as to intersect with a scanning line that supplies a scanning signal. For example, a plurality of pixel electrodes are provided in a matrix corresponding to the intersections of the first and second data lines and the scanning lines.

  In the present invention, in particular, for each pixel, four switching elements (that is, first, second, third, and fourth switching elements), two memory circuits (that is, first and second memory circuits), and It has. The image signal supplied to the first data line is transferred to the first memory circuit including the capacitive element by the first switching element made of a transistor, for example, in accordance with the timing of the scanning signal supplied to the scanning line. Is output. As a result, the image signal is held in the first memory circuit. The second switching element constitutes a capacitive element included in the first memory circuit by using the first capacitive potential input from the first capacitive line in accordance with the image signal held in the first memory circuit. The output is output to the other capacitor electrode different from the one capacitor electrode connected to the pixel electrode. For example, when the potential of the image signal held in the first memory circuit is at a high level, the second switching element is turned on, and the first capacitance potential is supplied from the first capacitance line to the second capacitance. When the potential of the image signal supplied to the other capacitor electrode of the capacitor included in the first memory circuit via the switching element and held in the first memory circuit is at a low level, the second switching is performed. The element is turned off, and the first capacitor line and the first memory circuit are electrically disconnected by the second switching element. On the other hand, the inverted image signal supplied to the second data line is, for example, a second switching element including a capacitive element, for example, by a third switching element made of a transistor in accordance with the timing of the scanning signal supplied to the scanning line. Output to the memory circuit. As a result, the inverted image signal is held in the second memory circuit. The fourth switching element converts the second capacitance potential input from the second capacitance line in accordance with the inverted image signal held in the second memory circuit, to the capacitance element included in the first memory circuit. Output to the other capacitor electrode. For example, when the potential of the inverted image signal held in the second memory circuit is at a high level, the fourth switching element is turned on, and the second capacitance potential is changed from the second capacitance line to the fourth level. When the potential of the inverted image signal supplied to the other capacitor electrode of the capacitor included in the first memory circuit via the switching element and held in the second memory circuit is at the low level, the fourth The switching element is turned off, and the second capacitor line and the first memory circuit are electrically disconnected by the fourth switching element. Here, the inverted image signal is a signal obtained by inverting the polarity of the image signal with respect to the reference potential, and the second switching element is switched between the on state and the off state by the image signal held in the first memory circuit, Since the fourth switching element is switched between the ON state and the OFF state by the inverted image signal held in the second memory circuit, the ON state and the OFF state are different between the second switching element and the fourth switching element. . That is, when the second switching element is on, the fourth switching element is off, and when the second switching element is off, the fourth switching element is on.

  Therefore, the first capacitor potential or the second capacitor potential can be supplied to the other capacitor electrode of the capacitor included in the first memory circuit in accordance with the image signal.

  Furthermore, since the potential of the other capacitor electrode of the capacitor included in the first memory circuit can be controlled by controlling the first and second capacitor potentials, the capacitor included in the first memory circuit The potential of the pixel electrode electrically connected to one electrode of the element can be controlled. Therefore, for example, the first and second capacitance potentials are changed so that the first capacitance potential changes from a low potential (for example, 0 V) to a high potential (for example, 10 V) and the second capacitance potential is maintained at a low potential (for example, 0 V). By controlling the capacitance potential of 2, the potential of the pixel electrode of the pixel to which the high-level (for example, 5 V) image signal is supplied can be increased, and the pixel to which the low-level (for example, 0 V) image signal is supplied The potential of the pixel electrode can be maintained.

  In this manner, by controlling the first capacitor potential and the second capacitor potential, the potential of the pixel electrode can be increased, so that the potential of the image signal supplied from the data line can be lowered. Therefore, the power consumption of the electrophoretic display device can be reduced.

  Furthermore, according to the present invention, by controlling the first and second capacitance potentials as described above, the potential of the pixel electrode of the pixel to which the high level (for example, 5 V) image signal is supplied can be increased. At the same time, since the potential of the pixel electrode of the pixel to which the low-level (for example, 0 V) image signal is supplied can be maintained, there is little or no reduction in the contrast of the display image. Therefore, a high quality image can be displayed.

  As described above, according to the electrophoretic display device of the present invention, a high-quality image can be displayed and power consumption can be reduced.

  In one aspect of the electrophoretic display device of the present invention, the electrophoretic display device includes capacitive line driving means for driving at least one of the first capacitive line and the second capacitive line.

  According to this aspect, at least one of the first capacitor potential and the second capacitor potential can be changed by the capacitor line driving unit, and the potential of the pixel electrode can be controlled.

  In another aspect of the electrophoretic display device of the present invention, the capacitor line driving unit drives both the first capacitor line and the second capacitor line.

  According to this aspect, both the first capacitance potential and the second capacitance potential can be varied by the capacitive line driving means. Therefore, for example, the potential of the pixel electrode of the pixel to which the high-level image signal is supplied can be increased, and the potential of the pixel electrode of the pixel to which the low-level image signal is supplied can be lowered.

  In the aspect including the above-described capacitor line driving unit, the capacitor line driving unit sets the first capacitor line to a low potential as the first capacitor potential during the selection period in which the scanning signal is at the selection state level. After the selection period, a high potential higher than the low potential is supplied to the first capacitor line as the first capacitor potential.

  In this case, for example, the potential of the pixel electrode of the pixel to which a high level (for example, 5 V) image signal is supplied can be reliably increased.

  In the aspect including the above-described capacitance line driving unit, the capacitance line driving unit supplies the first capacitance line with a potential signal complementary to the scanning signal as the first capacitance potential.

  In this case, for example, the potential of the pixel electrode of the pixel to which a high level (for example, 5 V) image signal is supplied can be reliably increased. Furthermore, since the potential signal is complementary to the scanning signal, there is a practical merit that it is easy to create a potential signal. Here, the potential signal and the scanning signal have a complementary relationship means that the potential of the potential signal is lower than the predetermined reference potential during a period when the potential of the scanning signal is higher than the predetermined reference potential. Means that the potential of the potential signal is higher than the predetermined reference potential during a period lower than the predetermined reference potential.

  An electrophoretic display device driving method according to the present invention is an electrophoretic display device that includes an electrophoretic element sandwiched between a pair of substrates and includes a display unit including a plurality of pixels. A pixel electrode formed for each pixel, a common electrode facing the pixel electrode via the electrophoretic element, a scanning line for supplying a scanning signal, and a first data line for supplying an image signal; A first switching element that is provided for each pixel and outputs the image signal input from the first data line according to the scanning signal; and a capacitive element electrically connected to the pixel electrode A first memory circuit for holding the image signal output from the first switching element, a first capacitor line for supplying a first capacitance potential, and the first memory circuit. Retained image In response to the signal, a second switching element that electrically connects the first capacitor line to the first memory circuit and an inverted image signal obtained by inverting the polarity of the image signal with respect to a reference potential are supplied. A second data line; a third switching element that is provided for each pixel and that outputs the inverted image signal input from the second data line in accordance with the scanning signal; and the third switching element. A second memory circuit that holds the inverted image signal output from the element; a second capacitor line that supplies a second capacitance potential; and the inverted image signal held in the second memory circuit. An electrophoretic display device driving method for driving an electrophoretic display device comprising a fourth switching element that electrically connects the second capacitor line to the first memory circuit, wherein the first memory circuit includes: Data of The image signal is written to the first memory circuit from the second data line to the second memory circuit through the third switching element. A first step of writing a signal; and a second step of driving at least one of the first capacitor line and the second capacitor line.

  According to the driving method of the electrophoretic display device according to the present invention, the above-described electrophoretic display device according to the present invention can be suitably driven. Here, in particular, in the second step, the potential of the pixel electrode can be increased by driving at least one of the first capacitor line and the second capacitor line, so that the potential of the image signal supplied by the data line is increased. Can be lowered. Therefore, it is possible to reduce the power consumption of the electrophoretic display device.

  In order to solve the above problems, an electronic apparatus of the present invention includes the above-described electrophoretic display device of the present invention.

  According to the electronic apparatus of the present invention, since the electrophoretic display device of the present invention described above is provided, power consumption is reduced and high-quality display can be performed. For example, wristwatches, electronic paper, electronic Various electronic devices such as notebooks, mobile phones, and portable audio devices can be realized.

  The effect | action and other gain of this invention are clarified from the form for implementing invention demonstrated below.

1 is a block diagram illustrating an overall configuration of an electrophoretic display device according to a first embodiment. It is an equivalent circuit diagram which shows the structure of the pixel of the electrophoretic display device which concerns on 1st Embodiment. It is a fragmentary sectional view of the display part of the electrophoretic display device concerning a 1st embodiment. It is a schematic diagram which shows the structure of a microcapsule. 5 is a flowchart for explaining an example of a display operation of the electrophoretic display device according to the first embodiment. 6 is a timing chart (part 1) illustrating an example of a display operation of the electrophoretic display device according to the first embodiment. 6 is a timing chart (part 2) illustrating an example of a display operation of the electrophoretic display device according to the first embodiment. It is a schematic diagram for demonstrating the electric potential of the pixel electrode in the pixel in which the high level image signal is written in 1st Embodiment. It is a schematic diagram for demonstrating the electric potential of the pixel electrode in the pixel in which the low level image signal is written in 1st Embodiment. 12 is a timing chart illustrating fluctuations in potentials of scanning lines and first capacitance lines in the electrophoretic display device according to the second embodiment. It is a flowchart for demonstrating an example of the display operation of the electrophoretic display device which concerns on 3rd Embodiment. 12 is a timing chart illustrating an example of a display operation of the electrophoretic display device according to the third embodiment. It is a schematic diagram for demonstrating the electric potential of the pixel electrode in the pixel in which the high level image signal in 3rd Embodiment is written. It is a schematic diagram for demonstrating the electric potential of the pixel electrode in the pixel in which the image signal of a low level in 3rd Embodiment is written. It is a perspective view which shows the structure of the electronic paper which is an example of the electronic device to which the electrophoretic display apparatus is applied. It is a perspective view which shows the structure of the electronic notebook which is an example of the electronic device to which an electrophoretic display apparatus is applied.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

<First Embodiment>
The electrophoretic display device according to the first embodiment will be described with reference to FIGS.

  First, the overall configuration of the electrophoretic display device according to the present embodiment will be described with reference to FIGS. 1 and 2.

  FIG. 1 is a block diagram showing the overall configuration of the electrophoretic display device according to this embodiment.

  1, the electrophoretic display device 1 according to the present embodiment includes a display unit 3, a controller 10, a scanning line driving circuit 60, a data line driving circuit 70, a capacitor line driving circuit 210, and a common potential supply circuit. 220. The capacitance line driving circuit 210 is an example of the “capacitance line driving means” according to the present invention.

  In the display unit 3, m rows × n columns of pixels 20 are arranged in a matrix (in a two-dimensional plane). Further, the display unit 3 includes m scanning lines 40 (that is, scanning lines Y1, Y2,..., Ym) and n first data lines 51 (that is, first data lines X1a, X2a,. Xna) and n second data lines 52 (that is, second data lines X1b, X2b,..., Xnb) are provided so as to cross each other. Specifically, the m scanning lines 40 extend in the row direction (that is, the X direction), and the n first data lines 51 and the second data lines 52 are in the column direction (that is, the Y direction). It extends to. The pixels 20 are arranged corresponding to the intersections of the m scanning lines 40 and the n first data lines 51 and the second data lines 52.

  Further, the display unit 3 includes m first capacitance lines 94 (that is, first capacitance lines CLa1, CLa2,..., CLam) and m second capacitance lines 95 (that is, second capacitance lines). (Capacitance lines CLb1, CLb2,..., CLbm) are provided corresponding to the m scanning lines 40 and extend in the row direction. Specifically, the first capacitor line CLak and the second capacitor line CLbk (where k = 1, 2,..., M) are connected to the scanning line Yk (where k = 1, 2,..., M). Correspondingly, n pixels 20 electrically connected to the scanning line Yk are connected in common.

  The controller 10 controls operations of the scanning line driving circuit 60, the data line driving circuit 70, the capacitor line driving circuit 210, and the common potential supply circuit 220. Specifically, the controller 10 supplies timing signals such as a clock signal and a start pulse to each circuit. The controller 10 also controls the on / off states of switches 93s, 94s and 95s which will be described later with reference to FIG.

  Based on the timing signal supplied from the controller 10, the scanning line driving circuit 60 sequentially supplies a scanning signal in a pulse manner to each of the scanning lines Y1, Y2,.

  The data line driving circuit 70 supplies an image signal to the first data lines X1a, X2a,..., Xna based on the timing signal supplied from the controller 10. The image signal takes a binary level of a high level (that is, a high potential level, for example, 5 V) or a low level (that is, a low potential level, for example, 0 V). The data line driving circuit 70 further supplies an inverted image signal to the second data lines X1b, X2b,..., Xnb based on the timing signal supplied from the controller 10. The inverted image signal is a signal obtained by inverting the binary level of the image signal. For example, when the image signal is high level, the inverted image signal is low level, and when the image signal is low level, it is inverted. The image signal is at a high level. That is, the inverted image signal also takes a binary level of high level or low level. For example, when the image signal has a potential of 5V as the high level and a potential of 0V as the low level, the inverted image signal is a signal whose polarity is inverted with 2.5V as the reference potential.

  The capacitor line driver circuit 210 supplies a first capacitor potential Vc1 to the first capacitor line 94 and supplies a second capacitor potential Vc2 to the second capacitor line 95. Although not shown here, each of the first capacitor line 94 and the second capacitor line 95 is connected via an electrical switch (that is, switches 94s and 95s described later with reference to FIG. 2). The power supply circuit 210 is electrically connected.

  The common potential supply circuit 220 supplies the common potential Vcom to the common potential line 93. Although not shown here, the common potential line 93 is electrically connected to the common potential supply circuit 220 via an electrical switch (that is, a switch 93s described later with reference to FIG. 2). .

  Various signals are input / output to / from the controller 10, the scanning line driving circuit 60, the data line driving circuit 70, the capacitance line driving circuit 210, and the common potential supply circuit 220, which are not particularly related to the present embodiment. Description of is omitted.

  FIG. 2 is an equivalent circuit diagram illustrating the electrical configuration of the pixel.

  In FIG. 2, the pixel 20 includes a pixel electrode 21, a common electrode 22 disposed so as to face the pixel electrode 21, an electrophoretic element 23 provided between the pixel electrode 21 and the common electrode 22, and a first electrode. A selection transistor 24a, a second selection transistor 24b, a first capacitor 27a, a second capacitor 27b, a first control transistor 26a, and a second control transistor 26b. Yes. The first selection transistor 24a is an example of the “first switching element” according to the present invention, and the second selection transistor 24b is an example of the “third switching element” according to the present invention. The first capacitor 27a is an example of a “first memory circuit” according to the present invention, and the second capacitor 27b is an example of a “second memory circuit” according to the present invention. The control transistor 26a is an example of the “second switching element” according to the present invention, and the second control transistor 26b is an example of the “fourth switching element” according to the present invention.

  The first selection transistor 24a is formed as an N-channel transistor using an amorphous semiconductor. The first selection transistor 24a has a gate electrically connected to the scanning line 40, a source electrically connected to the first data line 51, and a drain connected to the first capacitor 27a. Electrically connected. The first selection transistor 24a receives the image signal supplied from the data line driving circuit 70 (see FIG. 1) via the first data line 51, and the scanning line 40 from the scanning line driving circuit 60 (see FIG. 1). And input to the first capacitor 27a at a timing corresponding to the scanning signal supplied in a pulse manner. As a result, an image signal is written to the first capacitor 27a.

  The first capacitor 27a is a capacitive element for holding an image signal. One capacitor electrode of the first capacitor 27a is electrically connected to the drain of the first selection transistor 24a, the pixel electrode 21, and the gate of the first control transistor 26a. The other capacitor electrode of the first capacitor 27a is electrically connected to the drain of the first control transistor 26a.

  The first control transistor 26a is formed as an N-channel transistor using an amorphous semiconductor. The gate of the first control transistor 26a is electrically connected to one capacitance electrode of the first capacitor 27a, the drain of the first selection transistor 24a, and the pixel electrode 21, and the source thereof is the first. The capacitor line 94 is electrically connected, and its drain is electrically connected to the other capacitor electrode of the first capacitor 27a. The first control transistor 26a is an image in which the first capacitor potential Vc1 supplied from the capacitor line driver circuit 210 (see FIG. 1) via the first capacitor line 94 is held in the first capacitor 27a. Depending on the signal potential, the signal is output to the other capacitor electrode of the first capacitor 27a. For example, when the image signal held in the first capacitor 27 a is at a high level, the first control transistor 26 a is turned on, and the first capacitance potential Vc 1 is supplied from the first capacitance line 94. The voltage is supplied to the other capacitor electrode of the first capacitor 27a through the first control transistor 26a turned on. On the other hand, when the image signal held in the first capacitor 27a is at a low level, the first control transistor 26a is turned off, and the other of the first capacitor line 94 and the first capacitor 27a is turned off. The capacitor electrode is electrically disconnected by the first control transistor 26a turned off.

  The second selection transistor 24b is formed as an N-channel transistor using an amorphous semiconductor. The second selection transistor 24b has a gate electrically connected to the scanning line 40, a source electrically connected to the second data line 52, and a drain connected to the second capacitor 27b. Electrically connected. The second selection transistor 24b receives the inverted image signal supplied from the data line driving circuit 70 (see FIG. 1) via the second data line 52 and the scanning line 40 from the scanning line driving circuit 60 (see FIG. 1). Is input to the second capacitor 27b at a timing corresponding to the scanning signal supplied in a pulsed manner. As a result, the inverted image signal is written to the second capacitor 27b.

  The second capacitor 27b is a capacitive element for holding an inverted image signal. One capacitance electrode of the second capacitor 27b is electrically connected to the drain of the second selection transistor 24b and the gate of the second control transistor 26b. The other capacitor electrode of the second capacitor 27 b is electrically connected to the second capacitor line 95.

  The second control transistor 26b is formed as an N-channel transistor using an amorphous semiconductor. The gate of the second control transistor 26b is electrically connected to one capacitance electrode of the second capacitor 27b and the drain of the second selection transistor 24b, and the source thereof is the second capacitance line 95. The drain is electrically connected to the other capacitor electrode of the first capacitor 27a. The second control transistor 26b inverts the second capacitance potential Vc2 supplied from the capacitance line driving circuit 210 (see FIG. 1) via the second capacitance line 95 and held in the second capacitor 27b. In accordance with the potential of the image signal, it is output to the other capacitor electrode of the first capacitor 27a. For example, when the inverted image signal held in the second capacitor 27b is at a high level, the second control transistor 26b is turned on and the second capacitance potential Vc2 is applied from the second capacitance line 95. , And supplied to the other capacitor electrode of the first capacitor 27a through the second control transistor 26b turned on. On the other hand, when the inverted image signal held in the second capacitor 27b is at a low level, the second control transistor 26b is turned off, and the other of the second capacitor line 95 and the first capacitor 27a. The capacitor electrode is electrically disconnected by the second control transistor 26b turned off.

  Here, in this embodiment, as described above, each of the first selection transistor 24a, the second selection transistor 24b, the first control transistor 26a, and the second control transistor 26b includes an N channel. It is formed as a type transistor. Therefore, the first selection transistor 24a, the second selection transistor 24b, the first control transistor 26a, and the second control transistor 26b can be easily formed using an amorphous semiconductor. Therefore, the manufacturing cost of the electrophoretic display device 1 can be reduced, and the reliability of the electrophoretic display device 1 can be improved.

  As described above, in this embodiment, the first selection transistor 24a, the second selection transistor 24b, the first control transistor 26a, and the second control transistor 26b (hereinafter referred to as “transistor” 24a, 24b, 26a and 26b ”) are each formed as an N-channel transistor. As a modification of this embodiment, each of the transistors 24a, 24b, 26a and 26b is given. May be formed as a P-channel transistor. In this case, all of the transistors 24a, 24b, 26a, and 26b can be easily formed as P-channel transistors, so that the manufacturing cost can be reduced and the reliability can be improved.

  Each of the transistors 24a, 24b, 26a, and 26b may be formed as an inorganic transistor including an inorganic semiconductor material such as silicon, or may be formed as an organic transistor including an organic semiconductor material.

  When the transistors 24a, 24b, 26a, and 26b are formed as organic transistors, examples of organic semiconductor materials include poly (3-alkylthiophene), poly (3-hexylthiophene) (P3HT), and poly (3-octyl). Thiophene), poly (2,5-thienylene vinylene) (PTV), poly (para-phenylene vinylene) (PPV), poly (9,9-dioctylfluorene) (PFO), poly (9,9-dioctylfluorene- Co-bis-N, N ′-(4-methoxyphenyl) -bis-N, N′-phenyl-1,4-phenylenediamine) (PFMO), poly (9,9-dioctylfluorene-co-benzothiadiazole) (BT), fluorene-triallylamine copolymer, triallylamine-based polymer, poly (9,9 Polymer organic semiconductor materials such as fluorene-bithiophene copolymers such as dioctylfluorene-co-dithiophene (F8T2), C60, metal phthalocyanines or substituted derivatives thereof, anthracene, tetracene, pentacene, hexacene, etc. Acene molecular materials or α-oligothiophenes, specifically, one or more of low molecular organic semiconductors such as quarterthiophene (4T), sexithiophene (6T), and octathiophene are mixed. Can be used.

  In addition, as a method for forming the semiconductor portions of the transistors 24a, 24b, 26a, and 26b by forming these organic semiconductor materials, a vapor deposition method, a CVD (Chemical Vapor Deposition) method, a casting method, a pulling method, a Langmuir Blodget method. A general film forming method such as a spray method, an ink jet method, or a silk screen method can be used.

  In FIG. 2, the first capacitor line 94 and the second capacitor line 95 are configured so that the first capacitor potential Vc1 and the second capacitor potential Vc2 can be supplied from the capacitor line driving circuit 210, respectively. The first capacitor line 94 is electrically connected to the capacitor line driver circuit 210 via the switch 94s, and the second capacitor line 95 is electrically connected to the capacitor line driver circuit 210 via the switch 95s. Has been. The switches 94s and 95s are configured to be switched between an on state and an off state by the controller 10. When the switch 94s is turned on, the first capacitor line 94 and the capacitor line driving circuit 210 are electrically connected, and when the switch 94s is turned off, the first capacitor line 94 is electrically connected. The high impedance state is disconnected. When the switch 95s is turned on, the second capacitor line 95 and the capacitor line driving circuit 210 are electrically connected, and when the switch 95s is turned off, the second capacitor line 95 is electrically connected. The high impedance state is disconnected.

  The first control transistor 26a is switched between an on state and an off state by an image signal held in the first capacitor 27a, and the second control transistor 26b is an inverted image signal (held in the second capacitor 27b). In other words, the ON state and the OFF state are switched by a signal obtained by inverting the binary level of the image signal), so that the ON state and the OFF state are switched between the first control transistor 26a and the second control transistor 26b. Different from each other. That is, when the first control transistor 26a is on, the second control transistor 26b is off, and when the first control transistor 26a is off, the second control transistor 26a is off. 26b is turned on. Therefore, the other capacitance electrode of the first capacitor 27a of each of the plurality of pixels 20 corresponds to the image signal held in the first capacitor 27a and the inverted image signal held in the second capacitor 27b. It is alternatively electrically connected to the first capacitor line 94 or the second capacitor line 95. At this time, the other capacitor electrode of the first capacitor 27a of each of the plurality of pixels 20 is supplied from the capacitor line driving circuit 210 to the first capacitor potential Vc1 or the second capacitor according to the on / off state of the switch 94s or 95s. The potential Vc2 is supplied or a high impedance state is set.

  More specifically, for the pixel 20 to which a high-level image signal is supplied (in other words, a low-level inverted image signal is supplied), the first control transistor 26a and the second control transistor 26b. Among them, only the first control transistor 26a is turned on, and the other capacitor electrode of the first capacitor 27a of the pixel 20 is electrically connected to the first capacitor line 94, and the switch 94s is turned on / off. Accordingly, the first capacitor potential Vc1 is supplied from the capacitor line driving circuit 210, or a high impedance state is set. On the other hand, for the pixel 20 to which the low-level image signal is supplied (in other words, the high-level inverted image signal is supplied), the second of the first control transistor 26a and the second control transistor 26b. Only the control transistor 26b of the pixel 20 is turned on, and the pixel electrode 21 of the pixel 20 is electrically connected to the second capacitor line 95, and the second capacitor line 95 is connected to the second capacitor line 95 according to the on / off state of the switch 95s. The capacitor potential Vc2 is supplied or a high impedance state is set.

  The pixel electrode 21 is disposed so as to face the common electrode 22 through the electrophoretic element 23.

  The common electrode 22 is electrically connected to a common potential line 93 to which a common potential Vcom is supplied. The common potential line 93 is configured to be able to supply the common potential Vcom from the common potential supply circuit 220 (see FIG. 1). The common potential line 93 is electrically connected to the common potential supply circuit 220 via the switch 93s. The switch 93 s is configured to be switched between an on state and an off state by the controller 10. When the switch 93s is turned on, the common potential line 93 and the common potential supply circuit 220 are electrically connected, and when the switch 93s is turned off, the common potential line 93 is electrically disconnected. High impedance state.

  The electrophoretic element 23 is composed of a plurality of microcapsules each containing electrophoretic particles.

  Next, a specific configuration of the display unit of the electrophoretic display device according to the present embodiment will be described with reference to FIGS. 3 and 4.

  FIG. 3 is a partial cross-sectional view of the display unit of the electrophoretic display device according to this embodiment.

  In FIG. 3, the display unit 3 is configured such that an electrophoretic element 23 is sandwiched between an element substrate 28 and a counter substrate 29. In the present embodiment, description will be made on the assumption that an image is displayed on the counter substrate 29 side.

  The element substrate 28 is a substrate made of, for example, glass, plastic, silicon, or the like. Although not shown here on the element substrate 28, the first selection transistor 24a, the second selection transistor 24b, the first capacitor 27a, and the second capacitor 27b described above with reference to FIG. , First control transistor 26a, second control transistor 26b, scanning line 40, first data line 51, second data line 52, common potential line 93, first capacitance line 94, second capacitance line A laminated structure in which 95 or the like is formed is formed. A plurality of pixel electrodes 21 are provided in a matrix on the upper layer side of the stacked structure.

  The counter substrate 29 is a transparent substrate made of, for example, glass or plastic. On the surface of the counter substrate 29 facing the element substrate 28, the common electrode 22 is formed in a solid shape so as to face the plurality of pixel electrodes 21. The common electrode 22 is formed of a transparent conductive material such as magnesium silver (MgAg), indium / tin oxide (ITO), indium / zinc oxide (IZO), or the like.

  The electrophoretic element 23 is composed of a plurality of microcapsules 80 each including electrophoretic particles, and is fixed between the element substrate 28 and the counter substrate 29 by a binder 30 and an adhesive layer 31 made of, for example, resin. . In the electrophoretic display device 1 according to the present embodiment, in the manufacturing process, an electrophoretic sheet in which the electrophoretic element 23 is previously fixed to the counter substrate 29 side by the binder 30 is separately manufactured, such as the pixel electrode 21. It is bonded to the element substrate 28 side where is formed by an adhesive layer 31.

  One or a plurality of microcapsules 80 are sandwiched between the pixel electrode 21 and the common electrode 22 and arranged in one pixel 20 (in other words, with respect to one pixel electrode 21).

  FIG. 4 is a schematic diagram showing the configuration of the microcapsule. In addition, in FIG. 4, the cross section of the microcapsule is shown typically.

  In FIG. 4, a microcapsule 80 is formed by enclosing a dispersion medium 81, a plurality of white particles 82 that are electrophoretic particles, and a plurality of black particles 83 inside a coating 85. The microcapsule 80 is formed in a spherical shape having a particle size of about 50 μm, for example.

  The coating 85 functions as an outer shell of the microcapsule 80, and is formed from a translucent polymer resin such as an acrylic resin such as polymethyl methacrylate or polyethyl methacrylate, a urea resin, or gum arabic.

  The dispersion medium 81 is a medium for dispersing the white particles 82 and the black particles 83 in the microcapsules 80 (in other words, in the coating 85). Examples of the dispersion medium 81 include water, alcohol solvents such as methanol, ethanol, isopropanol, butanol, octanol, and methyl cellosolve, various esters such as ethyl acetate and butyl acetate, and ketones such as acetone, methyl ethyl ketone, and methyl isobutyl ketone. , Aliphatic hydrocarbons such as pentane, hexane and octane, cycloaliphatic hydrocarbons such as cyclohexane and methylcyclohexane, benzene, toluene, xylene, hexylbenzene, hebutylbenzene, octylbenzene, nonylbenzene, decylbenzene, undecyl Aromatic hydrocarbons such as benzenes with long chain alkyl groups such as benzene, dodecylbenzene, tridecylbenzene, tetradecylbenzene, etc., halo such as methylene chloride, chloroform, carbon tetrachloride, 1,2-dichloroethane, etc. Emissions of hydrocarbons, carboxylate or other oils may be used singly or as a mixture. In addition, a surfactant may be added to the dispersion medium 81.

  The white particles 82 are particles (polymer or colloid) made of a white pigment such as titanium dioxide, zinc white (zinc oxide), and antimony trioxide, and are negatively charged, for example.

  The black particles 83 are particles (polymer or colloid) made of a black pigment such as aniline black or carbon black, and are positively charged, for example.

  For this reason, the white particles 82 and the black particles 83 can move in the dispersion medium 81 by the electric field generated by the potential difference between the pixel electrode 21 and the common electrode 22.

  These pigments include electrolytes, surfactants, metal soaps, resins, rubbers, oils, varnishes, charge control agents composed of particles such as compounds, titanium-based coupling agents, aluminum-based coupling agents, silanes as necessary. A dispersant such as a system coupling agent, a lubricant, a stabilizer, and the like can be added.

  3 and FIG. 4, when a voltage is applied between the pixel electrode 21 and the common electrode 22 so that the potential of the common electrode 22 is relatively high, the positively charged black particles 83 are While being attracted to the pixel electrode 21 side in the microcapsule 80 by the Coulomb force, the negatively charged white particles 82 are attracted to the common electrode 22 side in the microcapsule 80 by the Coulomb force. As a result, the white particles 82 gather on the display surface side (that is, the common electrode 22 side) inside the microcapsule 80, thereby displaying the color of the white particles 82 (that is, white) on the display surface of the display unit 3. Can do. Conversely, when a voltage is applied between the pixel electrode 21 and the common electrode 22 so that the potential of the pixel electrode 21 becomes relatively high, the negatively charged white particles 82 are generated by the Coulomb force. While attracted to the electrode 21 side, the positively charged black particles 83 are attracted to the common electrode 22 side by Coulomb force. As a result, the black particles 83 gather on the display surface side of the microcapsule 80, whereby the color of the black particles 83 (that is, black) can be displayed on the display surface of the display unit 3.

  Further, depending on the distribution state of the white particles 82 and the black particles 83 between the pixel electrode 21 and the common electrode 22, it is possible to display gray such as light gray, gray, dark gray and the like, which are intermediate gradations of white and black. is there. Further, by replacing the pigments used for the white particles 82 and the black particles 83 with pigments such as red, green, and blue, for example, color display such as red, green, and blue is possible.

  Next, an example of the display operation of the electrophoretic display device according to the present embodiment will be described with reference to FIGS. 5 to 9 in addition to FIGS.

  FIG. 5 is a flowchart for explaining an example of the display operation of the electrophoretic display device according to this embodiment. 6 and 7 are timing charts showing an example of the display operation of the electrophoretic display device according to this embodiment.

  5 and 6, first, the power sources of the circuits such as the scanning line driving circuit 60, the capacitor line driving circuit 210, and the common potential supply circuit 220 are turned on (step S10). Accordingly, the ground potential GND (for example, 0 V) is applied to the scanning line 40, the common potential line 93, the first capacitor line 94, and the second capacitor line 95 that are in the high impedance state (HiZ) in the period T1. . At this time, the switches 93 s, 94 s, and 95 s are turned on by the controller 10.

  Next, an image signal is written to the first capacitor 27a, and an inverted image signal is written to the second capacitor 27b (step S20). That is, in a period T2 following the period T1, a pulsed scanning signal is sequentially supplied from the scanning line driving circuit 60 to the scanning lines Y1, Y2,..., Ym, and the scanning lines Y1, Y2,. .., Ym, a plurality of first data lines 51 (that is, first data lines X1a, X2a,..., Xna) from the data line driving circuit 70 in a period in which one row of pixels 20 corresponding to one scanning line is selected. ) And an inverted image signal are supplied to a plurality of second data lines 52 (that is, second data lines X1b, X2b,..., Xnb). As a result, in each pixel 20, the first selection transistor 24a and the second selection transistor 24b are turned on in response to the scanning signal, and from the first data line 51 through the first selection transistor 24a. An image signal is written to the first capacitor 27a, and an inverted image signal is written from the second data line 52 to the second capacitor 27b via the second selection transistor 24b. The image signal has a predetermined potential V0 (for example, 5V) as a high level (Hi level) and a grant potential GND (for example, 0V) as a low level (Lo level). Also, as shown in FIGS. 6 and 7, the scanning signal takes a predetermined potential Vscn as a selection state level that is a potential level for turning on the first selection transistor 24a and the second selection transistor 24b, The ground potential GND is taken as a non-selection state level that is a potential level for turning off the first selection transistor 24a and the second selection transistor 24b. The common potential Vcom is constant at the ground potential GND.

  Here, when a high level image signal is written to the first capacitor 27a and a low level inverted image signal is written to the second capacitor 27b, the high level image signal is held in the first capacitor 27a. The first control transistor 26a is in an on state and the second control transistor 26b is in an off state during a certain period (or a period in which a low level inverted image signal is held in the second capacitor 27b). It becomes. On the other hand, when a low-level image signal is written in the first capacitor 27a and a high-level inverted image signal is written in the second capacitor 27b, the low-level image signal is held in the first capacitor 27a. During the period (or the period in which the high-level inverted image signal is held in the second capacitor 27b), the first control transistor 26a is turned off and the second control transistor 26b is turned on. Become.

  That is, in each pixel 20, the first control transistor 26a and the second control transistor are used in accordance with the image signal held in the first capacitor 27a (and the inverted image signal held in the second capacitor 27b). One of the transistors 26b is alternatively turned on.

  FIG. 8 is a schematic diagram for explaining the potential of the pixel electrode in the pixel to which the high-level image signal is written, and FIG. 9 is for explaining the potential of the pixel electrode in the pixel to which the low-level image signal is written. FIG.

  6 and 8, in the pixel 20 to which the high (Hi) level image signal (that is, the image signal of the predetermined potential V0) is written, the high level image signal is written to the first capacitor 27a in the period T2. Thus, the potential Vpix of the pixel electrode 21 that was the ground potential GND in the period T1 becomes the predetermined potential V0 in the period T2.

  On the other hand, in FIG. 6 and FIG. 9, in the pixel 20 to which the low (Lo) level image signal (that is, the image signal of the ground potential GND) is written, the low level image signal is written to the first capacitor 27a in the period T2. Thus, the potential Vpix of the pixel electrode 21 that was the ground potential GND in the period T1 is maintained at the ground potential GND also in the period T2.

  5 and 6 again, the image signal is written to the first capacitor 27a and the inverted image signal is written to the second capacitor 27b (step S20). Then, the capacitor line drive circuit 210 causes the first capacitance potential to be written. Vc1 is raised from the ground potential GND to a predetermined potential V1 (for example, 10V), and the second capacitance potential Vc2 is maintained at the ground potential GND (step S30). That is, the capacitor line driving circuit 210 supplies the first capacitor line 94 with the ground potential GND in the periods T1 and T2, supplies the predetermined potential V1 in the period T3 after the period T2, and supplies the second capacitor line 94 with the second capacitor line. 95, the ground potential GND is supplied in the periods T1 and T2, and the ground potential GND is also supplied in the period T3 after the period T2. More specifically, as illustrated in FIG. 7, the capacitor line driving circuit 210 determines that the potential of the scanning line Yk (where k = 1,..., M) is not selected from a predetermined potential Vscn that is a selected state level in the period T2. The potential of the first capacitor line CLak (where k = 1,..., M) changes from the ground potential GND to the predetermined potential V1 after a predetermined period Δt1 from the time when the ground potential GND that is the selected state level changes. The first capacitor line 94 (that is, CLa1,..., CLam) is driven. Further, the capacitor line driver circuit 210 maintains the second capacitor line 95 at the ground potential GND. In the present embodiment, the potential of the second capacitor line 95 is configured to be maintained at the ground potential GND by the capacitor line driving circuit 210. However, the potential of the second capacitor line 95 is set to the capacitance line driving circuit 210. May be maintained at the ground potential GND by a separate power supply circuit.

  6 and 8, in the pixel 20 to which the high (Hi) level image signal (that is, the image signal of the predetermined potential V0) is written, as described above, the first control transistor 26a is in the ON state. In addition, the second control transistor 26b is turned off. Therefore, the other capacitor electrode of the first capacitor 27a (that is, a capacitor electrode different from the one capacitor electrode electrically connected to the pixel electrode 21 among the pair of capacitor electrodes constituting the first capacitor 27a) is Are electrically connected to the first capacitor line 94 and are electrically disconnected from the second capacitor line 95. Accordingly, in the pixel 20 to which the high level image signal is written, the first capacitor line 94 is connected to the other capacitor electrode of the first capacitor 27a from the first capacitor line 94 via the first control transistor 27a turned on. Capacitance potential Vc1 is supplied.

  Here, as described above, the capacitor line driving circuit 210 raises the first capacitor potential Vc1 from the ground potential GND to the predetermined potential V1 (for example, 10V). As a result, in the pixel 20 to which the high-level image signal is written, the other capacitor electrode of the first capacitor 27a is electrically connected to the first capacitor line 94, so that the predetermined potential V1 from the ground potential GND. To rise. As the potential of the other capacitor electrode of the first capacitor 27a increases, the potential of one capacitor electrode of the first capacitor 27a also increases. Therefore, the potential of the pixel electrode 21 electrically connected to one capacitor electrode of the first capacitor 27a can be increased.

  More specifically, in the pixel 20 to which the high-level image signal is written, the high-level image signal (image signal with the predetermined potential V0) is written to the first capacitor 27a in the period T2, thereby the pixel electrode 21. The potential Vpix becomes the predetermined potential V0, and in the period T3, the potential of the other capacitor electrode of the first capacitor 27a rises from the ground potential GND to the predetermined potential V1, and the charge accumulated in the first capacitor 27a is By redistributing the parasitic capacitance Cdg of the first selection transistor 24a, the parasitic capacitance Csw1 of the first control transistor 26a, the parasitic capacitance Cepd of the electrophoretic element 23, and the capacitance Cs1 of the first capacitor 27a. The potential Vpix of the pixel electrode 21 is a potential represented by the following formula.

V0 + K × V1
However, K = Cs1 / (Cs1 + Csw1 + Cepd + Cdg)
That is, in the pixel 20 to which the high-level image signal is written, the potential Vpix of the pixel electrode 21 is increased by raising the first capacitance potential Vc1 from the ground potential GND to the predetermined potential V1 (for example, 10V) by the capacitance line driving circuit 210. Can be increased from a predetermined potential V0 (for example, 5V) by a potential K × V1.

  On the other hand, in FIGS. 6 and 9, in the pixel 20 to which the low (Lo) level image signal (that is, the image signal of the ground potential GND) is written, as described above, the first control transistor 26a is turned off (OFF). ) State, and the second control transistor 26b is turned on. Therefore, the other capacitor electrode of the first capacitor 27 a is electrically disconnected from the first capacitor line 94 and electrically connected to the second capacitor line 95. Accordingly, in the pixel 20 to which the low-level image signal is written, the second capacitor line 94 is connected to the other capacitor electrode of the first capacitor 27a via the second control transistor 26b turned on. Capacitance potential Vc2 is supplied.

  Here, as described above, the capacitor line driver circuit 210 maintains the second capacitor potential Vc2 at the ground potential GND in the periods T1 to T3. As a result, in the pixel 20 to which the low-level image signal is written, the other capacitor electrode of the first capacitor 27a is electrically connected to the second capacitor line 95, and thus becomes constant at the ground potential GND. . Therefore, the potential of one capacitor electrode of the first capacitor 27a is also constant at the ground potential GND, and the pixel electrode 21 electrically connected to one capacitor electrode of the first capacitor 27a is also constant at the ground potential GND. be able to.

  That is, in the pixel 20 to which the low-level image signal is written, the potential Vpix of the pixel electrode 21 is kept constant at the ground potential GND by maintaining the second capacitor potential Vc2 at the ground potential GND by the capacitor line driving circuit 210. be able to. Therefore, in the pixel 20 to which the low-level image signal is written, it is possible to prevent a potential difference from occurring between the pixel electrode 21 and the common electrode 22 to which the ground potential GND is supplied as the common potential Vcom.

  As described above, particularly in the present embodiment, in the pixel 20 to which the high-level image signal shown in FIG. 8 is written, the first capacitive potential Vc1 is changed from the ground potential GND to the predetermined potential V1 (for example, 10 V) by the capacitive line driving circuit 210. By increasing the potential, the potential Vpix of the pixel electrode 21 can be increased by a potential K × V1 from a predetermined potential V0 (for example, 5V), so that the potential of the image signal supplied by the data line 51 can be lowered. Therefore, since the potential of the image signal supplied by the data line 51 driven at a high frequency can be lowered, the power consumption of the electrophoretic display device 1 can be reduced.

  Further, in the present embodiment, in particular, in the pixel 20 to which the high-level image signal shown in FIG. Thus, the potential Vpix of the pixel electrode 21 can be increased from the predetermined potential V0 (for example, 5V) by the potential K × V1, and in the pixel 20 to which the low-level image signal shown in FIG. Thus, by maintaining the second capacitance potential Vc2 at the ground potential GND, the potential Vpix of the pixel electrode 21 can be made constant at the ground potential GND, so that there is little or no reduction in the contrast of the display image. Therefore, a high quality image can be displayed.

  5 and 6 again, when an image to be displayed in the period T3 is displayed on the display unit 3, the power of each circuit such as the scan line driver circuit 60, the capacitor line driver circuit 210, and the common potential supply circuit 220 is turned off. (Step S40). Thereby, in the period T4 following the period T3, various wirings and various elements such as the scanning line 40, the pixel electrode 21, the first capacitance line 94, the second capacitance line 95, and the common electric wire 93 are in a high impedance state (HiZ). ). As a result, an electric field is not generated between the pixel electrode 21 and the common electrode 22, so that the particles in the microcapsule 80 do not move until a new electric field is generated next. Accordingly, the display of the image is maintained on the display unit 3.

  As described above, according to the electrophoretic display device 1 according to the present embodiment, a high-quality image can be displayed and power consumption can be reduced.

Second Embodiment
An electrophoretic display device according to a second embodiment will be described with reference to FIG.

  FIG. 10 is a timing chart showing fluctuations in potentials of the scanning lines and the first capacitance lines in the electrophoretic display device according to the second embodiment.

  In the electrophoretic display device according to the second embodiment, the capacitor line driving circuit 210 supplies the first capacitor line 94 with a potential signal complementary to the scanning signal as the first capacitor potential Vc1. Unlike the electrophoretic display device according to the first embodiment, the other configuration is substantially the same as the electrophoretic display device according to the first embodiment described above.

  In FIG. 10, particularly in the second embodiment, the capacitor line driving circuit 210 supplies a potential signal complementary to the scanning signal to the first capacitor line 94 as the first capacitor potential Vc1. That is, in the second embodiment, the potential of the first capacitor line 94 (that is, the first capacitor potential Vc1) is the same as the potential of the scanning line 40 (that is, the potential of the scanning signal) is the ground potential GND (that is, the non-selected state). During the period that is the state level), the potential is the predetermined potential V1 (for example, 10V), and during the period when the potential of the scanning line 40 is the predetermined potential Vscn (that is, the selected state level), the potential is the ground potential GND.

  Therefore, similarly to the first embodiment described above, the potential of the pixel electrode of the pixel 20 to which the high-level image signal is supplied can be reliably increased. Furthermore, since the first capacitance potential Vc1 according to the second embodiment is complementary to the scanning signal, for example, compared to the first embodiment described above, it is easier to create a potential signal of the first capacitance potential Vc1. There are the above merits.

<Third Embodiment>
An electrophoretic display device according to a third embodiment will be described with reference to FIGS. 11 to 14.

  FIG. 11 is a flowchart for explaining an example of the display operation of the electrophoretic display device according to the third embodiment. FIG. 12 is a timing chart illustrating an example of the display operation of the electrophoretic display device according to the third embodiment. FIG. 13 is a schematic diagram for explaining a potential of a pixel electrode in a pixel in which a high-level image signal is written in the third embodiment, and FIG. 14 is a diagram illustrating a low-level image signal in the third embodiment. It is a schematic diagram for demonstrating the electric potential of the pixel electrode in the pixel written. 11 to 14, the same reference numerals are given to the same components and processing operations as those of the first embodiment shown in FIGS. 1 to 9, and their descriptions will be appropriately described. Omitted.

  In the electrophoretic display device according to the third embodiment, the image signal has a predetermined potential V0 (for example, 5V) as a high (Hi) level and a predetermined potential -V2 (for example, -10V) as a low (Lo) level, After the image signal is written to the first capacitor 27a and the inverted image signal is written to the second capacitor 27b (step S20), the first capacitance potential Vc1 is predetermined from the ground potential GND by the capacitance line driving circuit 210. Electrophoresis according to the first embodiment described above in terms of raising the potential V1 (for example, 10V) and lowering the second capacitance potential Vc2 from the ground potential GND to the predetermined potential −V3 (for example, −5V) (step S30c). Unlike the display device, the other points are substantially the same as those of the electrophoretic display device according to the first embodiment described above. It has been.

  11 and 12, an image signal is written to the first capacitor 27a and an inverted image signal is written to the second capacitor 27b (step S20).

  12 and 13, in the pixel 20 to which the high (Hi) level image signal (that is, the image signal having the predetermined potential V0) is written, the high level image signal is written to the first capacitor 27a in the period T2. Thus, the potential Vpix of the pixel electrode 21 that was the ground potential GND in the period T1 becomes the predetermined potential V0 in the period T2.

  On the other hand, in FIG. 12 and FIG. 14, in the pixel 20 to which the low (Lo) level image signal (that is, the image signal of the predetermined potential −V2) is written, the low level image signal is output to the first capacitor 27a in the period T2. By writing, the potential Vpix of the pixel electrode 21 that was the ground potential GND in the period T1 becomes the predetermined potential −V2 in the period T2.

  Next, in FIGS. 11 and 12, the capacitor line driving circuit 210 raises the first capacitor potential Vc1 from the ground potential GND to the predetermined potential V1 (for example, 10V) and the second capacitor potential Vc2 from the ground potential GND. The voltage is lowered to a predetermined potential −V3 (for example, −5V) (step S30c). That is, the capacitor line driving circuit 210 supplies the first capacitor line 94 with the ground potential GND in the periods T1 and T2, supplies the predetermined potential V1 in the period T3 after the period T2, and supplies the second capacitor line 94 with the second capacitor line. 95, the ground potential GND is supplied in the periods T1 and T2, and the predetermined potential −V3 is supplied in the period T3 after the period T2.

  As a result, in the pixel 20 to which the high-level image signal shown in FIG. 13 is written, the first capacitive potential Vc1 is raised from the ground potential GND to the predetermined potential V1 (for example, 10V) by the capacitive line driving circuit 210. The potential Vpix of the electrode 21 can be increased by a potential K × V1 from a predetermined potential V0 (for example, 5 V), and in the pixel 20 to which a low-level image signal shown in FIG. By lowering the capacitance potential Vc2 from the ground potential GND to a predetermined potential −V3 (for example, −5V), the potential Vpix of the pixel electrode 21 is changed from the predetermined potential −V2 (for example −10V) to the potential K × V3 (where K = Cs1). / (Cs1 + Csw1 + Cepd + Cdg)).

  According to the electrophoretic display device according to the third embodiment configured as described above, the pixel electrode 21 in both the pixel 20 to which the high-level image signal is supplied and the pixel 20 to which the low-level image signal is supplied. In addition, since a voltage can be simultaneously applied between the common electrodes 22, it is possible to quickly rewrite an image on the display unit 3. Further, in the pixel 20 to which the high-level image signal is written, the potential Vpix of the pixel electrode 21 is increased by raising the first capacitance potential Vc1 from the ground potential GND to the predetermined potential V1 (for example, 10V) by the capacitance line driving circuit 210. Can be increased from the predetermined potential V0 (for example, 5V) by the potential K × V1, and in the pixel 20 to which the low-level image signal is written, the second capacitor potential Vc2 is determined from the ground potential GND by the capacitor line driving circuit 210. By lowering the potential Vpix to the potential −V3 (for example, −5 V), the potential Vpix of the pixel electrode 21 can be lowered from the predetermined potential −V2 (for example, −10 V) by the potential K × V3. The voltage (that is, the potential amplitude) can be lowered. Therefore, the voltage of the image signal supplied by the data line 51 driven at a high frequency can be lowered, so that the power consumption of the electrophoretic display device can be reduced. In addition, in the pixel 20 to which the high-level image signal is written, as described above, the potential Vpix of the pixel electrode 21 can be increased from the predetermined potential V0 by the potential K × V1, and the low-level image signal is written. In the pixel 20, as described above, the potential Vpix of the pixel electrode 21 can be lowered from the predetermined potential −V2 (for example, −10V) by the potential K × V3, so that the contrast of the display image can be increased. Therefore, a high quality image can be displayed.

  The predetermined potential −V2 that the image signal takes as the low (Lo) level is preferably lower than the predetermined potential −V3 that the second capacitance potential Vc2 takes, as in this embodiment. That is, it is preferable that the relational expression predetermined potential −V2 <predetermined potential −V3. In this case, when a high-level image signal is supplied to the pixel 20, both the first control transistor 26a and the second control transistor 26b are turned on, and the first capacitor line 94 and An electrical short between the second capacitor lines 95 can be prevented. For example, if the predetermined potential −V2 is higher than the predetermined potential −V3 (for example, when the predetermined potential −V2 is −5V and the predetermined potential −V3 is −10V), the high-level image signal is output. In the pixel 20 to which is supplied, the first control transistor 26a is turned on in response to the high-level image signal, and the second control transistor 26b is set to the low-level inverted image signal (for example, −5V). In response, the device is turned on. Here, the gate potential Vg of the second control transistor 26b is −5V, for example, and the second capacitance potential Vc2 (in other words, the source potential Vs of the second control transistor 26b) is −10V, for example. In this case, since the gate potential Vg is higher than the source potential Vs, the second control transistor 26b is turned on.

<Electronic equipment>
Next, electronic devices to which the above-described electrophoretic display device is applied will be described with reference to FIGS. Below, the case where the electrophoretic display device described above is applied to electronic paper and an electronic notebook is taken as an example.

  FIG. 15 is a perspective view illustrating a configuration of the electronic paper 1400.

  As illustrated in FIG. 15, the electronic paper 1400 includes the electrophoretic display device according to the above-described embodiment as a display unit 1401. The electronic paper 1400 has flexibility, and includes a main body 1402 formed of a rewritable sheet having the same texture and flexibility as conventional paper.

  FIG. 16 is a perspective view showing the configuration of the electronic notebook 1500.

  As shown in FIG. 16, an electronic notebook 1500 is obtained by bundling a plurality of electronic papers 1400 shown in FIG. 15 and sandwiching them between covers 1501. The cover 1501 includes display data input means (not shown) for inputting display data sent from an external device, for example. Thereby, according to the display data, the display content can be changed or updated while the electronic paper is bundled.

  Since the above-described electronic paper 1400 and electronic notebook 1500 include the electrophoretic display device according to the above-described embodiment, power consumption is small and high-quality image display can be performed.

  In addition to these, the electrophoretic display device according to the present embodiment described above can be applied to the display unit of an electronic device such as a wristwatch, a mobile phone, or a portable audio device.

  The present invention is not limited to the above-described embodiment, and can be appropriately changed without departing from the gist or concept of the invention that can be read from the claims and the entire specification, and an electrophoretic display with such a change. A device, a driving method of the electrophoretic display device, and an electronic apparatus including the electrophoretic display device are also included in the technical scope of the present invention.

  DESCRIPTION OF SYMBOLS 10 ... Controller, 20 ... Pixel, 21 ... Pixel electrode, 22 ... Common electrode, 23 ... Electrophoretic element, 24a ... First selection transistor, 24b ... Second selection transistor, 26a ... First control transistor , 26b, second control transistor, 27a, first capacitor, 27b, second capacitor, 28, element substrate, 29, counter substrate, 40, scanning line, 51, first data line, 52, second. Data line 60 ... Scanning line driving circuit 70 ... Data line driving circuit 93 ... Common potential line 94 ... First capacitance line 95 ... Second capacitance line 210 ... Capacitance line driving circuit 220 ... Common potential Supply circuit

Claims (7)

An electrophoretic display device comprising an electrophoretic element sandwiched between a pair of substrates and having a display unit composed of a plurality of pixels,
A pixel electrode formed for each pixel;
A common electrode facing the pixel electrode through the electrophoretic element;
A scanning line for supplying a scanning signal;
A first data line for supplying an image signal;
A first switching element that is provided for each pixel and outputs the image signal input from the first data line in accordance with the scanning signal;
A first memory circuit that includes a capacitive element electrically connected to the pixel electrode and holds the image signal output from the first switching element;
A first capacitor line for supplying a first capacitor potential;
A second switching element that electrically connects the first capacitor line to the first memory circuit in response to the image signal held in the first memory circuit;
A second data line for supplying an inverted image signal obtained by inverting the polarity of the image signal with respect to a reference potential;
A third switching element that is provided for each pixel and outputs the inverted image signal input from the second data line in accordance with the scanning signal;
A second memory circuit for holding the inverted image signal output from the third switching element;
A second capacitor line for supplying a second capacitor potential;
And a fourth switching element that electrically connects the second capacitor line to the first memory circuit in accordance with the inverted image signal held in the second memory circuit. Electrophoretic display device.   The electrophoretic display device according to claim 1, further comprising a capacitor line driving unit that drives at least one of the first capacitor line and the second capacitor line.   3. The electrophoretic display device according to claim 1, wherein the capacitor line driving unit drives both the first capacitor line and the second capacitor line. 4.   The capacitor line driving unit supplies a low potential as the first capacitor potential to the first capacitor line during the selection period in which the scanning signal is at a selected state level, and after the selection period, 4. The electrophoretic display device according to claim 2, wherein a high potential higher than the low potential is supplied to the first capacitor line as the first capacitor potential.   4. The electrophoretic display according to claim 2, wherein the capacitive line driving unit supplies a potential signal complementary to the scanning signal as the first capacitive potential to the first capacitive line. 5. apparatus. An electrophoretic display device comprising an electrophoretic element sandwiched between a pair of substrates and having a display unit composed of a plurality of pixels, the pixel electrode formed for each pixel, and the electrophoresis on the pixel electrode The common electrode opposed via the element, a scanning line that supplies a scanning signal, a first data line that supplies an image signal, and the image that is provided for each pixel and is input from the first data line A first switching element that outputs a signal in response to the scanning signal; and a capacitive element that is electrically connected to the pixel electrode, and holds the image signal output from the first switching element. In response to the image signal held in the first memory circuit, a first capacitor line for supplying a first capacitor potential, a first capacitor line for supplying a first capacitor potential, and the first memory circuit. Electrically connect the capacitive wires A second switching element, a second data line for supplying an inverted image signal obtained by inverting the polarity of the image signal with respect to a reference potential, and provided for each pixel and input from the second data line A third switching element that outputs the inverted image signal according to the scanning signal, a second memory circuit that holds the inverted image signal output from the third switching element, and a second capacitor A second capacitor line for supplying a potential and a fourth capacitor line for electrically connecting the second capacitor line to the first memory circuit in accordance with the inverted image signal held in the second memory circuit. An electrophoretic display device driving method for driving an electrophoretic display device comprising a switching element, comprising:
The image signal is written from the first data line to the first memory circuit via the first switching element, and from the second data line to the second switching element via the third switching element. A first step of writing the inverted image signal in a memory circuit;
And a second step of driving at least one of the first capacitor line and the second capacitor line. A method for driving an electrophoretic display device.   An electronic apparatus comprising the electrophoretic display device according to claim 1.

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