JP2011124426A - Solder flip-chip mounting method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solder flip-chip mounting method that prevents a solder joint portion from coming off during re-reflow processing due to a failure in alloying of solder during joining. <P>SOLUTION: A method of mounting a semiconductor chip 100a on a substrate 100b includes the steps of: forming a solder bump 105 at one of joint portions of the semiconductor chip 100a and substrate 100b and forming a gold bump 106 with an uneven portion PR at the other; pressing the semiconductor chip 100a and substrate 100b against each other to bring the uneven portion PR and solder bump 105 into contact with each other; and forming alloy of the solder bump 105 and gold bump 106 by heating and holding the uneven portion PR and solder bump 105, which are brought into contact with each other, at a first predetermined temperature T for a first predetermined time. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a solder flip chip mounting method for preventing remelting of solder after a semiconductor device is joined to a printed board using Sn (tin) solder.

  In the conventional solder flip chip mounting, a solder material having a molten component made of Sn (tin) -Ag (silver) -Cu (copper) based alloy powder and a bonding material mixed with Cu powder as a base material is used. Yes. Among such solders, there is a solder that Cu is alloyed with other components in the solder at the time of bonding, so that the melting point of the solder is increased and is difficult to melt at the temperature at the time of bonding (for example, Patent Document 1). reference).

  A conventional solder flip chip mounting method (Patent Document 1) will be described with reference to FIG. In the figure, reference numeral 11 indicates a circuit device, reference numeral 12 indicates a wiring board, reference numeral 13 indicates a semiconductor device, reference numeral 14 indicates a chip electronic component, reference numeral 15 indicates an exterior resin, and reference numeral 16 indicates an underfill. Reference numeral 17 denotes a land, reference numeral 19 denotes solder, and reference numeral 18 denotes a wire.

  The semiconductor device 13 is mounted on the wiring board 12. One or more chip electronic components 14 are soldered to the lands 17 arranged around the semiconductor device 13. The semiconductor device 13 and the chip electronic component 14 are covered with an exterior resin 15, and the circuit device 11 is configured as a resin-sealed circuit device. An underfill 16 is filled between the lower surface of the semiconductor device 13 and the wiring substrate 12 in a formed space and a portion in contact with at least a part of the chip electronic component 14.

  Solder 19 is used for solder bonding of the chip electronic component 14 in the portion filled with the underfill 16. The solder 19 is made of a material whose melting temperature becomes higher when heated again than the melting temperature by the first heating. Specifically, the solder 19 includes a melting component that is melted by the first heating and a base material that is alloyed with the melting component. That is, the molten component and the base material are all or partially alloyed by the first heating, and the molten component is eliminated or reduced. As a result, the solder 19 has a high melting temperature as a whole and is difficult to melt.

JP 2008-16785 A

  However, in the conventional solder flip chip mounting method described above, a portion that is not alloyed may be generated in the solder during bonding (first heating). And there exists a problem that the non-alloyed part of solder (Sn—Ag—Cu) melts at the time of reflow and the already joined part comes off. As a cause of such non-alloying at the time of soldering, the dispersion of the dispersion ratio of the Cu powder in the base material (joining material), the dispersion amount of the metal powder due to the dispersion of the dispersion ratio of the Cu powder, There is non-uniformity, variation in the contact area ratio between the solder and the bonding partner on the bonding surface, or short melting time and small contact area between the metals.

  An object of the present invention is to provide a solder flip chip mounting method for preventing the solder joint from coming off at the time of re-reflow due to the non-alloying of solder at the time of joining.

In order to achieve the above object, the solder flip chip mounting method of the present invention comprises:
Forming a solder bump on one of the semiconductor chip and the bonded portion of the substrate, and forming a gold bump having an uneven portion on the other;
Pressing the semiconductor chip and the substrate together to bring the concave and convex portions and the solder bumps into contact with each other;
Heating and holding the concavo-convex portions and solder bumps that are in contact with each other at a first predetermined temperature for a first predetermined time to form an alloy of the solder bump and the gold bump.

  According to the solder flip chip mounting method of the present invention, there is an effect that the joint portion does not remelt even in the subsequent reflow.

It is explanatory drawing of the solder flip chip mounting method which concerns on Embodiment 1 of this invention. It is explanatory drawing of the example from which the uneven | corrugated | grooved part of FIG. 1 differs. It is explanatory drawing of the solder flip chip mounting method which concerns on Embodiment 2 of this invention. It is explanatory drawing of the conventional solder flip chip mounting method.

  Hereinafter, embodiments of the present invention will be described in detail with reference to FIG. 1, FIG. 2, and FIG. In addition, in each figure, the same code | symbol is used about the same component as the circuit apparatus 11 shown in the above-mentioned FIG. 4, and description is abbreviate | omitted.

(Embodiment 1)
FIG. 1 shows a longitudinal section in a mounting process of a circuit device produced by the solder flip chip mounting method according to the first embodiment of the present invention. In the figure, reference numeral 100 indicates a circuit device, reference numeral 100a indicates a semiconductor chip, reference numeral 100b indicates a wiring substrate, reference numeral 101 indicates a first substrate, reference numeral 102 indicates a second substrate, reference numeral 103 Indicates a first barrier metal, reference numeral 104 indicates a second barrier metal, reference numeral 105 indicates a solder bump, reference numeral 106 indicates an Au bump, and reference numeral Pja indicates an alloy joint.

  As shown in FIG. 1A, the semiconductor chip 100a includes a first substrate 101, a first barrier metal 103, and solder bumps 105. The first substrate 101 is obtained by dicing a wafer into individual pieces. The first barrier metal 103 is made of Cu, Ti (titanium) or the like on the surface of the first substrate 101 facing the second substrate 102 (the lower surface in FIG. 1). The solder bump 105 is made of Sn (tin), Pb (lead), Ag (silver), Bi (bismuth), Ni (nickel), or Sb (antimony) based solder, plating, screen printing or the like. Thus, it is configured on the first barrier metal 103 so as to face the second substrate 102.

The wiring substrate 100 b includes a second substrate 102, a second barrier metal 104, and Au bumps 106. The second substrate 102 is formed of a resin film such as resin, Si (silicon), ceramics, and polyimide. The second barrier metal 104 is configured in the same manner as the first barrier metal 103 on the surface of the second substrate 102 facing the first substrate 101 (the upper surface in FIG. 1). The Au bump 106 is formed on the second barrier metal 104 by plating, vapor deposition, sputtering, or the like. Note that an uneven surface PR having a predetermined shape is formed on the upper surface of the Au bump 106, that is, the surface facing the first substrate 101 (solder bump 105). The shape of the uneven portion PR of the Au bump 106 will be described in detail later. As a method for forming irregularities, there are a method of changing sputtering, vapor deposition and plating conditions, a method of etching by forming photolithography patterning, and a method of forming irregularities by embossing.

  The circuit device 100 is configured by mounting the semiconductor chip 100a on the wiring substrate 100b through the steps described below.

  First, as shown in FIG. 1A, the semiconductor chip 100a and the wiring board 100b configured as described above are positioned by the mounting device so that the solder bumps 105 face the Au bumps 106.

  Next, the semiconductor chip 100 a and the wiring substrate 100 b are pressed against each other, and the concavo-convex portion PR of the Au bump 106 contacts the lower surface of the solder bump 105. By heating in this state, the Au bump 106 and the solder bump 105 are bonded as shown in FIG. In FIG. 1B, the symbol PJ indicates the joint between the Au bump 106 and the solder bump 105.

  Further, when heated, the solder of the joint PJ is melted, contact wetting with the Au bump 106 occurs, and alloying progresses due to the mutual diffusion of the solder and Au. Then, the first barrier metal 103 of the first substrate 101 and the second barrier metal 104 of the second substrate 102 are alloy-bonded by the alloyed portion. In FIG. 1C, the symbol Pja indicates an alloy joint formed by the Au bump 106 and the solder bump 105.

  Below, the alloying in the above-mentioned this invention is explained in full detail. Alloying is caused by the diffusion of metal atoms from the interface of the metal material. Diffusion is governed by factors such as the diffusion coefficient inherent to the metal material, diffusion temperature, and diffusion time. The higher the diffusion coefficient or the higher the temperature, the faster the diffusion rate. The diffusion distance is proportional to the diffusion time. The diffusion coefficient D is expressed by the following equation (1).

D = Do · e (−E / RT) a = (2Dt) 1/2 (1)
D: diffusion coefficient, Do: frequency factor, E: activation energy, R: Boltzmann constant, T: temperature, a: diffusion distance, t: time From the above equation (1), if the temperature T is constant, It can be seen that the larger the area, the greater the amount of diffusion per unit time t. From this point of view, in the present invention, by increasing the area of the interface, among the causes of non-alloying at the time of solder bonding in the above-described conventional solder flip chip mounting method, the solder on the bonding surface and the bonding partner The problem of variations in the contact area ratio, or short melting time and small contact area between metals is sought. Specifically, the concavo-convex portion PR having a predetermined surface roughness on the upper surface of the Au bump 106 so that the Au bump 106 and the solder bump 105 are in contact with each other at a predetermined frequency (at contact points dispersed at a predetermined interval). Is provided.

  By increasing the surface roughness of the concavo-convex portion PR, the surface area of the Au bump 106 that forms the interface with the solder bump 105 is increased. Usually, by changing the surface roughness Ra = 0.1 μm to 1 μm, the surface area becomes 4000 times, and the diffusion speed can be improved. As schematically shown in FIG. 1A, the concavo-convex portion PR is formed as an aggregate of protrusions P dispersed at a predetermined frequency and height. Therefore, the concavo-convex part PR (Ra = 1 μm) configured with Ra = 1 μm has a larger number of points on the solder bump 105 than the concavo-convex part PR (Ra = 0.1 μm) configured with Ra = 0.1 μm. Abut evenly.

Since each protrusion P is sufficiently small, the tip of each protrusion P is easily crushed (deformed or buckled) when the semiconductor chip 100a and the wiring board 100b are brought into contact with each other. Therefore, even when the distance between the solder bump 105 and the tip of the concavo-convex portion PR is slightly non-uniform, the concavo-convex portion PR can contact the solder bump 105 evenly by absorbing such non-uniformity. . That is, as in the conventional solder flip chip mounting method, when the Au bump 106 is a flat surface without the concavo-convex portion PR, the lower surface of the solder bump 105 and the surface, line, or point at one or more locations. It is possible to prevent a situation where contact is uneven.

  Each protrusion P of the uneven portion PR (Ra = 1 μm) can use more ambient heat than each protrusion P of the uneven portion PR (Ra = 0.1 μm). That is, each protrusion P of the concavo-convex portion PR in the present invention has a larger number of per unit mass than the surface contact portion, line contact portion, or point contact portion at one or more places in the conventional solder flip chip mounting method. The heat of can be used. The ambient heat refers to the heat of each component of the semiconductor chip 100a and the wiring substrate 100b, and the heat generated by the reflow process.

  Thus, in the present invention, each protrusion P of the uneven portion PR of the Au bump 106 is rapidly melted by using the surrounding heat more efficiently. The melted uneven portion PR spreads over the entire interface between the Au bump 106 (uneven portion PR) and the solder bump 105, promotes diffusion between the two, and completes alloying within a predetermined time. That is, the remaining of the non-alloyed portion is prevented within a predetermined time of the reflow process, and the bonding between the semiconductor chip 100a and the wiring substrate 100b is completed, and the alloy bonded portion Pja is uniformly generated. In addition, since the non-alloyed part is not included in the alloy joint Pja, remelting by the non-alloyed part does not occur. Since the melting point of the alloy joint Pja is higher than the melting point of the solder (solder bump 105), it is possible to realize a joined state that does not melt even when the same temperature is applied again.

  As a condition for rapidly completing alloying within a predetermined time, the surface roughness of the concavo-convex part PR and the metal amounts of the solder bump 105 and the Au bump 106 must satisfy the following conditions. A larger surface roughness of the concavo-convex part PR is more effective. However, since the bonding size targeted by the mounting technique of the present invention is about 50 μm square to 100 μm square, the surface roughness Ra is about 1 μm or more. preferable.

  Further, the metal amount of the Au bump 106 needs to be smaller than the metal amount of the solder bump 105. This is because if the amount of solder is excessive, when the diffusion limit is reached when the metals are diffused and alloyed with each other, the solder that does not diffuse remains, the melting point does not rise in that portion, and the solder does not move when reflowing. This is because there is a possibility of remelting.

  Also, the solder is preferably based on Sn, and the best metal is Au. This is because Sn has a melting point of 232 ° C. and is suitable for mounting and use as a product, and in addition, it easily diffuses with Au, which is often used in mounting technology. In addition, Sn diffuses with Au and then its melting point increases. This is because the atomic radius of Au is 0.144 nm, the atomic radius of Sn is 0.14 nm and the difference is small, and both are face-centered cubic lattices. When the difference in atomic radii is 15% or more, diffusion becomes difficult.

  As the Sn-based solder, metals such as Ag, Bi, Cu, Sb, Ni, and Pb are used.

  It is designed as a single material with the aim of controlling the melting point, elongation rate, Young's modulus, etc., and has the advantages and disadvantages from the viewpoint of diffusion after bonding.

The melting point of the alloy formed as the alloy joint Pja is 232 ° C for Sn, 280 ° C for Au-20Sn, 300 ° C for Pb-5Sn, 268 ° C for Pb-10Sn, 262 ° C for Bi-2.5Ag, Sn- 8Sb is 246 ° C., Sn-3.8Ag-1.2Cu is 217 ° C., Sn-37Pb is 183 ° C. and the like. In short, the melting point of the alloy should be higher than the melting point of the initial solder. For example, when joining Sn (solder bump 105) and Au (Au bump 106), the temperature at which Sn melts is 232 ° C., but after melting, the melting point is 280 ° C. or higher.

  In this embodiment, solder is used for the chip side and Au is used for the substrate side. However, the same effect can be obtained by the reverse configuration.

  As described above, in the present invention, it is possible to realize a solder flip chip mounting method in which a joining metal is alloyed with a metal having a melting point higher than that of the original metal by a single solder joint, and is not remelted even during reflow.

  Next, with reference to FIG. 2, two examples of the uneven portion PR of the Au bump 106 described above will be described. As described above, in the embodiment of the present invention, the concavo-convex portion PR is formed with a plurality of protrusions P whose surface roughness satisfies Ra = 1 μm. In the present embodiment, the protrusions P are roughly classified into acute-angle protrusions Pa shown in FIG. 2A and round protrusions Pb shown in FIG. Note that the set of acute-angled protrusions Pa is called an acute-angle uneven part PRa, and the Au bump 106 having the acute-angle uneven part PRa is called an Au acute-angle bump 106a. Similarly, a set of round protrusions Pb is referred to as a round uneven portion PRb, and an Au bump 106 including the round uneven portion PRb is referred to as an Au round bump 106b.

  The Au acute angle bump 106a (FIG. 2A) includes the acute protrusions Pa, so that the surface area of the Au acute angle bump 106a facing the solder bump 105 of the Au acute angle bump 106a when heated and melted after alignment mounting with solder, That is, since the contact area can be increased, uniform alloying can be realized in a short time. When the electrode size is 100 μm square, it is preferable that the bottom surface of the acute protrusion Pa is 10 μm square or round and has a height of about 20 μm.

  By providing the round protrusion Pb, the Au round bump 106b (FIG. 2B) can increase the surface area, that is, the contact area of the Au round bump 106b with respect to the solder bump 105, similarly to the Au acute bump 106a. Realization of uniform alloying in a short time. The depth in the figure is the same as the width. When the electrode size is 100 μm square, it is preferable that the bottom surface of the round protrusion Pb is 10 μm square, or the round shape or the round shape has a height of about 10 μm.

  The shape of the protrusion P of the Au bump 106 is the above-described acute angle if the contact area with the solder (solder bump 105), that is, the surface area of the Au bump 106 facing the solder bump 105 (protrusion P) can be increased. Similar effects can be obtained with shapes other than the protrusions Pa and the round protrusions Pb. For forming the Au bump 106, there are a method of etching by forming photolithography patterning, and a method of forming irregularities by embossing.

(Embodiment 2)
FIG. 3 shows a solder flip chip mounting method according to the second embodiment of the present invention. In the first embodiment described above, both the first substrate 101 and the second substrate 102 are obtained by dicing the wafer into pieces, but in this embodiment, the second substrate is used. 102 is used as it is formed on the silicon wafer WF. That is, a plurality of wiring boards 100b are formed on the wafer WF, and the semiconductor chip 100a is solder flip-chip mounted on each of them in the same manner as in the first embodiment.

In the example illustrated in FIG. 3, eight wiring boards 100 b are formed on the wafer WF placed on the heating stage 110. The semiconductor device 100a is already solder flip-chip mounted on six of the eight wiring boards 100b, and the circuit device 100 is configured. The remaining two wiring boards 100b are in a state before the semiconductor chip 100a is mounted by solder flip chip.

  In this state, as described with reference to FIG. 1A, the semiconductor chip 100a and the wiring substrate 100b are aligned. As described with reference to FIG. 1B, the semiconductor chip 100a and the wiring board 100b are brought into contact with the lower surface of the solder bump 105 and the concavo-convex portion PR of the Au bump 106, and further heated to join the joint PJ. Is formed. Further, the circuit device 100 is configured by forming the alloy joint Pja described with reference to FIG.

  That is, since the melting point of the alloy joint Pja formed by alloying the joint PJ is higher than the melting point of the initial solder (solder bump 105), the alloy joint Pja is remelted by heat in the subsequent mounting process. And a stable joined state can be obtained. When a relatively small chip (semiconductor chip 100a) is bonded to a large area such as the wafer WF by heating, the heating by the holding tool on the chip side is always heating, but the heating stage on the wafer (wiring substrate 100b) side. By heating only the necessary region on the 110 side, the thermal effect on the joint after mounting can be reduced. Note that the second substrate 102 may be a rectangular substrate or a rolled flexible substrate instead of a wafer.

  As described above, according to the solder flip chip mounting method of the present invention, a solder flip chip mounting method in which a bonding metal is alloyed with a metal having a melting point higher than that of the original metal by a single solder bonding and is not remelted even in reflow. Can be realized.

  Moreover, since the contact area between metals is large and the amount of metals facing each other is the same, it is less likely to be biased and uneven after melting. For this reason, it is possible to obtain a state in which no metal is melted even through reflow.

  The present invention can be used for solder flip chip mounting by continuous heating such as reflow.

DESCRIPTION OF SYMBOLS 11 Circuit apparatus 12 Wiring board 13 Semiconductor device 14 Chip electronic component 15 Exterior resin 16 Underfill 17 Land 18 Wire 19 Solder 100 Circuit apparatus 100a Semiconductor chip 100b Wiring board 101 1st board | substrate 102 2nd board | substrate 103 1st barrier metal 104 Second barrier metal 105 Solder bump 106 Au bump 106a Au acute bump 106b Au round bump P projection Pa acute projection Pb round projection PJ junction Pja alloy junction PR irregularity PRa acute angular irregularity PRb round irregularity WF Wafer 110 Heating stage

Claims (8)

A method of mounting a semiconductor chip on a substrate,
Forming a solder bump on either one of the joint portion of the semiconductor chip and the substrate and forming an Au bump having an uneven portion on the other;
Pressing the semiconductor chip and the substrate together to bring the concave and convex portions and the solder bumps into contact with each other;
A solder flip comprising: heating and holding the concavo-convex portion and the solder bump that are in contact with each other at a first predetermined temperature for a first predetermined time to form an alloy of the solder bump and the Au bump. Chip mounting method.   2. The solder flip chip mounting method according to claim 1, wherein the solder bump is an Sn-based solder material containing any one of Ag, Bi, Cu, Sb, Ni, and Pb.   The solder flip chip mounting method according to claim 1, wherein the volume of the Au bump is smaller than the volume of the solder bump.   4. The solder flip chip mounting method according to claim 1, wherein a surface roughness Ra of the Au bump is 1 [mu] m or more.   5. The solder flip chip mounting method according to claim 1, wherein the substrate is a silicon wafer.   6. The solder flip chip mounting method according to claim 1, wherein a surface of the Au bump is an aggregate of a plurality of protrusions.   The solder flip chip mounting method according to claim 6, wherein the protrusion is formed in an acute angle shape.   The solder flip chip mounting method according to claim 6, wherein the protrusion is formed in a round shape.