JP2011114008A - Semiconductor device, and method for manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device that properly prevents passivation cracks caused by changes in temperature. <P>SOLUTION: The semiconductor device 1 includes: an insulating film 11; a barrier layer 16 formed on the insulating film 11; an aluminum wiring 12 arranged on the barrier layer 16; a cap metal 18 or preservative treatment part 21 that is provided on an upper part of the aluminum wiring 12; and sidewalls 17 provided on lateral parts of the aluminum wiring 12. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a semiconductor device including aluminum wiring and a method for manufacturing the same.

  Conventionally, a semiconductor device in which an aluminum wiring layer is formed on a substrate via a first interlayer insulating film, and a hydrogen blocking film is formed on the aluminum wiring layer via a second interlayer insulating film Is known (see, for example, Patent Document 1).

JP-A-9-17788

  In general, a passivation structure in a semiconductor device provided with an aluminum wiring includes a stress relaxation layer (SiO, PSG, etc.) from a barrier layer, a barrier layer ( SiN, SiON). A stress relaxation layer (an organic coating film of polyimide or PBO) is further formed on the barrier layer to relieve stress from the package.

  However, in such a general passivation structure, when the chip area is large and the thickness of the aluminum wiring is relatively large (for example, 2 μm or more), if a temperature change occurs after assembly in the package, the passivation film (barrier layer, etc.) Cracks are likely to occur, resulting in a problem that the barrier function against moisture and mobile ions from the outside is impaired. More specifically, as schematically shown in FIG. 1, when a temperature change occurs, a lateral stress from the package and a stress due to thermal contraction of the aluminum wiring itself are generated, and the stress is applied to the upper corner of the aluminum wiring. Concentrates and cracks occur. Since the stress on the passivation film increases as the aluminum wiring is thicker and the chip area is larger, such cracks are likely to occur.

  Therefore, an object of the present invention is to provide a semiconductor device and a manufacturing method thereof that can appropriately prevent passivation cracks caused by temperature changes.

In order to achieve the above object, according to one aspect of the present invention, an insulating film;
A barrier layer formed on the insulating film;
Aluminum wiring disposed on the barrier layer;
A cap metal or antiseptic portion provided on the aluminum wiring;
And a sidewall provided on a side portion of the aluminum wiring.

  ADVANTAGE OF THE INVENTION According to this invention, the semiconductor device which can prevent the passivation crack resulting from a temperature change appropriately, and its manufacturing method are obtained.

It is sectional drawing which shows the mechanism of a crack generation typically. It is sectional drawing which shows one Example of the semiconductor device 1 by this invention. It is sectional drawing of the semiconductor device by the comparative example which has a general passivation structure. It is sectional drawing which shows the semiconductor device 2 by the other Example of this invention. It is sectional drawing which shows the semiconductor device 3 by the other Example of this invention. It is sectional drawing which shows the semiconductor device 4 by the other Example of this invention. It is a figure which shows the flow of an example of the principal part of the manufacturing method of the semiconductor device by this invention.

  The best mode for carrying out the present invention will be described below with reference to the drawings.

  FIG. 2 is a sectional view showing an embodiment of the semiconductor device 1 according to the present invention. The semiconductor device 1 is preferably used in a control IC including a power MOSFET. The semiconductor device 1 is accommodated in a package (not shown). The use of the control IC for mounting the semiconductor device 1 is wide, and the use is not particularly limited.

  The cross section of the main part of the semiconductor device 1 of the present embodiment includes an interlayer insulating film 11, an uppermost aluminum wiring 12, an organic coating film 15, an interlayer barrier layer 16, a sidewall 17, and a cap metal 18.

  The uppermost aluminum wiring 12 is disposed on the interlayer barrier layer 16. The uppermost aluminum wiring 12 is preferably formed with an aluminum film thickness of 2 μm or more in order to reduce the ON resistance in the control IC including the power MOSFET.

  The interlayer barrier layer 16 is formed on the interlayer insulating film 11. The interlayer barrier layer 16 has a barrier function for protecting moisture and mobile ions from the outside from entering the region other than the uppermost aluminum wiring 12. In the illustrated example, the interlayer barrier layer 16 is formed over the entire surface of the interlayer insulating film 11. The interlayer barrier layer 16 is made of an appropriate material that can realize the function of preventing the entry of moisture and mobile ions from the outside, and is preferably made of a material such as SiN or SiON.

  The sidewalls 17 are formed on both sides of the uppermost aluminum wiring 12 in the lateral direction (direction perpendicular to the wiring longitudinal direction) on the interlayer barrier layer 16. The sidewall 17 has a function of maintaining high adhesion with the interlayer barrier layer 16 and preventing aluminum slide. The sidewall 17 is made of a suitable material capable of realizing such a function, and is preferably made of a relatively hard silicon compound material such as SiN or SiO.

  The cap metal 18 is formed on the top (upper surface) of the uppermost aluminum wiring 12. The cap metal 18 has a function of preventing moisture from entering the uppermost aluminum wiring 12 and accompanying aluminum corrosion. The cap metal 18 is formed of a material that can realize such a function and can release the stress of the uppermost aluminum wiring 12 to the organic coating film 15, and is preferably formed of a material such as TiN. In addition, the cap metal 18 may be replaced with aluminum oxide formed on the uppermost aluminum wiring 12, or may be formed of other soft materials (not hard materials such as silicon compounds).

  The organic coating film 15 is formed on the interlayer insulating film 11, the sidewall 17, and the cap metal 18 so as to form the uppermost layer of the semiconductor device 1. The organic coating film 15 is an organic coating film such as polyimide or PBO, and has elasticity.

  Here, a comparative example of the semiconductor device 1 of the present embodiment will be described with reference to FIG.

  FIG. 3 is a cross-sectional view of a semiconductor device according to a comparative example having a general passivation structure.

  The cross section of the main part of the semiconductor device of this comparative example is the interlayer insulating film 11, the uppermost aluminum wiring 12, the stress relaxation layer 13 for relaxing stress from the barrier layer 14, the barrier layer 14, and the organic coating film 15. With.

  In this comparative example, a stress relaxation layer 13 is provided between the uppermost aluminum wiring 12 and the barrier layer 14 in order to prevent the uppermost aluminum wiring 12 from cracking due to the stress from the barrier layer 14. However, as described above, in the structure according to the comparative example, when the chip area is large and the thickness of the aluminum wiring is relatively thick (for example, 2 μm or more), the barrier layer 14 and the like are cracked due to the stress caused by the temperature change. There is a problem that (passivation crack) occurs (see FIG. 1).

  On the other hand, according to the semiconductor device 1 of the present embodiment, the following operational effects can be obtained.

  Since a barrier layer corresponding to the barrier layer 14 of the comparative example is not disposed on the uppermost aluminum wiring 12, the stress generated in the uppermost aluminum wiring 12 due to a temperature change is caused by the organic coating film 15 on the uppermost aluminum wiring 12. Directly open to Thereby, even when the chip area is large and the thickness of the aluminum wiring is relatively thick (for example, 2 μm or more), the occurrence of passivation cracks can be prevented.

  Further, since the barrier layer corresponding to the barrier layer 14 of the comparative example is not disposed on the uppermost aluminum wiring 12, the stress from the barrier layer is eliminated, and the stress relaxing layer corresponding to the stress relaxing layer 13 of the comparative example is provided. The need to form can be eliminated. In this embodiment, the interlayer barrier layer 16 is disposed below the uppermost aluminum wiring 12. However, since the upper portion of the uppermost aluminum wiring 12 is an elastic organic coating film 15, the interlayer barrier layer 16. Stress is released to the organic coating film 15, and a stress relaxation layer is not required.

  In addition, since the uppermost aluminum wiring 12 is covered with the sidewall 17 and the upper portion is covered with the cap metal 18, moisture can be prevented from entering the uppermost aluminum wiring 12, and aluminum corrosion does not occur.

  In addition, aluminum slide can be suppressed by forming sidewalls 17 having high adhesion to the interlayer barrier layer 16 on the wiring sidewalls against lateral stress from the package due to temperature changes.

  FIG. 4 is a sectional view showing a semiconductor device 2 according to another embodiment of the present invention. The semiconductor device 2 of this embodiment is different from the semiconductor device 1 of the embodiment shown in FIG. 2 in that the interlayer barrier layer 16 below the uppermost aluminum wiring 12 is eliminated. According to such a structure, although it is disadvantageous in terms of the manufacturing process with respect to the semiconductor device 1 of the embodiment shown in FIG. 2 (for example, a step of removing a part of the interlayer barrier layer 16 is required), the interlayer Since no stress is generated between the barrier layer 16 and the uppermost aluminum wiring 12, the structure is advantageous.

  FIG. 5 is a sectional view showing a semiconductor device 3 according to another embodiment of the present invention. The semiconductor device 3 of the present embodiment is different from the semiconductor device 1 of the embodiment shown in FIG. 2 in that it has a lower layer aluminum wiring 19 and a contact 20. In practice, the semiconductor device 3 shown in FIG. 5 shows a configuration including an actual lower layer structure (a portion omitted in FIG. 2) in the semiconductor device 1 of the embodiment shown in FIG. is there. However, the semiconductor device 1 of the embodiment shown in FIG. 2 (the same applies to the semiconductor device 2 shown in FIG. 4) can also be realized as a single-layer aluminum wiring structure. In this case, a substrate (a silicon substrate or a glass substrate) is provided below the interlayer insulating film 11. As a formal replacement of terms, the interlayer barrier layer 16 becomes a barrier layer 16 that is not an “interlayer”, and the “uppermost aluminum wiring 12” becomes an aluminum wiring 12.

  FIG. 6 is a sectional view showing a semiconductor device 4 according to another embodiment of the present invention. The semiconductor device 4 of this embodiment has a lower layer aluminum wiring 19 and a contact 20 and a point that an antiseptic portion 21 is formed above the uppermost aluminum wiring 12 in place of the cap metal 18 in FIG. Different from the semiconductor device 1 of the illustrated embodiment.

  The antiseptic part 21 may be formed, for example, by performing an antiseptic process such as fluorine injection on the upper surface of the uppermost aluminum wiring 12.

  FIG. 7 is a flowchart showing an example of the main part of the method for manufacturing a semiconductor device according to the present invention. Here, a method for manufacturing the semiconductor device 3 shown in FIG. 5 will be described as a representative. The other semiconductor devices 1, 2, and 4 are the same or can be easily applied and changed by those skilled in the art, and thus description thereof is omitted.

  In step 700, the interlayer insulating film 11 in which the step of the lower aluminum wiring 19 is flattened is formed. The interlayer insulating film 11 is formed as a SiO film with a thickness of 700 nm by plasma CVD.

  In step 702, a SiN film is formed to a thickness of 300 nm on the interlayer insulating film 11 by plasma CVD. Thereby, the interlayer barrier layer 16 is formed.

  In step 704, the contact 20 is formed of a tungsten plug.

  In step 706, the uppermost aluminum wiring 12 is formed with a film thickness of 4 μm, and the cap metal 18 is formed with a film thickness of 50 nm from TiN.

  In step 708, the SiN film is grown by 700 nm by plasma CVD, and then anisotropic etching is performed to form the sidewall 17.

  In step 710, an organic coating film 15 as a package buffer film on the uppermost aluminum wiring 12 is formed with a thickness of 10 μm using polyimide.

  According to various embodiments according to the present invention described above, the following excellent effects can be obtained.

  According to the above-described various embodiments, it is possible to prevent passivation cracks and aluminum slides caused by a thermal process at the time of board mounting after assembly of the package and a temperature change in the market. In addition, the uppermost aluminum wiring 12 has corrosion resistance even under high humidity, and high reliability can be ensured.

  The preferred embodiments of the present invention have been described in detail above. However, the present invention is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the present invention. Can be added.

  For example, the configuration of the embodiment shown in FIGS. 5 and 6 can also be applied to the configuration of the embodiment shown in FIG. That is, the semiconductor device 2 shown in FIG. 4 may also have the lower layer aluminum wiring 19 and the contact 20, and the antiseptic portion 21 is formed above the uppermost layer aluminum wiring 12 instead of the cap metal 18. May be.

1-4 Semiconductor Device 11 Interlayer Insulating Film 12 Uppermost Layer Aluminum Wiring 13 Stress Relaxation Layer 14 Barrier Layer 15 Organic Coating Film 16 Interlayer Barrier Layer 17 Side Wall 18 Cap Metal 19 Lower Layer Aluminum Wiring 20 Contact 21 Antiseptic Treatment Section

Claims (3)

An insulating film;
A barrier layer formed on the insulating film;
Aluminum wiring provided on the barrier layer or the insulating film;
A cap metal or antiseptic portion provided on the aluminum wiring;
And a sidewall provided on a side portion of the aluminum wiring.   The semiconductor device according to claim 1, wherein the aluminum wiring is provided in a region of the insulating film where the barrier layer does not exist so that the barrier layer is not interposed between the aluminum wiring and the insulating film. Forming a barrier layer on the insulating film;
Forming an aluminum wiring on the barrier layer or the insulating film;
Forming a cap metal or an antiseptic part on top of the aluminum wiring;
Forming a sidewall on a side portion of the aluminum wiring.