JP2011077450A - Thin film transistor and method of manufacturing thin film transistor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the instability of TFT (Thin Film Transistor) characteristics caused by to water, and to improve initial characteristics of a TFT. <P>SOLUTION: The thin film transistor includes a gate electrode formed on a substrate, a gate insulating layer formed covering the gate electrode, an active layer formed on the gate insulating layer and formed of an oxide semiconductor, a source electrode and a drain electrode formed apart from each other between the active layer and the gate insulating layer or on the active layer, an organic monomolecular film with a hydrophobic property which covers an upper surface of the active layer covered with neither the source electrode nor the drain electrode, and a protective layer formed on the organic monomolecular film on the active layer. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a thin film transistor and a method for manufacturing the thin film transistor.

  In recent years, a thin film transistor (TFT) using an oxide semiconductor material for an active layer has been developed. In particular, as a transparent oxide semiconductor material, an IGZO-based oxide semiconductor, that is, an oxide semiconductor containing In, Ga, and Zn (hereinafter referred to as IGZO) has attracted attention. IGZO is not only transparent, but it can form amorphous IGZO at room temperature by sputtering. Even if it is amorphous, it has excellent transistor characteristics such as higher carrier mobility than amorphous silicon (hereinafter TFT characteristics) Have been reported to have).

  However, oxide semiconductor materials (particularly amorphous IGZO) are known to be unstable with respect to water and the surrounding atmosphere. Specifically, in a TFT using this oxide semiconductor as an active layer, water and oxygen are adsorbed on the active layer and the conductivity changes, resulting in a change in threshold voltage and off-current, resulting in poor TFT characteristics. It becomes stable. Therefore, when an oxide semiconductor is used as the active layer, it is necessary to ensure the stability of the TFT characteristics.

  Further, as the initial characteristics of the TFT characteristics, “normally off characteristics” are preferred in which no current flows (off current is small) when no gate voltage is applied. Further, since the off-current increases as the leakage current increases, it is also desirable that the leakage current be low.

Therefore, in Patent Document 1, in order to improve instability of TFT characteristics, an organic film such as a polyimide film or a silicone film or a metal film such as Al ₂ O ₃ or Ga ₂ O ₃ is formed on the amorphous IGZO layer (active layer). It has been proposed to form a protective layer comprising:

  In Patent Document 2, a protective layer made of a silane compound such as octyltriethoxysilane (OTES) that chemically adsorbs to the surface of the IGZO layer is formed on the amorphous IGZO layer (active layer) in order to suppress the influence particularly on water. It has been proposed to do.

JP 2007-73705 A JP 2007-158146 A

However, in patent document 1, the water which passed the protective layer cannot be prevented. Further, when the protective layer (organic film) is made of a photosensitive resin, it is necessary to prevent water coming out of the photosensitive resin. Furthermore, it is also proposed to form a protective layer comprising two layers of an organic film such as a polyimide film and a silicone film and a metal oxide film such as Al ₂ O ₃ and Ga ₂ O ₃ on the amorphous IGZO layer (active layer). However, the point that the organic film is composed of an organic monomolecular film and the point that a protective layer, in particular, a photosensitive resin is formed on the organic monomolecular film are not described. There is no improvement.

  Similarly, in Patent Document 2, although the protective layer is composed of a silane compound that can be an organic monomolecular film, the initial characteristics of the TFT are not improved. Further, when the protective layer is composed only of the silane compound, the patterning cannot be performed, and an unnecessary silane compound remains on the source electrode, the drain electrode, and the like. As a result, it becomes an obstacle when the wiring is drawn out from the source electrode and the drain electrode.

  An object of the present invention is to provide a thin film transistor capable of improving instability of TFT characteristics due to water and improving initial characteristics of the TFT, and a method of manufacturing the thin film transistor.

  The above-described problems of the present invention have been solved by the following means.

<1> a gate electrode formed on the substrate, a gate insulating layer formed so as to cover the gate electrode, an active layer made of an oxide semiconductor formed on the gate insulating layer, and the active layer, A source electrode and a drain electrode formed between the gate insulating layers or on the active layer so as to be spaced apart from each other, and a hydrophobicity covering an upper surface of the active layer not covered with the source electrode and the drain electrode A thin film transistor having an organic monomolecular film having a protective layer formed on the organic monomolecular film on the active layer.
<2> The thin film transistor according to <1>, wherein the protective layer is made of a photosensitive resin.
<3> The thin film transistor according to <1> or <2>, wherein the organic monomolecular film is composed of an organosilane compound.
<4> The thin film transistor according to any one of <1> to <3>, wherein the oxide semiconductor is an oxide containing at least one of In, Ga, and Zn.
<5> A step of forming a gate electrode on the substrate, a step of forming a gate insulating layer so as to cover the gate electrode, an active layer made of an oxide semiconductor, a source electrode, and a drain electrode on the gate insulating layer Forming a hydrophobic organic monomolecular film on at least the active layer, forming a protective layer on the organic monomolecular film formed on the active layer, and Forming a protective layer, and then performing a heat treatment.
<6> The method for producing a thin film transistor according to <5>, wherein a photosensitive resin is used as a constituent material of the protective layer.
<7> The method for producing a thin film transistor according to <6>, further comprising a step of removing the organic monomolecular film on the source electrode and the drain electrode after forming the protective layer.
<8> The method for producing a thin film transistor according to <6> or <7>, wherein the temperature of the heat treatment is 100 ° C. or higher and 200 ° C. or lower.
<9> The method for producing a thin film transistor according to any one of <5> to <8>, wherein the organic monomolecular film is formed using an organosilane compound.
<10> The method for producing a thin film transistor according to any one of <5> to <9>, wherein an oxide containing at least one of In, Ga, and Zn is used as a constituent material of the oxide semiconductor.

  According to the present invention, it is possible to provide a thin film transistor and a method for manufacturing the thin film transistor that can improve instability of TFT characteristics due to water and can improve the initial characteristics of the TFT.

It is a thin film transistor which concerns on embodiment of this invention, Comprising: It is a schematic diagram which shows an example of a top contact type | mold with a reverse stagger structure. It is a thin film transistor which concerns on embodiment of this invention, Comprising: It is a schematic diagram which shows an example of a bottom contact type | mold with an inverted staggered structure. FIG. 6 is a schematic diagram showing another example of a top contact type with an inverted stagger structure, which is a thin film transistor according to an embodiment of the present invention. It is a figure which shows an example of the manufacturing method of TFT which concerns on embodiment of this invention, and is specifically process drawing concerning the manufacturing method of TFT shown in FIG. FIG. 4 is a diagram showing a method of drawing wiring from source / drain electrodes in the TFT shown in FIG. 3. It is a figure which showed the measurement result of the TFT initial characteristic (Vg-Id characteristic) in TFT2, comparative TFT1, comparative TFT3, and comparative TFT4, and was able to compare the TFT initial characteristic in the same baking temperature. It is a figure which showed the measurement result of the TFT initial characteristic (Vg-Id characteristic) in TFT1 and TFT2, and was able to confirm the change of the TFT initial characteristic by baking temperature.

  Hereinafter, an embodiment of a thin film transistor and a method for manufacturing the thin film transistor of the present invention will be described with reference to the drawings. Note that components having substantially the same functions are described with the same reference numerals throughout the drawings, and description thereof may be omitted in some cases.

<1. Thin Film Transistor (TFT)>
A TFT according to an embodiment of the present invention includes at least a gate electrode, a gate insulating layer, an active layer, a source electrode, and a drain electrode, applies a voltage to the gate electrode, controls a current flowing through the active layer, and It is an active element having a function of switching a current between the electrode and the drain electrode.

  If the TFT element structure is a so-called inverted stagger structure (also referred to as a bottom gate type) based on the position of the gate electrode, the active layer, the source electrode, and the drain electrode (referred to as “source / drain electrodes” as appropriate). Any of a so-called top contact type and bottom contact type based on the contact portion with the contact point may be used.

  Note that the bottom gate type is a mode in which a gate electrode is disposed below a gate insulating layer and an active layer is formed above the gate insulating layer. The bottom contact type is a mode in which the source / drain electrodes are formed before the active layer and the lower surface of the active layer is in contact with the source / drain electrodes. The top contact type is the type in which the active layer is the source / drain. In this embodiment, the upper surface of the active layer is in contact with the source / drain electrodes.

A TFT according to an embodiment of the present invention includes a hydrophobic organic monomolecular film covering an upper surface of the active layer that is not covered with the source electrode and the drain electrode, and the organic monomolecular film on the active layer. And a protective layer formed thereon.
Preferably, the protective layer is made of a photosensitive resin.
Preferably, the organic monomolecular film is composed of an organosilane compound.
Preferably, the oxide semiconductor is an oxide containing at least one of In, Ga, and Zn.

1) Structure Next, the structure of the TFT according to the embodiment of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a schematic view showing an example of a top contact type with an inverted stagger structure, which is a thin film transistor according to an embodiment of the present invention. The TFT 10 shown in FIG. 1 has a gate electrode 14, a gate insulating layer 16, and an active layer 18 stacked in order on a substrate 12, and a source electrode 20 and a drain electrode 22 are formed on the surface of the active layer 18. They are set apart from each other. Furthermore, the organic monomolecular film whose upper surface of the active layer 18 is not in contact with the source electrode 20 and the drain electrode 22 and is not covered with the source / drain electrodes 20 and 22 (between the source electrode 20 and the drain electrode 22) is hydrophobic. 24 and the protective layer 26 are sequentially covered.

According to this configuration, water that has passed through the protective layer 26 can be prevented by the organic monomolecular film 24 having hydrophobicity before reaching the active layer 18. In particular, when the protective layer 26 is made of a photosensitive resin, it is possible to prevent water coming out of the photosensitive resin. Therefore, instability of TFT characteristics due to water can be improved.
In the case of a configuration in which the active layer as in Patent Document 1 is covered only with a protective layer or only with an organic monomolecular film as in Patent Document 2, the TFT initial characteristics (for example, no (Mary-off characteristics) cannot be improved, but according to the configuration of this embodiment, the initial TFT characteristics can be greatly improved.
In particular, regarding the threshold voltage, even if the active layer is covered only with the protective layer or only with the organic monomolecular film, the organic monomolecular film and the protective layer are not improved in spite of no improvement (threshold voltage is shifted to 0V side). It has a remarkable effect that it can be improved by combining.
Furthermore, since the organic monomolecular film is sticky, the adhesion between the protective layer and the active layer can be improved by sandwiching the organic monomolecular film between the protective layer and the active layer.

  FIG. 2 is a schematic diagram showing an example of a bottom contact type with an inverted stagger structure, which is a thin film transistor according to an embodiment of the present invention. The TFT 30 shown in FIG. 2 has a gate electrode 34 and a gate insulating layer 36 sequentially stacked on a substrate 32, and the source electrode 38 and the drain electrode 40 are separated from each other on the surface of the gate insulating layer 36. Installed. An active layer 42 is stacked on the gate insulating layer 36, the source electrode 38, and the drain electrode 40. Further, at least the upper surface of the active layer 42 not covered with the source / drain electrodes 38 and 40 is sequentially covered with the organic monomolecular film 44 and the protective layer 46.

  According to this configuration, as in the structure shown in FIG. 1, the instability of TFT characteristics due to water can be improved, and the initial characteristics of the TFT can be improved.

  FIG. 3 is a schematic diagram showing another example of a top contact type with an inverted staggered structure, which is a thin film transistor according to an embodiment of the present invention. A TFT 50 shown in FIG. 3 has a gate electrode 54, a gate insulating layer 56, and an active layer 58 having a two-layer structure of a low resistance layer 58a and a high resistance layer 58b, which are sequentially stacked on a substrate 52. A source electrode 60 and a drain electrode 62 are spaced apart from each other on the surface of the active layer 58. Furthermore, the upper surface of the active layer 58 that is not in contact with the source electrode 60 and the drain electrode 62 and is not covered with the source / drain electrodes 60 and 62 (between the source electrode 60 and the drain electrode 62) is the organic monomolecular film 64 and the protective layer. 66 are sequentially covered.

  According to this configuration, as in the structure shown in FIG. 1, the instability of TFT characteristics due to water can be improved, and the initial characteristics of the TFT can be improved.

  Hereinafter, the respective configurations of the thin film transistor according to the embodiment of the present invention will be specifically described with reference numerals omitted, but the description can be applied to the respective configurations of the TFTs 10, 30, and 50 shown in FIGS. .

2) Substrate The substrate used in this embodiment is not particularly limited. For example, glass, inorganic materials such as YSZ (zirconia stabilized yttrium), polyester such as polyethylene terephthalate, polybutylene terephthalate, and polyethylene naphthalate. And organic materials such as polystyrene, polycarbonate, polyethersulfone, polyarylate, allyl diglycol carbonate, polyimide, polycycloolefin, norbornene resin, and synthetic resin such as poly (chlorotrifluoroethylene). In the case of the said organic material, it is preferable that it is excellent in heat resistance, dimensional stability, solvent resistance, electrical insulation, workability, low air permeability, or low hygroscopicity.

  In this embodiment, a flexible substrate is particularly preferably used. The material used for the flexible substrate is preferably an organic plastic film having a high transmittance. For example, polyesters such as polyethylene terephthalate, polybutylene phthalate, and polyethylene naphthalate, polystyrene, polycarbonate, polyethersulfone, polyarylate, polyimide, polycyclo Plastic films such as olefin, norbornene resin, or poly (chlorotrifluoroethylene) can be used. In addition, if the insulation property is insufficient for the film-like plastic substrate, the insulation layer, the gas barrier layer for preventing the transmission of water and oxygen, the flatness of the film-like plastic substrate and the adhesion with the electrode and the insulation layer It is also preferable to provide an undercoat layer or the like for improvement.

  Here, the thickness of the flexible substrate is preferably 50 μm or more and 500 μm or less. This is because it is difficult for the substrate itself to maintain sufficient flatness when the thickness of the flexible substrate is less than 50 μm. Further, when the thickness of the flexible substrate is more than 500 μm, it is difficult to bend the substrate itself freely, that is, the flexibility of the substrate itself is poor.

3) Gate electrode Examples of the gate electrode include metals such as Al, Mo, Cr, Ta, Ti, Au, and Ag, alloys such as Al—Nd and Ag—Pd—Cu, tin oxide, zinc oxide, indium oxide, Preferable examples include metal oxide conductive films such as indium tin oxide (ITO) and zinc indium oxide (IZO), organic conductive compounds such as polyaniline, polythiophene, and polypyrrole, or mixtures thereof.
The thickness of the gate electrode is preferably 10 nm or more and 1000 nm or less. More preferably, they are 20 nm or more and 500 nm or less, More preferably, they are 40 nm or more and 100 nm or less.

4) As the gate insulating layer gate insulating _{layer, SiO 2, SiN x, SiON} , Al 2 O 3, Y 2 O 3, Ta 2 O 5, or at least two insulator such as HfO _2, or a compound thereof The mixed crystal compound containing the above is used. A polymer insulator such as polyimide can also be used as the gate insulating layer.

The thickness of the gate insulating layer is preferably 10 nm or more and 1000 nm or less. More preferably, they are 50 nm or more and 500 nm or less, More preferably, they are 100 nm or more and 200 nm or less. The gate insulating layer needs to be thick to some extent in order to reduce leakage current and increase voltage resistance. However, increasing the thickness of the gate insulating layer results in an increase in the driving voltage of the TFT. Therefore, it is more preferable that the film thickness of the gate insulating layer is 50 nm to 1000 nm for an inorganic insulator and 0.5 μm to 5 μm for a polymer insulator. In particular, it is particularly preferable to use a high dielectric constant insulator such as HfO ₂ for the gate insulating layer because the TFT can be driven at a low voltage even if the film thickness is increased.

5) Active layer <Material>
As the active layer, an oxide semiconductor is used, and an amorphous oxide semiconductor is preferably used. When the active layer is formed of an oxide semiconductor, the charge mobility is much higher than that of the amorphous silicon active layer, and the active layer can be driven at a low voltage. In addition, when an oxide semiconductor is used, an active layer having a light transmittance higher than that of silicon can be generally formed. An oxide semiconductor, particularly an amorphous oxide semiconductor, can be uniformly formed at a low temperature (for example, room temperature), and thus is particularly advantageous when a flexible resin substrate 2 such as a plastic is used.

Conventionally known oxide semiconductors are included as oxide semiconductors. For example, oxides of transition metals such as In, Ti, Nb, Sn, Zn, Gd, Cd, Zr, Y, La, Ta, SrTiO ₃ , and CaTiO. ₃ , oxides such as ZnO.Rh ₂ O ₃ , CuGaO ₂ , and SrCu ₂ O ₂ .
As described above, the oxide semiconductor used for the active layer is not particularly limited, but an oxide containing at least one of In, Sn, Zn, Ga, and Cd is preferable, and In, Sn, Zn, and An oxide containing at least one of Ga is more preferable, and an oxide containing at least one of In, Ga, and Zn (for example, an In—O system) is more preferable.
In particular, an oxide containing at least two of In, Ga, and Zn (eg, an In—Zn—O system, an In—Ga—O system, and a Ga—Zn—O system) is preferable, and all of In, Ga, and Zn are used. The oxide containing is more preferable. As the In—Ga—Zn—O-based oxide semiconductor, an oxide semiconductor whose composition in a crystal state is represented by InGaO ₃ (ZnO) _m (m is a natural number less than 6) is preferable, and InGaZnO ₄ is particularly preferable. . As a feature of the oxide semiconductor having this composition, the electron mobility tends to increase as the electrical conductivity increases.
However, the composition ratio of IGZO does not have to be strictly In: Ga: Zn = 1: 1: 1. Moreover, the active layer should just contain the above oxide semiconductors as a main component, and may contain impurities other than that. Here, the “main component” represents the most abundant component among the components constituting the active layer.

<Electrical conductivity>
Here, the electric conductivity is a physical property value indicating the ease of electric conduction of the substance. When the carrier concentration n of the substance and the carrier mobility μ are given, the electric conductivity σ of the substance is expressed by the following formula.
σ = neμ
When the active layer is an n-type semiconductor, the carriers are electrons, the carrier concentration indicates the electron carrier concentration, and the carrier mobility indicates the electron mobility. Similarly, when the active layer is a p-type semiconductor, the carrier is a hole, the carrier concentration indicates the hole carrier concentration, and the carrier mobility indicates the hole mobility. The carrier concentration and carrier mobility of the substance can be obtained by Hall measurement.
The electrical conductivity can be obtained by measuring the sheet resistance of a film whose thickness is known. Although the electrical conductivity of a semiconductor changes with temperature, the electrical conductivity in this specification indicates the electrical conductivity at room temperature (20 ° C.).

The electrical conductivity of the active layer is preferably higher in the vicinity of the gate insulating layer than in the vicinity of the drain electrode and the source electrode of the active layer. More preferably, the ratio of the electrical conductivity in the vicinity of the gate insulating layer to the electrical conductivity in the vicinity of the drain electrode and the source electrode (the electrical conductivity in the vicinity of the gate insulating layer / the electrical conductivity in the vicinity of the drain electrode and the source electrode) is preferably 10 ¹ or more and 10 ¹⁰ or less, more preferably 10 ² or more and 10 ⁸ or less. Preferably, the electrical conductivity in the vicinity of the interface of the gate insulating layer of the active layer is 10 ⁻⁴ Scm ⁻¹ or more and less than 10 ² Scm ⁻¹ , more preferably 10 ⁻¹ Scm ⁻¹ or more and less than 10 ² Scm ^−1. .

The layer structure of the active layer may be composed of two or more layers. For example, as shown in FIG. 3, the active layer 58 is formed of a low resistance layer 58a and a high resistance layer 58b, and the low resistance layer 58a is gate-insulated. The high resistance layer 58 b is preferably in contact with at least one of the source electrode 60 and the drain electrode 62 in contact with the layer 56. More preferably, the ratio of the electrical conductivity of the low resistance layer 58a to the electrical conductivity of the high resistance layer 58b (the electrical conductivity of the low resistance layer 58a / the electrical conductivity of the high resistance layer 58b) is 10 ¹ or more and 10 ¹⁰ or less, still more preferably 10 ² to 10 ^8.
The electrical conductivity of the low resistance layer 58a is preferably 10 ⁻⁴ Scm ⁻¹ or more and less than 10 ² Scm ⁻¹ , more preferably 10 ⁻¹ Scm ⁻¹ or more and less than 10 ² Scm ⁻¹ . The electrical conductivity of the high resistance layer 58b is preferably 10 ⁻¹ Scm ⁻¹ or less, more preferably 10 ⁻⁹ Scm ⁻¹ or more and 10 ⁻³ Scm ⁻¹ or less.

When an active layer having a two-layer structure is formed using an oxide semiconductor such as IGZO as described above, a TFT having a high mobility of 10 cm ² / (V · sec) or more and an ON / OFF ratio of 10 ⁶ or more. The transistor characteristics can be realized, and the voltage can be further reduced.

  As described above, the active layer is preferably adjusted so that the electric conductivity is larger in the vicinity of the gate insulating layer than in the vicinity of the drain electrode and the source electrode of the active layer. In the case where the active layer is formed of an oxide semiconductor, the following means can be given as means for adjusting electric conductivity.

(1) Adjustment by oxygen defect It is known that when an oxygen defect is formed in an oxide semiconductor, carrier electrons are generated and electric conductivity is increased. Therefore, the electric conductivity of the oxide semiconductor can be controlled by adjusting the amount of oxygen defects. Specific methods for controlling the amount of oxygen defects include oxygen partial pressure during film formation, oxygen concentration and treatment time during post-treatment after film formation, and the like. Specific examples of post-treatment include heat treatment at 100 ° C. or higher, oxygen plasma, UV ozone treatment, and the like. Among these methods, a method of controlling the oxygen partial pressure during film formation is preferable from the viewpoint of productivity. By adjusting the oxygen partial pressure during film formation, the electrical conductivity of the oxide semiconductor can be controlled.

(2) Adjustment by composition ratio Electrical conductivity can be changed by changing the metal composition ratio of the oxide semiconductor. For example, in InGaZn _1-X Mg _X O ₄ , the electrical conductivity decreases as the Mg ratio increases. In addition, in the oxide system of (In ₂ O ₃ ) _1-X (ZnO) _X , it is reported that when the Zn / In ratio is 10% or more, the electrical conductivity decreases as the Zn ratio increases. ("New development of transparent conductive film II", CMC Publishing, pages 34-35). As a specific method for changing these composition ratios, for example, in a film formation method by sputtering, a method using targets having different composition ratios may be mentioned. Alternatively, it is possible to change the composition ratio of the film by co-sputtering with a multi-target and adjusting the sputtering rate individually.

(3) Adjustment by impurities By adding an element such as Li, Na, Mn, Ni, Pd, Cu, Cd, C, N, or P to an oxide semiconductor as an impurity, the electron carrier concentration is reduced. It is possible to reduce the electrical conductivity.
As a method for adding an impurity, an oxide semiconductor and an impurity element are co-evaporated, an ion of the impurity element is added to the formed oxide semiconductor film by an ion doping method, or the like.

(4) Adjustment by oxide semiconductor material In the above (1) to (3), the method for adjusting the electric conductivity in the same oxide semiconductor system has been described. Of course, the electric conductivity can be changed by changing the oxide semiconductor material. You can change the degree. For example, it is generally known that a SnO ₂ oxide semiconductor has a lower electrical conductivity than an In ₂ O ₃ oxide semiconductor. By changing the oxide semiconductor material in this manner, the electric conductivity can be adjusted.

<Thickness of active layer>
The thickness of the active layer is preferably 1 nm or more and 100 nm or less, and more preferably 2.5 nm or more and 50 nm or less.
When the active layer has a two-layer structure of a low resistance layer and a high resistance layer, the thickness of the low resistance layer is preferably 0.1 nm or more and 100 nm, more preferably 1 nm or more and 50 nm, and still more preferably 2 nm or more. 10 nm or less. The thickness of the high resistance layer is preferably 1 nm or more and 100 nm or less, preferably 5 nm or more and 50 nm or less, and more preferably 10 nm or more and 20 nm or less.
The film thickness of the active layer can be measured by HRTEM (High Resolution TEM) photography of the fabricated device cross section.

6) Source electrode and drain electrode Examples of source electrode and drain electrode materials include metals such as Al, Mo, Cr, Ta, Ti, Au, and Ag, alloys such as Al-Nd and APC, tin oxide, and zinc oxide. Preferable examples include metal oxide conductive films such as indium oxide, indium tin oxide (ITO), and zinc indium oxide (IZO), organic conductive compounds such as polyaniline, polythiophene, and polypyrrole, or a mixture thereof. Particularly preferred is IZO.
The thickness of the source electrode and the drain electrode is preferably 10 nm or more and 1000 nm or less. More preferably, they are 20 nm or more and 500 nm or less, More preferably, they are 40 nm or more and 100 nm or less.

7) Organic monolayer <Material>
The organic monomolecular film of the present embodiment may be one that can coat the surface of the active layer by chemical adsorption or physical adsorption and has hydrophobicity. For example, alkylthiols (for example, octylthiol), Chemical adsorption materials such as aryl thiols (for example, pentafluorophenyl thiol) and surfactants (anionic activators, cationic activators, nonionic activators) can be used. In this embodiment, organosilane compounds are used. Is preferred.

  The “monomolecular film” means “self-assembled monomolecular film” and can be formed, for example, by bringing an organosilane compound into contact with the active layer surface. “Self-assembled monolayer” refers to a compound having a functional group capable of binding to a constituent atom (for example, the hydroxyl group) on the surface of the active layer (for example, an organic silane compound having a trichlorosilyl group or the like in an organic molecule) A dense and sticky single molecule formed with the functional group adsorbed or bonded to the constituent atoms on the surface of the active layer by coexisting with the surface of the active layer in the state of gas or liquid, and the linear molecule facing outward It is a membrane. Since this monomolecular film is formed by spontaneous chemical adsorption of the compound on the active layer surface, it is called a self-assembled monomolecular film (SAM film).

  The term “having hydrophobicity” specifically refers to an organic monomolecular film having an alkyl group such as a methyl group or an ethyl group or a hydrophobic group such as a phenyl group.

  Therefore, the organic silane compound is a compound having a functional group capable of binding to the active layer surface, and a so-called silane coupling agent is preferable.

  As these organic silane compounds, silane coupling agents are preferable, and silane coupling agents composed of alkylsilanes and alkyldisilazanes are preferable. In these silane coupling agents, groups having reactivity with the surface of the active layer such as halogenosilane and alkoxysilane as well as the terminal alkyl group are substituted, and chemically bonded to the surface of the active layer, the SAM A film is formed.

  Examples of these alkylsilanes and alkyldisilazanes include methyltriethoxysilane, ethyltriethoxysilane, dimethyldiethoxysilane, dimethyldimethoxysilane, isopropyltrimethoxysilane, isopropyltriethoxysilane, butyltrimethoxysilane, and octyltriethoxy. Silane, octadecyltriethoxysilane, trimethylethoxysilane, etc., methyltrichlorosilane, ethyltrichlorosilane, dimethylchlorosilane, dimethyldichlorosilane, isopropyltrichlorosilane, isopropyltrichlorosilane, butyltrichlorosilane, octyltrichlorosilane, trimethylchlorosilane, octadecyltri Chlorosilane and other alkyldisilazane compounds such as hexamethyldisilazane And the like.

  Specifically, a silicon compound reagent manufactured by Shin-Etsu Chemical Co., Ltd., or Gelest, Inc. of the United States. Alkylsilanes and alkyldisilazanes may be selected from those described in compound catalogs such as Metal-Organics for Material & Polymer Technology, Chisso SILICON CHEMICALS, and the like.

In particular, octyltriethoxysilane (OTES), octyltrichlorosilane (OTS), and hexamethyldisilazane (HMDS) are preferable hydrophobizing agents. For example, HMDS (hexamethyldisilazane) is a compound having the structural formula of (CH ₃ ) ₃ SiNHSi (CH ₃ ) ₃ and can be generally obtained by allowing ammonia to act on chlorotrimethylsilane. It is a colorless liquid.

<Thick film of organic monolayer>
The thickness of the organic monomolecular film is usually about 0.1 nm or more and about 100 nm, for example, around 1 nm, although it depends on the constituting polymer.
The film thickness of the organic monomolecular film can be measured by HRTEM (High Resolution TEM) photography of the cross section of the produced element.

As the material constituting the 8) protective layer protective _{layer, SiO 2, SiO, MgO,} Al 2 O 3, GeO, NiO, CaO, BaO, ZnO, SrO, Fe 2 O 3, Y 2 O 3, ZrO 2, _{CeO 2, Li 2 O, Na} 2 O, K 2 O, Rb 2 O, Sc 2 O 3, La 2 O 3, Nd 2 O 3, Sm 2 O 3, Gd 2 O 3, Dy 2 O 3, Er _{2 O 3, Yb 2 O 3} , Ta 2 O 5, Nb 2 O 5, HfO 2 Ga 2 O 3, in 2 O 3 or TiO metal oxide such as _2, SiN x, metal nitrides such as _SiN x _{O y} And inorganic materials such as metal fluorides such as MgF ₂ , LiF, AlF ₃ , or CaF ₂ . Moreover, organic materials, such as a polyimide and an acrylic resin, can also be used.
And preferably, a resin material is used as a material constituting the protective layer, and an acrylic resin, an epoxy resin, a fluorine resin, a silicon resin, a rubber resin, an ester resin, or the like can be used. More preferably, it is a photosensitive resin or a thermosetting resin, and is a resin that can be patterned by a lithography method.

  The thickness of the protective layer is preferably 1 μm or more and 1 mm or less. More preferably, they are 5 micrometers or more and 100 micrometers or less, Most preferably, they are 10 micrometers or more and 50 micrometers or less.

<2. Manufacturing Method of Thin Film Transistor (TFT)>
Next, a method for manufacturing a TFT according to an embodiment of the present invention will be described.
A method of manufacturing a TFT according to an embodiment of the present invention includes a step of forming a gate electrode on a substrate, a step of forming a gate insulating layer so as to cover the gate electrode, and an oxide semiconductor on the gate insulating layer. A step of forming an active layer, a source electrode and a drain electrode, a step of forming an organic monomolecular film having hydrophobicity on at least the active layer, and the organic monomolecular film formed on the active layer A step of forming a protective layer thereon, and a step of heat-treating after forming the protective layer.

Preferably, a photosensitive resin is used as a constituent material of the protective layer.
Preferably, the method includes a step of removing the organic monomolecular film on the source electrode and the drain electrode after forming the protective layer.
Preferably, the temperature of the heat treatment is 100 ° C. or higher and 200 ° C. or lower.
Preferably, the organic monomolecular film is formed using an organosilane compound.
Preferably, an oxide containing at least one of In, Ga, and Zn is used as a constituent material of the oxide semiconductor.

Next, a method for manufacturing a TFT according to an embodiment of the present invention will be described in detail with reference to the drawings.
FIG. 4 is a diagram showing an example of a manufacturing method of the TFT according to the embodiment of the present invention, specifically, a process chart related to the manufacturing method of the TFT 50 shown in FIG. Although description of the manufacturing method of the TFT 10 shown in FIG. 1 and the TFT 30 shown in FIG. 2 is omitted, it can be manufactured in the same manner as described below.

9) Formation of Gate Electrode First, the gate electrode 54 is formed on the substrate 52 (FIG. 4A). The film formation method of the gate electrode 54 is not particularly limited, and is a wet method such as a printing method and a coating method, a physical method such as a vacuum deposition method, a sputtering method, and an ion plating method, CVD, and plasma CVD. It can be formed on the substrate 52 in accordance with a method appropriately selected in consideration of suitability with the material from among chemical methods such as methods. For example, when ITO is selected, it can be performed according to a direct current or high frequency sputtering method, a vacuum deposition method, an ion plating method, or the like. Further, when an organic conductive compound is selected as the material of the gate electrode 54, it can be performed according to a wet film forming method.
After film formation, patterning is performed into a predetermined shape by photolithography. At this time, it is preferable to pattern the gate electrode 54 and the gate wiring (not shown) at the same time.
Further, patterning may be performed together with film formation through a metal mask (shadow mask) having an opening corresponding to the pattern of the gate electrode 54 to be formed.

10) Formation of Gate Insulating Layer After the gate electrode 54 is formed over the substrate 52, a gate insulating layer 56 that covers the gate electrode 54 is formed (FIG. 4B). The gate insulating layer 56 is a material used from a printing method, a wet method such as a coating method, a physical method such as a vacuum deposition method, a sputtering method, or an ion plating method, or a chemical method such as a CVD method or a plasma CVD method. The film is formed in accordance with a method selected in consideration of the suitability of the film and patterned into a predetermined shape by a photolithography method as necessary.

11) Formation of Active Layer Next, the low resistance layer 58a and the high resistance layer 58b are sequentially formed on the gate insulating layer 56 to form the active layer 58 (FIGS. 4C and 4D).

As a method for forming the active layer 58 (the low resistance layer 58a and the high resistance layer 58b), it is preferable to use a vapor phase film formation method with a polycrystalline sintered body of an oxide semiconductor as a target. Among vapor deposition methods, sputtering and pulsed laser deposition (PLD) are suitable. Furthermore, the sputtering method is preferable from the viewpoint of mass productivity. For example, the film is formed by controlling the degree of vacuum and the oxygen flow rate by RF magnetron sputtering deposition.
In addition, as a means for adjusting electrical conductivity during film formation, the above methods (1) to (4) may be used alone or in combination. Further, after film formation, patterning or heat treatment by etching or the like is appropriately performed.

  The formed film can be confirmed in crystal state by a well-known X-ray diffraction method. Further, the composition ratio of the formed film is obtained by RBS (Rutherford backscattering) analysis.

12) Formation of source / drain electrodes After the active layer 58 is formed, the source / drain electrodes 60, 62 are formed so as to be conductive through the active layer 58 with a gap between the electrodes (FIG. 4). (E)).

  The formation method of the source / drain electrodes 60 and 62 is not particularly limited, and may be a printing method, a wet method such as a coating method, a physical method such as a vacuum deposition method, a sputtering method, or an ion plating method, a CVD method, a plasma CVD method, or the like. A film may be formed according to a method selected from chemical methods and the like in consideration of suitability for the material. For example, when ITO is selected, the film can be formed according to a direct current or high frequency sputtering method, a vacuum deposition method, an ion plating method, or the like. Further, when an organic conductive compound is selected as the material of the source / drain electrodes 60 and 62, it can be performed according to a wet film forming method.

  The source / drain electrodes 60 and 62 may be patterned by, for example, a method of patterning together with a film through a metal mask (shadow mask) having an opening corresponding to the pattern to be formed, and photolithography after the film formation. Examples thereof include a patterning method by a method and an etching method, and a patterning method by a lift-off method.

13) Formation of Organic Monomolecular Film After the source / drain electrodes 60 and 62 are formed, an organic monomolecular film 64 having hydrophobicity is formed at least on the active layer 58 (FIG. 4F).
The organic monomolecular film 64 is formed by applying the above-described hydrophobizing agent to the screen printing method or the inkjet printing method, for example, using a spin coat method or various coaters, a dipping method, a spray method, a dropping method, Various solution processes such as the Langmuir / Blodgett method may be applied to the active layer, followed by washing and drying. In particular, a wet method in which a solution of a hydrophobizing agent is applied to the active layer 58 and dried is preferable. For example, HMDS as a hydrophobizing agent is applied on the active layer and dried (hereinafter referred to as HMDS treatment).

  In addition, a reactive gas containing a hydrophobizing agent is supplied onto the active layer 58 heated in the range of 50 to 500 ° C., under a reduced pressure of 0.01 to 100 Pa using a thermal CVD method, a discharge gas, or a reactive gas. It may be formed on the active layer 58 using a plasma CVD method to be performed, or preferably an atmospheric pressure plasma CVD method to be performed at a substantially atmospheric pressure of 93 to 104 kPa.

  In addition, after application | coating of a hydrophobization processing agent, although heat processing is normally performed for drying, you may dry at normal temperature, and after forming the protective layer 66 mentioned later, the organic monomolecular film | membrane 64 and the protective layer 66 are put together. You may heat.

<HMDS processing>
Hereinafter, HMDS treatment will be described as an example as a method for forming an organic monomolecular film. In addition, although the following method is used as a formation method of the organic monomolecular film by a HMDS processing agent, it is not limited to these methods.
That is, in the HMDS treatment on the upper surface of the active layer 58, the HMDS treatment agent is put in a substantially sealed container, the active layer 58 is brought into contact with the HMDS vapor, then taken out from the container, and the active layer 58 is further heated. The hydrophobic treatment is completed.

  The said substantially sealed means the closed state where HMDS vapor | steam evaporates spontaneously and volatilizes and does not lose | disappear. The container that can be used is not particularly limited as long as it is not affected by corrosion, decomposition, adsorption, or the like due to HMDS vapor, and examples thereof include stainless steel. Air is usually present in the substantially sealed container, but other gases other than air may be substituted.

  Although the temperature which contacts the active layer 58 with HMDS vapor | steam can be selected suitably, this HMDS process can be achieved with the HMDS vapor | steam in normal temperature. If necessary, HMDS can be heated to a temperature of 30 ° C to 80 ° C. The time for bringing the active layer 58 into contact with the HMDS vapor is preferably 5 to 200 seconds, and more preferably 20 to 60 seconds from the viewpoint of uniform processing.

  As a method of heating the HMDS-treated active layer 58 (the substrate 52 on which the active layer 58 is laminated), a method that can be usually used can be appropriately selected and adopted. However, heating by a hot plate, a convection oven, or far infrared irradiation is preferable. Furthermore, a hot plate is preferable from the viewpoint of productivity.

  The heating temperature after the contact of the active layer 58 with the HMDS vapor is preferably 100 ° C. or higher from the viewpoint of sufficiently removing water.

  In the present embodiment, “contact with HMDS vapor” means that HMDS is in contact with the surface of the active layer 58 and the reaction can proceed at the interface between the surface of the active layer 58 and the HMDS. That is, a method of leaving the active layer 58 in an atmosphere of HMDS vapor, a method of applying HMDS to the active layer 58 in a liquid or gas state, a method of immersing the active layer 58 in a liquid of HMDS, etc. As long as the hydrophobization treatment is possible, the present invention is not particularly limited thereto.

  As a method of directly applying HMDS to the active layer 58 in a liquid state, it is possible to apply HMDS to the active layer 58, and after the HMDS residual liquid has evaporated, the HMDS can be processed by the same method as described above. Direct coating methods include spray coating, spin coating, and slit coating.

  Further, as another method for treating the active layer 58 with HMDS, the substrate 52 on which the active layer 58 is laminated is heated by a hot plate, and the surface of the active layer 58 is sprayed and sprayed on the surface of the active layer 58 to make it hydrophobic. Can be processed.

  Further, as another method of treating the active layer 58 with HMDS, the substrate 52 on which the active layer 58 is laminated is immersed in HMDS, and after the liquid is evaporated by heating, the heat treatment is performed in the same manner as described above. Can be hydrophobized.

14) Formation of protective layer Next, the protective layer 66 is formed on the organic monomolecular film 64 formed on the active layer 58 (FIG. 4G).

  The production method of the protective layer 66 is not particularly limited, and examples thereof include a method of applying a resin solution, a method of pressure bonding or thermocompression bonding of a resin sheet, and a method of dry polymerization by vapor deposition or sputtering.

15) Heat treatment Finally, after forming the protective layer 66, heat treatment (baking) is performed so that water evaporates at least from the organic monomolecular film 64 and the protective layer 66 (FIG. 4H).

  The temperature of heat processing is 100 degreeC or more which can fully evaporate water. Further, from the examples described later, the initial characteristics of the TFT are improved as the heating temperature is increased to 120 ° C. and 150 ° C. Therefore, the higher the temperature, the better. However, when the protective layer 66 is made of a photosensitive resin, It is preferable that it is 200 degrees C or less from a viewpoint of property. Furthermore, when the substrate 52 is a PEN film substrate, the temperature is preferably 150 ° C. or lower from the viewpoint of heat resistance.

Through the steps as described above, a TFT 50 that can improve the instability of TFT characteristics due to water and improve the initial characteristics of the TFT can be manufactured.
After the TFT 50 is manufactured, an interlayer insulating film, a pixel electrode, and the like may be further formed according to the final product (display device, imaging device, etc.). For example, when manufacturing an organic EL display, after sequentially forming an interlayer insulating film and a pixel electrode, after forming an upper electrode (common electrode) sequentially with an organic electroluminescence layer including at least a light emitting layer and ITO, Al, etc. A sealing resin film is attached. Thereby, for example, a flexible organic EL display can be manufactured.

  Depending on the final product, wiring may be drawn from the upper surfaces of the source / drain electrodes 60 and 62. In this case, the organic monomolecular film 64 on the upper surfaces of the source / drain electrodes 60 and 62 becomes an obstacle. Here, for example, in the case of the configuration of Patent Document 2, a protective layer made of only a silane compound is provided on the active layer. However, since patterning cannot be performed thereafter with only the silane compound, an organic monomolecular film is used for patterning. The formation of 64 is limited to a method such as printing.

However, in this embodiment, since the protective layer 66, particularly, the protective layer 66 made of a photosensitive resin is formed on the organic monomolecular film 64, the organic monomolecular film 64 can be patterned.
FIG. 5 is a diagram showing a method of drawing the wiring 68 from the source / drain electrodes 60 and 62 in the TFT 50 shown in FIG.

  First, the protective layer 66 made of a photosensitive resin is patterned by photolithography (FIG. 5A). Next, the unnecessary organic monomolecular film 64 on the source / drain electrodes 60 and 62 is removed by dry etching or the like (FIG. 5B). Then, the photosensitive resin is used as it is as the protective layer 66, and after forming a conductive film constituting the wiring 68, patterning is performed. As a result, the source / drain electrodes 60 and 62 and the wiring 68 are reliably electrically connected, and the wiring 68 is drawn out from the top and side surfaces of the source / drain electrodes 60 and 62 (FIG. 5C).

  EXAMPLES Hereinafter, the thin film transistor and the method for manufacturing the thin film transistor according to the present invention will be described with reference to examples, but the present invention is not limited to these examples.

-Evaluation of initial TFT characteristics-
First, in order to evaluate the initial TFT characteristics, TFTs were fabricated according to Examples 1 and 2 and Comparative Examples 1 to 5 below.
Example 1
In Example 1, a TFT 1 having the configuration shown in FIG. 3 was produced. The manufacturing method of TFT1 is as follows.
<Gate electrode>
As the substrate, an alkali-free glass plate (Corning, product number NO. 1737) was used.
Next, as a gate electrode by RF magnetron sputtering (conditions: sputtering gas Ar = 13 sccm, RF power 380 W) on the substrate that has been subjected to ultrasonic cleaning in the order of pure water 15 minutes → acetone 15 minutes → pure water 15 minutes. A Mo thin film (thickness 40 nm) was formed. Patterning of the gate electrode (Mo thin film) was performed by a photolithography method in which a predetermined pattern was formed by exposure and development of the photoresist layer.

<Gate insulation layer>
Next, the following gate insulating layer was formed on the gate electrode.
SiO ₂ was formed to 200 nm by RF magnetron sputtering (conditions: target SiO ₂ , sputtering gas Ar / O ₂ = 12/2 sccm, RF power 400 W), and a gate insulating layer was provided. The patterning of the gate insulating layer was performed by photolithography.

<Active layer>
A low resistance layer of the active layer was formed on the gate insulating layer. The low-resistance layer was formed by RF magnetron sputtering vacuum deposition using a polycrystalline sintered body having a composition of InGaZnO ₄ as a target, Ar flow rate 97 sccm, O ₂ flow rate 2.0 sccm, RF power 200 W, total pressure 0. The test was performed under the condition of 38 Pa. The thickness of the low resistance layer was 50 nm.

A high resistance layer of the active layer was formed on the low resistance layer. The high resistance layer was formed by co-sputtering on IGZO / Ga ₂ O ₃ so as to cover the entire layer surface (surface orthogonal to the thickness direction) and the entire side surface. Specifically, for IGZO sputtering, the composition of InGaZnO ₄ is used as a target, Ar flow rate is 12 sccm, O ₂ flow rate is 5.0 sccm, RF power is 400 W, and total pressure is 0.4 Pa. For gallium oxide sputtering, RF magnetron is used. By sputtering, the composition of Ga ₂ O ₃ was used as a target, and Ar flow rate was 12 sccm, O ₂ flow rate was 5.0 sccm, RF power was 100 W, and total pressure was 0.4 Pa. The target film thickness was obtained by adjusting the film formation time.

As a result of the film formation, the high resistance layer has a two-layer structure including a 10 nm thick mixed film containing IGZO and Ga ₂ O ₃ and a 10 nm thick single film containing Ga ₂ O ₃ . Patterning was performed by photolithography.

The formed active layer (low resistance layer and high resistance layer) was confirmed to be an amorphous film by a well-known X-ray diffraction method.
<Source / drain electrodes>
Next, an Mo thin film (thickness: 100 nm) was formed as a source / drain electrode on the resistance layer by RF magnetron sputtering (conditions: sputtering gas Ar = 13 sccm, RF power 380 W). The patterning of the gate electrode (Mo thin film) was performed by photolithography.

<Organic monomolecular film>
On the active layer, an organic monomolecular film (hereinafter referred to as HMDS treatment film) was formed by spin coating using HMDS as a hydrophobization treatment agent. Specifically, an organic monomolecular film was applied using a MSA200 type spin coater manufactured by Mikasa Co., Ltd. at a rotation speed of 500 rpm. It was confirmed that the organic monomolecular film was applied even when the rotational speed was 1000 rpm.

<Protective layer>
A coating liquid of photosensitive acrylic resin (PC-405G manufactured by JSR) was applied on the organic monomolecular film. And the baking process was performed for 10 minutes at the temperature of 150 degreeC, the 1-micrometer-thick coating layer was produced, and it was set as the protective layer.

  TFT1 was produced through the above manufacturing method.

The configuration of the TFT 1 is summarized as follows.
TFT1: glass / Mo (40 nm) / SiO ₂ (200 nm) / IGZO (50 nm) / IGZO + Ga ₂ O ₃ (10 nm) / Ga ₂ O ₃ (10 nm) / Mo (100 nm) / HMDS treatment film / photosensitive acrylic Resin (1μm)

(Example 2)
In Example 2, a TFT 2 having the configuration shown in FIG. 3 was produced. The manufacturing method of TFT2 was the same as that of Example 1 except that the baking temperature after forming the protective layer was 120 ° C.

The configuration of the TFT 2 is summarized as follows.
TFT2: glass / Mo (40 nm) / SiO ₂ (200 nm) / IGZO (50 nm) / IGZO + Ga ₂ O ₃ (10 nm) / Ga ₂ O ₃ (10 nm) / Mo (100 nm) / HMDS treatment film / photosensitive acrylic Resin (1μm)

(Comparative Example 1)
In Comparative Example 1, a comparative TFT 1 having a configuration shown in FIG. The manufacturing method of the comparative TFT 1 was the same as that of Example 1 except that the protective layer was not formed and the HMDS treatment film was formed and baked at 120 ° C. for 10 minutes.

The configuration of the comparative TFT 1 is summarized as follows.
Comparison TFT1:
glass / Mo (40nm) / SiO ₂ (200nm) / IGZO (50nm) / IGZO + Ga ₂ O ₃ (10nm) / Ga ₂ O ₃ (10nm) / Mo (100nm) / HMDS treatment film

(Comparative Example 2)
In Comparative Example 2, a comparative TFT 2 having the configuration shown in FIG. 3 and having no organic monomolecular film was produced. The manufacturing method of the comparative TFT 2 was the same as that of Example 1 except that the organic monomolecular film was not formed and the protective layer was formed and baked at 150 ° C. for 10 minutes.

The configuration of the comparative TFT 2 is summarized as follows.
Comparison TFT2:
glass / Mo (40 nm) / SiO ₂ (200 nm) / IGZO (50 nm) / IGZO + Ga ₂ O ₃ (10 nm) / Ga ₂ O ₃ (10 nm) / Mo (100 nm) / photosensitive acrylic resin (1 μm)

(Comparative Example 3)
In Comparative Example 3, a comparative TFT 3 having the configuration shown in FIG. 3 and having no organic monomolecular film was produced. The manufacturing method of the comparative TFT 3 was the same as that of Example 1 except that the organic monomolecular film was not formed and the protective layer was formed and baked at 120 ° C. for 10 minutes.

The configuration of the comparative TFT 3 is summarized as follows.
Comparison TFT3:
glass / Mo (40 nm) / SiO ₂ (200 nm) / IGZO (50 nm) / IGZO + Ga ₂ O ₃ (10 nm) / Ga ₂ O ₃ (10 nm) / Mo (100 nm) / photosensitive acrylic resin (1 μm)

(Comparative Example 4)
In Comparative Example 4, a comparative TFT 4 having the structure shown in FIG. 3 and having no organic monomolecular film and no protective layer was produced. The manufacturing method of the comparative TFT 4 was the same as that of Example 1 except that the organic monomolecular film and the protective layer were not formed, and the source / drain electrodes were formed and baked at 120 ° C. for 10 minutes.

The configuration of the comparative TFT 4 is summarized as follows.
Comparison TFT4:
glass / Mo (40nm) / SiO ₂ (200nm) / IGZO (50nm) / IGZO + Ga ₂ O ₃ (10nm) / Ga ₂ O ₃ (10nm) / Mo (100nm)

(Comparative Example 5)
In Comparative Example 5, a comparative TFT 5 having the structure shown in FIG. 3 and having no organic monomolecular film and no protective layer was produced. The manufacturing method of the comparative TFT 5 was the same as that of Example 1 except that the organic monomolecular film and the protective layer were not formed, and the source / drain electrodes were not baked.

The configuration of the comparative TFT 5 is summarized as follows.
Comparison TFT 5:
glass / Mo (40nm) / SiO ₂ (200nm) / IGZO (50nm) / IGZO + Ga ₂ O ₃ (10nm) / Ga ₂ O ₃ (10nm) / Mo (100nm)

(Evaluation of initial TFT characteristics)
For each of the obtained TFTs, the TFT transfer characteristics were measured at a saturation region drain voltage (Vd) = 10 V (gate voltage (Vg): −10 V ≦ Vg ≦ 15 V) to determine the TFT performance (initial characteristics of the TFT). evaluated. The measurement of TFT transfer characteristics was performed using a semiconductor parameter analyzer 4156C (manufactured by Agilent Technologies). The definition of each parameter is as follows. Note that the TFT initial characteristics refer to TFT characteristics immediately after fabrication of the TFT before the active layer deteriorates with water or the like.
TFT threshold voltage (Vth0): A gate voltage when the drain current value is W / L × 10 nA. Here, since the TFT size is W / L = 1000/200 = 5, the gate voltage when the drain current value is 50 nA was used. Note that “0” of Vth0 indicates the first threshold voltage Vth among the same measurements performed five times. Although the threshold voltage for the second and subsequent times is also measured, the result is almost the same as Vth0, and will be omitted.
Leakage current (Ig): This is a voltage that is applied practically (within a normal operating voltage range, for example, 10 V or less), and is a drain current value when the gate voltage is 7 V in this evaluation. The unit is [A].
OFF current (Ioff): A drain current value when the gate voltage is Vth0. The unit is [A].

The obtained TFT initial characteristics are shown in Table 1.
FIG. 6 shows the measurement results of the TFT initial characteristics (Vg-Id characteristics) in the TFT 2, the comparative TFT 1, the comparative TFT 3, and the comparative TFT 4, and the initial TFT characteristics at the same baking temperature can be compared.
Further, FIG. 7 shows the measurement results of the TFT initial characteristics (Vg-Id characteristics) in the TFT1 and TFT2, and the change in the TFT initial characteristics due to the baking temperature can be confirmed. FIG. 7 also shows, as a reference, measurement results of TFT initial characteristics after the formation of the protective layer and before baking in the structure of TFT1. Further, the measurement results of the initial TFT characteristics of other comparative examples are not shown.

From the results shown in Table 1 and FIG. 6, when comparing the comparison TFT 4 or the comparison TFT 5 with the comparison TFT 3, first, when only the protective layer (acrylic resin) is provided on the active layer, the off-current is reduced, but the leakage current is substantially changed. It was found that the threshold voltage shifted to the negative side and the normally-off characteristic was deteriorated. The normally-off characteristic is a TFT characteristic that does not allow a current to flow even if no voltage is applied, and is an advantageous TFT characteristic in terms of power consumption.
Further, from the results of Table 1, when the comparison TFT 4 or the comparison TFT 5 and the comparison TFT 2 are compared, only the protective layer (acrylic resin) is provided on the active layer, and the OFF current and the comparison TFT 3 are made higher than the baking temperature. It was found that the threshold voltage did not change although the leakage current was lowered.

  Further, when comparing the comparison TFT 4 or the comparison TFT 5 with the comparison TFT 1, even if only the organic monomolecular film (HMDS treatment film) is provided on the active layer, the threshold voltage, the leakage current, and the off current are not particularly changed, and the TFT initial characteristics Was found not to improve.

  On the other hand, from the results of Table 1 and FIG. 6, when comparing TFT 2 and each of the comparative TFTs 1 to 5, a protective layer (acrylic resin) is provided on the active layer via an organic monomolecular film (HMDS treatment film). It can be seen that the voltage is shifted to 0V, the leakage current and the off-current are reduced, and the TFT initial characteristics (normally off characteristics) are improved. In particular, regarding the threshold voltage, the organic monomolecular film and the protective layer are not improved even if the protective layer or the organic monomolecular film is merely provided on the active layer, although the threshold voltage has not been improved (the threshold voltage has shifted to 0V side). The remarkable effect that it can improve by combining was found.

  Further, from the results of Table 1 and FIG. 8, when comparing TFT1 and TFT2, if the baking temperature is increased from 120 ° C. to 150 ° C., the threshold voltage is shifted toward 0V, and the off-current is also reduced. It was found that the characteristics were further improved.

  From the above, it can be said that the TFTs 1 to 2 manufactured according to Examples 1 to 2 have improved initial TFT characteristics as compared with the comparative TFTs 1 to 5 manufactured according to Comparative Examples 1 to 5.

-Stability of TFT characteristics against water-
Next, in order to evaluate the stability of the TFT characteristics with respect to water, a TFT was fabricated according to the following experimental example.

(Experimental example 1)
In Experimental Example 1, an experimental TFT 1 having a configuration shown in FIG. 3 and having no protective layer formed on the active layer was produced. As the substrate, an n-Si plate (Mitsubishi Materials Corporation, N-type 4 inch Si wafer) was used. This substrate also serves as a gate electrode. As the gate insulating layer, SiO ₂ was used. The thickness of the gate insulating layer was 100 nm. The active layer formed on the gate insulating layer has a three-layer structure made of IGZO / IGZO and Ga ₂ O ₃ / Ga ₂ O ₃ . The thickness of each layer was 50 nm, 10 nm, and 10 nm, respectively. Al was used as a source / drain electrode formed on the active layer. Moreover, the HMDS process film | membrane was used as an organic monomolecular film | membrane formed on an active layer. These forming methods are the same as those in Example 1.

The configuration of the experimental TFT 1 is summarized as follows.
Experiment TFT1:
n-Si / SiO ₂ (100 nm) / IGZO (50 nm) / IGZO + Ga ₂ O ₃ (10 nm) / Ga ₂ O ₃ (10 nm) / Al (400 nm) / HMDS treatment film

(Experimental example 2)
In Experimental Example 2, a TFT in which a protective layer was not formed on the active layer with the configuration shown in FIG. 1 was produced. As the substrate, an n-Si plate (Mitsubishi Materials Corporation, N-type 4 inch Si wafer) was used. This substrate also serves as a gate electrode. As the gate insulating layer, SiO ₂ was used. The thickness of the gate insulating layer was 100 nm. IGZO was used as an active layer formed on the gate insulating layer. The thickness of the active layer was 50 nm. Al was used as a source / drain electrode formed on the active layer. Moreover, the HMDS process film | membrane was used as an organic monomolecular film | membrane formed on an active layer. These forming methods are the same as those in Example 1.

The configuration of the experimental TFT 2 is summarized as follows.
Experiment TFT2:
n-Si / SiO ₂ (100nm) / IGZO (50nm) / Al (400nm) / HMDS treatment film

(Experimental example 3)
In Experimental Example 3, an experimental TFT 3 in which the organic monomolecular film and the protective layer were not formed on the active layer with the configuration shown in FIG. 3 was produced. As the substrate, an n-Si plate Mitsubishi Materials Corporation, N-type 4 inch Si wafer) was used. This substrate also serves as a gate electrode. As the gate insulating layer, SiO ₂ was used. The thickness of the gate insulating layer was 100 nm. The active layer formed on the gate insulating layer has a three-layer structure made of IGZO / IGZO and Ga ₂ O ₃ / Ga ₂ O ₃ . The thickness of each layer was 50 nm, 10 nm, and 10 nm, respectively. Al was used as a source / drain electrode formed on the active layer.

The configuration of the experimental TFT 3 is summarized as follows.
Experiment TFT3:
n-Si / SiO ₂ (100 nm) / IGZO (50 nm) / IGZO + Ga ₂ O ₃ (10 nm) / Ga ₂ O ₃ (10 nm) / Al (400 nm)

(Experimental example 4)
In Experimental Example 4, an experimental TFT 4 having the structure shown in FIG. 1 and having no organic monomolecular film and protective layer formed on the active layer was produced. As the substrate, an n-Si plate (Mitsubishi Materials Corporation, N-type 4 inch Si wafer) was used. This substrate also serves as a gate electrode. As the gate insulating layer, SiO ₂ was used. The thickness of the gate insulating layer was 100 nm. IGZO was used as an active layer formed on the gate insulating layer. The thickness of the active layer was 50 nm. Al was used as a source / drain electrode formed on the active layer.

The configuration of the experimental TFT 4 is summarized as follows.
Experiment TFT4:
n-Si / SiO ₂ (100 nm) / IGZO (50 nm) / Al (400 nm)

(Stability of TFT characteristics against water)
TFT with saturation region drain voltage (Vd) = 10 V (gate voltage (Vg): −10 V ≦ Vg ≦ 15 V) before and after dropping 1 μl of pure water between the source and drain electrodes of each TFT obtained at room temperature The transfer characteristic was measured, and the threshold voltage (Vth) of the TFT was evaluated. The measurement of TFT transfer characteristics was performed using a semiconductor parameter analyzer 4156C (manufactured by Agilent Technologies).

  The obtained results are shown in Table 2. “Vth0” in Table 2 is Vth before contact with water, and “Vth1” is Vth after air-drying by dropping 1 μl of pure water between the source and drain electrodes at room temperature.

  In Experimental Examples 1 to 4, a protective layer is not provided on the organic monomolecular film as shown in FIGS. 1 to 3, but from the results of Table 2, HMDS treatment as an organic monomolecular film from Experimental TFT 3 The experimental TFT 1 in which the film is formed and the experimental TFT 2 in which the HMDS treatment film is formed on the active layer than the experimental TFT 4 have a smaller threshold voltage change before and after contact with water, and the TFT characteristics with respect to water are more stable. I found out. As a result, even if a protective layer is provided on the active layer on which the organic monomolecular film is formed, water that has passed through the protective layer is prevented by the hydrophobic organic monomolecular film before reaching the active layer. Can be said. Moreover, it can be said that the water which comes out from the photosensitive resin as a protective layer can also be prevented.

10, 30, 50 TFT (Thin Film Transistor)
12, 32, 52 Substrate 14, 34, 54 Gate electrode 16, 36, 56 Gate insulating layer 18, 42, 58 Active layer 20, 38, 60 Source electrode 22, 40, 62 Drain electrode 24, 44, 64 Organic single molecule Membrane 26, 46, 66 Protective layer

Claims (10)

A gate electrode formed on the substrate;
A gate insulating layer formed to cover the gate electrode;
An active layer made of an oxide semiconductor formed on the gate insulating layer;
A source electrode and a drain electrode formed between the active layer and the gate insulating layer or on the active layer, spaced apart from each other;
A hydrophobic organic monomolecular film covering the upper surface of the active layer not covered with the source electrode and the drain electrode;
A protective layer formed on the organic monomolecular film on the active layer;
Thin film transistor.   The thin film transistor according to claim 1, wherein the protective layer is made of a photosensitive resin.   The thin film transistor according to claim 1, wherein the organic monomolecular film is composed of an organosilane compound.   4. The thin film transistor according to claim 1, wherein the oxide semiconductor is an oxide containing at least one of In, Ga, and Zn. Forming a gate electrode on the substrate;
Forming a gate insulating layer so as to cover the gate electrode;
Forming an active layer made of an oxide semiconductor, a source electrode, and a drain electrode on the gate insulating layer;
Forming a hydrophobic organic monomolecular film on at least the active layer;
Forming a protective layer on the organic monomolecular film formed on the active layer;
A step of heat-treating after forming the protective layer;
The manufacturing method of the thin-film transistor which has.   The method for manufacturing a thin film transistor according to claim 5, wherein a photosensitive resin is used as a constituent material of the protective layer.   The method of manufacturing a thin film transistor according to claim 6, further comprising a step of removing an organic monomolecular film on the source electrode and the drain electrode after forming the protective layer.   The method of manufacturing a thin film transistor according to claim 6 or 7, wherein a temperature of the heat treatment is 100 ° C or higher and 200 ° C or lower.   The method for producing a thin film transistor according to claim 5, wherein the organic monomolecular film is formed using an organosilane compound.   The method for manufacturing a thin film transistor according to any one of claims 5 to 9, wherein an oxide containing at least one of In, Ga, and Zn is used as a constituent material of the oxide semiconductor.

Images