JP2011055033A - Piezoelectric oscillator - Google Patents

Piezoelectric oscillator Download PDF

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JP2011055033A
JP2011055033A JP2009199280A JP2009199280A JP2011055033A JP 2011055033 A JP2011055033 A JP 2011055033A JP 2009199280 A JP2009199280 A JP 2009199280A JP 2009199280 A JP2009199280 A JP 2009199280A JP 2011055033 A JP2011055033 A JP 2011055033A
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element mounting
integrated circuit
mounting member
circuit element
layer
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Manabu Matsumoto
学 松本
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Kyocera Crystal Device Corp
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Kyocera Crystal Device Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

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  • Oscillators With Electromechanical Resonators (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a piezoelectric oscillator capable of preventing an integrated circuit element from peeling off. <P>SOLUTION: The piezoelectric oscillator includes an element mounting member, a piezoelectric vibrating element, an integrated circuit element, and a lid member. The element mounting member includes a substrate, a first frame, and a second frame, wherein the first frame and the second frame are prepared on one principal plane of the substrate to form a recessed space. The piezoelectric vibrating element is mounted at a pair of two piezoelectric vibrating element mounting pads prepared on the principal plane of a mounting section. The integrated circuit element includes an electrode for joining to the element mounting member, wherein the electrode is joined to the integrated circuit element mounting pad prepared at the substrate. The lid member hermetically seals off the recessed space. The electrode for joining to the element mounting member is composed of an aluminum layer, a middle metal layer, and a plating bump layer. It is characterized in that the thickness of the aluminum layer is 0.6-1.5 μm, the thickness of the middle metal layer is 0.5-1.7 μm, and the thickness of the plating bump layer is 5-30 μm. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、電子機器等に用いられる圧電発振器に関する。   The present invention relates to a piezoelectric oscillator used in an electronic device or the like.

図9は、従来の圧電発振器を示す断面図である。
従来の圧電発振器200は、凹部空間211を有する素子搭載部材210と圧電振動素子220と蓋部材230とから主に構成されている。
前記素子搭載部材210は、基板部210aと第1の枠部210bと第2の枠部210cで構成されている。
この素子搭載部材210は、基板部210aの一方の主面に第1の枠部210b、第2の枠部210cの順に設けられて平面視して四角形状の凹部空間211が形成される。また、前記凹部空間211内には前記凹部空間211内底面より高い位置に搭載部213が設けられ、その搭載部213の主面には、2個一対の圧電振動素子搭載パッド214が設けられている。
前記凹部空間211内の素子搭載部材210の主面には、集積回路素子搭載パッド215が設けられている。前記集積回路素子搭載パッド215は、ニッケルメッキ層と金メッキ層により構成されている。
また、素子搭載部材210の基板部210aの他方の主面の4隅には、外部接続用電極端子216が設けられている。
また、素子搭載部材210の第2の枠部210cの主面には、封止用導体パターン212が設けられている。
蓋部材230は、前記素子搭載部材210の前記封止用導体パターン212と封止部材231で接合されている。
FIG. 9 is a cross-sectional view showing a conventional piezoelectric oscillator.
The conventional piezoelectric oscillator 200 mainly includes an element mounting member 210 having a recessed space 211, a piezoelectric vibration element 220, and a lid member 230.
The element mounting member 210 includes a substrate part 210a, a first frame part 210b, and a second frame part 210c.
The element mounting member 210 is provided with a first frame portion 210b and a second frame portion 210c in this order on one main surface of the substrate portion 210a, and a rectangular recess space 211 is formed in plan view. A mounting portion 213 is provided in the recessed space 211 at a position higher than the bottom surface of the recessed space 211, and two pairs of piezoelectric vibration element mounting pads 214 are provided on the main surface of the mounting portion 213. Yes.
An integrated circuit element mounting pad 215 is provided on the main surface of the element mounting member 210 in the recessed space 211. The integrated circuit element mounting pad 215 includes a nickel plating layer and a gold plating layer.
In addition, external connection electrode terminals 216 are provided at the four corners of the other main surface of the substrate portion 210 a of the element mounting member 210.
In addition, a sealing conductor pattern 212 is provided on the main surface of the second frame portion 210 c of the element mounting member 210.
The lid member 230 is joined to the sealing conductor pattern 212 of the element mounting member 210 by a sealing member 231.

圧電振動素子220は、四角形の水晶素板221に励振用電極222を被着形成したものであり、外部からの交番電圧が励振用電極222を介して水晶素板221に印加されると、所定の振動モード及び周波数で励振を起こすようになっている。
励振用電極222は、前記水晶素板221の表裏両主面に金属を所定のパターンで被着・形成したものである。
このような圧電振動素子220は、その両主面に被着されている励振用電極222から延出する引き出し電極224と前記圧電振動素子搭載パッド214とを、導電性接着剤DSを介して電気的且つ機械的に接続することによって搭載される。このときの引き出し電極224が設けられた一辺とは反対側の端辺を圧電振動素子220の自由端である先端部223とする。
The piezoelectric vibration element 220 is formed by adhering and forming an excitation electrode 222 on a square crystal base plate 221. When an alternating voltage from the outside is applied to the crystal base plate 221 via the excitation electrode 222, the piezoelectric vibration element 220 is predetermined. The vibration is generated at the vibration mode and frequency.
The excitation electrode 222 is formed by depositing and forming metal in a predetermined pattern on both the front and back main surfaces of the quartz base plate 221.
Such a piezoelectric vibration element 220 electrically connects the extraction electrode 224 extending from the excitation electrode 222 attached to both main surfaces thereof and the piezoelectric vibration element mounting pad 214 via a conductive adhesive DS. It is mounted by connecting mechanically and mechanically. At this time, an end opposite to the one side where the extraction electrode 224 is provided is defined as a tip 223 which is a free end of the piezoelectric vibration element 220.

集積回路素子240は、一方の主面にエポキシ樹脂などの絶縁層が形成され、他方の主面に素子搭載部材接合用電極241が設けられる。
素子搭載部材接合用電極241は、アルミニウム層241aと金バンプ層241bにより構成されている。
また、集積回路素子240は、素子搭載部材210の凹部空間211内に形成されている集積回路素子搭載パッド215に載置して、前記集積回路素子240の他方の主面に金属製の接合用ホーン(図示せず)を当接させる。
前記接合用ホーンに超音波を加えて集積回路素子240を振動させ、前記金バンプ層241bを集積回路素子搭載パッド215との摩擦により発生する熱により溶融し、熱圧着することで、集積回路素子240は、集積回路素子搭載パッド215に搭載されている構造が知られている(特許文献1参照)。
In the integrated circuit element 240, an insulating layer such as an epoxy resin is formed on one main surface, and an element mounting member bonding electrode 241 is provided on the other main surface.
The element mounting member bonding electrode 241 includes an aluminum layer 241a and a gold bump layer 241b.
Further, the integrated circuit element 240 is placed on the integrated circuit element mounting pad 215 formed in the recessed space 211 of the element mounting member 210, and is made of a metal for bonding to the other main surface of the integrated circuit element 240. A horn (not shown) is brought into contact.
An integrated circuit element 240 is vibrated by applying an ultrasonic wave to the bonding horn, and the gold bump layer 241b is melted by heat generated by friction with the integrated circuit element mounting pad 215 and thermocompression bonded. A structure 240 is mounted on the integrated circuit element mounting pad 215 (see Patent Document 1).

特開2009−16395号公報JP 2009-16395 A

しかしながら、従来の圧電発振器200では、集積回路素子240を集積回路素子搭載パッド215に搭載する際に、集積回路素子240の素子搭載部材接合用電極241が集積回路素子240から剥がれてしまうといった課題があった。また、集積回路素子240を集積回路素子搭載パッド215に搭載後に、集積回路素子240の素子搭載部材接合用電極241が素子搭載部材210の集積回路素子搭載パッド215から剥がれてしまうといった課題があった。   However, in the conventional piezoelectric oscillator 200, when the integrated circuit element 240 is mounted on the integrated circuit element mounting pad 215, there is a problem that the element mounting member bonding electrode 241 of the integrated circuit element 240 is peeled off from the integrated circuit element 240. there were. Further, after the integrated circuit element 240 is mounted on the integrated circuit element mounting pad 215, there is a problem that the element mounting member bonding electrode 241 of the integrated circuit element 240 is peeled off from the integrated circuit element mounting pad 215 of the element mounting member 210. .

本発明は前記課題に鑑みてなされたものであり、集積回路素子の素子搭載部材接合用電極が集積回路素子から剥がれるのを防ぎ、また、集積回路素子の素子搭載部材接合用電極が素子搭載部材の集積回路素子搭載パッドから剥がれるのを防ぐことができる圧電発振器を提供することを課題とする。   The present invention has been made in view of the above problems, and prevents an electrode for joining an element mounting member of an integrated circuit element from being peeled off from the integrated circuit element, and the electrode for joining an element mounting member of an integrated circuit element is an element mounting member. It is an object of the present invention to provide a piezoelectric oscillator capable of preventing peeling from the integrated circuit element mounting pad.

本発明の圧電発振器は、基板部とこの基板部の一方の主面に第1の枠部と第2の枠部が設けられて凹部空間が形成されている素子搭載部材と、凹部空間内底面に搭載部が設けられ、搭載部の主面に設けられている2個一対の圧電振動素子搭載パッドと、圧電振動素子搭載パッドに搭載されている圧電振動素子と、凹部空間内に露出する基板部に設けられている集積回路素子搭載パッドと、集積回路素子搭載パッドと接合するための素子搭載部材接合用電極が設けられている集積回路素子と、凹部空間を気密封止する蓋部材と、を備え、素子搭載部材接合用電極は、アルミニウム層と、中間金属層と、メッキバンプ層とで構成され、アルミニウム層の厚みが、0.6〜1.5μmであり、中間金属層の厚みが、0.5〜1.7μmであり、メッキバンプ層の厚みが、5〜30μmであることを特徴とするものである。   The piezoelectric oscillator of the present invention includes a substrate portion, an element mounting member in which a first frame portion and a second frame portion are provided on one main surface of the substrate portion to form a recessed space, and a bottom surface in the recessed space. And a pair of piezoelectric vibration element mounting pads provided on the main surface of the mounting part, a piezoelectric vibration element mounted on the piezoelectric vibration element mounting pad, and a substrate exposed in the recess space An integrated circuit element mounting pad provided in the part, an integrated circuit element provided with an element mounting member bonding electrode for bonding to the integrated circuit element mounting pad, a lid member for hermetically sealing the recessed space, The element mounting member bonding electrode is composed of an aluminum layer, an intermediate metal layer, and a plating bump layer, the aluminum layer has a thickness of 0.6 to 1.5 μm, and the intermediate metal layer has a thickness of 0.5 ~ 1.7μm, plating The bump layer has a thickness of 5 to 30 μm.

また、前記集積回路素子搭載パッドがニッケルメッキ層と、金メッキ層から構成され、前記集積回路素子搭載パッドの金メッキ層の平坦度が、0.1〜1.0μmであることを特徴とするものである。   The integrated circuit element mounting pad is composed of a nickel plating layer and a gold plating layer, and the flatness of the gold plating layer of the integrated circuit element mounting pad is 0.1 to 1.0 μm. is there.

本発明の圧電発振器によれば、素子搭載部材接合用電極は、アルミニウム層と、中間金属層と、メッキバンプ層とで構成され、アルミニウム層の厚みは、0.6〜1.5μmであり、中間金属層の厚みは、0.5〜1.7μmであり、メッキバンプ層の厚みは、5〜30μmであることによって、集積回路素子の素子搭載部材接合用電極が集積回路素子から剥がれるのを防ぎ、また、集積回路素子の素子搭載部材接合用電極が素子搭載部材の集積回路素子搭載パッドから剥がれるのを防ぐことができる。   According to the piezoelectric oscillator of the present invention, the element mounting member bonding electrode includes an aluminum layer, an intermediate metal layer, and a plating bump layer, and the thickness of the aluminum layer is 0.6 to 1.5 μm. The thickness of the intermediate metal layer is 0.5 to 1.7 μm, and the thickness of the plated bump layer is 5 to 30 μm, so that the element mounting member bonding electrode of the integrated circuit element is peeled off from the integrated circuit element. In addition, the element mounting member bonding electrode of the integrated circuit element can be prevented from being peeled off from the integrated circuit element mounting pad of the element mounting member.

また、前記集積回路素子搭載パッドがニッケルメッキ層と、金メッキ層から構成され、前記集積回路素子搭載パッドの金メッキ層の平坦度が、0.1〜1.0μmであることによって、集積回路素子搭載パッドが素子搭載部材接合用電極の金メッキバンプ層と接合した際に、素子搭載部材が熱により反ってしまっても、応力を吸収できる為、集積回路素子の素子搭載部材接合用電極が素子搭載部材の集積回路素子搭載パッドから剥がれてしまうことを防ぐことができる。   Further, the integrated circuit element mounting pad is composed of a nickel plating layer and a gold plating layer, and the flatness of the gold plating layer of the integrated circuit element mounting pad is 0.1 to 1.0 μm. When the pad is bonded to the gold-plated bump layer of the element mounting member bonding electrode, stress can be absorbed even if the element mounting member is warped by heat. Therefore, the element mounting member bonding electrode of the integrated circuit element is the element mounting member. It is possible to prevent peeling from the integrated circuit element mounting pad.

本発明の実施形態に係る圧電発振器を示す分解斜視図である。1 is an exploded perspective view showing a piezoelectric oscillator according to an embodiment of the present invention. 図1のA−A断面図である。It is AA sectional drawing of FIG. 本発明の実施形態に係る圧電発振器を構成する集積回路素子の素子搭載部材接合用電極の面から見た斜視図である。It is the perspective view seen from the surface of the element mounting member joining electrode of the integrated circuit element which comprises the piezoelectric oscillator which concerns on embodiment of this invention. 本発明の実施形態に係る圧電発振器を構成する集積回路素子の素子搭載部材接合用電極を拡大した概略図である。It is the schematic which expanded the element mounting member joining electrode of the integrated circuit element which comprises the piezoelectric oscillator which concerns on embodiment of this invention. 本発明の実施形態に係る圧電発振器を構成する集積回路素子の素子搭載部材接合用電極のアルミニウム層の厚みと接合不良発生率との関係を示すグラフである。It is a graph which shows the relationship between the thickness of the aluminum layer of the element mounting member joining electrode of the integrated circuit element which comprises the piezoelectric oscillator which concerns on embodiment of this invention, and a joining defect incidence. 本発明の実施形態に係る圧電発振器を構成する集積回路素子の素子搭載部材接合用電極の中間金属層の厚みと接合不良発生率との関係を示すグラフである。It is a graph which shows the relationship between the thickness of the intermediate | middle metal layer of the element mounting member joining electrode of the integrated circuit element which comprises the piezoelectric oscillator which concerns on embodiment of this invention, and a joining defect incidence. 本発明の実施形態に係る圧電発振器を構成する集積回路素子の素子搭載部材接合用電極のメッキバンプ層の厚みと接合不良発生率との関係を示すグラフである。It is a graph which shows the relationship between the thickness of the plating bump layer of the element mounting member joining electrode of the integrated circuit element which comprises the piezoelectric oscillator which concerns on embodiment of this invention, and a joining defect incidence. 本発明の実施形態に係る圧電発振器を構成する素子搭載部材の集積回路素子搭載パッドの金メッキ層の平坦度と接合不良発生率との関係を示すグラフである。It is a graph which shows the relationship between the flatness of the gold plating layer of the integrated circuit element mounting pad of the element mounting member which comprises the piezoelectric oscillator which concerns on embodiment of this invention, and a joining defect incidence. 従来の圧電デバイスの断面図である。It is sectional drawing of the conventional piezoelectric device.

以下、本発明を添付図面に基づいて詳細に説明する。尚、圧電振動素子に水晶を用いた場合について説明する。また、図示した寸法も一部誇張して示している。   Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. A case where quartz is used for the piezoelectric vibration element will be described. In addition, the illustrated dimensions are partially exaggerated.

(第1の実施形態)
図1は、本発明の実施形態に係る圧電発振器を示す分解斜視図である。図2は、図1のA−A断面図である。図3は、本発明の実施形態に係る圧電デバイスを構成する集積回路素子の素子搭載部材接合用電極の面から見た斜視図である。図4は、本発明の実施形態に係る圧電発振器を構成する集積回路素子の素子搭載部材接合用電極を拡大した概略図である。図5は、本発明の実施形態に係る圧電発振器を構成する集積回路素子の素子搭載部材接合用電極のアルミニウム層の厚みと接合不良発生率との関係を示すグラフである。図6は、本発明の実施形態に係る圧電発振器を構成する集積回路素子の素子搭載部材接合用電極の中間金属層の厚みと接合不良発生率との関係を示すグラフである。図7は、本発明の実施形態に係る圧電発振器を構成する集積回路素子の素子搭載部材接合用電極のメッキバンプ層の厚みと接合不良発生率との関係を示すグラフである。図8は、本発明の実施形態に係る圧電発振器を構成する素子搭載部材の集積回路素子搭載パッドの金メッキ層の平坦度と接合不良発生率との関係を示すグラフである。
(First embodiment)
FIG. 1 is an exploded perspective view showing a piezoelectric oscillator according to an embodiment of the present invention. FIG. 2 is a cross-sectional view taken along the line AA of FIG. FIG. 3 is a perspective view of the integrated circuit element constituting the piezoelectric device according to the embodiment of the present invention as viewed from the surface of the element mounting member bonding electrode. FIG. 4 is an enlarged schematic view of the element mounting member bonding electrode of the integrated circuit element constituting the piezoelectric oscillator according to the embodiment of the present invention. FIG. 5 is a graph showing the relationship between the thickness of the aluminum layer of the element mounting member bonding electrode of the integrated circuit element constituting the piezoelectric oscillator according to the embodiment of the present invention and the bonding failure occurrence rate. FIG. 6 is a graph showing the relationship between the thickness of the intermediate metal layer of the element mounting member bonding electrode of the integrated circuit element constituting the piezoelectric oscillator according to the embodiment of the present invention and the bonding failure occurrence rate. FIG. 7 is a graph showing the relationship between the thickness of the plating bump layer of the element mounting member bonding electrode of the integrated circuit element constituting the piezoelectric oscillator according to the embodiment of the present invention and the bonding failure occurrence rate. FIG. 8 is a graph showing the relationship between the flatness of the gold plating layer of the integrated circuit element mounting pad of the element mounting member constituting the piezoelectric oscillator according to the embodiment of the present invention and the bonding failure occurrence rate.

本実施形態において、圧電デバイスの一例として、圧電発振器について説明する。
図1及び図2に示すように、本発明の第1の実施形態に係る圧電振動子100は、素子搭載部材110と圧電振動素子120と蓋部材130と集積回路素子140で主に構成されている。この圧電振動子100は、前記素子搭載部材110に形成されている凹部空間111内に圧電振動素子120と集積回路素子140が搭載され、その凹部空間111が蓋部材130により気密封止された構造となっている。
In this embodiment, a piezoelectric oscillator will be described as an example of a piezoelectric device.
As shown in FIGS. 1 and 2, the piezoelectric vibrator 100 according to the first embodiment of the present invention is mainly composed of an element mounting member 110, a piezoelectric vibration element 120, a lid member 130, and an integrated circuit element 140. Yes. The piezoelectric vibrator 100 has a structure in which a piezoelectric vibration element 120 and an integrated circuit element 140 are mounted in a recessed space 111 formed in the element mounting member 110, and the recessed space 111 is hermetically sealed by a lid member 130. It has become.

圧電振動素子120は、図1及び図2に示すように、水晶素板121に励振用電極122を被着形成したものであり、外部からの交番電圧が励振用電極122を介して水晶素板121に印加されると、所定の振動モード及び周波数で励振を起こすようになっている。
水晶素板121は、人工水晶体から所定のカットアングルで切断し外形加工を施された概略平板状で平面形状が例えば四角形となっている。
励振用電極122は、前記水晶素板121の表裏両主面に金属を所定のパターンで被着・形成したものである。
このような圧電振動素子120は、その両主面に被着されている励振用電極122から延出する引き出し電極124と後述する素子搭載部材110の搭載部113の主面に形成されている後述する2個一対の圧電振動素子搭載パッド113とを、導電性接着剤DS(図2参照)を介して電気的且つ機械的に接続することによって搭載される。このときの引き出し電極124が設けられた一辺とは反対側の端辺を圧電振動素子120の自由端である先端部123とする。
As shown in FIGS. 1 and 2, the piezoelectric vibration element 120 is formed by adhering an excitation electrode 122 to a crystal element plate 121, and an alternating voltage from the outside passes through the excitation electrode 122. When applied to 121, excitation occurs in a predetermined vibration mode and frequency.
The quartz base plate 121 is a substantially flat plate shape that is cut from an artificial crystalline lens at a predetermined cut angle and is subjected to outer shape processing, and has a planar shape of, for example, a quadrangle.
The excitation electrode 122 is formed by depositing and forming a metal in a predetermined pattern on both the front and back main surfaces of the crystal base plate 121.
Such a piezoelectric vibration element 120 is formed on a main surface of a lead electrode 124 extending from an excitation electrode 122 attached to both main surfaces of the piezoelectric vibration element 120 and a mounting portion 113 of an element mounting member 110 described later. The two pairs of piezoelectric vibration element mounting pads 113 are mounted by electrically and mechanically connecting them through a conductive adhesive DS (see FIG. 2). At this time, an end opposite to the one side where the extraction electrode 124 is provided is defined as a distal end portion 123 which is a free end of the piezoelectric vibration element 120.

集積回路素子140は、図1〜図3に示すように、回路形成面に前記圧電振動素子120からの発振出力を生成する発振回路等が設けられており、この発振回路で生成された出力信号は外部接続用電極端子116を介して圧電発振器100の外へ出力され、例えば、クロック信号等の基準信号として利用される。
また、集積回路素子140には、可変容量素子に周囲温度に応じた制御電圧を印加して温度変化による発振回路の発振周波数の変動を補償するため、3次関数発生回路及び記憶素子部により温度補償回路部が設けられており、3次関数発生回路には、温度センサが接続されている。
この温度センサは、検出した温度と、温度センサに印加させる電圧値とに基づいて生成される温度データ信号(電圧値)が3次関数発生回路に出力される構成となっている。
集積回路素子140には、後述する集積回路素子搭載パッド115と接合するための素子搭載部材接合用電極141が設けられている。
また、集積回路素子140の素子搭載部材接合用電極141と素子搭載部材110の集積回路素子搭載パッド115とは、熱と荷重をかけることによって接合されている。
接合時にかける温度は、例えば、200〜400℃である。また荷重は、1つの素子搭載部材接合用電極141当たり0.981N以上かける必要がある。
As shown in FIGS. 1 to 3, the integrated circuit element 140 is provided with an oscillation circuit or the like for generating an oscillation output from the piezoelectric vibration element 120 on the circuit formation surface, and an output signal generated by the oscillation circuit. Is output to the outside of the piezoelectric oscillator 100 via the external connection electrode terminal 116, and is used as a reference signal such as a clock signal, for example.
In addition, in the integrated circuit element 140, in order to compensate the fluctuation of the oscillation frequency of the oscillation circuit due to the temperature change by applying a control voltage according to the ambient temperature to the variable capacitance element, the temperature is controlled by the cubic function generation circuit and the storage element unit A compensation circuit unit is provided, and a temperature sensor is connected to the cubic function generation circuit.
This temperature sensor is configured to output a temperature data signal (voltage value) generated based on the detected temperature and a voltage value applied to the temperature sensor to a cubic function generation circuit.
The integrated circuit element 140 is provided with an element mounting member bonding electrode 141 for bonding to an integrated circuit element mounting pad 115 described later.
The element mounting member bonding electrode 141 of the integrated circuit element 140 and the integrated circuit element mounting pad 115 of the element mounting member 110 are bonded together by applying heat and a load.
The temperature applied at the time of joining is, for example, 200 to 400 ° C. Further, it is necessary to apply a load of 0.981 N or more per one element mounting member bonding electrode 141.

素子搭載部材接合用電極141は、図3及び図4に示すように、アルミニウム層141aと、中間金属層141bと、メッキバンプ層141cとで構成されている。
アルミニウム層141aの厚みd1は、0.6〜1.5μmである。
アルミニウム層141aの厚みd1が0.6μm未満の場合、図5に示すように、接合不良発生率が増加していく傾向にあることが確認できる。また、アルミニウム層141aの厚みd1が1.5μmより大きい場合、図5に示すように、接合不良発生率が増加していく傾向にあることが確認できる。
図5に示すように、アルミニウム層141aの厚みd1は、0.6〜1.5μmであることによって、集積回路素子140とアルミニウム層140aとの界面及びアルミニウム層140aと中間金属層140bとの界面が剥がれてしまう接合不良発生率が0%になっていることが確認できる。
つまり、アルミニウム層141aの厚みd1は、0.6〜1.5μmであることによって、集積回路素子140の素子搭載部材接合用電極141と素子搭載部材110の集積回路素子搭載パッド115との接合不良発生率を低減することができる。
As shown in FIGS. 3 and 4, the element mounting member bonding electrode 141 includes an aluminum layer 141 a, an intermediate metal layer 141 b, and a plating bump layer 141 c.
The thickness d1 of the aluminum layer 141a is 0.6 to 1.5 μm.
When the thickness d1 of the aluminum layer 141a is less than 0.6 μm, as shown in FIG. 5, it can be confirmed that the bonding failure occurrence rate tends to increase. Further, when the thickness d1 of the aluminum layer 141a is larger than 1.5 μm, it can be confirmed that the incidence of defective bonding tends to increase as shown in FIG.
As shown in FIG. 5, when the thickness d1 of the aluminum layer 141a is 0.6 to 1.5 μm, the interface between the integrated circuit element 140 and the aluminum layer 140a, and the interface between the aluminum layer 140a and the intermediate metal layer 140b. It can be confirmed that the occurrence rate of bonding failure that peels off is 0%.
That is, since the thickness d1 of the aluminum layer 141a is 0.6 to 1.5 μm, the bonding failure between the element mounting member bonding electrode 141 of the integrated circuit element 140 and the integrated circuit element mounting pad 115 of the element mounting member 110 is caused. The occurrence rate can be reduced.

図4に示す中間金属層141bは、例えば、チタン(Ti)、タングステン(W)等から構成されており、中間金属層141bの厚みd2は、0.5〜1.7μmである。
中間金属層141bの厚みd2が0.5μm未満の場合、図6に示すように、接合不良発生率が増加していく傾向にあることが確認できる。また、中間金属層141bの厚みd2が1.7μmより大きい場合、図6に示すように、接合不良発生率が増加していく傾向にあることが確認できる。
図6に示すように、中間金属層141bの厚みd2は、0.5〜1.7μmであることによって、アルミニウム層141aと中間金属層141bとの界面及び中間金属層141bとメッキバンプ層141cとの界面が剥がれてしまう接合不良発生率が0%になっていることが確認できる。
つまり、中間金属層141bの厚みd2は、0.5〜1.7μmであることによって、集積回路素子140の素子搭載部材接合用電極141と素子搭載部材110の集積回路素子搭載パッド115との接合不良発生率を低減することができる。
The intermediate metal layer 141b shown in FIG. 4 is made of, for example, titanium (Ti), tungsten (W), etc., and the thickness d2 of the intermediate metal layer 141b is 0.5 to 1.7 μm.
When the thickness d2 of the intermediate metal layer 141b is less than 0.5 μm, as shown in FIG. 6, it can be confirmed that the bonding failure occurrence rate tends to increase. Further, when the thickness d2 of the intermediate metal layer 141b is larger than 1.7 μm, it can be confirmed that the bonding failure occurrence rate tends to increase as shown in FIG.
As shown in FIG. 6, when the thickness d2 of the intermediate metal layer 141b is 0.5 to 1.7 μm, the interface between the aluminum layer 141a and the intermediate metal layer 141b and the intermediate metal layer 141b and the plating bump layer 141c It can be confirmed that the bonding failure occurrence rate at which the interface is peeled off is 0%.
In other words, the thickness d2 of the intermediate metal layer 141b is 0.5 to 1.7 μm, so that the element mounting member bonding electrode 141 of the integrated circuit element 140 and the integrated circuit element mounting pad 115 of the element mounting member 110 are bonded. The defect occurrence rate can be reduced.

図4に示すメッキバンプ層141cは、例えば金(Au)より構成されており、メッキバンプ層141cの厚みd3は、5〜30μmである。
メッキバンプ層141cの厚みd3が5μm未満の場合、図7示すように、接合不良発生率が増加していく傾向にあることが確認できる。また、メッキバンプ層141cの厚みd3が30μmより大きい場合、図7に示すように、接合不良発生率が増加していく傾向にあることが確認できる。
また、メッキバンプ層141cの厚みd3を30μmより大きくした場合には、接合する際に、メッキバンプ層141cの厚みを増した分だけ、荷重をかける必要があるので、集積回路素子140が割れてしまうことがあった。
図7に示すように、メッキバンプ層141cの厚みd3は、5〜30μmであることによって、中間金属層141bとメッキバンプ層141cの界面が剥がれてしまうことを防ぐことができる。また、集積回路素子140の素子搭載部材接合用電極141のメッキバンプ141cと素子搭載部材110の集積回路素子搭載パッド115との界面が剥がれてしまう接合不良発生率が0%になっていることが確認できる。
つまり、メッキバンプ層141cの厚みd3は、5〜30μmであることによって、集積回路素子140の素子搭載部材接合用電極141と素子搭載部材110の集積回路素子搭載パッド115との接合不良発生率を低減することができ、集積回路素子140が割れることも防ぐことができる。
The plated bump layer 141c shown in FIG. 4 is made of, for example, gold (Au), and the thickness d3 of the plated bump layer 141c is 5 to 30 μm.
When the thickness d3 of the plating bump layer 141c is less than 5 μm, it can be confirmed that the bonding failure occurrence rate tends to increase as shown in FIG. Further, when the thickness d3 of the plated bump layer 141c is larger than 30 μm, it can be confirmed that the bonding failure occurrence rate tends to increase as shown in FIG.
Further, when the thickness d3 of the plating bump layer 141c is larger than 30 μm, it is necessary to apply a load by an amount corresponding to the increase in the thickness of the plating bump layer 141c at the time of bonding, so that the integrated circuit element 140 is cracked. There was a case.
As shown in FIG. 7, when the thickness d3 of the plating bump layer 141c is 5 to 30 μm, it is possible to prevent the interface between the intermediate metal layer 141b and the plating bump layer 141c from being peeled off. In addition, the bonding failure occurrence rate at which the interface between the plating bump 141c of the element mounting member bonding electrode 141 of the integrated circuit element 140 and the integrated circuit element mounting pad 115 of the element mounting member 110 is peeled off is 0%. I can confirm.
In other words, the thickness d3 of the plated bump layer 141c is 5 to 30 μm, so that the bonding failure occurrence rate between the element mounting member bonding electrode 141 of the integrated circuit element 140 and the integrated circuit element mounting pad 115 of the element mounting member 110 is reduced. The integrated circuit element 140 can be prevented from cracking.

図1〜図2に示すように、素子搭載部材110は、基板部110a、第1の枠部110b、第2の枠部110cと、搭載部113と、圧電振動素子搭載パッド114と、集積回路素子搭載パッド115と、外部接続用電極端子116で主に構成されている。
素子搭載部材110は、基板部110aの一方の主面に第1の枠部110bと第2の枠部110cが設けられて、凹部空間111が形成されている。
As shown in FIGS. 1 to 2, the element mounting member 110 includes a substrate portion 110a, a first frame portion 110b, a second frame portion 110c, a mounting portion 113, a piezoelectric vibration element mounting pad 114, and an integrated circuit. It is mainly composed of an element mounting pad 115 and an external connection electrode terminal 116.
The element mounting member 110 is provided with a first frame part 110b and a second frame part 110c on one main surface of the substrate part 110a to form a recessed space 111.

この素子搭載部材110は、例えば基板部110aの上に第1の枠部110b、第2の枠部110cの順に積層されており、前記第2の枠部110cが、前記第1の枠部110bの開口の幅よりも広くなるように形成されている。
これにより、第1の枠部110bと第2の枠部110cによって、凹部空間111底面に搭載部113が形成される。従って、搭載部113は、前記第1の枠部110bの前記凹部空間111内側壁部と、第1の枠部110bの主面によって形成される。
また、搭載部113の主面には、2個一対の圧電振動素子搭載パッド114が設けられている。
また、素子搭載部材110の前記凹部空間111内に露出する前記基板部110aの主面には、集積回路素子搭載パッド115が設けられている。
また、素子搭載部材110の基板部110aの他方の主面の4隅には、外部接続用電極端子116が設けられている。
また、この素子搭載部材110の第2の枠部110cの主面には、環状の封止用導体パターン112が設けられている。
The element mounting member 110 is laminated, for example, in the order of a first frame portion 110b and a second frame portion 110c on a substrate portion 110a, and the second frame portion 110c is stacked on the first frame portion 110b. It is formed to be wider than the width of the opening.
Thus, the mounting portion 113 is formed on the bottom surface of the recessed space 111 by the first frame portion 110b and the second frame portion 110c. Therefore, the mounting portion 113 is formed by the inner wall portion of the recessed space 111 of the first frame portion 110b and the main surface of the first frame portion 110b.
In addition, two pairs of piezoelectric vibration element mounting pads 114 are provided on the main surface of the mounting portion 113.
An integrated circuit element mounting pad 115 is provided on the main surface of the substrate part 110 a exposed in the recessed space 111 of the element mounting member 110.
In addition, external connection electrode terminals 116 are provided at the four corners of the other main surface of the substrate portion 110 a of the element mounting member 110.
An annular sealing conductor pattern 112 is provided on the main surface of the second frame portion 110 c of the element mounting member 110.

尚、この素子搭載部材110を構成する基板部110a、第1の枠部110b、第2の枠部110cは、例えばアルミナセラミックス、ガラス−セラミック等のセラミック材料を複数積層することよって形成されている。また、基板部110aは、セラミック材が積層した構造となっている。   In addition, the board | substrate part 110a, the 1st frame part 110b, and the 2nd frame part 110c which comprise this element mounting member 110 are formed by laminating | stacking multiple ceramic materials, such as an alumina ceramic and glass-ceramic, for example. . The substrate unit 110a has a structure in which ceramic materials are stacked.

この素子搭載部材110の第2の枠部110cの主面には、環状の封止用導体パターン112が設けられている。
また、基板部110aの内層には、配線パターン(図示せず)等が設けられている。
An annular sealing conductor pattern 112 is provided on the main surface of the second frame portion 110 c of the element mounting member 110.
In addition, a wiring pattern (not shown) or the like is provided in the inner layer of the substrate unit 110a.

圧電振動素子搭載パッド114は、タングステン(W)、モリブデン(Mo)等から成る第1の金属層の表面に、金メッキ等からなる第2の金属層を積層することで形成されている。   The piezoelectric vibration element mounting pad 114 is formed by laminating a second metal layer made of gold plating or the like on the surface of a first metal layer made of tungsten (W), molybdenum (Mo) or the like.

集積回路素子搭載パッド115は、図4に示すように、ニッケルメッキ層115aと金メッキ層115bにより構成されている。
前記集積回路素子搭載パッド115の金メッキ層115bの平坦度が、1.0μmより大きい場合には、素子搭載部材接合用電極141のメッキバンプ層141cと接合した際に、素子搭載部材110が熱により反ってしまうと、応力が吸収できない為、剥がれてしまっていた。
つまり、図8に示すように、前記集積回路素子搭載パッド115の金メッキ層115bの平坦度が、1.0μm以下であることにより、素子搭載部材接合用電極141のメッキバンプ層141cと接合した際に、素子搭載部材110が熱により反ってしまっても、応力を吸収できる為、集積回路素子140の素子搭載部材接合用電極141が素子搭載部材110の集積回路素子搭載パッド115から剥がれてしまうことを防ぐことができる。
As shown in FIG. 4, the integrated circuit element mounting pad 115 includes a nickel plating layer 115a and a gold plating layer 115b.
When the flatness of the gold plating layer 115b of the integrated circuit element mounting pad 115 is larger than 1.0 μm, the element mounting member 110 is heated due to heat when bonded to the plating bump layer 141c of the element mounting member bonding electrode 141. When warped, the stress could not be absorbed, so it was peeled off.
That is, as shown in FIG. 8, when the flatness of the gold plating layer 115b of the integrated circuit element mounting pad 115 is 1.0 μm or less, it is bonded to the plating bump layer 141c of the element mounting member bonding electrode 141. In addition, since the stress can be absorbed even if the element mounting member 110 is warped by heat, the element mounting member bonding electrode 141 of the integrated circuit element 140 is peeled off from the integrated circuit element mounting pad 115 of the element mounting member 110. Can be prevented.

前記封止用導体パターン112は、例えば、タングステン(W)、モリブデン(Mo)、等から成る基層の表面にニッケル(Ni)層及び金(Au)層を順次、凹部空間111を環状に囲繞する形態で被着させることによって、10μm〜25μmの厚みに形成されている。   The sealing conductor pattern 112 surrounds the recess space 111 in an annular shape by sequentially placing a nickel (Ni) layer and a gold (Au) layer on the surface of a base layer made of, for example, tungsten (W), molybdenum (Mo), or the like. By making it adhere in a form, it is formed to a thickness of 10 μm to 25 μm.

蓋部材130は、例えば、Fe−Ni合金(42アロイ)やFe−Ni−Co合金(コバール)などからなる。このような蓋部材130は、凹部空間111を、窒素ガスや真空などで気密的に封止される。具体的には、蓋部材130は、窒素雰囲気中や真空雰囲気中で、素子搭載部材110の第2の枠部110c上に載置され、第2の枠部110cの封止用導体パターン112と蓋部材130の封止部材131とが溶接されるように所定電流を印加してシーム溶接を行うことにより、第2の枠部110bに接合される。
封止部材131は、例えば、銀ロウ(Ag−Cu)、金錫(Au−Sn)等によって形成されている。
The lid member 130 is made of, for example, an Fe—Ni alloy (42 alloy), an Fe—Ni—Co alloy (Kovar), or the like. Such a lid member 130 hermetically seals the recessed space 111 with nitrogen gas or vacuum. Specifically, the lid member 130 is placed on the second frame portion 110c of the element mounting member 110 in a nitrogen atmosphere or a vacuum atmosphere, and the sealing conductor pattern 112 of the second frame portion 110c By applying a predetermined current so that the sealing member 131 of the lid member 130 is welded and performing seam welding, the lid member 130 is joined to the second frame portion 110b.
The sealing member 131 is made of, for example, silver brazing (Ag—Cu), gold tin (Au—Sn), or the like.

前記導電性接着剤DSは、シリコーン樹脂等のバインダーの中に導電フィラーとして導電性粉末が含有されているものであり、導電性粉末としては、例えばアルミニウム(Al)、モリブデン(Mo)、タングステン(W)、白金(Pt)、パラジウム(Pd)、銀(Ag)、チタン(Ti)、ニッケル(Ni)、ニッケル鉄(NiFe)、のうちのいずれかまたはこれらの組み合わせを含むものが用いられている。
また、導電性接着剤DSには、塗布し易い粘度に調整するために添加した溶剤が含有されている。
The conductive adhesive DS contains conductive powder as a conductive filler in a binder such as silicone resin. Examples of the conductive powder include aluminum (Al), molybdenum (Mo), tungsten ( W), platinum (Pt), palladium (Pd), silver (Ag), titanium (Ti), nickel (Ni), nickel iron (NiFe), or any combination thereof is used. Yes.
The conductive adhesive DS contains a solvent added to adjust the viscosity to be easily applied.

尚、前記素子搭載部材110は、アルミナセラミックスから成る場合、所定のセラミック材料粉末に適当な有機溶剤等を添加・混合して得たセラミックグリーンシートの表面に、封止用導体パターン112、圧電振動素子搭載パッド113、外部接続用電極端子114等となる導体ペーストを、また、セラミックグリーンシートに打ち抜き等を施して予め穿設しておいた貫通孔内にビア導体となる導体ペーストを従来周知のスクリーン印刷によって塗布するとともに、これを複数枚積層してプレス成形した後、高温で焼成することにより製作される。   When the element mounting member 110 is made of alumina ceramic, a sealing conductor pattern 112, piezoelectric vibration, and the like are formed on the surface of a ceramic green sheet obtained by adding and mixing a suitable organic solvent to a predetermined ceramic material powder. Conventionally known is a conductor paste to be the element mounting pad 113, the external connection electrode terminal 114, etc., and a conductor paste to be a via conductor in a through-hole previously punched by punching the ceramic green sheet. It is manufactured by applying it by screen printing, laminating a plurality of these and press-molding them, followed by firing at a high temperature.

本発明の圧電発振器100によれば、素子搭載部材接合用電極141は、アルミニウム層141aと、中間金属層141bと、メッキバンプ層141cとで構成され、アルミニウム層141aの厚みd1は、0.6〜1.5μmであり、中間金属層141bの厚みd2は、0.5〜1.7μmであり、メッキバンプ層141cの厚みd3は、5〜30μmであることによって、集積回路素子140の素子搭載部材接合用電極141が集積回路素子140から剥がれてしまうことを防ぐことができ、集積回路素子140の素子搭載部材接合用電極141が素子搭載部材110の集積回路素子搭載パッド115から剥がれてしまうことを防ぐことができる。
また、アルミニウム層141aの厚みd1が、0.6〜1.5μmであり、中間金属層141bの厚みd2が、0.5〜1.7μmであり、メッキバンプ層141cの厚みd3が、5〜30μmであるという3つの条件を合わせることで、集積回路素子140の素子搭載部材接合用電極141が集積回路素子140から剥がるのをさらに防ぎ、集積回路素子140の素子搭載部材接合用電極141が素子搭載部材110の集積回路素子搭載パッド115から剥がれるのをさらに防ぐことができる。つまり、この3つの条件を合わせることによって、接合不良発生率をさらに低減させることができる。
According to the piezoelectric oscillator 100 of the present invention, the element mounting member bonding electrode 141 includes the aluminum layer 141a, the intermediate metal layer 141b, and the plating bump layer 141c, and the thickness d1 of the aluminum layer 141a is 0.6. The thickness d2 of the intermediate metal layer 141b is 0.5 to 1.7 μm, and the thickness d3 of the plated bump layer 141c is 5 to 30 μm. It is possible to prevent the member bonding electrode 141 from being peeled off from the integrated circuit element 140, and the element mounting member bonding electrode 141 of the integrated circuit element 140 is peeled off from the integrated circuit element mounting pad 115 of the element mounting member 110. Can be prevented.
Further, the thickness d1 of the aluminum layer 141a is 0.6 to 1.5 μm, the thickness d2 of the intermediate metal layer 141b is 0.5 to 1.7 μm, and the thickness d3 of the plating bump layer 141c is 5 to 5 μm. By combining the three conditions of 30 μm, the element mounting member bonding electrode 141 of the integrated circuit element 140 is further prevented from peeling off from the integrated circuit element 140, and the element mounting member bonding electrode 141 of the integrated circuit element 140 is It is possible to further prevent the element mounting member 110 from being peeled off from the integrated circuit element mounting pad 115. That is, by combining these three conditions, it is possible to further reduce the bonding failure occurrence rate.

また、前記集積回路素子搭載パッド115がニッケルメッキ層115aと、金メッキ層115bから構成され、前記集積回路素子搭載パッド115の金メッキ層115bの平坦度(図8参照)が、0.1〜1.0μmであることによって、素子搭載部材接合用電極141と接合した際に、素子搭載部材110が熱により反ってしまっても、応力を吸収できる為、集積回路素子140の素子搭載部材接合用電極141が素子搭載部材110の集積回路素子搭載パッド115から剥がれてしまうことを防ぐことができる。   The integrated circuit element mounting pad 115 is composed of a nickel plating layer 115a and a gold plating layer 115b, and the flatness (see FIG. 8) of the gold plating layer 115b of the integrated circuit element mounting pad 115 is 0.1 to 1. By being 0 μm, the element mounting member bonding electrode 141 of the integrated circuit element 140 can absorb stress even when the element mounting member 110 is warped by heat when bonded to the element mounting member bonding electrode 141. Can be prevented from being peeled off from the integrated circuit element mounting pad 115 of the element mounting member 110.

尚、本発明は上述の実施形態に限定されるものでなく、本発明の要旨を逸脱しない範囲において種々の変更、改良等が可能である。
例えば、前記した本実施形態では、圧電振動素子を構成する圧電素材として水晶を用いた場合を説明したが、他の圧電素材として、ニオブ酸リチウム、タンタル酸リチウムまたは、圧電セラミックスを圧電素材として用いた圧電振動素子でも構わない。
In addition, this invention is not limited to the above-mentioned embodiment, A various change, improvement, etc. are possible in the range which does not deviate from the summary of this invention.
For example, in the above-described embodiment, the case where quartz is used as the piezoelectric material constituting the piezoelectric vibration element has been described. However, as other piezoelectric materials, lithium niobate, lithium tantalate, or piezoelectric ceramics is used as the piezoelectric material. The piezoelectric vibration element may be used.

110・・・素子搭載部材
110a・・・基板部
110b・・・第1の枠部
110c・・・第2の枠部
111・・・凹部空間
112・・・封止用導体パターン
113・・・搭載部
114・・・圧電振動素子搭載パッド
115・・・集積回路素子搭載パッド
115a・・・ニッケルメッキ層
115b・・・金メッキ層
116・・・外部接続用電極端子
120・・・圧電振動素子
121・・・圧電素板
122・・・励振用電極
123・・・先端部
124・・・引き出し電極
130・・・蓋部材
131・・・封止部材
140・・・集積回路素子
141・・・素子搭載部材接合用電極
141a・・・アルミニウム層
141b・・・中間金属層
141c・・・メッキバンプ層
DS・・・導電性接着剤
100・・・圧電発振器
DESCRIPTION OF SYMBOLS 110 ... Element mounting member 110a ... Board | substrate part 110b ... 1st frame part 110c ... 2nd frame part 111 ... Recessed space 112 ... Conductive pattern 113 for sealing ... Mounting part 114 ... Piezoelectric vibration element mounting pad 115 ... Integrated circuit element mounting pad 115a ... Nickel plating layer 115b ... Gold plating layer 116 ... External connection electrode terminal 120 ... Piezoelectric vibration element 121 ... Piezoelectric element plate 122 ... Excitation electrode 123 ... Tip portion 124 ... Lead electrode 130 ... Cover member 131 ... Sealing member 140 ... Integrated circuit element 141 ... Element Electrode for mounting member bonding 141a ... aluminum layer 141b ... intermediate metal layer 141c ... plating bump layer DS ... conductive adhesive 100 ... piezoelectric oscillator

Claims (2)

基板部とこの基板部の一方の主面に第1の枠部と第2の枠部が設けられて凹部空間が形成されている素子搭載部材と、
前記凹部空間内底面に搭載部が設けられ、前記搭載部の主面に設けられている2個一対の圧電振動素子搭載パッドと、
前記圧電振動素子搭載パッドに搭載されている圧電振動素子と、
前記凹部空間内に露出する前記基板部に設けられている集積回路素子搭載パッドと、
前記集積回路素子搭載パッドと接合するための素子搭載部材接合用電極が設けられている集積回路素子と、
前記凹部空間を気密封止する蓋部材と、を備え、
前記素子搭載部材接合用電極は、アルミニウム層と、中間金属層と、メッキバンプ層とで構成され、
前記アルミニウム層の厚みが、0.6〜1.5μmであり、
前記中間金属層の厚みが、0.5〜1.7μmであり、
前記メッキバンプ層の厚みが、5〜30μmであることを特徴とする圧電発振器。
An element mounting member in which a first frame portion and a second frame portion are provided on one main surface of the substrate portion and the substrate portion to form a recessed space;
A mounting portion is provided on the bottom surface in the recessed space, and a pair of piezoelectric vibration element mounting pads provided on the main surface of the mounting portion;
A piezoelectric vibration element mounted on the piezoelectric vibration element mounting pad;
An integrated circuit element mounting pad provided on the substrate portion exposed in the recess space;
An integrated circuit element provided with an element mounting member bonding electrode for bonding to the integrated circuit element mounting pad;
A lid member for hermetically sealing the recessed space,
The element mounting member bonding electrode includes an aluminum layer, an intermediate metal layer, and a plating bump layer.
The aluminum layer has a thickness of 0.6 to 1.5 μm,
The intermediate metal layer has a thickness of 0.5 to 1.7 μm,
The thickness of the said plating bump layer is 5-30 micrometers, The piezoelectric oscillator characterized by the above-mentioned.
前記集積回路素子搭載パッドがニッケルメッキ層と、金メッキ層から構成され、前記集積回路素子搭載パッドの金メッキ層の平坦度が、1.0μm以下であることを特徴とする請求項1記載の圧電発振器。   2. The piezoelectric oscillator according to claim 1, wherein the integrated circuit element mounting pad comprises a nickel plating layer and a gold plating layer, and the flatness of the gold plating layer of the integrated circuit element mounting pad is 1.0 μm or less. .
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