JP2011040941A - Spread spectrum clock generating device, image reading apparatus, image forming apparatus, and spread spectrum clock generation method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To draw a high quality image in which fluctuations are not conspicuous or are difficult to be conspicuous to human eyes while securing the degree of freedom of line period setting. <P>SOLUTION: A spread spectrum clock generating device has a phase comparator 24-2 for detecting a phase difference between a reference clock 24-0 and a feedback clock 24-7, and a voltage control transmitter 24-4 for generating a spread spectrum clock of a frequency corresponding to voltage to be generated on the basis of a phase difference signal detected by the phase comparator 24-2. The spread spectrum clock generating device includes an analog modulated signal generating part 26 for creating an analog modulated signal 24-6 for changing a frequency modulation period of a voltage control oscillator 24-4 on the basis of a drive clock generated from the spread spectrum clock 24-7 output from the voltage control oscillator 24-4, and applying the analog modulated signal to the voltage control oscillator 24-4. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a spread spectrum clock generation apparatus, an image reading apparatus equipped with the clock generation apparatus, a printer equipped with the clock generation apparatus, a digital copying machine, an image forming apparatus such as a facsimile, and a spread spectrum clock generation method.

  There is image capturing means for optically reading a document image, converting it into digital image data and capturing it. This image capturing means, for example, obtains an analog information signal by photoelectrically converting reflected light or scattered light from a subject with a linear CCD, sampling each pixel, and generating digital image data by A / D conversion. Is. The original line information obtained by the CCD is two-dimensionally developed by scanning the carriage or conveying the original by an automatic paper feeding means, and can be obtained as surface information.

  On the other hand, with the demand for higher image quality and higher speed for image forming apparatuses such as digital copying machines, image reading apparatuses provided in the image forming apparatus are also required to have higher pixel density and higher speed during image reading. In response to such demands, image reading apparatuses (scanners) have recently been tended to have higher pixel density and higher speed, and accordingly, unnecessary radiation (EMI-Electromagnetic Interference) has become a problem. In order to prevent this problem, a spread spectrum clock generator (SSCG-Spectrum Spread Clock Generator—hereinafter abbreviated as “SSCG”) is often used. That is, in order to reduce the radiation electromagnetic intensity level emitted from the image capturing means, a clock spread in spectrum by SSCG is often used to drive each control IC.

  However, as a side effect, a steady fluctuation of the clock width appears as a fluctuation like a periodic undulation in the main scanning direction of the image. If these fluctuations are further arranged in a certain period in the sub-scanning direction, the fluctuations are more emphasized to the human eye, and as a result, even when an image with a uniform distribution is read, a pattern such as a streak or stripe is obtained. Appears.

  8 to 10 show examples of image fluctuations caused by SSCG, and FIGS. 11 and 12 show examples of actual images. Assume that a document with a completely uniform in-plane distribution is read by a scanner. At this time, if fluctuations occur in the main scanning direction data in one line due to SSCG, periodic fluctuations are observed as shown in FIG. In FIG. 8, the horizontal axis represents pixels, and the vertical axis represents the image level (image density level). By arranging this data in the sub-scanning direction, two-dimensional surface data is constructed.

Here, the fluctuation of the image level as shown in FIG.
It is known that n = the number of clocks in one line of image / the SSCG modulation period is more emphasized as n is closer to an integer. FIG. 9 shows an image model when n is close to an integer, and FIG. 10 shows an image model when n is far from an integer. In the model of FIG. 8, the “crest” and “valley” portions of the image fluctuation component are regularly shifted at a predetermined pitch in the sub-scanning direction and have periodicity. It looks like a pattern. The actual image at this time is shown in FIG. In FIG. 11, the density is recognized as a streak.

  On the other hand, when the “crest” and “valley” portions of the image fluctuation component are non-periodically arranged in the sub-scanning direction, the model diagram shown in FIG. 10 is obtained. The actual image of FIG. 10 is as shown in FIG. 9 and 10, or FIGS. 11 and 12, the fluctuation components for each line are the same, but it can be seen that the conspicuousness changes greatly depending on the arrangement of these fluctuation components.

  As a technique for suppressing such a phenomenon that looks like a streak or a stripe pattern, for example, an invention disclosed in Patent Document 1 (Japanese Patent No. 3631637) or Patent Document 2 (Japanese Patent Laid-Open No. 2008-118366) is known. Among them, in Patent Document 1, the period of the main scanning line synchronization signal is set to about an integral multiple of the modulation frequency of the spread spectrum clock generating means + half cycle, and at least the photoelectric conversion means and the A / D conversion are set as the minimum system configuration. An invention has been disclosed in which the means portion is driven by a spread spectrum clock to reduce the EMI and prevent the appearance of a striped pattern.

  Further, Patent Document 2 discloses that an image reading apparatus having a function of converting incident light into an analog image signal by a photoelectric conversion element, digitizing the analog image signal by an A / D converter, and outputting the analog image signal is converted into a frequency. Comprising means for driving with a modulated clock, superimposing a signal of the same fluctuation amount on the image signal in the opposite phase to the fluctuation of the analog image signal according to the frequency change of the clock, and removing the fluctuation component in the image signal; An invention is disclosed in which horizontal stripes are prevented from appearing.

  In order to suppress the occurrence of streaks in this way, in the invention described in Patent Document 1, the number of clocks for one line is set so that no correlation occurs between the line period and the modulation period (so that n is not close to an integer). Although the period of the main scanning line synchronization signal is determined to be approximately an integral multiple of the modulation frequency of the spread spectrum clock generating means + half period, the line period is often determined from system factors, and the degree of freedom of change is The current situation is small.

  Further, in the invention described in Patent Document 2, the periodic variation of the modulation signal is reduced by detecting the modulation frequency of the clock at the voltage level and applying the antiphase signal of the analog voltage level to the analog image signal. . However, the circuit scale is large, expensive, and requires relatively severe timing adjustment and adjustment algorithm. In any case, the degree of freedom in design is small, and it is necessary to design within narrow constraints.

  Therefore, the problem to be solved by the present invention is to be able to draw a high-quality image in which fluctuations are inconspicuous or inconspicuous to human eyes while ensuring the freedom of setting the line period.

  In order to solve the above-described problem, the first means is configured to detect a phase difference between the input clock and the footback clock, and a voltage generated based on the phase difference signal detected by the detection means. A spread spectrum clock generating device for generating a spread spectrum clock having a frequency, the frequency of the variable oscillation means based on a control signal generated from the spread spectrum clock output from the variable oscillation means A modulation signal for changing a modulation period is generated, and frequency modulation period changing means for applying the modulation signal to the variable oscillation means is provided.

  The second means is characterized in that, in the first means, the frequency modulation period changing means changes the frequency modulation period in accordance with the number of clocks of one line of the document image.

  According to a third means, in the second means, the frequency modulation period changing means counts the number of clocks and outputs a digital signal corresponding to the number of counts, and an output signal of the up / down counter. D / A conversion means for converting into an analog signal, and applying an analog voltage signal generated by the D / A conversion means to an input voltage of the variable oscillation means.

  According to a fourth means, in the third means, the up / down counter is an m-ary up / down counter capable of arbitrarily setting an integer m.

A fifth means is the third means, wherein the up / down counter is
m ← (number of 1 line clock) / (n + a)
Where n is a positive integer
a is a decimal number less than 1
m is a m-ary up / down counter that is a positive integer obtained by rounding up, rounding down, or rounding off the decimal part of the calculation result on the right side.

  A sixth means is the fifth means, wherein the frequency modulation period changing means comprises storage means for storing and reading at least one of the parameters m, n, and a of the up / down counter. And

  Seventh means includes a photoelectric conversion element that converts reflected light of a document image into an analog electric signal by photoelectric conversion, an A / D conversion means that converts an analog electric signal output from the photoelectric conversion element into a digital signal, A spread spectrum clock generation apparatus according to any one of the first to sixth means, wherein the control signal is also input to the photoelectric conversion element and the A / D conversion means.

  The eighth means is characterized by comprising a spread spectrum clock generator according to any one of the first to sixth means.

  A ninth means is characterized in that the image forming apparatus includes the image reading apparatus according to the seventh means.

  A tenth means is a spread spectrum clock generation method for detecting a phase difference between an input clock and a footback clock and generating a spread spectrum clock having a frequency corresponding to a voltage generated based on the detected phase difference. A control signal is generated from a spread spectrum clock having a frequency corresponding to a voltage generated based on the detected phase difference, and a frequency modulation period of the spread spectrum clock is changed based on the generated control signal. And generating a new spread spectrum clock by changing the frequency modulation period by feeding back the modulation signal to a voltage generated based on the detected phase difference.

  In the embodiment described later, the detection means is the phase comparator 24-2, the input clock is the reference clock 24-0, the feedback clock is the spread spectrum clock 24-7 output from the voltage controlled oscillator 24-4, The variable oscillation means is the voltage controlled oscillator 24-5, the spread spectrum clock generator is the SSCG 24, the modulation signal is the analog modulation signal 24-6, the frequency modulation period changing means is the analog modulation signal generation unit 26, and the up / down counter is The m-ary up / down counter 26-1, the D / A conversion means to the D / A converter 26-2, the storage means to the storage medium 26-3, the photoelectric conversion element to the CCD 9, and the A / D conversion means to A The control signal generating means is connected to the timing generator 25 or the timing clock generating section 23, and the image reading device is 1 or SC, an image forming apparatus to the code 100, the corresponding.

  According to the present invention, it is possible to draw a high-quality image in which fluctuations are inconspicuous or inconspicuous to the human eye while ensuring the freedom of setting the line period.

It is a figure which shows embodiment which applied SSCG based on this invention to the image reading apparatus. It is a block diagram which shows the control structure of an image reading apparatus. It is a block diagram which shows the circuit structure of general SSCG. It is a block diagram which shows an example of SSCG in this embodiment. It is a block diagram which shows the other example of SSCG in this embodiment. FIG. 5 is a block diagram showing an example in which the SSCG shown in FIG. 4 is applied to an image reading apparatus. FIG. 7 is a diagram illustrating an example of a configuration of an image forming apparatus when the image reading apparatus illustrated in FIG. 6 is applied to the image forming apparatus. It is a figure which shows the example of a periodic fluctuation | variation when a fluctuation | variation arises in the main scanning direction data in 1 line by SSCG. It is a figure which shows the example of an image fluctuation | variation when the fluctuation | variation like FIG. 8 has periodicity. It is a figure which shows the example of an image fluctuation | variation when the fluctuation | variation like FIG. 8 does not have periodicity. It is a figure which shows the example of the real image at the time of FIG. 9 with which a stripe can be seen in an image. It is a figure which shows the example of the real image at the time of FIG. 10 where a stripe cannot be seen in an image.

  The present invention makes it possible to change the modulation period so that fluctuations are not conspicuous or inconspicuous while keeping the degree of freedom of the line period. Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a diagram showing an embodiment in which the SSCG according to the present invention is applied to an image reading apparatus. In the figure, an image reading device 11 reads an original image like a scanner device in a digital copying machine with a CCD, converts an image signal into a digital signal, and processes the image. It basically includes third reflecting mirrors 3, 4, 5, a lens unit 8, a CCD linear image sensor (hereinafter simply referred to as CCD) 9, and a sensor board 10.

  When reading the flat bed, an original that is optically read is placed on the contact glass 1. The light source 2 and the first reflection mirror 3 are mounted on the first carriage 6, and the second reflection mirror 4 and the third reflection mirror 5 are mounted on the second carriage 7. The first carriage 6 and the second carriage 7 travel in the sub-scanning direction (arrow A direction) at a linear velocity of 2: 1 by a stepping motor. In this traveling process, the reflected light of the light irradiated from the light source 2 to the document surface is received by the first reflecting mirror 3 and incident on the lens unit 8 through the second and third reflecting mirrors 4 and 5, and the lens. The image is formed on the image plane of the CCD 9 from the unit 8. The CCD 9 reads the amount of light incident from the lens unit 8 and photoelectrically converts it. The image reading apparatus is also provided with a white reference plate 13 for correcting various distortions caused by a reading optical system or the like. The white reference plate 13 is read before reading a document, and based on the read data of the white reference plate 13. Then, the image data input from the CCD 9 is subjected to shading correction by the sensor board 10 and output to the subsequent stage as appropriate image density data.

  In document reading by sheet-through, after the first carriage 6 and the second carriage 7 move below the sheet-through reading slit 15, the document 12 installed in the automatic document feeder 14 is guided by the roller 16 in the direction of arrow B. Thus, reading is performed at the position of the sheet-through reading slit 15. The optical system at this time is in a stopped state, but the optical positional relationship is the same as in the flat bed system. The first and second carriages 6 and 7 move slightly to read the white reference plate 13 before reading the sheet-through document, or read the white reference plate provided at the position of the roller 16 or the roller 16 itself. Seeding correction is performed.

  FIG. 2 is a block diagram showing a control configuration of the image reading apparatus. As shown in the figure, the control circuit 18 of the image reading apparatus 11 includes a CCD 9, an analog processing circuit unit 20, an A / C conversion circuit unit 21, an LVDS 22, a timing clock generation unit 23, and an oscillator 17. In the control circuit 18 configured as described above, the analog image data photoelectrically converted by the CCD 9 is output to the analog processing circuit unit 20. The analog processing circuit unit 20 performs various image processing such as sample hold processing and black level correction on the analog image data, and then outputs the analog image data to the A / D conversion circuit unit 21. The A / D conversion circuit unit 21 converts the input analog image data into digital image data, and outputs it to the subsequent stage (image processing circuit unit or the like) via the LVDS interface 22. Various timing clocks of the CCD 9, the analog processing circuit unit 20, the A / D conversion circuit unit 21, the stepping motor, and the light source (both not described) are generated from the clock from the oscillator 17 and supplied by the timing clock generation circuit unit 23. .

  FIG. 3 is a block diagram showing a general SSCG circuit configuration. The SSCG 24 is a first frequency divider (referred to as a frequency divider (1) in the figure) 24-1, a phase comparator 24-2, an adder 24-3, and a voltage controlled oscillator (VCO-Voltage Controlled Oscillator). 24-4, and a second frequency divider (referred to as frequency divider (2) in the figure) 24-5. The SSCG 24 has a PLL (Phase Locked Loop) as a basic configuration, and feedback clocks from the first frequency divider 24-1 and the second frequency divider 24-5 input to the phase comparator 24-2. The property of operating so that the phase (frequency) of two clocks is equal is utilized. At this time, the frequency of the output clock is adjusted or modulated by applying an external voltage (analog modulation signal 24-6) to the voltage value input to the voltage controlled oscillator 24-4.

  In the image reading apparatus 11 according to the present embodiment, a spectrum having a target modulation period is generated by generating an externally applied voltage (analog modulation signal 24-6) from the timing clock generation unit 23 or the like inside the image reading apparatus 11. A spread clock 24-7 is generated. A reference clock 24-0 is input to the first frequency divider 24-1, and a spread spectrum clock 24, which is the output of the voltage controlled oscillator 24-4, is input to the second frequency divider 24-5. -7 is input, the input side and output side frequencies are compared by the phase comparator 24-2, and output to the adder 24-3.

  FIG. 4 is a block diagram illustrating an example of an SSCG in the present embodiment. In this example, the m-ary up / down counter prevents the modulation period of the output clock (spread spectrum clock 24-7) from the spread spectrum clock generator (SSCG) 24 from becoming 1 / n (n: integer) of the number of one line clock. The modulation period is set to be asynchronous with the line period by assigning a specific integer to the variable m of 26-1, so that even if a fluctuation (because of the spread spectrum of the clock) appears in the image, the human I try to make it less noticeable to the eyes.

  The spread spectrum clock 24-7 output from the SSCG 24 is input to the timing generator 25, and is output from the timing generator 25 as a drive clock 25-1. The drive clock 25-1 is supplied to each control IC of the CCD 9 in the image reading apparatus 11 and is also input to the m-adic up / down counter 26-1. Each time the m-ary up / down counter 26-1 receives the drive clock 25-1, the output (binary binary signal) is incremented by 1 to (m-1), and when it reaches (m-1), Thereafter, the operation of counting down by 1 toward 0 is repeated. This signal is converted into an analog modulation signal 24-6 by the D / A converter 26-2, and a periodic analog voltage having a triangular wave shape is generated. In the spread spectrum clock generator (SSCG) 24, the analog voltage signal analog-converted by the D / A converter 26-2 is input to the input of the voltage controlled oscillator 24-4. Is output from the voltage controlled oscillator 24-4. The analog modulation (voltage) signal output from the D / A converter 26-2 is based on the output of the m-adic up / down counter 26-1, and its period is asynchronous with respect to the line period. The modulation period of the spread clock is asynchronous with respect to the line period.

  That is, in the example of FIG. 4, the analog modulation signal generation unit 26 is provided, and the analog modulation signal 24-6 generated by the analog modulation signal generation unit 26 is added to the general SSCG 24 shown in FIG. 3 is added to the input voltage of the voltage controlled oscillator 24-4. In this example, the m-ary up / down counter 26-1 and the D / A 26-2 constitute an analog modulation signal generation unit 26.

The variable m in this m-adic up / down counter is
m ← (number of 1 line clock) / (n + a)
Where n is a positive integer
a is a decimal number less than 1
m is obtained as a positive integer obtained by rounding up, rounding down, or rounding off the decimal part of the calculation result on the right side.

  FIG. 5 is a block diagram illustrating another example of the analog modulation signal generation unit 26. In this example, the analog modulation signal generator 26 shown in FIG. 4 includes a storage medium 26-3 that stores at least one of the parameters m, n, and a of the m-ary up / down counter 26-1. . When a parameter to be set, such as an optimum value, is determined in advance, an optimum modulation period can always be realized by storing the value of the parameter in the storage medium 26-3. Further, when the parameter changes depending on the situation, it is possible to store the previous value, the current value, and the like, so that verification by a serviceman or a designer can be easily performed. Note that a DRAM, a RAM card, a memory, or the like is used as the storage medium.

  FIG. 6 is a block diagram showing an example in which the SSCG 24 shown in FIG.

  In FIG. 6, the timing generator 25 in FIG. 4 is replaced with the timing clock generation unit 23 in FIG. 2, and the oscillator 17 inputs the reference clock 24-0 to the first frequency divider 24-1 of the SSCG 24. As a result, the spread spectrum clock 24-7, which is the output of the voltage controlled oscillator 24-4, is input to the timing clock generator 23 as the drive clock 25-1, and the units 9, 20, 21, and 22 of the image reading apparatus 11 The operation is based on the drive clock 25-1.

  The analog modulation signal generation unit 26 generates an analog modulation signal 24-6 based on the clock from the timing clock generation unit 23, and a spectrum having a modulation period of the spread clock asynchronous with respect to the line period from the voltage controlled oscillator 24-4. A spread clock 24-7 is output. For this reason, even when a variation (because of the spread spectrum of the clock) appears in the image, it is less noticeable to human eyes.

  6 have been described with reference to FIGS. 2 to 4, the same components as those described with reference to FIGS. 2 to 4 are denoted by the same reference numerals, and redundant description will be omitted.

  FIG. 7 is a diagram showing an example of the configuration of the image forming apparatus when the image reading apparatus shown in FIG. 6 is applied to the scanner of the image forming apparatus. The image forming apparatus in FIG. 7 is a monochrome digital copying machine 100. The digital copying machine 100 includes, from above, parts of an automatic document feeder ADF, an image reading device SC, an optical writing unit LU, an image forming unit PR, and a paper feeding device PS. In FIG. 7, the image reading device SC is shown, but it is equivalent to the image reading device 11 shown in FIG.

  A contact glass 1 is provided on the upper surface of the image reading device SC. The automatic document feeder ADF is connected to the copier 100 via a hinge (not shown) so as to open and close the contact glass 1. This automatic document feeder ADF has a document tray 202 as a document placement table on which a document bundle made up of a plurality of documents can be placed, and contacts by separating the documents one by one from the document bundle placed on the document tray 202. A feeding roller 203 that conveys toward the glass 1, a conveyance belt 204 that conveys the document conveyed toward the contact glass 1 by the feeding roller 203 to a reading position on the contact glass 1, and stops the contact glass 1. And a discharge roller 205 for carrying out a document that has been read by the image reading device SC disposed below the contact glass 1. Reference numeral 207 denotes a document set detection sensor. The image reading device SC is as shown in FIG. However, the sheet-through reading mechanism is omitted.

  The paper feed motor is driven by an output signal from a controller (not shown). When the paper feed start signal is input from the copying machine 100, the controller drives the paper feed motor forward and backward. . When the paper feed motor is driven to rotate forward, the feed roller 203 rotates in the clockwise direction so that the uppermost original is fed from the original bundle and conveyed toward the contact glass 1. When the leading edge of the document is detected by the document set detection sensor 207, the controller rotates the paper feed motor in reverse based on the output signal from the document set detection sensor 207. This prevents the subsequent original from entering and prevents double feeding.

  Further, when the document set detection sensor 207 detects the trailing edge of the document, the controller counts the rotation pulse of the conveyor belt motor from this detection point, and when the rotation pulse reaches a predetermined value, the controller drives the conveyor belt 204. Is stopped and the feeding belt 204 is stopped, whereby the document is stopped at the reading position of the contact glass 1. Further, when the trailing edge of the document is detected by the document set detection sensor 207, the controller drives the paper feed motor again, separates the subsequent document as described above, and conveys the document toward the contact glass 1. When the pulse of the paper feed motor from the time when the original is detected by the original set detection sensor 207 reaches a predetermined pulse, the paper feed motor is stopped and the next original is put on standby. When the original stops at the reading position of the contact glass 1, the original is read and exposed by the copying machine 100. When the reading and exposure are completed, a signal is input from the copying machine 100 to the controller, the conveyance belt motor is driven to rotate forward, and the document is carried out from the contact glass 1 to the discharge roller 205 side by the conveyance belt 204.

  The optical writing unit LU includes a laser scanning unit 258 including a semiconductor laser that emits laser light and a polygon mirror, a laser imaging system 259 including an fθ lens, and a reflection mirror 260. The semiconductor laser is modulated based on the read information, and optical writing is performed on the photosensitive drum 215.

  The sheet feeding device PS includes a first tray 208, a second tray 209, and a third tray 210. Transfer sheets stacked on the trays 208, 209, and 210 are respectively a first sheet feeding unit 211 and a second sheet feeding unit. 212, the sheet is fed by the third sheet feeding unit 213, and is transported to the position where it abuts on the photoreceptor 215 by the vertical transport unit 214. The image data read by the reading unit SC is written on the photoconductor 215 by the laser beam from the writing unit LU, and a toner image is formed by passing through the developing unit 227. Then, the toner image on the photosensitive member 215 is transferred while the transfer paper is conveyed by the conveying belt 216 at the same speed as the rotation of the photosensitive member 215. Thereafter, the image is fixed by the fixing unit 217 and conveyed to the paper discharge unit 218. The transfer paper conveyed to the paper discharge unit 218 is discharged directly to the paper discharge tray 219 when no image is formed on the back side of the transfer paper in the duplex mode.

  In the double-side mode in which an image is also formed on the back surface of the transfer paper, the transfer paper is guided from the fixing unit 217 to the reverse tray 112 through the reverse conveyance path 113 of the paper discharge unit 218, and again from the refeed path 111. The paper is transported to the image forming unit PR side through the transport unit 214 and is discharged to the paper discharge unit 219 through a similar image forming operation. When the transfer sheet is discharged in a reversed state, the transfer sheet is discharged from the reverse tray 112 to the discharge tray 219 via the reverse discharge path 114.

  In this way, the image information read by the image reading device SC can be output as a visible image on the transfer paper. At that time, in the image reading device SC, the m-adic up / down counter 26-1 prevents the modulation period of the output clock from the spread spectrum clock generator (SSCG) 24 from becoming 1 / n (n: integer) of the number of one line clock. By assigning a specific integer to the variable m, the modulation period is set to be asynchronous with the line period, and even if fluctuations in the image (due to the spread spectrum of the clock) appear, I try to make it less noticeable.

As described above, according to this embodiment,
1) Since the modulation cycle of the SSCG 24 can be changed, it is possible to provide a high-quality image in which fluctuations are not noticeable or hardly noticeable to the human eye while ensuring the freedom of the line cycle.
2) The modulation cycle of the SSCG 24 can be easily changed by inputting the analog modulation signal 24-6 output from the analog modulation signal generation unit 26 to the preceding stage of the voltage controlled oscillator 24-4.
3) The analog modulation signal generation unit 26 can easily avoid a specific correlation between the line period and the modulation period by determining the modulation period of the SSCG 24 based on the line period of the image.
4) The analog modulation signal generation unit 26 includes an m-ary up / down counter 26-1 and a D / A converter 26-2, which changes the modulation synchronization, thereby providing higher accuracy, practicality, and versatility. Can be increased.
5) Since the count switching value m of the m-adic up / down counter 26-1 can be set arbitrarily, it is possible to improve the degree of freedom of tuning of the modulation period setting and each of the image and peripheral circuits.
6) By using the m-adic up / down counter 26-1 and defining the calculation method of the count switching value m, it is possible to automatically obtain a higher quality image.
7) Since the storage medium 26-3 for storing the parameters of the m-adic up / down counter 26-1 is provided, it is possible to easily read the parameters, and to construct a system that is easy for a service person or the like to evaluate and verify Is possible.
8) Since the m-adic up / down counter 26-1 operates based on the parameters stored in the storage medium 26-3, it is possible to maintain an optimum value and always maintain a target state.
There are effects such as.

  It should be noted that the present invention is not limited to this embodiment, and various modifications are possible, and all technical matters included in the technical idea of the invention described in the scope of the claims are targeted.

9 CCD
11, SC Image reading device 21 A / D conversion circuit unit 23 Timing clock generation unit 24 SSCG
24-0 Reference Clock 24-1 First Frequency Divider 24-2 Phase Comparator 24-3 Adder 24-4 Voltage Control Oscillator 24-5 Second Frequency Divider 24-6 Analog Modulation Signal 24- 7 Spread Spectrum Clock 25 Timing Generator 26 Analog Modulation Signal Generation Unit 26-1 m-ary Up / Down Counter 26-2 D / A Converter 26-3 Storage Medium 100 Image Forming Apparatus

Japanese Patent No. 3631637 JP 2008-118366 A

Claims (10)

Detecting means for detecting a phase difference between the input clock and the footback clock;
Variable oscillation means for generating a spread spectrum clock having a frequency corresponding to a voltage generated based on the phase difference signal detected by the detection means;
A spread spectrum clock generator comprising:
A frequency modulation period changing means for creating a modulation signal for changing a frequency modulation period of the variable oscillation means based on a control signal generated from a spread spectrum clock output from the variable oscillation means, and applying the modulation signal to the variable oscillation means; A spread spectrum clock generation apparatus comprising: The spread spectrum clock generator according to claim 1,
The spread spectrum clock generator according to claim 1, wherein the frequency modulation cycle changing unit changes the frequency modulation cycle according to the number of clocks of one line of the document image. The spread spectrum clock generator according to claim 2,
The frequency modulation period changing means is
An up / down counter that counts the number of clocks and outputs a digital signal corresponding to the number of counts;
D / A conversion means for converting the output signal of the up / down counter into an analog signal;
With
A spread spectrum clock generation apparatus, wherein an analog voltage signal generated by the D / A conversion means is applied to an input voltage of the variable oscillation means. The spread spectrum clock generator according to claim 3,
The spread spectrum clock generator according to claim 1, wherein the up / down counter is an m-ary up / down counter capable of arbitrarily setting an integer m. The spread spectrum clock generator according to claim 3,
The up / down counter
m ← (number of 1 line clock) / (n + a)
Where n is a positive integer
a is a decimal number less than 1
A spread-spectrum clock generation apparatus, wherein m is a m-ary up / down counter that is a positive integer obtained by rounding up, rounding down, or rounding off a decimal part of a calculation result on the right side. The spread spectrum clock generator according to claim 5,
The spread spectrum clock generator according to claim 1, wherein the frequency modulation period changing means includes storage means for storing and reading at least one of the parameters m, n, and a of the up / down counter. A photoelectric conversion element that converts reflected light of a document image into an analog electrical signal by photoelectric conversion;
A / D conversion means for converting an analog electric signal output from the photoelectric conversion element into a digital signal;
The spread spectrum clock generator according to any one of claims 1 to 6,
With
The image reading apparatus, wherein the control signal is also input to the photoelectric conversion element and the A / D conversion means.   An image forming apparatus comprising the spread spectrum clock generation device according to claim 1.   An image forming apparatus comprising the image reading apparatus according to claim 7. A spread spectrum clock generation method for detecting a phase difference between an input clock and a footback clock and generating a spread spectrum clock having a frequency corresponding to a voltage generated based on the detected phase difference,
Generating a control signal from a spread spectrum clock having a frequency corresponding to a voltage generated based on the detected phase difference;
Create a modulation signal that changes the frequency modulation period of the spread spectrum clock based on the generated control signal,
A method of generating a spread spectrum clock, wherein the modulation signal is fed back to a voltage generated based on the detected phase difference to change a frequency modulation period to generate a new spread spectrum clock.