JP2011035140A - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

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Publication number
JP2011035140A
JP2011035140A JP2009179541A JP2009179541A JP2011035140A JP 2011035140 A JP2011035140 A JP 2011035140A JP 2009179541 A JP2009179541 A JP 2009179541A JP 2009179541 A JP2009179541 A JP 2009179541A JP 2011035140 A JP2011035140 A JP 2011035140A
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Japan
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semiconductor device
region
layer
semiconductor substrate
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JP2009179541A
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English (en)
Japanese (ja)
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JP2011035140A5 (enExample
Inventor
Daisuke Ikeda
大助 池田
Hideaki Yoshimi
英章 吉見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
System Solutions Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Sanyo Semiconductor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by Sanyo Electric Co Ltd, Sanyo Semiconductor Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP2009179541A priority Critical patent/JP2011035140A/ja
Publication of JP2011035140A publication Critical patent/JP2011035140A/ja
Publication of JP2011035140A5 publication Critical patent/JP2011035140A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Dicing (AREA)
JP2009179541A 2009-07-31 2009-07-31 半導体装置及びその製造方法 Pending JP2011035140A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009179541A JP2011035140A (ja) 2009-07-31 2009-07-31 半導体装置及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009179541A JP2011035140A (ja) 2009-07-31 2009-07-31 半導体装置及びその製造方法

Publications (2)

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JP2011035140A true JP2011035140A (ja) 2011-02-17
JP2011035140A5 JP2011035140A5 (enExample) 2012-09-06

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014017349A (ja) * 2012-07-09 2014-01-30 Fujitsu Semiconductor Ltd 半導体装置、基板の製造方法およびシステム
CN105140200A (zh) * 2015-07-22 2015-12-09 华进半导体封装先导技术研发中心有限公司 晶圆级凸点封装结构的制作方法
EP4283664A1 (en) * 2022-05-24 2023-11-29 MediaTek Inc. Wafer level chip scale package with sidewall protection
WO2026023620A1 (ja) * 2024-07-24 2026-01-29 株式会社デンソー 加工ウェハおよび半導体装置の製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07201641A (ja) * 1993-12-29 1995-08-04 Murata Mfg Co Ltd 積層セラミック電子部品の製造方法
JP2002164240A (ja) * 2000-11-27 2002-06-07 Koa Corp 積層チップ部品及びその製造方法
JP2005268414A (ja) * 2004-03-17 2005-09-29 Mitsubishi Electric Corp 多層セラミック基板およびその製造方法
JP2009099838A (ja) * 2007-10-18 2009-05-07 Nec Electronics Corp 半導体装置およびその製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07201641A (ja) * 1993-12-29 1995-08-04 Murata Mfg Co Ltd 積層セラミック電子部品の製造方法
JP2002164240A (ja) * 2000-11-27 2002-06-07 Koa Corp 積層チップ部品及びその製造方法
JP2005268414A (ja) * 2004-03-17 2005-09-29 Mitsubishi Electric Corp 多層セラミック基板およびその製造方法
JP2009099838A (ja) * 2007-10-18 2009-05-07 Nec Electronics Corp 半導体装置およびその製造方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014017349A (ja) * 2012-07-09 2014-01-30 Fujitsu Semiconductor Ltd 半導体装置、基板の製造方法およびシステム
CN105140200A (zh) * 2015-07-22 2015-12-09 华进半导体封装先导技术研发中心有限公司 晶圆级凸点封装结构的制作方法
EP4283664A1 (en) * 2022-05-24 2023-11-29 MediaTek Inc. Wafer level chip scale package with sidewall protection
WO2026023620A1 (ja) * 2024-07-24 2026-01-29 株式会社デンソー 加工ウェハおよび半導体装置の製造方法

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