JP2011029313A - Thick conductor substrate and manufacturing method thereof - Google Patents

Thick conductor substrate and manufacturing method thereof Download PDF

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JP2011029313A
JP2011029313A JP2009172000A JP2009172000A JP2011029313A JP 2011029313 A JP2011029313 A JP 2011029313A JP 2009172000 A JP2009172000 A JP 2009172000A JP 2009172000 A JP2009172000 A JP 2009172000A JP 2011029313 A JP2011029313 A JP 2011029313A
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conductor
layer
insulating layer
thick
substrate
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JP5415858B2 (en
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Tomoaki Toratani
智明 虎谷
Kyosuke Hashimoto
恭介 橋本
Toshitaka Hara
敏孝 原
Hisataro Abe
久太郎 阿部
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Furukawa Electric Co Ltd
Furukawa Automotive Systems Inc
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Furukawa Automotive Systems Inc
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a thick conductor substrate for allowing a high current to flow, which is formed by injection molding and configured to prevent damage by thermal expansion, and also to provide a manufacturing method thereof. <P>SOLUTION: In the thick conductor substrate 100, the ratio of a cross-sectional area of a conductor is enlarged thereby to allow a linear expansion coefficient to be equal to or less than a prescribed reference linear expansion coefficient in the cross section passing at least between the solder joint parts 141 of electronic components 140. That is, the area of copper with the linear expansion coefficient of about 17 [ppm/°C] is increased in the cross section passing at least the solder joint parts 141, so that an average linear expansion coefficient is reduced to be equal to or less than the reference linear expansion coefficient. The reference expansion coefficient is allowed to be 24 [ppm/°C] at a degree being the same as that of a conventional electronic substrate using glass epoxy, for example. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、発熱量が大きい厚導体基板及びその製造方法の技術分野に関するものである。   The present invention relates to a technical field of a thick conductor substrate having a large calorific value and a manufacturing method thereof.

自動車用DCーDCコンバータは、スイッチング用MOS−FET、電圧変換用トランス、整流用ダイオード、平滑化用チョークコイルの4つの部品で構成される方式のものが一般的である。ハイブリッド自動車用のDCーDCコンバータでは、高電圧・大電流によってそれぞれの部品からの発熱が大きくなるため、それぞれがウォータージャケット等の冷却部品で個別に冷却されるように構成されている。すなわち、それぞれが別個に冷却部品に搭載され、各部品間をバスバー等によって電気的に接続する構造となっている(例えば特許文献1)。   The DC-DC converter for automobiles is generally of a system composed of four parts: a switching MOS-FET, a voltage converting transformer, a rectifying diode, and a smoothing choke coil. A DC-DC converter for a hybrid vehicle is configured such that each component is individually cooled by a cooling component such as a water jacket because heat from each component increases due to high voltage and large current. That is, each is separately mounted on a cooling component, and each component is electrically connected by a bus bar or the like (for example, Patent Document 1).

しかし、上記のような構成では、接続箇所におけるネジ締結作業や溶接作業等が多くなり、組立工数が増大するのみならず、接続箇所における接触抵抗のばらつきに起因した電気的問題を回避するために、回路上にも専用の部品を付加する必要が生じる。   However, in the configuration as described above, screw fastening work and welding work etc. at the connection location increase, and not only the assembly man-hours increase, but also to avoid electrical problems due to variations in contact resistance at the connection location. Therefore, it is necessary to add a dedicated component on the circuit.

このような問題への対策として、電圧変換用トランス及び平滑化用チョークコイルを構成するコイル部品を、スイッチング用MOS−FET及び整流用ダイオードを搭載する基板の回路パターンで形成することで、これらの部品を一体化することができ、これにより接続箇所を削減することができる。また、部品を一体化したことで発熱部品が集中することになるが、発熱部品の直下に放熱用スリーブを挿入することで、基板上面の熱を下面に逃がし、さらに基板下面から外部に放熱するように構成することができる。   As a countermeasure to such a problem, by forming the coil components constituting the voltage conversion transformer and the smoothing choke coil with the circuit pattern of the substrate on which the switching MOS-FET and the rectifying diode are mounted, The components can be integrated, thereby reducing the number of connection points. In addition, the heat generation components are concentrated by integrating the components, but by inserting the heat dissipation sleeve directly under the heat generation components, the heat on the upper surface of the board is released to the lower surface and further radiated from the lower surface of the substrate to the outside. It can be constituted as follows.

ところで、同一基板上にスイッチング用MOS−FET、整流用ダイオード、電圧変換用トランス及び平滑化用チョークコイルを形成して一体化した場合には、導体層通電量が増大するため、導体層の厚さを略0.4mm以上とする必要がある。従来は、このような厚さの導体層をガラスエポキシの絶縁体と積層することで基板を製造していた。   By the way, when a switching MOS-FET, a rectifying diode, a voltage converting transformer, and a smoothing choke coil are formed and integrated on the same substrate, the conductive layer energization amount increases. The thickness needs to be approximately 0.4 mm or more. Conventionally, a substrate is manufactured by laminating a conductor layer having such a thickness with a glass epoxy insulator.

特開2005−143215号公報JP 2005-143215 A

しかしながら、従来の導体層とガラスエポキシとを積層して基板を製造する方法では、同一の層に別々に形成されている導体間に樹脂が十分に行き渡ることができず、その間に空隙ができてしまうおそれがある。このような空隙ができてしまうと、メッキやエッチングの工程で使用されるメッキ液やエッチング液が空隙に残留し、製造工程の過程で残留液が他の液体と混合するなどして成分が変化したり、基板の絶縁性能が低下したりする原因となる。   However, in the method of manufacturing a substrate by laminating a conventional conductor layer and glass epoxy, the resin cannot sufficiently spread between conductors separately formed on the same layer, and there is a gap between them. There is a risk that. When such voids are formed, the plating solution and etching solution used in the plating and etching processes remain in the voids, and the components change as the remaining liquid mixes with other liquids during the manufacturing process. Or the insulation performance of the substrate may be reduced.

さらに、導体層と絶縁層との間の接合面に隙間が生じると、その部分にもエッチング液等が浸み込むおそれがあった。これを防止するためには、導体層にネオブラウン処理等を施して粗化する工程や、導体の密着性を高めるための工程等が必要となり、コストアップをまねく要因となっていた。   Further, when a gap is formed on the joint surface between the conductor layer and the insulating layer, there is a possibility that the etching solution or the like may permeate into that portion. In order to prevent this, a step of roughening the conductor layer by applying a neo-brown treatment or the like, a step of improving the adhesion of the conductor, and the like are necessary, which has been a factor in increasing costs.

そこで、本発明はこのような問題を解決するためになされたものであり、内部に空隙を有さないように厚導体の導体層と絶縁層とで形成された厚導体基板及びその製造方法を提供することを目的とする。   Therefore, the present invention has been made to solve such problems, and a thick conductor substrate formed of a conductor layer and an insulating layer of a thick conductor so as not to have a gap inside, and a method for manufacturing the same. The purpose is to provide.

この発明の厚導体基板の第1の態様は、電子部品を表面実装可能な厚導体基板であって、金属板を加工して回路パターンが形成された2以上の導体層を層間接続し、前記2以上の導体層間に樹脂を射出成形して絶縁層を形成したことを特徴とする。   A first aspect of the thick conductor substrate of the present invention is a thick conductor substrate capable of surface mounting electronic components, wherein two or more conductor layers on which a circuit pattern is formed by processing a metal plate are interlayer-connected, An insulating layer is formed by injection molding a resin between two or more conductor layers.

この発明の厚導体基板の他の態様は、少なくとも電子部品を表面実装する領域で前記絶縁層の断面積と前記導体層の断面積とで加重平均した断面平均線膨張係数を全体の平均線膨張係数より小さくすることで、熱膨張による変形を低減させるように前記絶縁層あるいは前記導体層の厚さが決定されていることを特徴とする。   According to another aspect of the thick conductor substrate of the present invention, a cross-sectional average linear expansion coefficient obtained by weighted averaging of a cross-sectional area of the insulating layer and a cross-sectional area of the conductor layer at least in a region where the electronic component is surface-mounted is an overall average linear expansion. The thickness of the insulating layer or the conductor layer is determined so as to reduce deformation due to thermal expansion by making it smaller than the coefficient.

この発明の厚導体基板の他の態様は、前記絶縁層の断面積及び線膨張係数をそれぞれSi、αiとし、前記導体層の断面積及び線膨張係数をそれぞれSc、αcとしたとき、前記絶縁層の断面積Siと前記導体層の断面積Scとの割合が、所定の基準熱膨張係数αmに対して次式

Figure 2011029313
を満たすように決定されていることを特徴とする。 In another aspect of the thick conductor substrate of the present invention, when the cross-sectional area and the linear expansion coefficient of the insulating layer are Si and αi, respectively, and the cross-sectional area and the linear expansion coefficient of the conductor layer are Sc and αc, respectively, the insulating layer The ratio of the cross-sectional area Si of the layer and the cross-sectional area Sc of the conductor layer is expressed by the following formula with respect to a predetermined reference thermal expansion coefficient αm.
Figure 2011029313
It is determined to satisfy.

この発明の厚導体基板の他の態様は、電子部品が表面実装される領域を除いて前記導体層が前記絶縁層で覆われていることを特徴とする。   Another aspect of the thick conductor substrate of the present invention is characterized in that the conductor layer is covered with the insulating layer except for a region where the electronic component is surface-mounted.

この発明の厚導体基板の他の態様は、前記導体層の外周が前記絶縁層と同じ樹脂で覆われていることを特徴とする。   Another aspect of the thick conductor substrate of the present invention is characterized in that the outer periphery of the conductor layer is covered with the same resin as the insulating layer.

この発明の厚導体基板の他の態様は、前記導体層と前記絶縁層との接触面が、前記絶縁層と同じ樹脂で形成されたアンカーで固定されていることを特徴とする。   Another aspect of the thick conductor substrate of the present invention is characterized in that a contact surface between the conductor layer and the insulating layer is fixed by an anchor formed of the same resin as the insulating layer.

この発明の厚導体基板の他の態様は、前記アンカーは、前記導体層の最上層面と最下層面との間を固定していることを特徴とする。   Another aspect of the thick conductor substrate of the present invention is characterized in that the anchor fixes between the uppermost layer surface and the lowermost layer surface of the conductor layer.

この発明の厚導体基板の他の態様は、最外層の前記導体層に溝部が形成されており、前記樹脂を前記溝部に射出成形して形成された絶縁層と前記導体層間に形成された絶縁層との間を接続するように前記アンカーが形成されていることを特徴とする。   According to another aspect of the thick conductor substrate of the present invention, a groove is formed in the outermost conductor layer, and an insulating layer formed between the insulating layer formed by injection molding the resin into the groove and the conductor layer. The anchor is formed so as to connect between the layers.

この発明の厚導体基板の他の態様は、前記導体層の前記絶縁層と接する面が粗化構造を有していることを特徴とする。   Another aspect of the thick conductor substrate according to the present invention is characterized in that a surface of the conductor layer in contact with the insulating layer has a roughened structure.

この発明の厚導体基板の他の態様は、前記導体層は、同一平面上で2以上の導体片に分割されており、隣接する2つの前記導体片間で一方が他方を係止する形状にそれぞれの導体片の端辺が形成されていることを特徴とする。   According to another aspect of the thick conductor substrate of the present invention, the conductor layer is divided into two or more conductor pieces on the same plane, and one of the two adjacent conductor pieces is engaged with the other. An end side of each conductor piece is formed.

この発明の厚導体基板の他の態様は、前記導体層は、該導体層の表面に対し垂直方向に変形可能な弾性構造の弾性部と、先端側が別の導体層に接合される接合部と、を有して前記別の導体層と電気的に接続するための接続部を備えていることを特徴とする。   According to another aspect of the thick conductor substrate of the present invention, the conductor layer includes an elastic portion having an elastic structure that can be deformed in a direction perpendicular to the surface of the conductor layer, and a joint portion whose tip side is joined to another conductor layer. And a connecting portion for electrically connecting to the another conductor layer.

この発明の厚導体基板の他の態様は、前記弾性部は、前記接続部の前記導体層側に設けられていることを特徴とする。   Another aspect of the thick conductor substrate of the present invention is characterized in that the elastic portion is provided on the conductor layer side of the connection portion.

この発明の厚導体基板の他の態様は、前記接合部側に前記弾性部を備えた前記接続部を有する2つの前記導体層が、それぞれの前記弾性部を前記接合部で接続することで前記導体層の表面に対し垂直方向に変形可能となっていることを特徴とする。   According to another aspect of the thick conductor substrate of the present invention, the two conductor layers having the connecting portion provided with the elastic portion on the joint portion side connect the elastic portions to each other by the joint portion. It is possible to deform in a direction perpendicular to the surface of the conductor layer.

この発明の厚導体基板の他の態様は、前記導体層に、断面がコの字形状のコイルが形成されていることを特徴とする。   Another aspect of the thick conductor substrate of the present invention is characterized in that a coil having a U-shaped cross section is formed in the conductor layer.

この発明の厚導体基板の他の態様は、前記絶縁層は、ポリフェニレンサルファイド樹脂(PPS)を射出成形して形成されていることを特徴とする。   Another aspect of the thick conductor substrate of the present invention is characterized in that the insulating layer is formed by injection molding a polyphenylene sulfide resin (PPS).

この発明の厚導体基板の製造方法の第1の態様は、予め金属板を加工して回路パターンが形成された2以上の導体層を電気的に接続する導体層接続工程と、前記2以上の導体層を、前記回路パターンに対応して熱膨張による変形を低減するように絶縁層を形成するための金型に収納して固定する金型収納工程と、前記金型に所定の射出成形用樹脂を注入する射出成形工程と、を有することを特徴とする。   According to a first aspect of the method for manufacturing a thick conductor substrate of the present invention, a conductor layer connecting step of electrically connecting two or more conductor layers on which a circuit pattern is formed by processing a metal plate in advance, A mold housing step for housing and fixing the conductor layer in a mold for forming an insulating layer so as to reduce deformation due to thermal expansion corresponding to the circuit pattern, and a predetermined injection molding for the mold And an injection molding process for injecting resin.

本発明の電子基板によれば、絶縁層を射出成形して形成することにより、内部に空隙を有さないように厚導体の導体層と絶縁層とで形成された厚導体基板及びその製造方法を提供することが可能となる。   According to the electronic substrate of the present invention, a thick conductor substrate formed of a conductive layer of a thick conductor and an insulating layer so as not to have voids therein by forming the insulating layer by injection molding, and a method for manufacturing the same Can be provided.

本発明の第1の実施形態に係る厚導体基板の概略構成を示す断面図である。It is sectional drawing which shows schematic structure of the thick conductor board | substrate which concerns on the 1st Embodiment of this invention. 本発明の第2の実施形態に係る厚導体基板の概略構成を示す斜視図及び断面図である。It is the perspective view and sectional drawing which show schematic structure of the thick conductor board | substrate which concerns on the 2nd Embodiment of this invention. 直線上に1つの電子部品の半田接合部が配置されるようにしたときの複数の電子部品の配置を示す平面図である。It is a top view which shows arrangement | positioning of several electronic components when the soldering junction part of one electronic component is arrange | positioned on a straight line. 第2実施形態の厚導体基板の断面積及び線膨張係数を説明するための断面図である。It is sectional drawing for demonstrating the cross-sectional area and linear expansion coefficient of the thick conductor board | substrate of 2nd Embodiment. 導体層間の距離のばらつきを説明するための説明図である。It is explanatory drawing for demonstrating the dispersion | variation in the distance between conductor layers. 接続部の構造を示す斜視図である。It is a perspective view which shows the structure of a connection part. 第2実施形態の厚導体基板の製造方法を説明する説明図である。It is explanatory drawing explaining the manufacturing method of the thick conductor board | substrate of 2nd Embodiment. 窪み部を設けた金型を説明する説明図である。It is explanatory drawing explaining the metal mold | die which provided the hollow part. 本発明の第3の実施形態に係る厚導体基板の概略構成を示す斜視図及び断面図である。It is the perspective view and sectional drawing which show schematic structure of the thick conductor board | substrate which concerns on the 3rd Embodiment of this invention. 別の接続部の構造を示す斜視図である。It is a perspective view which shows the structure of another connection part. 外周絶縁層を設けた厚導体基板を示す断面図である。It is sectional drawing which shows the thick conductor board | substrate which provided the outer periphery insulating layer. アンカーを設けた厚導体基板を示す断面図である。It is sectional drawing which shows the thick conductor board | substrate which provided the anchor. 別のアンカーを設けた厚導体基板を示す断面図及び底面図である。It is sectional drawing and bottom view which show the thick conductor board | substrate which provided another anchor. 導体層の絶縁層と接する面を粗化構造とした厚導体基板の断面図である。It is sectional drawing of the thick conductor board | substrate which made the surface which touches the insulating layer of a conductor layer into the roughening structure. 導体層の対向する端辺を相互に引き合う形状とした厚導体基板の平面図である。It is a top view of the thick conductor board | substrate made into the shape which mutually attracts the opposing edge of a conductor layer. コの字形状に形成したコイルの断面図である。It is sectional drawing of the coil formed in the U-shape.

図面を参照して本発明の好ましい実施の形態における厚導体基板及びその製造方法について詳細に説明する。なお、同一機能を有する各構成部については、図示及び説明簡略化のため、同一符号を付して示す。以下では、導体層が2層の場合を例に説明するが、これに限らず導体層が3層以上であっても適宜適用可能である。   A thick conductor substrate and a manufacturing method thereof according to a preferred embodiment of the present invention will be described in detail with reference to the drawings. In addition, about each structural part which has the same function, the same code | symbol is attached | subjected and shown for simplification of illustration and description. In the following, a case where there are two conductor layers will be described as an example.

本発明の第1の実施の形態に係る厚導体基板を、図1を用いて説明する。図1に示す本実施形態の厚導体基板50は、打ち抜きや曲げなどの加工により形成された2層の導体層51、52と、その間に樹脂を射出成形して形成された絶縁層53とで構成されている。この製造方法では、導体層51、52間を接続する層間接続部54を予め溶接あるいはロー付けによって接続しておき、その後導体層間に射出成形用樹脂を射出して絶縁層53を形成している。   A thick conductor substrate according to a first embodiment of the present invention will be described with reference to FIG. A thick conductor substrate 50 according to the present embodiment shown in FIG. 1 includes two conductor layers 51 and 52 formed by punching or bending, and an insulating layer 53 formed by injection molding a resin therebetween. It is configured. In this manufacturing method, the interlayer connection portion 54 that connects the conductor layers 51 and 52 is connected in advance by welding or brazing, and then an injection molding resin is injected between the conductor layers to form the insulating layer 53. .

上記のように、射出成形で絶縁層53を形成することにより、内部に空隙を有さない厚導体基板50を低コストで提供することができる。本実施形態の厚導体基板50では、導体層51、52のそれぞれに2以上の導体が配置されている場合には、導体間に樹脂が隙間なく注入される。また、導体層との接触面にも隙間なく樹脂が注入される。これにより、低コストで内部に空隙を有さず従来の基板と同程度の高い信頼性を有し、大電流を流すことのできる厚導体基板を提供することが可能となる。   As described above, by forming the insulating layer 53 by injection molding, it is possible to provide the thick conductor substrate 50 having no voids therein at a low cost. In the thick conductor substrate 50 of this embodiment, when two or more conductors are arranged in each of the conductor layers 51 and 52, the resin is injected between the conductors without a gap. In addition, the resin is injected into the contact surface with the conductor layer without any gap. As a result, it is possible to provide a thick conductor substrate that is low in cost and does not have a void in the interior thereof, has high reliability equivalent to that of a conventional substrate, and can flow a large current.

次に、本発明の第2の実施の形態に係る厚導体基板について説明する。従来のガラスエポキシを用いた電子基板では、基板の導体層の厚さが1層あたり35μm〜70μmであるのに対し、絶縁層の厚さは1層あたり200μm〜1600μmであり、導体層の3倍以上の厚さに形成されていた。この場合、基板内で絶縁層が占める体積比率が大きくなり、導体層を含めた基板全体の線膨張係数は絶縁層の線膨張係数が支配的となる。   Next, a thick conductor substrate according to a second embodiment of the present invention will be described. In a conventional electronic substrate using glass epoxy, the thickness of the conductor layer of the substrate is 35 μm to 70 μm per layer, whereas the thickness of the insulating layer is 200 μm to 1600 μm per layer, It was formed more than twice as thick. In this case, the volume ratio occupied by the insulating layer in the substrate is increased, and the linear expansion coefficient of the entire substrate including the conductor layer is dominated by the linear expansion coefficient of the insulating layer.

そのため、基板に搭載された電子部品の特に導体層に半田付けされた接合部の信頼性を確保したり、導体層と絶縁層とのはがれを防止したりするには、絶縁層の線膨張係数を小さくするのが好ましい。ガラスエポキシを用いた絶縁層の面方向線膨張係数は、一般的には14〜24[ppm/℃]程度と、非常に小さい値となっており、これに対して、導体層の面方向線膨張係数は、例えば銅を用いた場合には約17[ppm/℃]であった。   Therefore, in order to ensure the reliability of the joints soldered to the conductor layer of electronic components mounted on the board and to prevent the conductor layer and the insulating layer from peeling off, the linear expansion coefficient of the insulating layer is required. Is preferably small. The surface direction linear expansion coefficient of the insulating layer using glass epoxy is generally a very small value of about 14 to 24 [ppm / ° C.]. The expansion coefficient was about 17 [ppm / ° C.] when copper was used, for example.

これに対し、本発明の厚導体基板及びその製造方法では、8〜30[ppm/℃]の線膨張係数を有する射出成形用の樹脂を用いて絶縁層を形成している。そのため、射出成形時の樹脂の流れ方向には線膨張係数が8ppm/℃程度に小さくなる場合でも、流れ方向に対し垂直な方向には線膨張係数が大きくなり、30ppm/℃程度になることがある。このように、射出成形して基板を形成した場合には、絶縁層の線膨張係数がガラスエポキシに比べて予測しにくいものとなっている。   On the other hand, in the thick conductor substrate and the manufacturing method thereof according to the present invention, the insulating layer is formed using a resin for injection molding having a linear expansion coefficient of 8 to 30 [ppm / ° C.]. Therefore, even when the linear expansion coefficient is reduced to about 8 ppm / ° C. in the resin flow direction at the time of injection molding, the linear expansion coefficient increases in the direction perpendicular to the flow direction and may be about 30 ppm / ° C. is there. Thus, when the substrate is formed by injection molding, the linear expansion coefficient of the insulating layer is difficult to predict compared to glass epoxy.

そのため、設計段階で例えば寿命予測等を行う場合には、最も保守的な数値である30ppm/℃の値を線膨張係数に用いる必要がある。このように、絶縁層の線膨張係数に大きな値を用いると、導体層に半田付けされた電子部品の接合部や導体層と絶縁層との接合面に、主に絶縁層の熱膨張/熱収縮によるストレスが集中するという結果が得られる。これにより、電子部品の半田接合部の予測寿命が短くなってしまうが、この結果を設計に用いる必要があった。   For this reason, when, for example, life prediction is performed at the design stage, it is necessary to use the most conservative value of 30 ppm / ° C. as the linear expansion coefficient. As described above, when a large value is used for the coefficient of linear expansion of the insulating layer, the thermal expansion / heat of the insulating layer is mainly applied to the joint part of the electronic component soldered to the conductor layer and the joint surface between the conductor layer and the insulating layer. The result is that stress due to contraction is concentrated. This shortens the predicted life of the solder joint of the electronic component, but this result must be used for the design.

そこで、本発明の第2の実施の形態に係る厚導体基板では、平均線膨張係数がガラスエポキシを用いた従来の電子基板の線膨張係数以下となるように構成している。第2の実施の形態の厚導体基板を、図2を用いて以下に説明する。図2は、本実施形態の厚導体基板100の概略構成を示す図であり、同図(a)は厚導体基板100の斜視図、同図(b)は厚導体基板100を切断面Aで切断したときの断面図である。厚導体基板100は、銅で形成された導体層111、112と、導体層111、112の間に配置された絶縁層130を備えている。絶縁層130は、例えばポリフェニレンサルファイド樹脂(PPS)のような射出成形用樹脂で形成される。また、導体層111の上面には、複数の電子部品140が表面実装されている。   Therefore, the thick conductor substrate according to the second embodiment of the present invention is configured such that the average coefficient of linear expansion is equal to or less than that of a conventional electronic substrate using glass epoxy. A thick conductor substrate according to the second embodiment will be described below with reference to FIG. 2A and 2B are diagrams showing a schematic configuration of the thick conductor substrate 100 of the present embodiment. FIG. 2A is a perspective view of the thick conductor substrate 100, and FIG. It is sectional drawing when cut | disconnecting. The thick conductor substrate 100 includes conductor layers 111 and 112 made of copper, and an insulating layer 130 disposed between the conductor layers 111 and 112. The insulating layer 130 is formed of an injection molding resin such as polyphenylene sulfide resin (PPS). A plurality of electronic components 140 are surface-mounted on the upper surface of the conductor layer 111.

本実施形態の厚導体基板100では、少なくとも図2(b)に示す電子部品140の半田接合部141を通る断面において、平均線膨張係数が所定の基準線膨張係数以下となるように導体の断面積の比率を大きくしている。すなわち、少なくとも半田接合部141間を通る断面において、線膨張係数が約17[ppm/℃]の銅の面積を増やすことで、平均線膨張係数が基準線膨張係数以下に低減されるようにしている。基準線膨張係数は、例えば従来のガラスエポキシを用いた電子基板と同程度の24[ppm/℃]とすることができる。   In the thick conductor substrate 100 of the present embodiment, the conductor is cut so that the average linear expansion coefficient is not more than a predetermined reference linear expansion coefficient in at least a cross section passing through the solder joint portion 141 of the electronic component 140 shown in FIG. The area ratio is increased. That is, at least in the cross section passing between the solder joints 141, by increasing the area of copper having a linear expansion coefficient of about 17 [ppm / ° C.], the average linear expansion coefficient is reduced below the reference linear expansion coefficient. Yes. The reference linear expansion coefficient can be set to 24 [ppm / ° C.], which is the same as that of an electronic substrate using a conventional glass epoxy, for example.

図2では、2つの電子部品140の半田接合部141が直線上に配置されているが、これに限らず、例えば図3に示すように、直線上に1つの電子部品140の半田接合部141だけが配置される場合でも、上記と同様に、少なくとも半田接合部141を通る断面における導体の断面積比率を大きくすることで、平均線膨張係数を基準線膨張係数以下に低減するのがよい。   In FIG. 2, the solder joint portions 141 of the two electronic components 140 are arranged on a straight line. However, the present invention is not limited to this. For example, as shown in FIG. Even in the case where only the conductor is disposed, it is preferable to reduce the average linear expansion coefficient to be equal to or lower than the reference linear expansion coefficient by increasing the cross-sectional area ratio of the conductor in at least the cross section passing through the solder joint portion 141 as described above.

上記のように、半田接合部141を通る断面における平均線膨張係数を基準線膨張係数以下に低減するために、本実施形態では当該断面積における導体層111、112と絶縁層130の面積比を以下のようにして決定している。導体層111、112及び絶縁層130の断面積及び線膨張係数を図4に示すパラメータで表したとき、半田接合部141を通る断面における平均線膨張係数αavが次式を満たすように、導体層111、112の合計断面積Scと絶縁層130の断面積Siを決定する。

Figure 2011029313
ここで、αc、αiはそれぞれ導体層111、112の線膨張係数、絶縁層130の線膨張係数であり、αmは基準線膨張係数を表す。αm=24[ppm/℃]とするのがよい。 As described above, in order to reduce the average linear expansion coefficient in the cross section passing through the solder joint portion 141 below the reference linear expansion coefficient, in this embodiment, the area ratio of the conductor layers 111 and 112 and the insulating layer 130 in the cross sectional area is set. It is determined as follows. When the cross-sectional area and the linear expansion coefficient of the conductor layers 111 and 112 and the insulating layer 130 are expressed by the parameters shown in FIG. 4, the conductor layer is set so that the average linear expansion coefficient αav in the cross section passing through the solder joint 141 satisfies the following equation. The total sectional area Sc of 111 and 112 and the sectional area Si of the insulating layer 130 are determined.
Figure 2011029313
Here, αc and αi are the linear expansion coefficient of the conductor layers 111 and 112 and the linear expansion coefficient of the insulating layer 130, respectively, and αm represents the reference linear expansion coefficient. It is preferable that αm = 24 [ppm / ° C.].

上記式(1)を満たすように導体層111、112の合計断面積Sc及び絶縁層130の断面積Siを決定することにより、射出成形により形成された本実施形態の厚導体基板100においても、従来のガラスエポキシを用いた電子基板と同程度以上の信頼性を確保することができる。   In the thick conductor substrate 100 of this embodiment formed by injection molding by determining the total cross-sectional area Sc of the conductor layers 111 and 112 and the cross-sectional area Si of the insulating layer 130 so as to satisfy the above formula (1), The reliability equivalent to or higher than that of a conventional electronic substrate using glass epoxy can be ensured.

一例として、導体層111,112の合計断面積Sc=39.2mm2、絶縁層130の断面積Si=20.8mm2とし、導体層111、112の線膨張係数αc=16.8[ppm/℃]、絶縁層130の線膨張係数αi=30[ppm/℃]としたとき、式(1)左辺の平均線膨張係数は21.4[ppm/℃]となる。これは、従来のガラスエポキシを用いた電子基板の平均線膨張係数24[ppm/℃]より小さく、電子部品140の半田接合部141に対し従来以上の信頼性を確保している。 As an example, the total cross-sectional area Sc of the conductor layers 111 and 112 is 39.2 mm 2 , the cross-sectional area Si of the insulating layer 130 is 20.8 mm 2, and the linear expansion coefficient αc of the conductor layers 111 and 112 is 16.8 [ppm / And the linear expansion coefficient αi of the insulating layer 130 = 30 [ppm / ° C.], the average linear expansion coefficient on the left side of the equation (1) is 21.4 [ppm / ° C.]. This is smaller than the average linear expansion coefficient of 24 [ppm / ° C.] of the electronic substrate using the conventional glass epoxy, and secures reliability higher than that of the conventional solder joint portion 141 of the electronic component 140.

射出成形して本実施形態の厚導体基板100を製造する方法では、複数の導体層111、112間を電気的に接続する工程を、射出成型を行う工程より前に実施しておく必要がある。これは、導体層111、112間を接続する接続部に、射出された樹脂が入り込むのを防止するためである。しかしながら、導体層間の距離にばらつきがあると、射出成型の際に図5に示すような問題が生じるおそれがある。   In the method of manufacturing the thick conductor substrate 100 of the present embodiment by injection molding, the step of electrically connecting the plurality of conductor layers 111 and 112 needs to be performed before the step of injection molding. . This is to prevent the injected resin from entering the connecting portion connecting the conductor layers 111 and 112. However, if there is variation in the distance between the conductor layers, a problem as shown in FIG. 5 may occur during injection molding.

図5は、導体層間の距離のばらつきを説明するための説明図であり、(a)は導体層11、12間の距離が設計通りの距離L0に一致している場合を示し、(b)は導体層11、12間の距離が設計距離L0より長い距離L1となっている場合を示し、(c)は導体層11、12間の距離が設計距離L0より短い距離L2となっている場合を示している。   FIG. 5 is an explanatory diagram for explaining the variation in the distance between the conductor layers. FIG. 5A shows the case where the distance between the conductor layers 11 and 12 matches the designed distance L0. Shows the case where the distance between the conductor layers 11 and 12 is a distance L1 longer than the design distance L0, and (c) shows the case where the distance between the conductor layers 11 and 12 is a distance L2 shorter than the design distance L0. Is shown.

図5(b)に示すように、導体層11、12間の距離が設計距離L0より長い距離L1となっている場合には、導体層11、12を接続部13で接続して金型20の内部に収納したとき、上型21と下型22とを密閉させることができないといった問題が生じる。また、図5(c)のように、導体層11、12間の距離が設計距離L0より短い距離L2となっている場合には、導体層11、12と金型20との間に隙間ができ、その隙間に射出された樹脂が入り込んで電子部品の実装に支障をきたすといった問題が生じる。   As shown in FIG. 5B, when the distance between the conductor layers 11 and 12 is a distance L1 longer than the design distance L0, the conductor layers 11 and 12 are connected by the connecting portion 13 to form the mold 20. When housed inside, there arises a problem that the upper mold 21 and the lower mold 22 cannot be sealed. 5C, when the distance between the conductor layers 11 and 12 is a distance L2 shorter than the design distance L0, there is a gap between the conductor layers 11 and 12 and the mold 20. There is a problem that the injected resin enters the gap and hinders mounting of electronic components.

そこで、本実施形態の厚導体基板100では、導体層111と112とを電気的に接続する接続部113を、図6に示すように、弾性部113aを有する構造としている。すなわち、接続部113は、導体層112の面に垂直な方向に撓むことができる弾性部113aを介して導体層112に固定されている。また、接続部113の弾性部113aとは反対側の端部に、接合点113bが設けられて導体層111に接続されている。図6(b)に示すように、弾性部113aは、導体層112の面より導体層111側に曲げられた形状とするのがよい。そして、導体層112から接合点113bまでの接続部113の距離を設計距離L0より若干長くするのが好ましい。   Therefore, in the thick conductor substrate 100 of the present embodiment, the connection portion 113 that electrically connects the conductor layers 111 and 112 has a structure having an elastic portion 113a as shown in FIG. That is, the connection portion 113 is fixed to the conductor layer 112 via the elastic portion 113a that can be bent in a direction perpendicular to the surface of the conductor layer 112. In addition, a junction 113 b is provided at the end of the connection portion 113 opposite to the elastic portion 113 a and connected to the conductor layer 111. As shown in FIG. 6B, the elastic portion 113 a is preferably bent to the conductor layer 111 side from the surface of the conductor layer 112. And it is preferable that the distance of the connection part 113 from the conductor layer 112 to the junction point 113b is made slightly longer than the design distance L0.

上記のような構造の接続部113を用いて導体層111と112とを接続することで、射出成型の工程における上記の問題を解決することができる。すなわち、接続部113の接合点113bを導体層111に溶接またはロー付けして導体層111と112とを電気的に接続し、これを金型20に収納する。このとき、接続部113が設計距離L0より若干長く形成されている分、導体層111が上型21に密着して下型22側に押圧されることで、弾性部113aが下型22底部側に撓む。これにより、導体層111、112と金型20との間に隙間が形成されるおそれはなくなる。   By connecting the conductor layers 111 and 112 using the connection portion 113 having the above-described structure, the above problem in the injection molding process can be solved. That is, the joining point 113 b of the connecting portion 113 is welded or brazed to the conductor layer 111 to electrically connect the conductor layers 111 and 112, and this is stored in the mold 20. At this time, since the connecting portion 113 is formed to be slightly longer than the design distance L0, the conductive layer 111 is brought into close contact with the upper die 21 and pressed toward the lower die 22 so that the elastic portion 113a becomes the bottom side of the lower die 22 Bend. Thereby, there is no possibility that a gap is formed between the conductor layers 111 and 112 and the mold 20.

本実施形態の厚導体基板100の製造方法を、図7を用いて説明する。まず、図7(a)において、接続部113の接合点113bを導体層111に溶接またはロー付けすることで、導体層111と112とを電気的に接続する。次の図7(b)では、接続された導体層111、112を金型20の下型22に収納し、固定ピン23で固定する。図7(c)では、上型21を下型22に隙間なく密閉させる。このとき、接続部113の弾性部113aが下型22の底部側に撓むことで、導体層111、112が上型21及び下型22の底部に密着される。さらに、図7(d)で金型20の内部に所定の樹脂が射出されて絶縁層130が形成される。   A method for manufacturing the thick conductor substrate 100 of the present embodiment will be described with reference to FIG. First, in FIG. 7A, the conductor layers 111 and 112 are electrically connected by welding or brazing the joint point 113 b of the connection portion 113 to the conductor layer 111. In FIG. 7B, the connected conductor layers 111 and 112 are accommodated in the lower mold 22 of the mold 20 and fixed with the fixing pins 23. In FIG.7 (c), the upper mold | type 21 is sealed to the lower mold | type 22 without a gap. At this time, the elastic portions 113 a of the connecting portion 113 are bent toward the bottom of the lower mold 22, so that the conductor layers 111 and 112 are in close contact with the bottom of the upper mold 21 and the lower mold 22. Further, in FIG. 7D, a predetermined resin is injected into the mold 20 to form the insulating layer 130.

上記の工程において、接続部113が長すぎるために、上型21と下型22とを密閉させたとき、弾性部113aが下型22の底部に当接して押圧されるおそれがある場合には、下型22の底部に図8に示すような窪み部22aを形成しておくのがよい。これにより、万が一弾性部113aが下型22側に撓むことがあっても、弾性部113aが窪み部22aに侵入することで、接続部113が下型22底部から押圧されるおそれはない。   In the above process, when the upper mold 21 and the lower mold 22 are sealed because the connecting section 113 is too long, the elastic section 113a may be pressed against the bottom of the lower mold 22. It is preferable to form a recess 22a as shown in FIG. Thereby, even if the elastic part 113a may bend toward the lower mold 22 by any chance, the connection part 113 is not likely to be pressed from the bottom of the lower mold 22 by the elastic part 113a entering the recessed part 22a.

図6に示した接続部113は、弾性部113aを介して導体層112側に接続されているが、これに限定されず、導体層111側に設けるようにしてもよく、さらに導体層111と112の両方に接続部を設け、それぞれの接続部の端部を接続するようにしてもよい。   The connecting portion 113 shown in FIG. 6 is connected to the conductor layer 112 side via the elastic portion 113a, but is not limited to this, and may be provided on the conductor layer 111 side. A connection part may be provided in both 112, and the edge part of each connection part may be connected.

本実施形態の厚導体基板100では、導体層111、112の合計断面積を大きくして平均線膨張係数をガラスエポキシを用いた従来の電子基板の線膨張係数以下とすることにより、表面実装された電子部品140の半田接合部141に対し、従来の電子基板と同程度以上の信頼性を確保することができる。   The thick conductor substrate 100 of the present embodiment is surface-mounted by increasing the total cross-sectional area of the conductor layers 111 and 112 so that the average coefficient of linear expansion is equal to or less than that of a conventional electronic substrate using glass epoxy. Further, the reliability equal to or higher than that of the conventional electronic substrate can be ensured for the solder joint portion 141 of the electronic component 140.

本発明の第3の実施の形態に係る厚導体基板を、図9を用いて以下に説明する。図9は、第3の実施形態の厚導体基板200の概略構成を示す図であり、(a)は厚導体基板200の斜視図、(b)は厚導体基板200を切断面Bで切断したときの断面図である。本実施形態では、導体層211、212を純アルミニウムを用いて形成している。純アルミニウムの線膨張係数は24[ppm/℃]程度であり、基準線膨張係数24[ppm/℃]と略等しい。そのため、図9(b)に示す断面積において、導体層211、212の断面積を大きくしても厚導体基板200の平均線膨張係数を基準線膨張係数より小さくすることはできない。   A thick conductor substrate according to a third embodiment of the present invention will be described below with reference to FIG. FIG. 9 is a diagram illustrating a schematic configuration of the thick conductor substrate 200 according to the third embodiment. FIG. 9A is a perspective view of the thick conductor substrate 200, and FIG. FIG. In the present embodiment, the conductor layers 211 and 212 are formed using pure aluminum. The linear expansion coefficient of pure aluminum is about 24 [ppm / ° C.], which is substantially equal to the standard linear expansion coefficient of 24 [ppm / ° C.]. Therefore, in the cross-sectional area shown in FIG. 9B, even if the cross-sectional areas of the conductor layers 211 and 212 are increased, the average linear expansion coefficient of the thick conductor substrate 200 cannot be made smaller than the reference linear expansion coefficient.

そこで、熱膨張による基板の損傷を防止するために、本実施形態の厚導体基板200では、電子部品140等を搭載する表面実装部233を除いて、導体層211の上面及び導体層212の下面をそれぞれ上層絶縁層231及び下層絶縁層232で覆う構成としている。このように、導体層211、212と絶縁層230の3層構造を、上層絶縁層231と下層絶縁層232で覆うことにより、各層間の密着性を維持してはがれが生じるのを防止している。電子部品140は、表面実装部233に実装され、電子部品140の半田接合部141が、上層絶縁層231の接合孔234から露出した導体層211に半田接続される。   Therefore, in order to prevent damage to the substrate due to thermal expansion, in the thick conductor substrate 200 of the present embodiment, the upper surface of the conductor layer 211 and the lower surface of the conductor layer 212 except for the surface mounting portion 233 on which the electronic component 140 and the like are mounted. Are covered with an upper insulating layer 231 and a lower insulating layer 232, respectively. Thus, by covering the three-layer structure of the conductor layers 211 and 212 and the insulating layer 230 with the upper insulating layer 231 and the lower insulating layer 232, it is possible to maintain the adhesion between the respective layers and prevent the peeling. Yes. The electronic component 140 is mounted on the surface mounting portion 233, and the solder joint portion 141 of the electronic component 140 is soldered to the conductor layer 211 exposed from the joint hole 234 of the upper insulating layer 231.

本実施形態では、導体層211と212とを電気的に接続する接続部として、図10に示す接続部213,214を用いている。接続部213、214は、それぞれ導体層211、212に立設されており、接続部213、214のそれぞれの端部に弾性部213a、214aが形成されている。さらに、弾性部213a、214aのそれぞれに接合点213b、214bが設けられており、接合点213b、214bを溶接またはロー付けすることで、導体層211と212とを電気的に接続している。なお、本実施形態でも図6に示した接続部113を用いてもよく、あるいは図10に示した接続部213、214を第1の実施形態の厚導体基板100に用いることも可能である。   In the present embodiment, connection portions 213 and 214 shown in FIG. 10 are used as connection portions for electrically connecting the conductor layers 211 and 212. The connection parts 213 and 214 are erected on the conductor layers 211 and 212, respectively, and elastic parts 213a and 214a are formed at the ends of the connection parts 213 and 214, respectively. Further, joint points 213b and 214b are provided in the elastic portions 213a and 214a, respectively, and the conductor layers 211 and 212 are electrically connected by welding or brazing the joint points 213b and 214b. In this embodiment, the connection portion 113 shown in FIG. 6 may be used, or the connection portions 213 and 214 shown in FIG. 10 may be used for the thick conductor substrate 100 of the first embodiment.

上記の第3の実施形態では、表面実装部233を除く導体層211、212の上下面を上層絶縁層231及び下層絶縁層232で覆う構造としたが、これに限らず、例えば図11に示すように、導体層211、212の外周に外周絶縁層251を形成し、これで導体層211、212と絶縁層230との間のはがれ等を防止するようにしてもよい。あるいは、図12に示すような形状の射出成形用樹脂で形成したアンカー252を設けることでも、上記実施形態と同様に、導体層211、212と絶縁層230との間のはがれ等を防止することができる。   In the third embodiment, the upper and lower surfaces of the conductor layers 211 and 212 except for the surface mounting portion 233 are covered with the upper insulating layer 231 and the lower insulating layer 232. However, the present invention is not limited to this. For example, FIG. As described above, the outer peripheral insulating layer 251 may be formed on the outer peripheries of the conductor layers 211 and 212 to prevent peeling between the conductor layers 211 and 212 and the insulating layer 230. Alternatively, by providing an anchor 252 formed of an injection molding resin having a shape as shown in FIG. 12, it is possible to prevent peeling between the conductor layers 211 and 212 and the insulating layer 230 as in the above embodiment. Can do.

さらに、図12に示すようなアンカー252に代えて、図13に示すような別のアンカー253を設けてもよい。図12に示したアンカー252は、導体層211、212の表面から突き出して配置されているため、基板の表面に凹凸ができて電子部品の搭載に支障が出ることがある。そこで、図13(a)の断面図に示すように、導体層211、212のそれぞれに溝部を設け、それぞれの溝部に射出成形用樹脂を射出して絶縁層254を形成している。そして、図13(b)の底面図に示すように、基板の端部で絶縁層254を導体層211、212間に形成されている絶縁層255と接続するアンカー253を設けている。これにより、導体層211、212と絶縁層255との間のはがれ等を防止することができる。   Furthermore, instead of the anchor 252 as shown in FIG. 12, another anchor 253 as shown in FIG. 13 may be provided. Since the anchor 252 shown in FIG. 12 protrudes from the surface of the conductor layers 211 and 212, the surface of the substrate may be uneven, which may hinder the mounting of electronic components. Therefore, as shown in the cross-sectional view of FIG. 13A, a groove is provided in each of the conductor layers 211 and 212, and the insulating layer 254 is formed by injecting an injection molding resin into each groove. As shown in the bottom view of FIG. 13B, an anchor 253 for connecting the insulating layer 254 to the insulating layer 255 formed between the conductor layers 211 and 212 is provided at the end of the substrate. Thereby, peeling between the conductor layers 211 and 212 and the insulating layer 255 can be prevented.

導体層211、212と絶縁層230との間のはがれを防止するために、導体層211、212のそれぞれの絶縁層230と接する面を、図14に示すような粗化構造221としてもよい。粗化構造221を形成することで、導体層211、212と絶縁層230のそれぞれの接触面でずれが生じるのを防止することができ、これにより導体層211、212と絶縁層230との間にはがれが生じる可能性をさらに低減させることができる。   In order to prevent peeling between the conductor layers 211 and 212 and the insulating layer 230, the surfaces of the conductor layers 211 and 212 that are in contact with the insulating layer 230 may have a roughened structure 221 as shown in FIG. By forming the roughened structure 221, it is possible to prevent the contact surfaces of the conductor layers 211 and 212 and the insulating layer 230 from being displaced, and thereby, between the conductor layers 211 and 212 and the insulating layer 230. The possibility that peeling will occur can be further reduced.

上記第2及び第3の実施形態において、導体層111,112または211、212は、それぞれ一体の導体層に形成されているものに限定されず、複数の導体片に分割されていてもよい。その場合、例えば図15に示すように、電子部品140が搭載されている導体片211aと電子部品140の半田接合部141が接続されている導体片211bとが熱膨張等により相対的に移動すると、半田接合部141が電子部品140に引っ張られて損傷するおそれがある。   In the second and third embodiments, the conductor layers 111, 112 or 211, 212 are not limited to those formed as an integral conductor layer, but may be divided into a plurality of conductor pieces. In that case, for example, as shown in FIG. 15, when the conductor piece 211a on which the electronic component 140 is mounted and the conductor piece 211b to which the solder joint 141 of the electronic component 140 is connected move relatively due to thermal expansion or the like. The solder joint 141 may be pulled and damaged by the electronic component 140.

そこで、導体片211aと導体片211bとが相対的に移動するのを防止するために、導体片211a、211bのそれぞれの端辺を、図15に示すように一方(211a)が他方(211b)を係止する形状にするのがよい。導体片211a、211bのそれぞれの端辺の間には、射出成形用樹脂240が注入されており、これが導体片211aと211bとの間を絶縁するとともに、導体片211aと導体片211bとが相対的に移動するのを防止している。   Therefore, in order to prevent the conductor pieces 211a and 211b from moving relative to each other, the end sides of the conductor pieces 211a and 211b are arranged such that one (211a) is the other (211b) as shown in FIG. It is good to make it the shape which latches. Injection molding resin 240 is injected between the respective ends of the conductor pieces 211a and 211b, which insulates between the conductor pieces 211a and 211b, while the conductor pieces 211a and 211b are relatively opposite to each other. To prevent movement.

上記説明のいずれの実施形態においても、厚導体基板に電圧変換用トランスや平滑化用チョークコイルを一体的に形成することができる。このようなトランスやチョークコイルのコイル部分には、数十kHzから数百kHzの高周波電流が流されるため、表皮効果によって高周波電流がコイルの辺縁部に集中して流れる。そのため、コイル辺縁部では、直流電流を流す場合よりも大きな発熱が発生するといった問題がある。そこで、本発明のいずれの実施形態においても、コイルを形成する場合には、その断面形状がコの字形状となるように、コイルの辺縁部を直角に折り曲げて立設させるのがよい。   In any of the embodiments described above, a voltage converting transformer and a smoothing choke coil can be integrally formed on a thick conductor substrate. Since a high frequency current of several tens kHz to several hundreds kHz flows in the coil portion of such a transformer or choke coil, the high frequency current concentrates on the edge of the coil due to the skin effect. Therefore, there is a problem that a larger amount of heat is generated at the coil edge than when a direct current is passed. Therefore, in any embodiment of the present invention, when a coil is formed, it is preferable that the edge of the coil be bent at a right angle so that the cross-sectional shape thereof becomes a U-shape.

図9に示す第3実施形態の厚導体基板200では、コイル260が設けられており、その断面が図16に示すようなコの字形状となっている。辺縁部をこのようなコの字形状とすることで、コイルの辺縁部の面積を増大させることができる。その結果、辺縁部からの放熱を効率的に行うことが可能となる。   In the thick conductor substrate 200 of the third embodiment shown in FIG. 9, a coil 260 is provided, and the cross section has a U shape as shown in FIG. By making the edge part into such a U shape, the area of the edge part of the coil can be increased. As a result, it is possible to efficiently dissipate heat from the edge portion.

なお、本実施の形態における記述は、本発明に係る厚導体基板及びその製造方法の一例を示すものであり、これに限定されるものではない。本実施の形態における厚導体基板等の細部構成及び詳細な動作等に関しては、本発明の趣旨を逸脱しない範囲で適宜変更可能である。   In addition, the description in this Embodiment shows an example of the thick conductor board | substrate which concerns on this invention, and its manufacturing method, It is not limited to this. The detailed configuration and detailed operation of the thick conductor substrate and the like in the present embodiment can be changed as appropriate without departing from the spirit of the present invention.

50、100、200 厚導体基板
11、12、51、52、111、112、211、212 導体層
13、54、113、213,214 接続部
20 金型
21 上型
22 下型
22a 窪み部
23 固定ピン
113a、213a、214a 弾性部
113b、213b、214b 接合点
53、130、230、254、255 絶縁層
140 電子部品
141 半田接合部
211a、211b 導体片
221 粗化構造
231 上層絶縁層
232 下層絶縁層
233 表面実装部
234 接合孔
240 射出成形用樹脂
251 外周絶縁層
252、253 アンカー
260 コイル
261 辺縁部
50, 100, 200 Thick conductor substrate 11, 12, 51, 52, 111, 112, 211, 212 Conductor layer 13, 54, 113, 213, 214 Connection part 20 Mold 21 Upper mold 22 Lower mold 22a Depression 23 Fixing Pin 113a, 213a, 214a Elastic part 113b, 213b, 214b Junction point 53, 130, 230, 254, 255 Insulating layer 140 Electronic component 141 Solder joint part 211a, 211b Conductive piece 221 Roughening structure 231 Upper insulating layer 232 Lower insulating layer 233 Surface mounting portion 234 Joint hole 240 Injection molding resin 251 Peripheral insulating layer 252 253 Anchor 260 Coil 261 Edge

Claims (16)

電子部品を表面実装可能な厚導体基板であって、
金属板を加工して回路パターンが形成された2以上の導体層を層間接続し、前記2以上の導体層間に樹脂を射出成形して絶縁層を形成した
ことを特徴とする厚導体基板。
A thick conductor substrate on which electronic components can be surface-mounted,
A thick conductor substrate, wherein a metal plate is processed to connect two or more conductor layers on which a circuit pattern is formed, and an insulating layer is formed by injection molding a resin between the two or more conductor layers.
少なくとも電子部品を表面実装する領域で前記絶縁層の断面積と前記導体層の断面積とで加重平均した断面平均線膨張係数を全体の平均線膨張係数より小さくすることで、熱膨張による変形を低減させるように前記絶縁層あるいは前記導体層の厚さが決定されている
ことを特徴とする請求項1に記載の厚導体基板。
At least in the region where the electronic component is surface-mounted, the cross-sectional area of the insulating layer and the cross-sectional area of the conductor layer are weighted and averaged so that the cross-sectional average linear expansion coefficient is smaller than the overall average linear expansion coefficient. The thick conductor substrate according to claim 1, wherein the thickness of the insulating layer or the conductor layer is determined so as to reduce the thickness.
前記絶縁層の断面積及び線膨張係数をそれぞれSi、αiとし、前記導体層の断面積及び線膨張係数をそれぞれSc、αcとしたとき、前記絶縁層の断面積Siと前記導体層の断面積Scとの割合が、所定の基準熱膨張係数αmに対して次式
Figure 2011029313
を満たすように決定されている
ことを特徴とする請求項1または2に記載の厚導体基板。
When the cross-sectional area and linear expansion coefficient of the insulating layer are Si and αi, respectively, and the cross-sectional area and linear expansion coefficient of the conductor layer are Sc and αc, respectively, the cross-sectional area Si of the insulating layer and the cross-sectional area of the conductive layer are The ratio of Sc to the predetermined reference thermal expansion coefficient αm is as follows:
Figure 2011029313
The thick conductor substrate according to claim 1, wherein the thick conductor substrate is determined so as to satisfy the following.
電子部品が表面実装される領域を除いて前記導体層が前記絶縁層で覆われている
ことを特徴とする請求項1乃至3のいずれか1項に記載の厚導体基板。
The thick conductor substrate according to any one of claims 1 to 3, wherein the conductor layer is covered with the insulating layer except for a region where the electronic component is surface-mounted.
前記導体層の外周が前記絶縁層と同じ樹脂で覆われている
ことを特徴とする請求項1乃至3のいずれか1項に記載の厚導体基板。
The thick conductor substrate according to any one of claims 1 to 3, wherein an outer periphery of the conductor layer is covered with the same resin as that of the insulating layer.
前記導体層と前記絶縁層との接触面が、前記絶縁層と同じ樹脂で形成されたアンカーで固定されている
ことを特徴とする請求項1乃至3のいずれか1項に記載の厚導体基板。
The contact surface of the said conductor layer and the said insulating layer is being fixed with the anchor formed with the same resin as the said insulating layer. The thick conductor board | substrate of any one of Claim 1 thru | or 3 characterized by the above-mentioned. .
前記アンカーは、前記導体層の最上層面と最下層面との間を固定している
ことを特徴とする請求項6に記載の厚導体基板。
The thick conductor substrate according to claim 6, wherein the anchor fixes between the uppermost layer surface and the lowermost layer surface of the conductor layer.
最外層の前記導体層に溝部が形成されており、前記樹脂を前記溝部に射出成形して形成された絶縁層と前記導体層間に形成された絶縁層との間を接続するように前記アンカーが形成されている
ことを特徴とする請求項6に記載の厚導体基板。
A groove is formed in the outermost conductor layer, and the anchor is connected so as to connect between an insulating layer formed by injection molding the resin in the groove and an insulating layer formed between the conductor layers. The thick conductor substrate according to claim 6, wherein the thick conductor substrate is formed.
前記導体層の前記絶縁層と接する面が粗化構造を有している
ことを特徴とする請求項1乃至8のいずれか1項に記載の厚導体基板。
The thick conductor substrate according to any one of claims 1 to 8, wherein a surface of the conductor layer in contact with the insulating layer has a roughened structure.
前記導体層は、同一平面上で2以上の導体片に分割されており、隣接する2つの前記導体片間で一方が他方を係止する形状にそれぞれの導体片の端辺が形成されている
ことを特徴とする請求項1乃至9のいずれか1項に記載の厚導体基板。
The conductor layer is divided into two or more conductor pieces on the same plane, and one end of each conductor piece is formed so that one of the two adjacent conductor pieces locks the other. The thick conductor substrate according to any one of claims 1 to 9, wherein the substrate is a thick conductor substrate.
前記導体層は、該導体層の表面に対し垂直方向に変形可能な弾性構造の弾性部と、先端側が別の導体層に接合される接合部と、を有して前記別の導体層と電気的に接続するための接続部を備えている
ことを特徴とする請求項1乃至10のいずれか1項に記載の厚導体基板。
The conductor layer has an elastic portion having an elastic structure that can be deformed in a direction perpendicular to the surface of the conductor layer, and a joint portion whose tip side is joined to another conductor layer. The thick conductor substrate according to any one of claims 1 to 10, further comprising a connection portion for connecting in an automatic manner.
前記弾性部は、前記接続部の前記導体層側に設けられている
ことを特徴とする請求項11に記載の厚導体基板。
The thick conductor substrate according to claim 11, wherein the elastic portion is provided on the conductor layer side of the connection portion.
前記接合部側に前記弾性部を備えた前記接続部を有する2つの前記導体層が、それぞれの前記弾性部を前記接合部で接続することで前記導体層の表面に対し垂直方向に変形可能となっている
ことを特徴とする請求項11に記載の厚導体基板。
The two conductor layers having the connection part provided with the elastic part on the joint part side can be deformed in a direction perpendicular to the surface of the conductor layer by connecting the elastic parts at the joint part. The thick conductor substrate according to claim 11, wherein the substrate is a thick conductor substrate.
前記導体層に、断面がコの字形状のコイルが形成されている
ことを特徴とする請求項1乃至13のいずれか1項に記載の厚導体基板。
The thick conductor substrate according to any one of claims 1 to 13, wherein a coil having a U-shaped cross section is formed in the conductor layer.
前記絶縁層は、ポリフェニレンサルファイド樹脂(PPS)を射出成形して形成されている
ことを特徴とする請求項1乃至8のいずれか1項に記載の厚導体基板。
The thick conductor substrate according to any one of claims 1 to 8, wherein the insulating layer is formed by injection molding of polyphenylene sulfide resin (PPS).
予め金属板を加工して回路パターンが形成された2以上の導体層を電気的に接続する導体層接続工程と、
前記2以上の導体層を、前記回路パターンに対応して熱膨張による変形を低減するように絶縁層を形成するための金型に収納して固定する金型収納工程と、
前記金型に所定の射出成形用樹脂を注入する射出成形工程と、を有する
ことを特徴とする厚導体基板の製造方法。
A conductor layer connecting step of electrically connecting two or more conductor layers on which a circuit pattern is formed by processing a metal plate in advance;
A mold housing step of housing and fixing the two or more conductor layers in a mold for forming an insulating layer so as to reduce deformation due to thermal expansion corresponding to the circuit pattern;
An injection molding step of injecting a predetermined injection molding resin into the mold. A method for producing a thick conductor substrate, comprising:
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