JP2011014739A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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JP2011014739A
JP2011014739A JP2009158114A JP2009158114A JP2011014739A JP 2011014739 A JP2011014739 A JP 2011014739A JP 2009158114 A JP2009158114 A JP 2009158114A JP 2009158114 A JP2009158114 A JP 2009158114A JP 2011014739 A JP2011014739 A JP 2011014739A
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end surface
plate portion
mold resin
resin
terminal plate
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JP5481111B2 (en
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Kosuke Ikeda
康亮 池田
Makoto Matsubayashi
良 松林
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Shindengen Electric Manufacturing Co Ltd
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Shindengen Electric Manufacturing Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To increase electrical reliability of a semiconductor device configured to electrically connect a semiconductor chip with a connection terminal by a connector such as a wire.SOLUTION: The semiconductor device 1 including the semiconductor chip 2, a containing case 4 containing it therein, the connection terminal 5 sealed to a mold resin R1 constituting the containing case 4 and electrically connected with the semiconductor chip 2 via the conductive connector 6, and an embedding resin R2 filled in the containing case 4 to embed the semiconductor chip 2 and the connector 6, wherein the connection terminal 5 includes an inter terminal plate part 22 shaped into a plate form and joined with the connector 6 at its one end surface 22a in a plate thickness direction. The entire other and side surfaces of the inner terminal plate part 22 and a peripheral edge of one end surface 22a in the lump are collectively covered with the mold resin R1.

Description

この発明は、半導体装置に関する。   The present invention relates to a semiconductor device.

従来の半導体装置には、図７に示すように、ケース１０１内部の搭載面１０１ａに半導体チップ１０２を搭載すると共に、半導体チップ１０２とケース１０１の内面に露出する接続端子１０３の端子面とを導電性のワイヤや接続板等の電気接続子１０４により電気接続し、さらに、ケース１０１内部に埋設用樹脂１０５を充填して、搭載面１０１ａ、半導体チップ１０２及び電気接続子１０４を埋設したものがある（例えば、特許文献１参照。）。ケース１０１の一部は、モールド樹脂１０６を成形して構成されており、接続端子１０３はモールド樹脂１０６によって封止されている。
そして、電気接続子１０４を接合させる接続端子１０３の端子面は、接続端子１０３のうち板状に形成された端子板部１０７の板厚方向の一端面１０７ａからなり、その全体がモールド樹脂１０６から外方に露出している。一方、端子板部１０７の他端面１０７ｂや側面は、概ねモールド樹脂１０６によって覆われている。 In the conventional semiconductor device, as shown in FIG. 7, the semiconductor chip 102 is mounted on the mounting surface 101 a inside the case 101, and the semiconductor chip 102 is electrically connected to the terminal surface of the connection terminal 103 exposed on the inner surface of the case 101. In some cases, the mounting surface 101 a, the semiconductor chip 102, and the electrical connector 104 are embedded by filling the case 101 with an embedded resin 105. (For example, refer to Patent Document 1). A part of the case 101 is formed by molding a mold resin 106, and the connection terminals 103 are sealed with the mold resin 106.
The terminal surface of the connection terminal 103 to which the electrical connector 104 is joined is composed of one end surface 107 a in the plate thickness direction of the terminal plate portion 107 formed in a plate shape in the connection terminal 103, and the entire surface is formed from the mold resin 106. Exposed to the outside. On the other hand, the other end surface 107 b and the side surface of the terminal plate portion 107 are substantially covered with the mold resin 106.

特開２００４−２１４２９４号公報JP 2004-214294 A

ところで、上記構成のケース１０１を製造する場合には、一端面１０７ａ全体が露出するように接続端子１０３をモールド樹脂１０６により封止する。この際、モールド樹脂１０６内にはガスが含まれているため、特に金型内においてモールド樹脂１０６を成形する場合には、モールド樹脂１０６内のガスを取り除く脱泡を実施しても、端子板部１０７の他端面１０７ｂとモールド樹脂１０６との間に上記ガスが気泡として残ることが多い。   By the way, when manufacturing the case 101 of the said structure, the connection terminal 103 is sealed with the mold resin 106 so that the whole end surface 107a may be exposed. At this time, since the gas is contained in the mold resin 106, especially when the mold resin 106 is molded in the mold, the terminal board can be removed even if degassing is performed to remove the gas in the mold resin 106. The gas often remains as bubbles between the other end surface 107b of the portion 107 and the mold resin 106.

また、上記構成の半導体装置１に対しては、急激な加熱冷却を繰り返す熱衝撃試験が実施されるが、この試験において半導体装置１を急激に加熱すると、導電性材料（金属材料）からなる端子板部１０７と樹脂材料であるモールド樹脂１０６との熱膨張係数の差に基づいて、端子板部１０７の側面とモールド樹脂１０６との間に隙間が生じる。
すなわち、樹脂材料であるモールド樹脂１０６の熱膨張係数は、導電性材料（金属材料）からなる端子板部１０７よりも低く、また、端子板部１０７やモールド樹脂１０６は、端子板部１０７の板厚方向よりも面方向に沿って膨張収縮し易いため、半導体装置１を急激に加熱すると端子板部１０７の側面とモールド樹脂１０６との間に大きな隙間が生じ易い。 The semiconductor device 1 having the above configuration is subjected to a thermal shock test in which rapid heating and cooling are repeated. When the semiconductor device 1 is rapidly heated in this test, a terminal made of a conductive material (metal material) is used. A gap is generated between the side surface of the terminal plate portion 107 and the mold resin 106 based on the difference in thermal expansion coefficient between the plate portion 107 and the mold resin 106 that is a resin material.
That is, the thermal expansion coefficient of the mold resin 106 which is a resin material is lower than that of the terminal plate portion 107 made of a conductive material (metal material), and the terminal plate portion 107 and the mold resin 106 are formed on the plate of the terminal plate portion 107. Since the semiconductor device 1 is easily expanded and contracted along the surface direction rather than the thickness direction, a large gap is likely to be generated between the side surface of the terminal plate portion 107 and the mold resin 106 when the semiconductor device 1 is heated rapidly.

そして、上記隙間が形成された状態では、端子板部１０７の他端面１０７ｂとモールド樹脂１０６との間の気泡が上記隙間を介して端子板部１０７の一端面１０７ａと埋設用樹脂１０５との界面に現れる。ここで、熱衝撃試験等により気泡が膨張収縮すると、接続端子１０３と電気接続子１０４との電気接続状態が解消されてしまい、半導体装置の電気的な信頼性が低下する虞がある。
また、埋設用樹脂１０５がゲル状樹脂である場合には、上記気泡が高温状態でゲル状樹脂に侵入すると、ゲル状樹脂が酸化してその特性が劣化する虞がある。さらに、電気接続子１０４がゲル状樹脂に埋設されたワイヤである場合には、ゲル状樹脂の劣化に基づいてワイヤが断線する虞がある。具体的に説明すれば、ゲル状樹脂が酸化するとその柔軟性が増してしまい、熱衝撃試験におけるゲル状樹脂の膨張収縮の振幅が増大する。そして、ゲル状樹脂の大きな膨張収縮が繰り返されることで、ゲル状樹脂に埋設されたワイヤが断線し易くなる、すなわち、半導体装置の電気的な信頼性が低下する、という問題がある。なお、気泡がゲル状樹脂に侵入して、複数のワイヤが同一の気泡に含まれてしまう場合でも、複数のワイヤ間に放電が生じることでワイヤが断線し易くなる、という問題が生じる。 In the state in which the gap is formed, bubbles between the other end face 107b of the terminal plate portion 107 and the mold resin 106 form an interface between the one end face 107a of the terminal plate portion 107 and the embedding resin 105 through the gap. Appear in Here, when bubbles expand and contract due to a thermal shock test or the like, the electrical connection state between the connection terminal 103 and the electrical connector 104 is canceled, and the electrical reliability of the semiconductor device may be reduced.
Further, in the case where the embedding resin 105 is a gel resin, if the bubbles enter the gel resin at a high temperature, the gel resin may be oxidized to deteriorate its characteristics. Furthermore, when the electrical connector 104 is a wire embedded in a gel resin, the wire may be disconnected based on the deterioration of the gel resin. More specifically, when the gel-like resin is oxidized, its flexibility increases, and the amplitude of expansion and contraction of the gel-like resin in the thermal shock test increases. Further, the large expansion and contraction of the gel-like resin is repeated, so that there is a problem that the wire embedded in the gel-like resin is easily disconnected, that is, the electrical reliability of the semiconductor device is lowered. In addition, even when bubbles enter the gel-like resin and a plurality of wires are included in the same bubble, there is a problem that the wires are easily disconnected due to discharge between the plurality of wires.

なお、従来では、ゲル状樹脂の針入度を低く（硬く）設定することで、ゲル状樹脂に対する気泡の侵入防止を図っている。しかしながら、近年の熱衝撃試験の条件は、−５５℃〜１５０℃あるいは−６５℃〜１７５℃と厳しくなる傾向にあり、この条件ではゲル状樹脂の針入度を低くしても気泡がゲル状樹脂に侵入する、という問題がある。   Conventionally, the penetration of bubbles into the gel resin is prevented by setting the penetration of the gel resin low (hard). However, the conditions of recent thermal shock tests tend to be stricter from −55 ° C. to 150 ° C. or from −65 ° C. to 175 ° C. Under these conditions, even if the penetration of the gel-like resin is lowered, the bubbles are gel-like. There is a problem of entering into the resin.

この発明は、上述した事情に鑑みたものであって、電気的な信頼性の向上を図ることが可能な半導体装置を提供することを目的とする。   The present invention has been made in view of the above-described circumstances, and an object thereof is to provide a semiconductor device capable of improving electrical reliability.

この課題を解決するために、本発明の半導体装置は、半導体チップと、これを内部に収容する収容ケースと、当該収容ケースを構成するモールド樹脂に封止されると共に導電性の接続子を介して前記半導体チップに電気接続される接続端子と、前記収容ケースの内部に充填されて前記半導体チップ及び前記接続子を埋設する埋設樹脂とを備え、前記接続端子は、板状に形成されると共に板厚方向の一端面に前記接続子が接合される内部端子板部を備え、前記モールド樹脂が、前記内部端子板部の他端面及び側面全体、並びに、前記一端面の周縁を一括して覆うことを特徴とする。   In order to solve this problem, a semiconductor device of the present invention includes a semiconductor chip, a housing case that houses the semiconductor chip, and a mold resin that constitutes the housing case, and a conductive connector. A connection terminal that is electrically connected to the semiconductor chip, and an embedded resin that fills the housing case and embeds the semiconductor chip and the connector, and the connection terminal is formed in a plate shape An internal terminal plate portion to which the connector is joined is provided on one end surface in the plate thickness direction, and the mold resin collectively covers the other end surface and the entire side surface of the internal terminal plate portion, and the periphery of the one end surface. It is characterized by that.

本発明の半導体装置を急激に加熱した場合には、従来の半導体装置と同様に、導電性材料からなる内部端子板部とこれを覆うモールド樹脂との間に隙間が形成される。ここで、内部端子板部やモールド樹脂は、内部端子板部の板厚方向よりも面方向に沿って膨張収縮し易いため、内部端子板部の側面とモールド樹脂との隙間は大きくなるものの、内部端子板部の一端面とモールド樹脂との隙間は、内部端子板部の側面とモールド樹脂との隙間と比較して非常に狭くなる。このため、内部端子板部の他端面とモールド樹脂との間の気泡は、内部端子板部の側面とモールド樹脂との隙間までは容易に移動できるものの、内部端子板部の一端面とモールド樹脂との隙間を通過し難くなる。
したがって、上記気泡が内部端子板部の一端面とモールド樹脂との隙間から埋設樹脂側に侵入することを抑制することができ、例えば、半導体装置に対して熱衝撃試験が実施されても、従来のように気泡の膨張収縮に伴う内部端子板部と接続子との電気接続状態が解消されることを防止して、半導体装置の信頼性向上を図ることができる。 When the semiconductor device of the present invention is heated rapidly, a gap is formed between the internal terminal plate portion made of a conductive material and the mold resin covering the same as in the conventional semiconductor device. Here, since the internal terminal plate part and the mold resin are more easily expanded and contracted along the surface direction than the thickness direction of the internal terminal plate part, the gap between the side surface of the internal terminal plate part and the mold resin is large, The gap between the one end surface of the internal terminal plate portion and the mold resin is very narrow compared to the gap between the side surface of the internal terminal plate portion and the mold resin. For this reason, although the bubble between the other end surface of the internal terminal plate portion and the mold resin can easily move to the gap between the side surface of the internal terminal plate portion and the mold resin, the one end surface of the internal terminal plate portion and the mold resin It becomes difficult to pass through the gap.
Therefore, it is possible to prevent the bubbles from entering the embedded resin side through the gap between the one end surface of the internal terminal plate portion and the mold resin. For example, even if a thermal shock test is performed on a semiconductor device, Thus, it is possible to prevent the state of electrical connection between the internal terminal plate portion and the connector accompanying the expansion and contraction of the bubbles, thereby improving the reliability of the semiconductor device.

なお、前記半導体装置においては、前記モールド樹脂のうち前記一端面の周縁を覆う環状被覆部が、前記一端面からの厚さ寸法が前記一端面の周縁から内側に向かうにしたがって薄くなるように、断面楔形状に形成されていることが好ましい。   In the semiconductor device, the annular covering portion that covers the periphery of the one end surface of the mold resin is thinned so that the thickness dimension from the one end surface is inward from the periphery of the one end surface. It is preferably formed in a wedge shape in cross section.

この半導体装置によれば、内部端子板部の一端面の周縁に位置する環状被覆部の基端部の厚さ寸法と比較して、前記一端面の周縁から内側に離れた環状被覆部の先端部の厚さ寸法が薄いため、半導体装置を急激に加熱した際に環状被覆部の先端部が厚さ方向に膨張する割合は、環状被覆部の基端部と比較して小さくなる。すなわち、半導体装置を急激に加熱した際に内部端子板部の一端面と環状被覆部の先端部との間に生じる隙間が、内部端子板部の一端面と環状被覆部の基端部との間に生じる隙間と比較して小さくなり、上記気泡が内部端子板部の一端面とモールド樹脂との隙間をさらに通過し難くなる。
また、内部端子板部の一端面とこれに連なる環状被覆部の表面との傾斜角度が鈍角となるため、埋設樹脂を充填する際に、内部端子板部の一端面と環状被覆部の表面との角部に充填不良が発生することを防止できる。 According to this semiconductor device, compared with the thickness dimension of the base end portion of the annular covering portion located at the peripheral edge of the one end surface of the internal terminal plate portion, the tip of the annular covering portion spaced inward from the peripheral edge of the one end surface Since the thickness dimension of the portion is thin, the rate at which the tip end portion of the annular covering portion expands in the thickness direction when the semiconductor device is heated rapidly is smaller than the base end portion of the annular covering portion. That is, when the semiconductor device is rapidly heated, a gap generated between the one end surface of the internal terminal plate portion and the distal end portion of the annular cover portion is formed between the one end surface of the internal terminal plate portion and the base end portion of the annular cover portion. The gap is smaller than the gap formed therebetween, and the bubbles are more difficult to pass through the gap between the one end surface of the internal terminal plate portion and the mold resin.
In addition, since the inclination angle between the one end surface of the internal terminal plate portion and the surface of the annular covering portion connected thereto is an obtuse angle, when filling the embedded resin, the one end surface of the internal terminal plate portion and the surface of the annular covering portion It is possible to prevent the filling failure from occurring at the corners.

また、前記半導体装置においては、前記モールド樹脂のうち前記一端面の周縁を覆う環状被覆部の内縁が、平面視多角形状に形成され、当該環状被覆部の内縁角部が、前記一端面の内側に膨出する平面視扇状に形成されていることが好ましい。
この半導体装置によれば、環状被覆部の内縁が平面視多角形状に形成されても、内縁角部の内角をより大きく形成することが可能となるため、埋設樹脂を充填する際に、この内縁角部に充填不良が発生することを防止できる。 Further, in the semiconductor device, an inner edge of the annular covering portion that covers a peripheral edge of the one end surface of the mold resin is formed in a polygonal shape in plan view, and an inner edge corner portion of the annular covering portion is an inner side of the one end surface. It is preferably formed in a fan shape in plan view that bulges out.
According to this semiconductor device, even when the inner edge of the annular covering portion is formed in a polygonal shape in plan view, the inner angle of the inner edge corner portion can be formed larger, so when filling the embedded resin, the inner edge It is possible to prevent poor filling at the corners.

本発明によれば、内部端子板部の他端面とモールド樹脂との間の気泡が、内部端子板部の一端面とモールド樹脂との隙間から埋設樹脂側に侵入することを抑制できるため、半導体装置の信頼性向上を図ることができる。   According to the present invention, air bubbles between the other end surface of the internal terminal plate portion and the mold resin can be prevented from entering the embedded resin side through the gap between the one end surface of the internal terminal plate portion and the mold resin. The reliability of the apparatus can be improved.

本発明の一実施形態に係る半導体装置を示す概略平面図である。1 is a schematic plan view showing a semiconductor device according to an embodiment of the present invention. 図１の半導体装置を示す要部拡大断面図である。FIG. 2 is an enlarged cross-sectional view of a main part showing the semiconductor device of FIG. 1. 図１，２の半導体装置において、モールド樹脂から露出する内部端子板部の一端面に対するモールド樹脂の被覆状態を示す要部拡大平面図である。In the semiconductor device of FIGS. 1 and 2, it is a principal part enlarged plan view showing a covering state of the mold resin on one end face of the internal terminal plate exposed from the mold resin. 図３のＡ−Ａ矢視断面図である。It is AA arrow sectional drawing of FIG. 図３に示すモールド樹脂の被覆状態の変形例を示す概略平面図である。It is a schematic plan view which shows the modification of the covering state of the mold resin shown in FIG. 図５のＢ−Ｂ矢視断面図である。It is BB arrow sectional drawing of FIG. 従来の半導体装置の一例を示す概略断面図である。It is a schematic sectional drawing which shows an example of the conventional semiconductor device.

以下、図面を参照して本発明の一実施形態について説明する。
図１，２に示すように、この実施形態に係る半導体装置１は、半導体チップ２及びセラミック基板３と、これらを内部に収容する収容ケース４と、収容ケース４を構成するモールド樹脂Ｒ１に封止された複数の接続端子５と、半導体チップ２、セラミック基板３及び接続端子５を互いに電気接続させるためのワイヤ（接続子）６と、収容ケース４の内部に充填されて半導体チップ２、セラミック基板３及びワイヤ６を埋設するゲル状樹脂（埋設樹脂）Ｒ２とを備えて構成されている。
なお、モールド樹脂Ｒ１は、電気的な絶縁性及び収容ケース４としての剛性を有していればよく、例えばエポキシ樹脂やシリカ系樹脂等が挙げられる。また、ゲル状樹脂Ｒ２は、電気的な絶縁性を有する高分子ゲルであればよく、その具体例としては、シリコーンゲル等が挙げられる。 Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
As shown in FIGS. 1 and 2, the semiconductor device 1 according to this embodiment is sealed in a semiconductor chip 2 and a ceramic substrate 3, a housing case 4 that houses them, and a mold resin R <b> 1 that constitutes the housing case 4. The plurality of stopped connection terminals 5, the semiconductor chip 2, the ceramic substrate 3 and the connection terminals 5 are electrically connected to each other, and the inside of the housing case 4 is filled with the semiconductor chip 2 and the ceramic. The substrate 3 and the gel resin (embedded resin) R2 for embedding the wires 6 are provided.
The mold resin R1 only needs to have electrical insulation and rigidity as the housing case 4, and examples thereof include an epoxy resin and a silica-based resin. The gel-like resin R2 may be a polymer gel having electrical insulation, and specific examples thereof include silicone gel.

収容ケース４は、上面１１ａにセラミック基板３及び半導体チップ２を順番に積層する平面視矩形板状の底壁板部１１と、底壁板部１１の上面１１ａの周縁から上方に延びて平面視矩形環状に形成された周壁部１２とを備えた箱型に形成されている。なお、前述した収容ケース４の内部とは、周壁部１２によって囲繞される空間部分を示している。
そして、収容ケース４の底壁板部１１は半導体チップ２において生じる熱を外方に放熱させる放熱板であり、収容ケース４の周壁部１２はモールド樹脂Ｒ１によって構成されている。すなわち、底壁板部１１と周壁部１２とは別個の部材によって構成されている。 The housing case 4 includes a bottom wall plate portion 11 having a rectangular shape in plan view in which the ceramic substrate 3 and the semiconductor chip 2 are sequentially stacked on the upper surface 11a, and a plan view extending upward from the periphery of the upper surface 11a of the bottom wall plate portion 11. It is formed in the box shape provided with the surrounding wall part 12 formed in the rectangular annular shape. In addition, the inside of the storage case 4 mentioned above has shown the space part enclosed by the surrounding wall part 12. FIG.
The bottom wall plate portion 11 of the housing case 4 is a heat radiating plate that dissipates heat generated in the semiconductor chip 2 to the outside, and the peripheral wall portion 12 of the housing case 4 is made of mold resin R1. That is, the bottom wall plate portion 11 and the peripheral wall portion 12 are configured by separate members.

底壁板部１１をなす放熱板は、例えば、銅（Ｃｕ）、タングステン、モリブデン等のように、放熱性の高い材料によって形成されていればよいが、これに加えて例えばＮｉメッキを施したものでもよい。
モールド樹脂Ｒ１からなる周壁部１２は、底壁板部１１の上面１１ａの周縁よりも外側に延出するように形成されており、周壁部１２の延出部分には、底壁板部１１側に面する下端面１２ｂから突出して底壁板部１１を囲繞する平面視矩形環状の囲繞壁部１３が一体に形成されている。この囲繞壁部１３は、その内縁形状が底壁板部１１の平面視形状に対応していることで、周壁部１２に対する底壁板部１１の位置決めを容易としている。 The heat radiating plate forming the bottom wall plate portion 11 may be formed of a material having high heat radiating properties such as copper (Cu), tungsten, molybdenum, etc., but in addition to this, for example, Ni plating is applied. It may be a thing.
The peripheral wall portion 12 made of the mold resin R1 is formed so as to extend outward from the peripheral edge of the upper surface 11a of the bottom wall plate portion 11, and the extended portion of the peripheral wall portion 12 includes the bottom wall plate portion 11 side. An encircling wall portion 13 having a rectangular shape in a plan view and projecting from the lower end surface 12b facing the encircling surface and surrounding the bottom wall plate portion 11 is integrally formed. The surrounding wall portion 13 has an inner edge shape corresponding to a plan view shape of the bottom wall plate portion 11, thereby facilitating positioning of the bottom wall plate portion 11 with respect to the peripheral wall portion 12.

また、底壁板部１１側に位置する周壁部１２の下端面１２ｂ側には、周壁部１２の内周面１２ｃから内側に突出する段差部１４が一体に形成されている。この段差部１４は、周壁部１２の下端面１２ｂと同一平面をなす下側段差面１４ｂと、底壁板部１１の上面１１ａの上方に位置して、周壁部１２の上端面１２ａよりも高さ位置が低い上側段差面１４ａとを有している。なお、この段差部１４は、周壁部１２の内周面１２ｃの周方向全体にわたって平面視環状に形成され、その内縁形状が平面視矩形状に形成されている。   Further, a stepped portion 14 that protrudes inward from the inner peripheral surface 12c of the peripheral wall 12 is integrally formed on the lower end surface 12b side of the peripheral wall 12 positioned on the bottom wall plate 11 side. The stepped portion 14 is located above the lower stepped surface 14 b that is flush with the lower end surface 12 b of the peripheral wall portion 12 and the upper surface 11 a of the bottom wall plate portion 11 and is higher than the upper end surface 12 a of the peripheral wall portion 12. And an upper step surface 14a having a low position. In addition, this level | step-difference part 14 is formed in planar view cyclic | annular form over the whole circumferential direction of the internal peripheral surface 12c of the surrounding wall part 12, and the inner edge shape is formed in planar view rectangular shape.

各接続端子５は、導電性部材を断面視Ｌ字状に屈曲させて形成されている。そして、接続端子５のうち屈曲部分の一方側は、周壁部１２内において上方に延びるように配されると共に、その先端部分が周壁部１２の上端面１２ａ上に突出する外部端子部２１をなしている。また、接続端子５のうち屈曲部分の他方側は、周壁部１２内から段差部１４内に入り込むように延びて配され、半導体チップ２やセラミック基板３に電気接続するための内部端子板部２２をなしている。
内部端子板部２２は、図２〜４に示すように、その板厚方向の一端面２２ａが段差部１４の上側段差面１４ａから露出しており、この一端面２２ａにワイヤ６が接合されている。そして、周壁部１２の内周面１２ｃ及び段差部１４の上側段差面１４ａをなすモールド樹脂Ｒ１は、この内部端子板部２２の他端面２２ｂ及び側面２２ｃ全体、並びに一端面２２ａの周縁を一括して覆っている。 Each connection terminal 5 is formed by bending a conductive member in an L shape in cross section. One side of the bent portion of the connection terminal 5 is arranged so as to extend upward in the peripheral wall portion 12, and the distal end portion forms an external terminal portion 21 protruding on the upper end surface 12 a of the peripheral wall portion 12. ing. Further, the other side of the bent portion of the connection terminal 5 extends from the peripheral wall portion 12 so as to enter the stepped portion 14, and an internal terminal plate portion 22 for electrical connection to the semiconductor chip 2 and the ceramic substrate 3. I am doing.
As shown in FIGS. 2 to 4, one end surface 22 a in the plate thickness direction of the internal terminal plate portion 22 is exposed from the upper step surface 14 a of the step portion 14, and the wire 6 is bonded to the one end surface 22 a. Yes. The mold resin R1 that forms the inner peripheral surface 12c of the peripheral wall portion 12 and the upper step surface 14a of the step portion 14 collectively includes the other end surface 22b and the entire side surface 22c of the internal terminal plate portion 22 and the peripheral edge of the one end surface 22a. Covered.

さらに詳述すれば、モールド樹脂Ｒ１のうち内部端子板部２２の一端面２２ａの周縁を覆う環状被覆部１５は、一端面２２ａからの厚さ寸法が一端面２２ａの周縁側から内側に向かうにしたがって次第に薄くなるように、断面楔形状に形成されている。これにより、段差部１４の上側段差面１４ａと内部端子板部２２の一端面２２ａの露出部分とが、環状被覆部１５の各辺の傾斜面（表面）１５ａによって連なっている。
なお、環状被覆部１５の断面楔形状は、例えば内部端子板部２２の一端面２２ａの周縁から内側のみに形成されてもよいが、図示例のように、一端面２２ａの周縁の外側まで延びるように形成されていることがより好ましい。 More specifically, the annular covering portion 15 that covers the periphery of the one end surface 22a of the internal terminal plate portion 22 in the mold resin R1 has a thickness dimension from the one end surface 22a toward the inside from the periphery side of the one end surface 22a. Accordingly, it is formed in a wedge shape so as to become thinner gradually. Thereby, the upper step surface 14 a of the step portion 14 and the exposed portion of the one end surface 22 a of the internal terminal plate portion 22 are connected by the inclined surface (surface) 15 a of each side of the annular covering portion 15.
In addition, although the cross-sectional wedge shape of the cyclic | annular covering part 15 may be formed only inside from the periphery of the one end surface 22a of the internal terminal board part 22, for example, it extends to the outer side of the periphery of the one end surface 22a like the example of illustration. More preferably, it is formed as described above.

図１，２に示すように、セラミック基板３は、電気的な絶縁性を有する平面視矩形状のセラミック板３１の表面及び裏面に、導電性を有する配線パターン３２，３３，３４を形成して構成されている。ここで、セラミック板３１の表面には複数（図示例では２つ）の配線パターン３２，３３が形成されているが、これらは互いに電気的に絶縁されている。
以上のように構成されるセラミック基板３は、段差部１４の内縁との間に隙間が形成されるように底壁板部１１の上面１１ａに配され、半田（不図示）を介してセラミック板３１の裏面に形成された第三配線パターン３４を底壁板部１１の上面１１ａに接合することで底壁板部１１に固定されている。なお、図示例において、底壁板部１１の上面１１ａに対するセラミック基板３の高さ寸法は、段差部１４の高さ寸法よりも低く設定されているが、これに限ることは無く、例えば段差部１４の高さ寸法以上に設定されてもよい。 As shown in FIGS. 1 and 2, the ceramic substrate 3 has conductive wiring patterns 32, 33, and 34 formed on the front surface and the back surface of a rectangular ceramic plate 31 having electrical insulation. It is configured. Here, a plurality (two in the illustrated example) of wiring patterns 32 and 33 are formed on the surface of the ceramic plate 31, and these are electrically insulated from each other.
The ceramic substrate 3 configured as described above is disposed on the upper surface 11a of the bottom wall plate portion 11 so that a gap is formed between the inner edge of the stepped portion 14, and the ceramic plate is interposed via solder (not shown). The third wiring pattern 34 formed on the back surface of 31 is fixed to the bottom wall plate portion 11 by joining to the upper surface 11 a of the bottom wall plate portion 11. In the illustrated example, the height dimension of the ceramic substrate 3 with respect to the upper surface 11a of the bottom wall plate portion 11 is set to be lower than the height dimension of the step portion 14, but the present invention is not limited to this. It may be set to 14 or more height dimensions.

半導体チップ２は、半田（不図示）を介してセラミック板３１の表面に形成された第一配線パターン３２に接合されることでセラミック基板３に固定されている。この状態においては、半導体チップ２が第一配線パターン３２に電気接続され、また、セラミック板３１によって底壁板部１１と電気的に絶縁されている。
ワイヤ６には、半導体チップ２と各接続端子５とを直接電気接続するものと、第一配線パターン３２や第二配線パターン３３を介して半導体チップ２と接続端子５とを電気接続するものとがある。また、第一、第二配線パターン３２，３３と一部の接続端子５との間、あるいは、半導体チップ２と第二配線パターン３３との間には、複数のワイヤ６Ａが平行するように配列されている。これら複数のワイヤ６Ａは、ゲル状樹脂Ｒ２内に埋設された状態で隣り合うワイヤ６Ａ間において放電が発生しない程度の間隔をあけて配されている。 The semiconductor chip 2 is fixed to the ceramic substrate 3 by being bonded to a first wiring pattern 32 formed on the surface of the ceramic plate 31 via solder (not shown). In this state, the semiconductor chip 2 is electrically connected to the first wiring pattern 32 and is electrically insulated from the bottom wall plate portion 11 by the ceramic plate 31.
The wire 6 has an electrical connection between the semiconductor chip 2 and each connection terminal 5 directly, and an electrical connection between the semiconductor chip 2 and the connection terminal 5 via the first wiring pattern 32 and the second wiring pattern 33. There is. Also, a plurality of wires 6A are arranged in parallel between the first and second wiring patterns 32 and 33 and some of the connection terminals 5 or between the semiconductor chip 2 and the second wiring pattern 33. Has been. The plurality of wires 6A are arranged at intervals such that no discharge occurs between the adjacent wires 6A in a state of being embedded in the gel resin R2.

以上のように構成された半導体装置１を急激に加熱した場合には、内部端子板部２２とこれを覆うモールド樹脂Ｒ１との間に隙間が形成される。ここで、内部端子板部２２やこれを覆うモールド樹脂Ｒ１は、内部端子板部２２の板厚方向よりも面方向に沿って膨張収縮し易いため、内部端子板部２２の側面２２ｃとモールド樹脂Ｒ１との隙間は大きくなるものの、内部端子板部２２の一端面２２ａと環状被覆部１５をなすモールド樹脂Ｒ１との隙間は、内部端子板部２２の側面２２ｃとモールド樹脂Ｒ１との隙間と比較して非常に狭くなる。   When the semiconductor device 1 configured as described above is rapidly heated, a gap is formed between the internal terminal plate portion 22 and the mold resin R1 covering the internal terminal plate portion 22. Here, since the internal terminal plate portion 22 and the mold resin R1 covering the inner terminal plate portion 22 are more easily expanded and contracted along the surface direction than the plate thickness direction of the internal terminal plate portion 22, the side surface 22c of the internal terminal plate portion 22 and the mold resin are used. Although the gap with R1 is large, the gap between the end surface 22a of the internal terminal plate portion 22 and the mold resin R1 forming the annular covering portion 15 is compared with the gap between the side surface 22c of the internal terminal plate portion 22 and the mold resin R1. And become very narrow.

特に、断面楔形状に形成された環状被覆部１５では、内部端子板部２２の一端面２２ａの周縁に位置する環状被覆部１５の基端部の厚さ寸法と比較して、一端面２２ａの周縁から内側に離れた環状被覆部１５の先端部の厚さ寸法が薄くなるため、半導体装置１を急激に加熱した際に環状被覆部１５の先端部が厚さ方向に膨張する割合は、環状被覆部１５の基端部と比較して小さくなる。したがって、半導体装置１を急激に加熱した際に内部端子板部２２の一端面２２ａと環状被覆部１５の先端部との間に生じる隙間は、一端面２２ａと環状被覆部１５の基端部との間に生じる隙間と比較してさらに小さくなる。   In particular, in the annular covering portion 15 formed in a wedge shape in cross section, the thickness of the base end portion of the annular covering portion 15 located at the peripheral edge of the one end surface 22a of the internal terminal plate portion 22 is compared with that of the one end surface 22a. Since the thickness dimension of the front end portion of the annular covering portion 15 that is separated from the periphery inward is reduced, the rate at which the front end portion of the annular covering portion 15 expands in the thickness direction when the semiconductor device 1 is rapidly heated is It becomes smaller than the base end portion of the covering portion 15. Therefore, when the semiconductor device 1 is rapidly heated, a gap generated between the one end surface 22a of the internal terminal plate portion 22 and the distal end portion of the annular covering portion 15 is between the one end surface 22a and the proximal end portion of the annular covering portion 15. It becomes smaller compared with the gap generated between the two.

このため、内部端子板部２２の他端面２２ｂとモールド樹脂Ｒ１との間の気泡は、内部端子板部２２の側面２２ｃとモールド樹脂Ｒ１との隙間までは容易に移動できるものの、内部端子板部２２の一端面２２ａと環状被覆部１５との隙間、特に、内部端子板部２２の一端面２２ａと環状被覆部１５の先端部との隙間を通過し難くなる。すなわち、上記気泡が内部端子板部２２の一端面２２ａとモールド樹脂Ｒ１との隙間からゲル状樹脂Ｒ２側に侵入することを抑制することができる。   For this reason, although the bubble between the other end surface 22b of the internal terminal plate portion 22 and the mold resin R1 can be easily moved to the gap between the side surface 22c of the internal terminal plate portion 22 and the mold resin R1, the internal terminal plate portion 22, it is difficult to pass through the gap between the one end face 22 a of the inner cover 22 and the annular cover 15, particularly, the gap between the one end face 22 a of the internal terminal plate 22 and the tip of the annular cover 15. That is, it is possible to prevent the bubbles from entering the gel-like resin R2 side through the gap between the one end face 22a of the internal terminal plate portion 22 and the mold resin R1.

したがって、上記構成の半導体装置１によれば、上記気泡に起因する半導体装置１の電気的な信頼性低下を防ぐことができる。
具体的には、内部端子板部２２の一端面２２ａとゲル状樹脂Ｒ２との界面に気泡が現れることが無いため、例えば、内部端子板部２２の一端面２２ａとワイヤ６との接合状態が解消されることを防止できる。また、例えば、気泡によるゲル状樹脂Ｒ２の特性劣化に基づいてワイヤ６が断線することも防止できる。さらに、第一、第二配線パターン３２，３３と一部の接続端子５との間や、半導体チップ２と第二配線パターン３３との間にそれぞれ複数配列されたワイヤ６Ａ同士の間隔が狭くても、隣り合うワイヤ６が同一の気泡に含まれることは無いため、隣り合うワイヤ６間において放電が生じてワイヤ６が断線することも防止できる。
すなわち、本実施形態の半導体装置１によれば、電気的な信頼性向上を図ることができる。 Therefore, according to the semiconductor device 1 having the above configuration, it is possible to prevent a decrease in electrical reliability of the semiconductor device 1 due to the bubbles.
Specifically, since air bubbles do not appear at the interface between the one end surface 22a of the internal terminal plate portion 22 and the gel-like resin R2, for example, the bonding state between the one end surface 22a of the internal terminal plate portion 22 and the wire 6 is It can be prevented from being eliminated. Further, for example, it is possible to prevent the wire 6 from being disconnected based on the characteristic deterioration of the gel-like resin R2 due to bubbles. Further, the distance between the plurality of wires 6A arranged between the first and second wiring patterns 32 and 33 and some of the connection terminals 5 and between the semiconductor chip 2 and the second wiring pattern 33 is narrow. However, since the adjacent wires 6 are not included in the same bubble, it is possible to prevent the wires 6 from being disconnected due to discharge between the adjacent wires 6.
That is, according to the semiconductor device 1 of the present embodiment, electrical reliability can be improved.

また、本実施形態の半導体装置１によれば、内部端子板部２２の一端面２２ａとこれに連なる環状被覆部１５の傾斜面１５ａとの傾斜角度が鈍角となるため、ゲル状樹脂Ｒ２を充填する際に、内部端子板部２２の一端面２２ａと環状被覆部１５の傾斜面１５ａとの角部に充填不良が発生することを防止できる。   Further, according to the semiconductor device 1 of the present embodiment, since the inclination angle between the one end surface 22a of the internal terminal plate portion 22 and the inclined surface 15a of the annular covering portion 15 connected thereto is an obtuse angle, the gel resin R2 is filled. In doing so, it is possible to prevent a filling failure from occurring at the corners between the one end surface 22a of the internal terminal plate portion 22 and the inclined surface 15a of the annular covering portion 15.

なお、上記実施形態において、内部端子板部２２の一端面２２ａの周縁を覆う環状被覆部１５の内縁は平面視矩形状に形成されているが、この場合には、例えば図５，６に示すように、環状被覆部１５の内縁角部を、一端面２２ａの内側に膨出する平面視扇状に形成することがより好ましい。なお、図示例においては、内縁角部の膨出部分１６が、環状被覆部１５の各辺の傾斜面１５ａに倣う円錐状に形成され、その円錐面１６ａが前記傾斜面１５ａに連なるように形成されている。   In the above embodiment, the inner edge of the annular covering portion 15 that covers the periphery of the one end face 22a of the internal terminal plate portion 22 is formed in a rectangular shape in plan view. In this case, for example, as shown in FIGS. Thus, it is more preferable to form the inner edge corner portion of the annular covering portion 15 in a fan shape in plan view that bulges inside the one end surface 22a. In the illustrated example, the bulging portion 16 of the inner corner is formed in a conical shape following the inclined surface 15a of each side of the annular covering portion 15, and the conical surface 16a is formed so as to be continuous with the inclined surface 15a. Has been.

この構成によれば、環状被覆部１５の内縁角部の内角をより大きく形成することが可能となるため、ゲル状樹脂Ｒ２を充填する際に、内縁角部に充填不良が発生することを防止できる。特に、環状被覆部１５の内縁角部が、２つの傾斜面１５ａによって画成されたり、一端面２２ａ及び２つの傾斜面１５ａによって画成されたりする図３に示す構成と比較して、ゲル状樹脂Ｒ２の充填不良をより確実に防止できる。   According to this configuration, the inner angle of the inner edge corner portion of the annular covering portion 15 can be formed larger, so that when the gel-like resin R2 is filled, the inner edge corner portion is prevented from being poorly filled. it can. In particular, the inner edge corner portion of the annular covering portion 15 is defined by two inclined surfaces 15a, or compared with the configuration shown in FIG. 3 that is defined by one end surface 22a and two inclined surfaces 15a. The filling failure of the resin R2 can be prevented more reliably.

また、内部端子板部２２の一端面２２ａの周縁を覆う環状被覆部１５は、その厚さ寸法が変化する断面楔形状に形成されていなくてもよく、例えば厚さ寸法が一定となるように形成されても構わない。
この構成でも、上記実施形態の場合と同様に、内部端子板部２２の他端面２２ｂとモールド樹脂Ｒ１との間の気泡は、内部端子板部２２の一端面２２ａと環状被覆部１５との隙間を通過し難いため、一端面２２ａと環状被覆部１５との隙間からゲル状樹脂Ｒ２側に侵入することを抑制できる。 Further, the annular covering portion 15 covering the peripheral edge of the one end surface 22a of the internal terminal plate portion 22 may not be formed in a cross-sectional wedge shape whose thickness dimension changes. For example, the thickness dimension is constant. It may be formed.
Even in this configuration, as in the case of the above-described embodiment, bubbles between the other end surface 22b of the internal terminal plate portion 22 and the mold resin R1 are formed between the one end surface 22a of the internal terminal plate portion 22 and the annular covering portion 15. Therefore, it is possible to prevent the gel resin R2 from entering from the gap between the one end face 22a and the annular covering portion 15.

さらに、環状被覆部１５の内縁は平面視矩形状に形成されるとしたが、任意の平面視形状に形成されていてよい。ただし、環状被覆部１５の内縁が平面視多角形状に形成されている場合には、前述したように、環状被覆部１５の内縁角部を、内部端子板部２２の一端面２２ａの内側に膨出する平面視扇状に形成することがより好ましい。
また、半導体チップ２やセラミック基板３、内部端子板部２２を互いに電気接続させる接続子は、ワイヤ６に限らず、例えば導電性を有する板状の接続板によって構成されてもよい。なお、ワイヤ６を接合させる半導体チップ２やセラミック基板３の表面、内部端子板部２２の一端面２２ａの高さ位置が異なる等している場合には、接続板の中途部を適宜屈曲させることで、接続板の各端部を半導体チップ２やセラミック基板３の表面、内部端子板部２２の一端面２２ａにそれぞれ接合することができる。 Furthermore, although the inner edge of the annular covering portion 15 is formed in a rectangular shape in plan view, it may be formed in an arbitrary shape in plan view. However, when the inner edge of the annular covering portion 15 is formed in a polygonal shape in plan view, as described above, the inner edge corner portion of the annular covering portion 15 swells inside the one end surface 22 a of the internal terminal plate portion 22. It is more preferable to form in a fan shape in a plan view.
Further, the connector for electrically connecting the semiconductor chip 2, the ceramic substrate 3, and the internal terminal plate portion 22 to each other is not limited to the wire 6, and may be constituted by, for example, a conductive plate-like connection plate. In addition, when the height position of the surface of the semiconductor chip 2 or the ceramic substrate 3 to which the wire 6 is bonded and the one end surface 22a of the internal terminal plate portion 22 are different, the middle portion of the connection plate is appropriately bent. Thus, each end portion of the connection plate can be joined to the surface of the semiconductor chip 2 or the ceramic substrate 3 and the one end surface 22a of the internal terminal plate portion 22, respectively.

さらに、接続端子５は、導電性部材を断面視Ｌ字状に屈曲させて形成されるとしたが、少なくとも内部端子板部２２を備えていればよい。したがって、接続端子５は、例えば屈曲部分のない平板状に形成されると共に、その一部が周壁部１２の側部から収容ケース４の外側に突出するようにモールド樹脂Ｒ１に封止されていてもよい。
また、収容ケース４の底壁板部１１は、放熱板によって構成されるとしたが、半導体チップ２の放熱を考慮しない場合には、例えば周壁部１２と同様のモールド樹脂Ｒ１によって周壁部１２と一体に構成されてもよい。 Further, although the connection terminal 5 is formed by bending a conductive member in an L shape in cross-sectional view, it may be provided with at least the internal terminal plate portion 22. Therefore, the connection terminal 5 is formed in, for example, a flat plate shape without a bent portion, and is sealed with the mold resin R1 so that a part thereof protrudes from the side portion of the peripheral wall portion 12 to the outside of the housing case 4. Also good.
Further, although the bottom wall plate portion 11 of the housing case 4 is configured by a heat radiating plate, when the heat radiation of the semiconductor chip 2 is not considered, for example, the mold resin R1 similar to the peripheral wall portion 12 is used to You may be comprised integrally.

さらに、上記実施形態においては、セラミック基板３を収容ケース４とは別個の構成として記載したが、例えばセラミック基板３は収容ケース４の構成に含まれていてもよい。また、半導体チップ２は、セラミック基板３を介して収容ケース４の底壁板部１１の上面１１ａ上に配されるとしたが、例えば底壁板部１１の上面１１ａに直接固定されてもよい。ただし、底壁板部１１が導電性を有する場合には、半導体チップ２と底壁板部１１とを電気的な絶縁性を有する接着剤等により固定することがより好ましい。
さらに、半導体チップ２、セラミック基板３及びワイヤ６を埋設する埋設樹脂は、ゲル状樹脂Ｒ２に限らず、エポキシ樹脂等のように、少なくとも電気的な絶縁性を有すると共に、半導体チップ２、セラミック基板３及びワイヤ６を収容ケース４内に配置した後に収容ケース４内に流し込むことが可能な樹脂であればよい。 Furthermore, in the said embodiment, although the ceramic substrate 3 was described as a structure different from the storage case 4, the ceramic substrate 3 may be contained in the structure of the storage case 4, for example. Further, the semiconductor chip 2 is arranged on the upper surface 11a of the bottom wall plate portion 11 of the housing case 4 via the ceramic substrate 3, but may be directly fixed to the upper surface 11a of the bottom wall plate portion 11, for example. . However, when the bottom wall plate portion 11 has conductivity, it is more preferable to fix the semiconductor chip 2 and the bottom wall plate portion 11 with an adhesive having electrical insulation.
Further, the embedded resin in which the semiconductor chip 2, the ceramic substrate 3 and the wire 6 are embedded is not limited to the gel resin R2, but has at least electrical insulation, such as an epoxy resin, and the semiconductor chip 2, the ceramic substrate. Any resin that can be poured into the housing case 4 after the 3 and the wire 6 are disposed in the housing case 4 may be used.

以上、本発明の実施形態について図面を参照して詳述したが、具体的な構成はこの実施形態に限られるものではなく、本発明の要旨を逸脱しない範囲の設計変更等も含まれる。   As mentioned above, although embodiment of this invention was explained in full detail with reference to drawings, the concrete structure is not restricted to this embodiment, The design change etc. of the range which does not deviate from the summary of this invention are included.

１ 半導体装置
２ 半導体チップ
４ 収容ケース
５ 接続端子
６ ワイヤ（接続子）
１５ 環状被覆部
１５ａ 傾斜面
１６ 膨出部分
１６ａ 円錐面
２２ 内部端子板部
２２ａ 一端面
２２ｂ 他端面
２２ｃ 側面
Ｒ１ モールド樹脂
Ｒ２ ゲル状樹脂（埋設樹脂） DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Semiconductor chip 4 Housing | casing case 5 Connection terminal 6 Wire (connector)
15 annular covering portion 15a inclined surface 16 bulging portion 16a conical surface 22 internal terminal plate portion 22a one end surface 22b other end surface 22c side surface R1 mold resin R2 gel resin (embedded resin)

Claims (3)

半導体チップと、これを内部に収容する収容ケースと、当該収容ケースを構成するモールド樹脂に封止されると共に導電性の接続子を介して前記半導体チップに電気接続される接続端子と、前記収容ケースの内部に充填されて前記半導体チップ及び前記接続子を埋設する埋設樹脂とを備え、
前記接続端子は、板状に形成されると共に板厚方向の一端面に前記接続子が接合される内部端子板部を備え、
前記モールド樹脂が、前記内部端子板部の他端面及び側面全体、並びに、前記一端面の周縁を一括して覆うことを特徴とする半導体装置。 A semiconductor chip, a housing case that houses the semiconductor chip, a connection terminal that is sealed by a mold resin that constitutes the housing case and is electrically connected to the semiconductor chip via a conductive connector, and the housing An embedded resin filled in the case and embedded in the semiconductor chip and the connector;
The connection terminal is formed in a plate shape and includes an internal terminal plate portion to which the connector is joined to one end surface in the plate thickness direction,
The semiconductor device characterized in that the mold resin collectively covers the other end surface and the entire side surface of the internal terminal plate portion and the periphery of the one end surface. 前記モールド樹脂のうち前記一端面の周縁を覆う環状被覆部が、前記一端面からの厚さ寸法が前記一端面の周縁から内側に向かうにしたがって薄くなるように、断面楔形状に形成されていることを特徴とする請求項１に記載の半導体装置。   An annular covering portion that covers the periphery of the one end surface of the mold resin is formed in a wedge shape so that the thickness dimension from the one end surface becomes thinner from the periphery of the one end surface toward the inside. The semiconductor device according to claim 1. 前記モールド樹脂のうち前記一端面の周縁を覆う環状被覆部の内縁が、平面視多角形状に形成され、
当該環状被覆部の内縁角部が、前記一端面の内側に膨出する平面視扇状に形成されていることを特徴とする請求項１又は請求項２に記載の半導体装置。 The inner edge of the annular covering portion that covers the periphery of the one end surface of the mold resin is formed in a polygonal shape in plan view,
3. The semiconductor device according to claim 1, wherein an inner edge corner portion of the annular covering portion is formed in a fan shape in a plan view that bulges inside the one end face.
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