JP5273265B2 - Power semiconductor device - Google Patents

Power semiconductor device Download PDF

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Publication number
JP5273265B2
JP5273265B2 JP2012022697A JP2012022697A JP5273265B2 JP 5273265 B2 JP5273265 B2 JP 5273265B2 JP 2012022697 A JP2012022697 A JP 2012022697A JP 2012022697 A JP2012022697 A JP 2012022697A JP 5273265 B2 JP5273265 B2 JP 5273265B2
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Prior art keywords
wiring
resin
semiconductor device
power semiconductor
semiconductor element
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JP2012022697A
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JP2012114455A (en
Inventor
進吾 須藤
達雄 太田
寛徳 樫本
信剛 谷口
博 吉田
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

この発明は熱可塑性樹脂で封止される電力用半導体装置に関するものである。   The present invention relates to a power semiconductor device sealed with a thermoplastic resin.

熱可塑性樹脂封止型の電力用半導体装置においては、樹脂の固化速度が速く、成形のサイクル時間が短縮できる半面、短時間で封止を完了させる必要があるため、樹脂の充填速度・充填圧力が高くなるという問題が有り、半導体素子などの保護にエポキシ樹脂などからなる保護樹脂を用いる方法が取られている。（例えば、特許文献１）   In thermoplastic resin-encapsulated power semiconductor devices, the resin solidification speed is fast, and the molding cycle time can be shortened. On the other hand, it is necessary to complete the sealing in a short time. Therefore, there is a problem that a protective resin made of an epoxy resin or the like is used for protecting a semiconductor element or the like. (For example, Patent Document 1)

特開平１１−３３０３１７号公報Japanese Patent Laid-Open No. 11-330317

しかしながら、これらの半導体装置ではエポキシ樹脂で保護する必要があるため、実際にはエポキシ樹脂の塗布と昇温による固化処理が必要となるため、熱可塑性樹脂による成形サイクルの短縮効果を十分に生かせず、また塗布位置や塗布量のコントロールを必要とするため、検査も含め工程が煩雑であった。
本発明はかかる問題点を解決し、樹脂が流動する高さを変化させることによって樹脂が充填される速度を選択的にコントロールし、充填圧力を上げることなく充填速度を上げ、さらには配線材料の変形を発生させない電力用半導体装置を提供するものである。 However, since these semiconductor devices need to be protected with an epoxy resin, in reality, it is necessary to apply an epoxy resin and solidify by raising the temperature, so that the effect of shortening the molding cycle by the thermoplastic resin cannot be fully utilized. In addition, since it is necessary to control the application position and the application amount, the process including the inspection is complicated.
The present invention solves such problems, selectively controls the rate at which the resin is filled by changing the height at which the resin flows, increases the filling rate without increasing the filling pressure, and further improves the wiring material. A power semiconductor device that does not cause deformation is provided.

この発明の一形態に係る電力用半導体装置は、基板上で電気回路パターンの一部分の上に固着された少なくとも一つの半導体素子と、前記半導体素子の表面と前記電気回路パターンとを接続し、または前記半導体素子の表面と他の半導体素子の表面とを接続するループ形状の配線と、前記基板の上で少なくとも前記半導体素子および前記配線を覆う熱可塑性樹脂の樹脂筐体とを備え、前記樹脂筐体の前記配線を挟む位置に前記配線と平行な溝部が形成されたことを特徴とするものである。   A power semiconductor device according to an aspect of the present invention connects at least one semiconductor element fixed on a portion of an electric circuit pattern on a substrate, and connects the surface of the semiconductor element and the electric circuit pattern, or A loop-shaped wiring connecting the surface of the semiconductor element and the surface of another semiconductor element, and a thermoplastic resin resin casing covering at least the semiconductor element and the wiring on the substrate; A groove portion parallel to the wiring is formed at a position sandwiching the wiring in the body.

この発明の一形態によれば、半導体素子および配線材料の部分のみ樹脂の厚みを小さくすることによって、充填圧力を小さくしても十分に筐体を形成することが可能となり、かつ温度サイクルなどで発生する筐体の割れを抑制することが可能となった。
この発明のその他の形態および効果については、以下に説明する。 According to one aspect of the present invention, by reducing the thickness of the resin only in the semiconductor element and wiring material portions, it is possible to form a housing sufficiently even when the filling pressure is reduced, and in the temperature cycle or the like. It has become possible to suppress the cracking of the casing that occurs.
Other aspects and effects of the present invention will be described below.

本発明の実施の形態１にかかる電力用半導体装置の外観斜視図である1 is an external perspective view of a power semiconductor device according to a first embodiment of the present invention. 本発明の実施の形態１にかかる電力用半導体装置内部の斜視図である1 is a perspective view of the inside of a power semiconductor device according to a first embodiment of the present invention. 本発明の実施の形態１にかかる電力用半導体装置の部分断面図である1 is a partial cross-sectional view of a power semiconductor device according to a first embodiment of the present invention. 本発明の実施の形態２にかかる電力用半導体装置の外観斜視図であるIt is an external appearance perspective view of the power semiconductor device concerning Embodiment 2 of this invention. 本発明の実施の形態２にかかる電力用半導体装置内部の斜視図であるIt is a perspective view inside the power semiconductor device concerning Embodiment 2 of this invention. 本発明の実施の形態２にかかる電力用半導体装置の部分断面図であるIt is a fragmentary sectional view of the semiconductor device for electric power concerning Embodiment 2 of the present invention. 本発明の実施の形態３にかかる電力用半導体装置の部分断面図であるIt is a fragmentary sectional view of the power semiconductor device concerning Embodiment 3 of this invention. 本発明の実施の形態４にかかる電力用半導体装置の外観斜視図であるIt is an external appearance perspective view of the power semiconductor device concerning Embodiment 4 of this invention. 本発明の実施の形態４にかかる電力用半導体装置の部分断面図であるIt is a fragmentary sectional view of the power semiconductor device concerning Embodiment 4 of this invention.

以下に図面を参照してこの発明の実施の形態について説明する。なお、各図において同一または相当部分には同一の符号を付して、その説明を簡略化ないし省略することがある。
実施の形態１．（参考）
図１は本発明の実施の形態１にかかる電力用半導体装置１００の外形図である。また、図２は本発明にかかる電力用半導体装置１００の内部の図であり、半導体素子の固定状態を示している。
電力用半導体装置１００は、熱可塑性樹脂例えばガラス繊維を配合することによって強度を向上させたガラス繊維強化のＰＰＳ（ポリフェニレンサルファイド）よりなる樹脂筐体１により外形をなし、外部との入出力のための外部端子２、信号端子３が露出している。 Embodiments of the present invention will be described below with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals, and the description thereof may be simplified or omitted.
Embodiment 1 FIG. (reference)
FIG. 1 is an external view of a power semiconductor device 100 according to a first embodiment of the present invention. FIG. 2 is an internal view of the power semiconductor device 100 according to the present invention and shows a fixed state of the semiconductor element.
The power semiconductor device 100 has an outer shape by a resin housing 1 made of glass fiber reinforced PPS (polyphenylene sulfide) whose strength is improved by blending a thermoplastic resin, for example, glass fiber, for input / output from / to the outside. The external terminal 2 and the signal terminal 3 are exposed.

また、この電力用半導体装置１００には、半導体素子として、例えば表面にゲート電極とエミッタ電極を有し、裏面にコレクタ電極を有するＩＧＢＴ４や、表面にアノード電極を有し、裏面にカソード電極を有するＦＷＤｉ５が装着されている。これらの半導体素子からの発熱を、裏面の放熱板６からシリコーングリス、ヒートシンク（共に図示せず）に放熱するため、樹脂筐体１および放熱板６には、これをネジ締めするための穴７が形成されている。放熱板６は、例えばアルミニウムを基材とする高熱伝導材料を用いた縦４０ｍｍ×横７０ｍｍ、厚さ２ｍｍの板状である。また、樹脂筐体１にはＩＧＢＴ４やＦＷＤｉ５を覆う領域で一部に凹部８が設けられている。   The power semiconductor device 100 also has, as semiconductor elements, for example, an IGBT 4 having a gate electrode and an emitter electrode on the front surface and a collector electrode on the back surface, an anode electrode on the front surface, and a cathode electrode on the back surface. FWDi5 is installed. Heat generated from these semiconductor elements is radiated from the heat sink 6 on the back surface to silicone grease and a heat sink (both not shown), and the resin casing 1 and the heat sink 6 have holes 7 for screwing them. Is formed. The heat radiating plate 6 is, for example, a plate shape having a length of 40 mm × width of 70 mm and a thickness of 2 mm using a high heat conductive material based on aluminum. Further, the resin casing 1 is provided with a concave portion 8 in a part of the region covering the IGBT 4 and FWDi 5.

図３は図１の電力用半導体装置１００のI−I方向の断面図である。ＩＧＢＴ４は、例えば縦７．５ｍｍ×横９ｍｍ、厚さが２５０μｍであり、ＦＷＤｉ５は、例えば縦４ｍｍ×横９ｍｍ、厚さ２５０μｍである。ＩＧＢＴ４、ＦＷＤｉ５は、それぞれＳｎ−Ａｇ−Ｃｕを基材とするはんだ９によって、その裏面は電力用半導体装置１００の回路を構成するＣｕパターンからなる回路パターン１０に接続され、表面のエミッタ電極およびアノード電極は、例えば直径３００μｍのＡｌワイヤからなる配線１１ａを４本用いて素子相互間あるいは回路パターン１０に接続されている。回路パターン１０は分離された複数の領域から形成される。また、配線１１ａはチップ端部や異なる電位を有する回路パターンを避けるようなループが形成されている。   3 is a cross-sectional view of the power semiconductor device 100 of FIG. 1 in the II direction. The IGBT 4 has, for example, a length of 7.5 mm × width of 9 mm and a thickness of 250 μm, and the FWDi5 has a length of 4 mm × width of 9 mm and a thickness of 250 μm, for example. The IGBT 4 and FWDi 5 are each connected to a circuit pattern 10 made of a Cu pattern constituting the circuit of the power semiconductor device 100 by a solder 9 based on Sn-Ag-Cu, and have an emitter electrode and an anode on the surface. The electrodes are connected to each other or to the circuit pattern 10 by using four wirings 11a made of, for example, an Al wire having a diameter of 300 μm. The circuit pattern 10 is formed from a plurality of separated regions. Further, the wiring 11a is formed with a loop that avoids a circuit pattern having a chip end portion or a different potential.

また、ＩＧＢＴ４のゲート電極には信号ワイヤである別の配線１１ｂによって他の回路パターン１０と接続されている。また、エミッタ電極の電位をとるためのワイヤ状の配線１１ｃが信号用の配線１１ｂと平行して配線されて信号端子を取り出す別の回路パターン１０上に接続されている。そして配線１１ａ，１１ｂ，１１ｃは上方に凸となるループ形状に形成されている。また、外部端子２など外部との入出力に用いる端子はそれぞれ回路パターン１０と接続されている。回路パターン１０は、例えばシリカなどの熱伝導フィラーを混合したエポキシを基材とする接着剤を兼ねた絶縁層１２によって放熱板６に固着される。そして、樹脂筐体１によって外部端子２、信号端子３、放熱板６の裏面が露出するように全体を封止して装置が構成される。   Further, the gate electrode of the IGBT 4 is connected to another circuit pattern 10 by another wiring 11b which is a signal wire. Also, a wire-like wiring 11c for taking the potential of the emitter electrode is connected in parallel to the signal wiring 11b and connected to another circuit pattern 10 for taking out a signal terminal. The wirings 11a, 11b, and 11c are formed in a loop shape that protrudes upward. Further, terminals used for input / output with the outside such as the external terminal 2 are connected to the circuit pattern 10. The circuit pattern 10 is fixed to the heat radiating plate 6 by an insulating layer 12 that also serves as an adhesive based on an epoxy mixed with a heat conductive filler such as silica. The entire device is sealed by the resin housing 1 so that the back surfaces of the external terminals 2, the signal terminals 3, and the heat sink 6 are exposed.

回路パターン１０から樹脂筐体１表面までの距離は例えば４ｍｍ程度であるが、配線１１ａ，１１ｂ，１１ｃのループの頂点となる凹部８ではその厚さが例えば２ｍｍである。   The distance from the circuit pattern 10 to the surface of the resin casing 1 is, for example, about 4 mm, but the thickness of the recess 8 that is the apex of the loop of the wirings 11a, 11b, 11c is, for example, 2 mm.

封止樹脂であるＰＰＳは図１中の樹脂注入部であるゲート１３から注入される。ガラス繊維強化の樹脂を使用した場合には、樹脂の注入方向と概ね平行にガラス繊維が整列する事から、樹脂の注入方向と平行には熱膨張率が低く、注入方向と直交する方向には熱膨張率が高いという特性を持っている。   PPS which is sealing resin is injected from the gate 13 which is a resin injection portion in FIG. When glass fiber reinforced resin is used, the glass fibers are aligned approximately parallel to the resin injection direction, so the coefficient of thermal expansion is low in parallel to the resin injection direction and in the direction orthogonal to the injection direction. It has the characteristic that the coefficient of thermal expansion is high.

かかる構成にした理由について、以下に述べる。
ＰＰＳをはじめとする熱可塑性樹脂によって樹脂封止をする際には樹脂が硬化する前に成形金型内に樹脂を充填する必要があり、短時間で封止を完了させるために、製造時間が短縮されるメリットがある半面、充填速度が速いということが問題となる。 The reason for this configuration will be described below.
When sealing with a thermoplastic resin such as PPS, it is necessary to fill the mold with resin before the resin is cured. On the other hand, there is a merit of shortening, but a problem is that the filling speed is high.

充填速度が速い場合、ＩＧＢＴ、ＦＷＤｉからの配線に用いられているＡｌワイヤの配線が変形してしまい他の電極と接触する問題があるが、本願発明者らは、パッケージ樹脂厚を薄くするほど配線の変形が少ない傾向があり、特に配線のループの頂点にかかる領域の樹脂厚を例えば２ｍｍ以下に薄くする事によって配線変形が抑制されることを見出した。   When the filling speed is high, there is a problem that the Al wire used for the wiring from the IGBT and FWDi is deformed and comes into contact with other electrodes. However, the inventors of the present application decrease the thickness of the package resin. It has been found that there is a tendency for the deformation of the wiring to be small, and in particular, the deformation of the wiring can be suppressed by reducing the resin thickness in the region covering the top of the wiring loop to 2 mm or less, for example.

しかしながら、装置全体の樹脂厚を小さくすることによって装置筐体の強度が低下しパッケージクラックの原因となったり、成形条件でも充填圧力が高くなる傾向があり、半導体素子であるＩＧＢＴやＦＷＤｉにダメージを与えたりする場合があった。
本願発明者らは、樹脂注入の際に金型面に近い部分で金型面で発生する流動抵抗と、樹脂温度が低下することから、流速が遅くなり、配線変形による不良を抑制する効果を得ることを実験的にも確認し、エポキシ樹脂などのコーティングが不要となる構造であることを見出した。 However, by reducing the resin thickness of the entire device, the strength of the device casing is reduced, causing package cracks, and the filling pressure tends to increase even under molding conditions, damaging the semiconductor elements IGBT and FWDi. There was a case to give.
The inventors of the present application have the effect of suppressing flow defects caused by wiring deformation because flow resistance generated on the mold surface near the mold surface during resin injection and the resin temperature are lowered. It was confirmed experimentally that it was obtained, and it was found that the structure eliminates the need for a coating such as an epoxy resin.

装置全体の樹脂厚を小さくする事によっても充填圧力を高くすることによって配線の変形を抑えた状態で樹脂を充填することが可能であることを実験により見出したが、一方、装置筐体の強度が低下しパッケージクラックの原因となったり、成形条件でも半導体素子であるＩＧＢＴやＦＷＤｉにダメージを与えたりすることがあり、これらの封止では充填圧力をできるだけ低く抑える必要があった。   Experiments have shown that it is possible to fill the resin in a state in which the deformation of the wiring is suppressed by increasing the filling pressure by reducing the resin thickness of the entire device. May cause a package crack or damage semiconductor elements IGBT or FWDi even under molding conditions, and it is necessary to keep the filling pressure as low as possible in these sealings.

そこで、本発明により開示される装置構造によれば、金型に充填される樹脂の充填速度を高速にした場合に配線などの配線材料の変形が発生しやすく、特にループの頂点に樹脂が高速で接触すると接合部からの距離が長い分、倒れ方向の力が強くなり配線を変形させやすいが、配線のループ頂点近傍での樹脂の流速を遅くすることにより配線が変形しにくいため、低圧で成形することが可能となり配線変形と半導体素子へのダメージの双方を抑制したモジュール筐体成形を容易に実現することが可能となる。   Therefore, according to the apparatus structure disclosed by the present invention, when the filling speed of the resin filled in the mold is increased, the wiring material such as wiring is likely to be deformed, and the resin is particularly fast at the top of the loop. Since the distance from the joint is longer, the force in the direction of tilting is stronger and the wiring is easily deformed.However, since the wiring is less likely to be deformed by slowing the flow rate of the resin near the top of the wiring loop, It becomes possible to mold, and it becomes possible to easily realize module housing molding that suppresses both the wiring deformation and the damage to the semiconductor element.

本実施の形態においては、放熱板として、接着絶縁層で回路パターンを貼り付けた構造を示したが、パワーモジュールにおいて一般的に用いられている、放熱板上のアルミナや窒化アルミなどのセラミック絶縁層に回路パターンが貼り付けられたセラミック絶縁基板をはんだ付する構造とすることも可能であるし、放熱板材料としてもＣｕだけでなくＡｌも用いることが可能である。熱可塑性樹脂の熱膨張率は一般的な金属に対して大きいため、熱伝導率が若干劣るものの、より熱膨張率の大きいＡｌを用いる方が好適である。   In the present embodiment, a structure in which a circuit pattern is pasted with an adhesive insulating layer is shown as a heat sink, but ceramic insulation such as alumina and aluminum nitride on a heat sink generally used in power modules. It is possible to have a structure in which a ceramic insulating substrate having a circuit pattern attached to a layer is soldered, and it is possible to use not only Cu but also Al as a heat sink material. Since the thermal expansion coefficient of the thermoplastic resin is larger than that of a general metal, it is preferable to use Al having a higher thermal expansion coefficient although the thermal conductivity is slightly inferior.

さらに、本実施の形態においては、回路パターンが絶縁層を介して放熱板に貼り付けられた例を示したが、回路パターンは必ずしも放熱板に貼り付けられるとは限らない。また、絶縁層を介しているとも限らない。これらの場合を含めて、一般には回路パターンが何らかの基板上に配置されている場合に適用される。また、半導体素子として、ＩＧＢＴ４やＦＷＤｉ５の例を示したが、半導体素子はこれらに限られるものではなく、また個数も２個に限られず１個または複数個であってよい。このことは他の実施の形態についても同様である。   Furthermore, in the present embodiment, an example in which the circuit pattern is attached to the heat sink via the insulating layer is shown, but the circuit pattern is not necessarily attached to the heat sink. Moreover, it does not necessarily pass through an insulating layer. Including these cases, the present invention is generally applied when a circuit pattern is arranged on a certain substrate. Moreover, although the example of IGBT4 and FWDi5 was shown as a semiconductor element, a semiconductor element is not restricted to these, Moreover, the number is not restricted to two, One or more may be sufficient. The same applies to the other embodiments.

以上説明したように、従来では、筐体となる樹脂の厚みを小さい部分では、樹脂充填中の流速が遅くなるため配線材料の変形が小さくなるが、樹脂の充填圧力が高くなり、半導体素子が破壊するという問題があった。これに対して本実施の形態では、半導体素子および配線材料の部分のみ樹脂の厚みを小さくすることによって、充填圧力を小さくしても十分に筐体を形成することが可能となり、かつ温度サイクルなどで発生する筐体の割れを抑制することが可能となった。   As described above, conventionally, in the portion where the thickness of the resin serving as the casing is small, the flow rate during resin filling becomes slow, so that the deformation of the wiring material becomes small, but the resin filling pressure becomes high, and the semiconductor element becomes There was a problem of destruction. On the other hand, in the present embodiment, by reducing the thickness of the resin only in the semiconductor element and wiring material portions, it becomes possible to form a housing sufficiently even if the filling pressure is reduced, and the temperature cycle and the like. It is possible to suppress the cracking of the housing that occurs in

実施の形態２．（参考）
図４は本発明の実施の形態２にかかる電力用半導体装置２００の外形図であり、図５は本発明にかかる電力用半導体装置２００の内部の図であり、半導体素子の固定状態を示している。また、図６は図４の電力用半導体装置２００のII−II方向の断面図である。 Embodiment 2. FIG. (reference)
4 is an outline view of the power semiconductor device 200 according to the second embodiment of the present invention, and FIG. 5 is an internal view of the power semiconductor device 200 according to the present invention, showing a fixed state of the semiconductor element. Yes. 6 is a cross-sectional view of the power semiconductor device 200 of FIG. 4 in the II-II direction.

本実施の形態において開示される構造においては、ＩＧＢＴ４のエミッタ電極およびＦＷＤｉ５のアノード電極の配線には例えば厚さ０．２ｍｍのＣｕからなる平板リード１４が用いられており、それぞれの電極とはＳｎ−Ａｇ−Ｃｕを基材とするはんだ９によって電気的に接続されている。ＩＧＢＴ４のゲート電極は例えば直径２００μｍのＡｌワイヤからなる線状の配線１１ｂによって回路パターン１０と接続されている。また、エミッタ電極の電位をとるための配線１１ｃが配線１１ｂと平行して配線されて別の回路パターン１０上に接続されている。そして配線１１ｂ，１１ｃは、チップ端部や異なる電位を有する回路パターンを避け、上方に凸のループ形状に形成されている。   In the structure disclosed in the present embodiment, for example, a flat plate lead 14 made of Cu having a thickness of 0.2 mm is used for the wiring of the emitter electrode of the IGBT 4 and the anode electrode of the FWDi 5. -It is electrically connected by solder 9 based on Ag-Cu. The gate electrode of the IGBT 4 is connected to the circuit pattern 10 by a linear wiring 11b made of an Al wire having a diameter of 200 μm, for example. A wiring 11c for taking the potential of the emitter electrode is wired in parallel with the wiring 11b and connected to another circuit pattern 10. The wirings 11b and 11c are formed in an upwardly protruding loop shape, avoiding the chip end portions and circuit patterns having different potentials.

放熱板６上の回路パターン１０から熱可塑性樹脂の樹脂筐体１表面までの距離は例えば４ｍｍであるが、配線１１ｂ，１１ｃのループの頂点となる凹部８ではその厚さが例えば２ｍｍである。   The distance from the circuit pattern 10 on the heat radiating plate 6 to the surface of the resin housing 1 made of thermoplastic resin is, for example, 4 mm, but the thickness of the recess 8 that is the apex of the loop of the wirings 11b, 11c is, for example, 2 mm.

かかる構成にした理由について、以下に述べる。
配線材料が従来のＡｌワイヤの配線であった場合にも、パッケージを薄くすることで配線変形を抑制する効果はあったが、１００Ａを超える大電流を扱う場合などは配線本数が１０本を超えるような配線が必要となるため、配線間へ熱可塑性樹脂が流入しにくいという課題があった。
特に大電流を流す配線について、配線間へ樹脂が流入しないと、通電中の配線発熱が大きくなり、通電容量が低下しやすいという問題があり、配線間へ樹脂を流入させることが必要となる。 The reason for this configuration will be described below.
Even when the wiring material is conventional Al wire wiring, there is an effect of suppressing wiring deformation by thinning the package, but the number of wiring exceeds 10 when handling a large current exceeding 100 A. Since such wiring is required, there is a problem that the thermoplastic resin hardly flows between the wirings.
In particular, with respect to a wiring through which a large current flows, if the resin does not flow between the wirings, there is a problem that the heat generation of the wiring during energization increases and the energization capacity tends to decrease, and it is necessary to allow the resin to flow between the wirings.

これに対して、本発明により開示される構造においては、大電流を扱う部分の配線を平板状にすることによって配線材料の剛性が高くなるため、樹脂の充填による配線材料の変形を抑制することが可能となる。   On the other hand, in the structure disclosed by the present invention, the rigidity of the wiring material is increased by making the wiring of the portion that handles a large current flat, so that the deformation of the wiring material due to the resin filling is suppressed. Is possible.

しかしながら、信号用の配線１１ｂの部分においては、大電流を流す必要がないため、配線径を細くすることが可能であり、配線を細くする事でＩＧＢＴ４上の配線面積を小さくすることが可能となり、チップサイズの小型化によるコスト低減効果があるため、ワイヤ状の配線をそのまま用いることが好適である。その際にはワイヤ状の配線の変形が問題となるため、当該ワイヤ配線している領域の樹脂厚を小さくすることによって、ワイヤ配線の変形を抑制することが有効である。   However, since it is not necessary to flow a large current in the signal wiring 11b, the wiring diameter can be reduced, and the wiring area on the IGBT 4 can be reduced by reducing the wiring. Since there is a cost reduction effect by reducing the chip size, it is preferable to use the wire-like wiring as it is. In that case, deformation of the wire-like wiring becomes a problem. Therefore, it is effective to suppress the deformation of the wire wiring by reducing the resin thickness of the region where the wire wiring is performed.

さらに、実施の形態１と比較すると、樹脂厚が薄い領域が少なくなることから、樹脂の充填圧力をさらに軽減することが可能となる。   Furthermore, compared with Embodiment 1, since the area | region where resin thickness is thin decreases, it becomes possible to further reduce the filling pressure of resin.

また、ゲート電極上の信号配線に平板状のリードを使用することも可能であるが、大電流を扱う配線に比べて幅が狭くなり、剛性が低下するのでリードの剛性によっては樹脂厚を薄くする必要がある。   It is also possible to use a flat lead for the signal wiring on the gate electrode, but the width is narrower and the rigidity is reduced compared to wiring that handles a large current, so the resin thickness may be reduced depending on the rigidity of the lead. There is a need to.

なお、本実施の形態において、ＩＧＢＴ４とＦＷＤｉ５上の配線にはリード１４のはんだ付構造について示したが、同様に配線材料の剛性の高い構造として、厚さ０．２ｍｍ程度からなるＡｌの平板を超音波接合する構造などが知られているが、これらを用いることも有効である。   In this embodiment, the soldering structure of the lead 14 is shown for the wiring on the IGBT 4 and the FWDi 5, but similarly, an Al flat plate having a thickness of about 0.2 mm is used as a structure having a high wiring material rigidity. Ultrasonic bonding structures are known, but it is also effective to use these.

以上説明したように、この実施の形態では、半導体素子上の配線材料に板状リードを用いることにより、配線材料が変形しにくい形状となり、パッケージを薄く構成する領域を限定的にできることから、制御電極上のみ樹脂厚さを小さくするだけで配線材料の変形を抑制でき、更に低圧での成形が可能となる。   As described above, in this embodiment, by using a plate-like lead as the wiring material on the semiconductor element, the wiring material has a shape that is difficult to be deformed, and the area where the package is thinned can be limited. Deformation of the wiring material can be suppressed only by reducing the resin thickness only on the electrode, and molding at a lower pressure is possible.

実施の形態３．（参考）
図７は本発明の実施の形態３にかかる電力用半導体装置の断面図であり、半導体素子等の固定状態を示している。
この実施の形態では、ＩＧＢＴ４の制御電極上に配線されているワイヤ状の配線１１ｂのループ形状の頂点を含む領域において、熱可塑性樹脂の樹脂筐体１に凹部が形成されており、凹部を形成する部分では樹脂筐体に勾配を設けている。 Embodiment 3 FIG. (reference)
FIG. 7 is a cross-sectional view of the power semiconductor device according to the third embodiment of the present invention, showing a fixed state of the semiconductor elements and the like.
In this embodiment, a recess is formed in the resin casing 1 of the thermoplastic resin in a region including the loop-shaped apex of the wire-like wiring 11b wired on the control electrode of the IGBT 4, thereby forming the recess. The resin casing is provided with a gradient at the portion to be used.

通常、熱可塑性樹脂による樹脂封止型の装置では、金型からの離型性を確保するために、抜き勾配と呼ばれる１０度以下の勾配が設けられ、本発明において開示されているように凹部が設けられている部分においても同様の抜き勾配が形成される。   Usually, in a resin-sealed type apparatus using a thermoplastic resin, a gradient of 10 degrees or less, called a draft angle, is provided in order to ensure releasability from a mold, and a recess is formed as disclosed in the present invention. A similar draft angle is also formed in the portion provided with.

しかしながら、厳しい温度サイクル環境での信頼性を求められるような電力用半導体装置においては、凹部の角に当たる部分でのバランスが崩れる事と応力集中によって、パッケージクラックが発生やすく、金型での凸部の樹脂の流れにより、特に注入された樹脂の当たり面であるウェルドが当該部分で構成されやすい。   However, in power semiconductor devices that require reliability in harsh temperature cycle environments, package cracks are likely to occur due to the loss of balance at the corners of the recesses and stress concentration. Due to the flow of the resin, a weld that is a contact surface of the injected resin is easily formed at the portion.

そこでこの実施の形態では、凹部の角度を大きくすることで傾斜を設けるか、凹部の底部にＲを設けることによって、強度の劣化もなくなり、温度サイクル試験中のパッケージクラックの発生が抑えられた。なお、この凹部底面の端部から上方に拡大する方向の傾斜は、通常の抜き勾配が１０度以下であるのに対し、１０度より大きい勾配とすると効果的である。   Therefore, in this embodiment, by providing an inclination by increasing the angle of the recess or by providing R at the bottom of the recess, the strength is not deteriorated, and the occurrence of package cracks during the temperature cycle test is suppressed. The inclination in the direction of expanding upward from the end of the bottom surface of the recess is effective when the normal draft is 10 degrees or less, whereas the slope is larger than 10 degrees.

また、このようにすることにより、形状的に応力集中しなくなりパッケージのクラックが発生しにくくなるだけでなく、筐体の厚みが変化する部分での樹脂充填中の流れの乱れがなくなるため、局所的なガラス繊維配向の乱れがなくなり、温度サイクル試験中のパッケージクラックが発生しにくくなった。   Further, by doing so, not only the stress is not concentrated on the shape and cracking of the package is not easily generated, but also there is no disturbance of the flow during the resin filling in the portion where the thickness of the housing changes, so that the local The glass fiber orientation was not disturbed, and package cracks during the temperature cycle test were less likely to occur.

実施の形態４．
図８は本発明の実施の形態にかかる電力用半導体装置３００の外形図であり、図９は図８の電力用半導体装置３００のIII−III方向の断面図である。 Embodiment 4 FIG.
FIG. 8 is an outline view of the power semiconductor device 300 according to the embodiment of the present invention, and FIG. 9 is a sectional view of the power semiconductor device 300 in FIG.

本実施の形態において開示される構造においては、ＩＧＢＴ４上から配線されているワイヤ状の配線１１ｂ、１１ｃを挟むように、かつ配線１１ｂ、１１ｃと平行に、幅２ｍｍ、深さ２ｍｍの溝部８ｂが構成されており、回路パターン１０から熱可塑性樹脂の樹脂筐体１の溝底部までの距離が例えば２ｍｍとなるように構成されている。また、好適には、この溝底部が、上方に凸のループ形状の配線１１ｂ、１１ｃの頂点より深くなるように形成される。   In the structure disclosed in the present embodiment, a groove 8b having a width of 2 mm and a depth of 2 mm is provided so as to sandwich the wire-like wirings 11b and 11c wired from above the IGBT 4 and in parallel with the wirings 11b and 11c. The distance from the circuit pattern 10 to the groove bottom portion of the thermoplastic resin resin casing 1 is, for example, 2 mm. Preferably, the bottom of the groove is formed deeper than the apexes of the upwardly protruding loop-shaped wirings 11b and 11c.

かかる構成とする事によって、注入された熱可塑性樹脂がワイヤ状の配線の頂点に対して直接当たらなくなることで、配線を横倒しする方向に加わる力を低下させる効果があるだけでなく、配線の頂点近傍の樹脂の流動方向を配線と平行とすることで、樹脂の当たり面積を小さくすることが可能となり、さらには、金型面からの距離が横方向にて小さくなることによって、金型面での流動抵抗の効果を横方向からも発揮するため、樹脂の流速が小さくなり、配線の変形を抑制させることが可能となる。   By adopting such a configuration, the injected thermoplastic resin does not directly hit the apex of the wire-like wiring, so that not only has the effect of reducing the force applied in the direction of lying down the wiring, but also the apex of the wiring By making the flow direction of the nearby resin parallel to the wiring, it is possible to reduce the contact area of the resin, and furthermore, by reducing the distance from the mold surface in the lateral direction, Since the effect of the flow resistance is also exhibited from the lateral direction, the flow rate of the resin is reduced, and the deformation of the wiring can be suppressed.

また、樹脂の注入方向に影響を受けずに配線の自由度を損なうことなく配線の変形を効果的に抑制した装置を構成できる。   Further, it is possible to configure a device that effectively suppresses deformation of the wiring without being affected by the resin injection direction and without losing the degree of freedom of the wiring.

特に、樹脂注入部であるゲート１３から注入された樹脂の流れが配線の配線方向に対して垂直であると、特に隣接する配線と接触しやすいため、樹脂の注入方向と直交する方向に凹部を設けることが有効であり好適である。   In particular, if the flow of the resin injected from the gate 13 which is a resin injection portion is perpendicular to the wiring direction of the wiring, it is easy to come into contact with the adjacent wiring. It is effective and preferable.

以上説明したように、この実施の形態では、熱可塑性樹脂による樹脂筐体の形成時に樹脂の流動を配線材料が変形しやすいループの頂点に直接接しない構造にすることにより、配線の頂点近傍での樹脂流動が配線を倒す方向に働かず、かつ金型に挟まれていることによって流動速度を抑制したことによって、溝部の構成領域を最小限に抑えて、配線材料の変形を抑制することができる。   As described above, in this embodiment, the resin flow is not directly in contact with the top of the loop where the wiring material is easily deformed when the resin casing is formed of thermoplastic resin. The resin flow does not work in the direction of defeating the wiring, and the flow rate is suppressed by being sandwiched between the molds, thereby suppressing the deformation of the wiring material by minimizing the constituent area of the groove. it can.

また、樹脂の流入方向が配線材料と直交する場合に、配線材料が最も変形しやすい方向に力が加わるが、この実施の形態では、樹脂筐体に溝部を流入方向と直交する方向で設けることによって、配線近傍の樹脂流速が遅くなると共に、変形しにくい方向の流入方向となるため、配線の変形に起因する不良を確実に抑制することができる。   In addition, when the inflow direction of the resin is orthogonal to the wiring material, a force is applied in the direction in which the wiring material is most easily deformed. In this embodiment, a groove is provided in the resin casing in a direction orthogonal to the inflow direction. As a result, the resin flow velocity in the vicinity of the wiring becomes slow and the inflow direction is such that it is difficult to deform, so that defects due to the deformation of the wiring can be reliably suppressed.

１ 樹脂筐体、２ 外部端子、３ 信号端子、４ 半導体素子（ＩＧＢＴ）、５ 半導体素子（ＦＷＤｉ）、６ 放熱板、７ 取り付け穴、８ 凹部、８ｂ 溝部、９ はんだ、１０ 回路パターン、１１ａ，１１ｂ，１１ｃ 配線、１２ 接着絶縁層、１３ ゲート、１４ 配線（リード）。   DESCRIPTION OF SYMBOLS 1 Resin housing | casing, 2 External terminal, 3 Signal terminal, 4 Semiconductor element (IGBT), 5 Semiconductor element (FWDi), 6 Heat sink, 7 Mounting hole, 8 Recessed part, 8b Groove part, 9 Solder, 10 Circuit pattern, 11a, 11b, 11c wiring, 12 adhesive insulating layer, 13 gate, 14 wiring (lead).

Claims (2)

基板上で電気回路パターンの一部分の上に固着された少なくとも一つの半導体素子と、
前記半導体素子の表面と前記電気回路パターンとを接続し、または前記半導体素子の表面と他の半導体素子の表面とを接続するループ形状の配線と、
前記基板の上で少なくとも前記半導体素子および前記配線を覆う熱可塑性樹脂の樹脂筐体とを備え、
前記樹脂筐体の前記配線を挟む位置に前記配線と平行な溝部が形成されたことを特徴とする電力用半導体装置。 At least one semiconductor element secured on a portion of the electrical circuit pattern on the substrate;
A loop-shaped wiring connecting the surface of the semiconductor element and the electric circuit pattern, or connecting the surface of the semiconductor element and the surface of another semiconductor element;
A thermoplastic resin resin casing covering at least the semiconductor element and the wiring on the substrate;
A power semiconductor device, wherein a groove portion parallel to the wiring is formed at a position sandwiching the wiring of the resin casing. 前記樹脂筐体を形成するための樹脂の注入口が、前記溝部に対して直交する方向の外表面の端部近傍に設けられていることを特徴とする請求項１に記載の電力用半導体装置。   2. The power semiconductor device according to claim 1, wherein a resin inlet for forming the resin casing is provided in the vicinity of an end portion of an outer surface in a direction orthogonal to the groove portion. .
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