JP2011013389A - Display driving device and display - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress reduction and variation in an output voltage caused by the mounting resistance added upon mounting an LSI on a transparent substrate where a display panel is formed.SOLUTION: A display driving device 110 includes a transparent substrate 36 where a display panel 25 is formed, a power supply circuit 38 performing a boosting operation to generate a voltage AVDD, a boosting circuit built-in LSI 28 that is mounted on the transparent substrate 36, includes at least a part of the power supply circuit 38 and has an output terminal 9 to output the voltage AVDD, and a power supply cable 40 that is connected to the output terminal 9 via a mounting resistance 43 added when the boosting circuit built-in LSI 28 is mounted on the transparent substrate 36. The boosting circuit built-in LSI 28 further includes a voltage monitoring terminal 10 connected to the power supply cable 40 and a control circuit 14 that controls to effect or stop the boosting operation of the power supply circuit 38 in accordance with the voltage of the voltage monitoring terminal 10.

Description

  The present invention relates to a display driving device and a display device using the same, and more particularly to a display driving device including a power supply semiconductor integrated circuit mounted on a transparent substrate on which a display panel is formed.

  For example, Patent Document 1 discloses a power supply circuit that boosts an input voltage to a double voltage. In the power supply circuit described in Patent Document 1, a switching element is provided before and after the capacitor, and a boost operation is performed by switching the capacitor and the input DC power supply in series and parallel.

  The power supply circuit described in Patent Document 1 further includes an output smoothing capacitor for smoothing the boosted output voltage outside the LSI (semiconductor integrated circuit).

  On the other hand, there is known a display driving device in which an LSI incorporating a power supply circuit that generates power necessary for display driving is mounted on a transparent substrate on which a display panel is formed.

JP 2003-111388 A

  However, when the power supply circuit described in Patent Document 1 is applied to a display driving device in which an LSI incorporating the power supply circuit described above is mounted on a transparent substrate, the following problems occur.

  A mounting resistance is added between the output smoothing capacitor and the output terminal of the LSI when the LSI is mounted on the transparent substrate. Due to the effect of the mounting resistance, a voltage drop due to the load current occurs. That is, when the power supply circuit described in Patent Document 1 is applied to the above-described display driving device, there is a problem that a voltage lower than twice the input voltage is generated.

  Furthermore, when the power supply circuit described in Patent Document 1 is applied to the display drive device described above, the voltage output from the power supply circuit also fluctuates when the load current fluctuates due to the effect of the mounting resistance. There is.

  Due to such a drop in output voltage and a change in output voltage due to a change in load current, a voltage necessary for panel display cannot be supplied. As a result, the conventional technique has a problem that display abnormality such as thinning of the display or display failure may occur.

  The present invention solves the above-described conventional problems, and outputs an output voltage drop due to a mounting resistance added when an LSI is mounted on a transparent substrate on which a display panel is formed and an output due to a change in load current. It is an object of the present invention to provide a display driving device and a display device that can suppress voltage fluctuation.

  In order to achieve the above object, a display driving apparatus according to the present invention is a display driving apparatus for driving a display panel, and includes a transparent substrate on which the display panel is formed, and boosting a first voltage. A power supply circuit that performs a boosting operation for generating two voltages, and a first output terminal that is mounted on the transparent substrate and includes at least a part of the power supply circuit and outputs a second voltage generated by the power supply circuit A semiconductor integrated circuit comprising: a first power supply wiring electrically connected to the first output terminal via a mounting resistor added when the semiconductor integrated circuit is mounted on the transparent substrate; A first smoothing capacitor electrically connected to the first power supply wiring; and the semiconductor integrated circuit further includes a voltage monitor terminal electrically connected to the first power supply wiring; and the voltage monitor terminal A comparator for determining whether or not the voltage is greater than a reference voltage; and when the comparator determines that the voltage at the voltage monitor terminal is less than the reference voltage, the voltage boost operation is performed by the power supply circuit, and the voltage A control circuit that stops the boosting operation of the power supply circuit when the comparator determines that the voltage of the monitor terminal is greater than the reference voltage.

  According to this configuration, the display driving device according to the present invention outputs the output from the output terminal and then passes through the mounting resistor added when mounting the LSI on the transparent substrate on which the display panel is formed. Two voltages are monitored through the voltage monitor terminal, and the boosting operation is controlled in accordance with the voltage at the voltage monitor terminal. As a result, the display driving device according to the present invention can suppress a change in output voltage due to a drop in output voltage due to a mounting resistance and a change in load current, thereby realizing a stable power supply. Therefore, the display driving apparatus according to the present invention can prevent display abnormality such as that a voltage necessary for panel display cannot be supplied and the display becomes thin or cannot be displayed.

  The display driving device may further include a driving unit that drives the display panel using the second voltage, and the first power supply wiring may be further electrically connected to the driving unit. .

  According to this configuration, the display driving device according to the present invention can suppress voltage fluctuation of the second voltage supplied to the driving unit.

  Further, the display driving device further includes a first substrate electrically connected to the transparent substrate, the first power supply wiring is formed on the first substrate, and the first smoothing capacitor is the first smoothing capacitor. It may be mounted on one substrate.

  The power supply circuit boosts the first voltage to generate the second voltage, and a regulator circuit generates the third voltage using the second voltage generated by the booster circuit. The regulator circuit includes an operational amplifier that uses the second voltage as a power source, the first power supply wiring is further electrically connected to the operational amplifier, and the display driving device further includes: You may provide the drive part which drives a display panel using the said 3rd voltage.

  According to this configuration, the display driving device according to the present invention can suppress voltage fluctuation of the second voltage used as the power source of the regulator circuit. As a result, the display driving device according to the present invention can suppress voltage fluctuation of the third voltage supplied to the driving unit.

  The semiconductor integrated circuit further includes the regulator circuit, and the semiconductor integrated circuit further includes a second output terminal that outputs the third voltage generated by the regulator circuit. Further, a second power supply wiring electrically connected to the second output terminal via a mounting resistor added when the semiconductor integrated circuit is mounted on the transparent substrate, and the second power supply wiring And a second smoothing capacitor electrically connected to the capacitor.

  The display driving device further includes a first substrate electrically connected to the transparent substrate, and the first power supply wiring and the second power supply wiring are formed on the first substrate, The first smoothing capacitor and the second smoothing capacitor may be mounted on the first substrate.

  The power supply circuit includes a booster capacitor, a first switch to which the first voltage is applied at one end, the other end connected to one end of the booster capacitor, one end grounded, and the other end to the end A second switch connected to one end of the boost capacitor, a third switch to which the first voltage is applied to one end and the other end connected to the other end of the boost capacitor, and one end to the first output terminal And a fourth switch having the other end connected to the other end of the boost capacitor.

  Further, the control circuit turns on the first switch and the fourth switch, and turns on the second switch and the third switch when the comparator determines that the voltage of the voltage monitor terminal is smaller than the reference voltage. By alternately repeating the first state in which the switch is turned off and the second state in which the first switch and the fourth switch are turned off and the second switch and the third switch are turned on, the power supply circuit is The step-up operation is performed, and the first switch, the second switch, the third switch, and the fourth switch are turned off when the comparator determines that the voltage at the voltage monitor terminal is greater than the reference voltage. Accordingly, the boosting operation of the power supply circuit may be stopped.

  The display device according to the present invention includes a display panel that displays an image, and the display driving device that drives the display panel.

  According to this configuration, the display device according to the present invention can prevent a display abnormality such that the voltage necessary for panel display cannot be supplied and the display becomes thin or cannot be displayed.

  As described above, the present invention provides a display drive that can suppress output voltage drop due to mounting resistance added when mounting an LSI on a transparent substrate on which a display panel is formed and output voltage fluctuation due to load current fluctuation. A device and a display device can be provided.

It is a figure which shows the structure of the display apparatus which concerns on Embodiment 1 of this invention. It is a figure which shows the structure of the power supply circuit which concerns on Embodiment 1 of this invention. 3 is a timing chart showing an operation of the power supply circuit according to the first embodiment of the present invention. It is a figure which shows operation | movement of the power supply circuit which concerns on Embodiment 1 of this invention. It is a figure which shows operation | movement of the power supply circuit which concerns on Embodiment 1 of this invention. It is a figure which shows operation | movement of the power supply circuit which concerns on Embodiment 1 of this invention. It is a figure which shows the structure of the power supply circuit which concerns on Embodiment 2 of this invention. It is a figure which shows operation | movement of the power supply circuit which concerns on Embodiment 2 of this invention. It is a figure which shows operation | movement of the power supply circuit which concerns on Embodiment 2 of this invention. It is a figure which shows operation | movement of the power supply circuit which concerns on Embodiment 2 of this invention.

  Hereinafter, a display device and a display driving device according to an embodiment of the present invention will be described with reference to the drawings.

(Embodiment 1)
In the display device according to the first embodiment of the present invention, after being output from the output terminal, the voltage after passing through the mounting resistance added when mounting the LSI on the transparent substrate on which the display panel is formed, Monitoring is performed via the voltage monitor terminal, and the boosting operation is controlled according to the voltage of the voltage monitor terminal. Thereby, the display drive device according to the first exemplary embodiment of the present invention can suppress the output voltage variation due to the drop in the output voltage due to the mounting resistance and the variation in the load current.

FIG. 1 is a diagram showing a configuration of a display device 100 according to Embodiment 1 of the present invention.
A display device 100 illustrated in FIG. 1 is, for example, a liquid crystal display device, and includes a transparent substrate 36, a display panel 25, a gate driver 26, a source driver 27, a booster built-in LSI 28, a substrate 29, and a smoothing capacitor 1A. 1B and 1C and power supply wirings 40A, 40B and 40C.

  The transparent substrate 36 is a glass substrate, for example. The display panel 25 is formed on the transparent substrate 36 and displays an image. For example, the display panel 25 is a liquid crystal panel.

  The gate driver 26, the source driver 27, and the booster built-in LSI 28 are mounted on a transparent substrate 36. For example, each of the gate driver 26, the source driver 27, and the booster built-in LSI 28 is a single semiconductor integrated circuit (LSI).

  The gate driver 26 and the source driver 27 correspond to the drive unit of the present invention and drive the display panel 25. Specifically, the gate driver 26 is a driver that controls the scanning lines of the display panel 25. The source driver 27 is a driver that controls the data lines of the display panel 25.

  The booster built-in LSI 28 is an LSI that generates power necessary for the gate driver 26 and the source driver 27.

The substrate 29 is electrically connected to the transparent substrate 36.
The booster built-in LSI 28 generates a voltage AVDD used as a power source by the source driver 27 and a voltage VGG and a voltage VEE used as a power source by the gate driver 26. Further, the booster built-in LSI 28 includes output terminals 9A, 9B, and 9C and voltage monitor terminals 10A, 10B, and 10C.

  The output terminal 9A of the booster circuit built-in LSI 28 is a terminal to which the voltage AVDD generated by the booster circuit built-in LSI 28 is output. The output terminal 9A is electrically connected to the power supply wiring 40A.

  The output terminal 9B of the booster built-in LSI 28 is a terminal to which the voltage VGG generated by the booster built-in LSI 28 is output. The output terminal 9B is electrically connected to the power supply wiring 40B.

  The output terminal 9C of the booster circuit built-in LSI 28 is a terminal to which the voltage VEE generated by the booster circuit built-in LSI 28 is output. The output terminal 9C is electrically connected to the power supply wiring 40C.

  The power supply wiring 40A is electrically connected to the output terminal 9A, the voltage monitor terminal 10A, and the source driver 27. The power supply wiring 40B is electrically connected to the output terminal 9B, the voltage monitor terminal 10B, and the gate driver 26. The power supply wiring 40C is electrically connected to the output terminal 9C, the voltage monitor terminal 10C, and the gate driver 26.

  The power supply wirings 40A, 40B, and 40C are formed on the transparent substrate 36 and the substrate 29. Specifically, each of the power supply wirings 40A, 40B, and 40C includes a first wiring part formed on the transparent substrate 36, a second wiring part formed on the substrate 29, the first wiring part, And a third wiring part such as a cable for electrically connecting the second wiring part.

  The output terminals 9A to 9C and the voltage monitor terminals 10A to 10C may be directly connected to the third wiring portion such as the cable or directly connected to the second wiring portion formed on the substrate 29. May be. In other words, each of the power supply wirings 40A, 40B, and 40C may include only the second wiring part and the third wiring part, or may include only the second wiring part.

  The smoothing capacitors 1A, 1B, and 1C are mounted on the substrate 29. The smoothing capacitor 1A is a smoothing capacitor for AVDD power supply and is electrically connected to the power supply wiring 40A. Here, the smoothing capacitor 1A plays a role of stabilizing the voltage AVDD generated by the LSI 28 with a built-in booster circuit.

  The smoothing capacitor 1B is a smoothing capacitor for the VGG power supply, and is electrically connected to the power supply wiring 40B. Here, the smoothing capacitor 1B plays a role of stabilizing the voltage VGG generated by the LSI 28 with a built-in booster circuit.

  The smoothing capacitor 1C is a smoothing capacitor for VEE power supply, and is electrically connected to the power supply wiring 40C. Here, the smoothing capacitor 1C plays a role of stabilizing the voltage VEE generated by the booster built-in LSI.

  The voltage monitor terminal 10A of the booster built-in LSI 28 is a terminal for monitoring the voltage AVDD stored in the smoothing capacitor 1A and feeding it back to the booster built-in LSI 28.

  The voltage monitor terminal 10B of the booster circuit built-in LSI 28 is a terminal for monitoring the voltage VGG stored in the smoothing capacitor 1B and feeding it back to the booster circuit built-in LSI 28.

  The voltage monitor terminal 10C of the booster circuit built-in LSI 28 is a terminal for monitoring the voltage VEE stored in the smoothing capacitor 1C and feeding it back to the booster circuit built-in LSI 28.

  The path of the power supply wiring 40A from the output terminal 9A to the voltage monitor terminal 10A preferably passes through the vicinity of the smoothing capacitor 1A. Therefore, for example, as shown in FIG. 1, the path of the power supply wiring 40 </ b> A from the output terminal 9 </ b> A to the voltage monitor terminal 10 </ b> A preferably passes through the substrate 29.

  Similarly, the path of the power supply wiring 40B from the output terminal 9B to the voltage monitor terminal 10B and the path of the power supply wiring 40C from the output terminal 9C to the voltage monitor terminal 10C preferably pass through the substrate 29, respectively.

  Although FIG. 1 describes the above power supply connection, for panel driving, VCOM, which is a common electrode voltage for the display panel 25, and VDD, which is a digital power source for the gate driver 26 and the source driver 27, are separately provided. Although it is necessary to supply, it is omitted because it is not related to the present invention.

  The display device 100 includes a display driving device 110 that drives the display panel 25. The display drive device 110 includes the gate driver 26, source driver 27, booster built-in LSI 28, substrate 29, smoothing capacitors 1A, 1B, and 1C, and power supply wirings 40A, 40B, and 40C.

  The booster built-in LSI 28 includes a booster 37A that generates the voltage AVDD, a booster 37B that generates the voltage VGG, and a booster 37C that generates the voltage VEE. The basic configurations of the booster 37A, the booster 37B, and the booster 37C are the same.

  Hereinafter, the configuration of the booster 37, which is an example of the boosters 37A to 37C, will be described. Hereinafter, a case where the booster 37 is the booster 37A will be described as an example.

  FIG. 2 is a diagram showing a configuration of the power supply circuit 38 including the booster 37 according to the first embodiment of the present invention. The power supply circuit 38 shown in FIG. 2 performs a boosting operation for generating the voltage AVDD by boosting the voltage supplied from the reference power supply Vci. The voltage AVDD generated by the power supply circuit 38 is output to the output terminal 9.

  The power supply circuit 38 includes switches S2, S3, S5 and S6, terminals 7 and 8, an output terminal 9, a voltage monitor terminal 10, resistors R11 and R12, a comparator 13, a control circuit 14, and a boosting capacitor. 4.

  The booster 37 includes a part of the power supply circuit 38. Specifically, the boosting unit 37 includes switches S2, S3, S5, and S6, terminals 7 and 8, an output terminal 9, a voltage monitor terminal 10, resistors R11 and R12, a comparator 13, and a control circuit 14. Including.

  The smoothing capacitor 1, the power supply wiring 40, the output terminal 9, and the voltage monitor terminal 10 shown in FIG. 2 are the smoothing capacitors 1A to 1C, the power supply wirings 40A to 40C, the output terminals 9A to 9C, and the voltage monitor terminal 10A shown in FIG. Corresponding to -10C.

  One end of the switch S5 is connected to the reference power source Vci, and the other end is connected to the terminal 7. The on / off state of the switch S5 is controlled by a control signal A.

  One end of the switch S6 is connected to the ground Vss (ground potential), and the other end is connected to the terminal 7. The on / off state of the switch S6 is controlled by a control signal B.

  One end of the switch S3 is connected to the reference power source Vci, and the other end is connected to the terminal 8. The on / off state of the switch S3 is controlled by a control signal C.

  One end of the switch S2 is connected to the output terminal 9, and the other end is connected to the terminal 8. The on / off of the switch S2 is controlled by a control signal D.

  For example, the switches S2, S3, S5 and S6 are transistors such as MOS transistors and bipolar transistors. Note that the switches S2, S3, S5, and S6 may be other than transistors as long as the elements have a switching function.

  The boost capacitor 4 is formed outside the boost circuit built-in LSI 28. One end of the boost capacitor 4 is connected to the terminal 7 via the mounting resistor 41, and the other end is connected to the terminal 8 via the mounting resistor 42.

  One end of the smoothing capacitor 1 is connected to the ground Vss, and the other end is connected to the power supply wiring 40.

  The power supply wiring 40 is connected to the output terminal 9 via the mounting resistor 43. Here, the mounting resistors 41, 42, and 43 are resistors added when the booster circuit built-in LSI 28 is mounted on the transparent substrate 36. That is, the mounting resistors 41, 42, and 43 include the terminal 7, the terminal 8, and the output terminal 9, the first wiring portion formed on the transparent substrate 36, the second wiring portion formed on the substrate 29, and the cable. It is resistance of a connection part with either among 3rd wiring parts.

  The power supply wiring 40 is connected to the voltage monitor terminal 10. The power supply wiring 40 outputs a voltage AVDD that is twice the voltage of the reference power supply Vci. The smoothing capacitor 1 has a role of holding a voltage AVDD that is twice the voltage of the reference power supply Vci.

  One end of the resistor R <b> 11 is connected to the voltage monitor terminal 10, and the other end is connected to the first input terminal of the comparator 13.

  One end of the resistor R12 is connected to the ground Vss, and the other end is connected to the first input terminal of the comparator 13.

  The reference voltage Vref1 is applied to the second input terminal of the comparator 13, and the output terminal is connected to the control circuit 14. The comparator 13 compares the voltage V1 at the first input terminal with the voltage at the second input terminal (reference voltage Vref1), and generates a stop signal 45 indicating whether or not the voltage V1 is greater than the reference voltage Vref1. In other words, the comparator 13 determines whether or not the voltage AVDD at the voltage monitor terminal 10 is equal to or higher than the target voltage AVDD1 corresponding to the reference voltage Vref1.

  The control circuit 14 generates control signals A to D that control the boosting operation of the power supply circuit 38. The control signals A to D are supplied to the switch S5, the switch S6, the switch S2, and the switch S3, respectively.

  Further, the control circuit 14 performs control so that the voltage AVDD becomes the target voltage AVDD1. Specifically, when the stop signal 45 output from the comparator 13 indicates that the voltage V1 is smaller than the reference voltage Vref1, the control circuit 14 causes the power supply circuit 38 to perform a boosting operation, and the stop signal 45 causes the voltage V1 to be increased. Is higher than the reference voltage Vref1, the boosting operation of the power supply circuit 38 is stopped.

The operation of the power supply circuit 38 shown in FIG. 2 will be described below with reference to FIGS.
FIG. 3 is a timing chart showing the operation of the power supply circuit 38. 4 to 6 are diagrams schematically showing the operation of the power supply circuit 38. FIG.

  By performing the control shown in FIG. 3 for the power supply circuit 38, the target voltage AVDD1 can be generated in the smoothing capacitor 1.

  Here, in the periods t1 and t2 shown in FIG. 3, the power supply circuit 38 is in an operating state in which the boosting operation is performed, and in the period t3, the power supply circuit 38 is in a stopped state in which the boosting operation is not performed.

  First, in the period t1 shown in FIG. 3, as shown in FIG. 4, the control circuit 14 turns on the switch S6 and the switch S3 and turns off the switch S5 and the switch S2. As a result, the voltage of the reference power supply Vci is stored in the booster capacitor 4.

  Next, in the period t2 shown in FIG. 3, as shown in FIG. 5, the control circuit 14 turns on the switch S5 and the switch S2, and turns off the switch S6 and the switch S3. As a result, the voltage at the terminal 8 is boosted to a voltage higher than that of the reference power supply Vci. Further, the boosted capacitor 4 and the smoothing capacitor 1 are electrically connected, so that the boosted voltage is supplied to the smoothing capacitor 1.

  The target voltage AVDD1 is generated in the smoothing capacitor 1 by repeating the operation shown in FIG. 4 and the operation shown in FIG.

  Here, a voltage obtained by feeding back the voltage of the smoothing capacitor 1 via the voltage monitor terminal 10 is input to the comparator 13 via the resistor R11.

  By repeating the operation shown in FIG. 4 and the operation shown in FIG. 5, when the voltage AVDD of the smoothing capacitor 1 becomes equal to or higher than the target voltage AVDD1, the voltage V1 input to the comparator 13 becomes higher than the reference voltage Vref1. Accordingly, as shown in FIG. 6, the comparator 13 outputs a high level stop signal 45 to the control circuit 14. Upon receiving the high level stop signal 45, the control circuit 14 turns off the switch S2, the switch S3, the switch S5, and the switch S6, as shown in FIG. As a result, the power supply circuit 38 is stopped.

  In the stop state, when the voltage AVDD of the smoothing capacitor 1 becomes lower than the target voltage AVDD1 due to the load current I1, the voltage V1 input to the comparator 13 becomes lower than the reference voltage Vref1. Accordingly, the comparator 13 outputs a low level stop signal 45 to the control circuit 14. Upon receiving the low level stop signal 45, the control circuit 14 causes the power supply circuit 38 to repeatedly perform the operations shown in FIGS. That is, the power supply circuit 38 is in an operating state.

  Thus, the power supply circuit 38 can stably supply the target voltage AVDD1 to the smoothing capacitor 1 by repeating the operations of FIGS. 4 to 6 irregularly.

  Here, the voltage AVDD after being output from the output terminal 9 and after passing through the mounting resistor 43 is the voltage of the output terminal 9 by a voltage value ΔV corresponding to the product of the load current I1 and the resistance value of the mounting resistor 43. Lower. Therefore, for example, when the voltage of the output terminal 9 (the voltage before passing through the mounting resistor 43) is monitored by the comparator 13, the voltage AVDD of the power supply wiring 40 becomes the target voltage AVDD1-ΔV. That is, there is a problem that the voltage AVDD becomes lower than the target voltage AVDD1.

  Further, the voltage value ΔV varies as the load current I1 varies. That is, when the voltage of the output terminal 9 is monitored by the comparator 13, there arises a problem that the output voltage VADD varies due to the variation of the load current I1.

  On the other hand, the power supply circuit 38 according to the first embodiment of the present invention monitors the voltage AVDD after being output from the output terminal 9 and then passing through the mounting resistor 43 via the voltage monitor terminal 10, and this voltage. The boosting operation is controlled according to the voltage AVDD of the monitor terminal 10. Therefore, the power supply circuit 38 can stably output the target voltage AVDD1 to the smoothing capacitor 1. That is, the power supply circuit 38 can suppress a drop in the output voltage AVDD due to the mounting resistor 43 and a change in the output voltage AVDD due to a change in the load current I1.

  The display device 100 including the power supply circuit 38 can stably supply the voltage VGG and the voltage VEE necessary for driving the gate driver 26 and the voltage AVDD necessary for driving the source driver 27. As a result, the display device 100 can prevent the occurrence of a display abnormality that occurs when the voltage necessary for panel display cannot be supplied to the gate driver 26 or the source driver 27 and the display becomes thin or cannot be displayed. .

(Embodiment 2)
In the second embodiment of the present invention, a modification of the power supply circuit 38 according to the first embodiment described above will be described.

  Specifically, in Embodiment 2, a case will be described in which the output of an operational amplifier using a boosted voltage as a power supply is used as a panel drive power supply (AVDD).

  FIG. 7 is a diagram showing a configuration of a power supply circuit 38A according to Embodiment 2 of the present invention. In addition, the same code | symbol is attached | subjected to the element similar to FIG. Further, as in the first embodiment, the power supply circuit 38A is mounted on the display device 100.

  A power supply circuit 38 </ b> A illustrated in FIG. 7 includes a booster circuit 21 and a regulator circuit 22. The display device 100 (display drive device 110) includes smoothing capacitors 1 and 20 and power supply wirings 50 and 53.

  The configuration of the booster circuit 21 is the same as that of the power supply circuit 38 according to the first embodiment described above, and the power supply circuit 38A according to the second embodiment further includes the regulator circuit 22 in addition to the configuration of the power supply circuit 38. Prepare.

  The booster circuit 21 performs a boosting operation for generating the voltage V2 by boosting the voltage supplied from the reference power supply Vci. Further, the booster circuit 21 outputs the generated voltage V <b> 2 to the output terminal 9.

  The regulator circuit 22 uses the voltage V2 generated by the booster circuit 21 to generate a stabilized voltage AVDD that is supplied to the source driver 27. Here, the voltage AVDD is a voltage lower than the voltage V2. The regulator circuit 22 includes an input terminal 16 to which the voltage V2 is input and an output terminal 15 that outputs the voltage AVDD.

  The booster circuit 21 includes switches S2, S3, S5 and S6, terminals 7 and 8, an output terminal 9, a voltage monitor terminal 10, resistors R11 and R12, a comparator 13, a control circuit 14, and a boost capacitor 4. With.

  In addition, the booster 37 of the booster built-in LSI 28 includes a part of the power supply circuit 38 and the regulator circuit 22. Specifically, the boosting unit 37 includes switches S2, S3, S5, and S6, terminals 7 and 8, an output terminal 9, a voltage monitor terminal 10, resistors R11 and R12, a comparator 13, and a control circuit 14. And a regulator circuit 22.

  One end of the switch S5 is connected to the reference power source Vci, and the other end is connected to the terminal 7. The on / off state of the switch S5 is controlled by a control signal A.

  One end of the switch S6 is connected to the ground Vss, and the other end is connected to the terminal 7. The on / off state of the switch S6 is controlled by a control signal B.

  One end of the switch S3 is connected to the reference power source Vci, and the other end is connected to the terminal 8. The on / off state of the switch S3 is controlled by a control signal C.

  One end of the switch S2 is connected to the output terminal 9, and the other end is connected to the terminal 8. The on / off of the switch S2 is controlled by a control signal D.

  For example, the switches S2, S3, S5 and S6 are transistors such as MOS transistors and bipolar transistors. Note that the switches S2, S3, S5, and S6 may be other than transistors as long as the elements have a switching function.

  The boost capacitor 4 is formed outside the boost circuit built-in LSI 28. One end of the boost capacitor 4 is connected to the terminal 7 via the mounting resistor 41, and the other end is connected to the terminal 8 via the mounting resistor 42.

  The smoothing capacitors 1 and 20 are mounted on the substrate 29. One end of the smoothing capacitor 1 is connected to the ground Vss, and the other end is connected to the power supply wiring 50.

  The power supply wiring 50 is electrically connected to the output terminal 9 via the mounting resistor 43, and is electrically connected to the input terminal 16 via the mounting resistor 51. The power supply wiring 50 is electrically connected to the voltage monitor terminal 10.

  Therefore, a voltage V2 that is twice the voltage of the reference power supply Vci is output to the power supply wiring 50. Further, the smoothing capacitor 1 has a role of holding a voltage V2 that is twice the voltage of the reference power supply Vci.

  One end of the smoothing capacitor 20 is connected to the ground Vss, and the other end is connected to the power supply wiring 53.

  The power supply wiring 53 is electrically connected to the output terminal 15 via the mounting resistor 52. The power supply wiring 53 is electrically connected to the source driver 27.

  The power supply wiring 50 and the power supply wiring 53 are formed on the transparent substrate 36 and the substrate 29. Specifically, each of the power supply wirings 50 and 53 includes a first wiring part formed on the transparent substrate 36, a second wiring part formed on the substrate 29, the first wiring part, and the second wiring part. And a third wiring part such as a cable for electrically connecting the wiring part.

  The output terminal 9, the voltage monitor terminal 10, the output terminal 15, and the input terminal 16 may be directly connected to the third wiring portion such as the cable or the second wiring portion formed on the substrate 29. It may be directly connected. In other words, each of the power supply wirings 50 and 53 may include only the second wiring part and the third wiring part, or may include only the second wiring part.

  Here, the mounting resistors 41, 42, 43, 51, and 52 are resistors added when mounting the booster circuit built-in LSI 28 on the transparent substrate 36. That is, the mounting resistors 41, 42, 43, 52 and 53 are formed on the terminal 7, the terminal 8, the output terminal 9, the input terminal 16 and the output terminal 15, the first wiring portion formed on the transparent substrate 36, and the substrate 29. It is resistance of the connection part with either the 2nd wiring part currently performed and 3rd wiring parts, such as a cable.

  One end of the resistor R <b> 11 is connected to the voltage monitor terminal 10, and the other end is connected to the first input terminal of the comparator 13.

  One end of the resistor R12 is connected to the ground Vss, and the other end is connected to the first input terminal of the comparator 13.

  The second input terminal of the comparator 13 is connected to the reference voltage Vref1, and the output terminal is connected to the control circuit 14. The comparator 13 compares the voltage V1 at the first input terminal with the voltage at the second input terminal (reference voltage Vref1), and generates a stop signal 45 indicating whether or not the voltage V1 is greater than the reference voltage Vref1. In other words, the comparator 13 determines whether or not the voltage V2 at the voltage monitor terminal 10 is equal to or higher than the target voltage V3 corresponding to the reference voltage Vref1.

  The control circuit 14 generates control signals A to D for controlling the boosting operation of the booster circuit 21. The control signals A to D are supplied to the switch S5, the switch S6, the switch S2, and the switch S3, respectively.

  Further, the control circuit 14 controls whether or not the booster circuit 21 performs the boosting operation according to whether or not the voltage V2 is equal to or higher than the target voltage V3. Specifically, when the stop signal 45 output from the comparator 13 indicates that the voltage V1 is smaller than the reference voltage Vref1, the control circuit 14 causes the booster circuit 21 to perform a boost operation, and the stop signal 45 causes the voltage V1 to be increased. Is higher than the reference voltage Vref1, the boosting operation of the booster circuit 21 is stopped.

The regulator circuit 22 includes resistors R17 and R18 and an operational amplifier 19.
One end of the resistor R 17 is connected to the first input terminal of the operational amplifier 19, and the other end is connected to the output terminal 15.

  One end of the resistor R18 is connected to the ground Vss, and the other end is connected to the output terminal 15.

  The operational amplifier 19 has a reference voltage Vref2 applied to the second input terminal and an output terminal connected to the output terminal 15. The operational amplifier 19 generates the voltage AVDD using the voltage V2 of the input terminal 16 as a power source.

  Hereinafter, the operation of the power supply circuit 38A shown in FIG. 7 will be described with reference to FIG. 3 and FIGS.

  Here, the timing chart showing the operation of the power supply circuit 38A is the same as FIG. 9 to 11 are diagrams schematically showing the operation of the power supply circuit 38A.

  The target voltage AVDD1 can be generated in the smoothing capacitor 20 by performing the control shown in FIG.

  First, in the period t1 shown in FIG. 3, as shown in FIG. 8, the control circuit 14 turns on the switch S6 and the switch S3 and turns off the switch S5 and the switch S2. As a result, the voltage of the reference power supply Vci is stored in the booster capacitor 4.

  Next, in the period t2 shown in FIG. 3, as shown in FIG. 9, the control circuit 14 turns on the switch S5 and the switch S2, and turns off the switch S6 and the switch S3. As a result, the voltage at the terminal 8 is boosted to a voltage higher than that of the reference power supply Vci. Further, the boosted capacitor 4 and the smoothing capacitor 1 are electrically connected, so that the boosted voltage is supplied to the smoothing capacitor 1.

  The target voltage V3 is generated in the smoothing capacitor 1 by repeating the operation shown in FIG. 8 and the operation shown in FIG.

  Here, a voltage obtained by feeding back the voltage V2 of the smoothing capacitor 1 via the voltage monitor terminal 10 is input to the comparator 13 via the resistor R11.

  By repeating the operation shown in FIG. 9 and the operation shown in FIG. 10, when the voltage V2 of the smoothing capacitor 1 becomes equal to or higher than the target voltage V3, the voltage V1 input to the comparator 13 becomes larger than the reference voltage Vref1. As a result, as shown in FIG. 11, the comparator 13 outputs a high level stop signal 45 to the control circuit 14. Upon receiving the high level stop signal 45, the control circuit 14 turns off the switch S2, the switch S3, the switch S5, and the switch S6, as shown in FIG. As a result, the power supply circuit 38 is stopped.

  In the stopped state, when the voltage V2 of the smoothing capacitor 1 becomes lower than the target voltage V3 due to the load current I1, the voltage V1 input to the comparator 13 becomes lower than the reference voltage Vref1. Accordingly, the comparator 13 outputs a low level stop signal 45 to the control circuit 14. Upon receiving the low level stop signal 45, the control circuit 14 causes the power supply circuit 38 to repeatedly perform the operations shown in FIGS. That is, the power supply circuit 38 is in an operating state.

  Thus, by repeating the operations of FIGS. 8 to 10 irregularly, the booster circuit 21 can stably supply the target voltage V3 to the smoothing capacitor 1.

  On the other hand, the regulator circuit 22 generates a voltage AVDD supplied to the source driver 27 using the voltage V2 generated by the booster circuit 21. As described above, when the target voltage V3 is stably supplied as the voltage V2, the voltage AVDD generated by the regulator circuit 22 is also stabilized.

  As described above, the power supply circuit 38A according to the second embodiment of the present invention monitors the voltage V2 after being output from the output terminal 9 and then passing through the mounting resistor 43 via the voltage monitor terminal 10, The step-up operation is controlled according to the voltage V2 of the voltage monitor terminal 10. Therefore, the booster circuit 21 can stably output the target voltage V3 to the smoothing capacitor 1. That is, the booster circuit 21 can suppress the drop in the voltage V2 due to the mounting resistor 43 and the fluctuation in the voltage V2 due to the fluctuation in the load current I1.

  Thus, by stably supplying the target voltage V3 as the voltage V2, the voltage AVDD generated by the regulator circuit 22 is also stabilized. That is, the power supply circuit 38A can suppress the drop in the voltage AVDD due to the mounting resistor 43 and the fluctuation in the voltage AVDD due to the fluctuation in the load current I1.

  The display device 100 including the power supply circuit 38A can stably supply the voltage VGG and the voltage VEE necessary for driving the gate driver 26 and the voltage AVDD necessary for driving the source driver 27. As a result, the display device 100 can prevent the occurrence of a display abnormality that occurs when the voltage necessary for panel display cannot be supplied to the gate driver 26 or the source driver 27 and the display becomes thin or cannot be displayed. .

  The display device 100 according to Embodiments 1 and 2 of the present invention has been described above, but the present invention is not limited to this embodiment.

  For example, you may combine at least one part among the functions of the display apparatus 100, the power supply circuit 38, power supply circuit 38A, and its modification which concern on the said Embodiment 1-2.

  In the above description, the example in which the present invention is applied to the display device 100 including the liquid crystal panel has been described. However, the present invention may be applied to a display device including other than the liquid crystal panel. For example, the present invention may be applied to a display device including an organic EL (electroluminescence) panel or a PDP (plasma display panel).

  Moreover, all the numbers used above are illustrated to specifically describe the present invention, and the present invention is not limited to the illustrated numbers. Further, the logic levels represented by high / low or the switching states represented by on / off are illustrative for the purpose of illustrating the present invention, and different combinations of the illustrated logic levels or switching states. Therefore, it is possible to obtain an equivalent result. In addition, the connection relationship between the components is exemplified for specifically explaining the present invention, and the connection relationship for realizing the function of the present invention is not limited to this.

  Further, various modifications in which the present embodiment is modified within the scope conceivable by those skilled in the art are also included in the present invention without departing from the gist of the present invention.

  The present invention can be applied to a display device and a display driving device, and is particularly suitable for a display device including a liquid crystal panel.

1, 1A, 1B, 1C, 20 Smoothing capacity 4 Boosting capacity 7, 8 Terminal 9, 9A, 9B, 9C, 15 Output terminal 10, 10A, 10B, 10C Voltage monitor terminal 13 Comparator 14 Control circuit 16 Input terminal 19 Operational amplifier 21 Booster circuit 22 Regulator circuit 25 Display panel 26 Gate driver 27 Source driver 28 Booster built-in LSI
29 Substrate 36 Transparent substrate 37, 37A, 37B, 37C Booster 38, 38A Power supply circuit 40, 40A, 40B, 40C, 50, 53 Power supply wiring 41, 42, 43, 51, 52 Mounting resistance 45 Stop signal 100 Display device 110 Display driver A, B, C, D Control signal I1 Load current R11, R12, R17, R18 Resistor S2, S3, S5, S6 Switch Vci Reference power supply Vref1, Vref2 Reference voltage Vss Ground

Claims (9)

A display driving device for driving a display panel,
A transparent substrate on which the display panel is formed;
A power supply circuit that performs a boosting operation to generate a second voltage by boosting the first voltage;
A semiconductor integrated circuit that is mounted on the transparent substrate and includes a first output terminal that outputs at least a part of the power supply circuit and outputs a second voltage generated by the power supply circuit;
A first power supply wiring electrically connected to the first output terminal via a mounting resistor added when the semiconductor integrated circuit is mounted on the transparent substrate;
A first smoothing capacitor electrically connected to the first power supply wiring,
The semiconductor integrated circuit further includes:
A voltage monitor terminal electrically connected to the first power supply wiring;
A comparator for determining whether the voltage of the voltage monitor terminal is greater than a reference voltage;
When the comparator determines that the voltage of the voltage monitor terminal is smaller than the reference voltage, the power supply circuit performs the boosting operation, and the comparator determines that the voltage of the voltage monitor terminal is larger than the reference voltage. And a control circuit that stops the step-up operation of the power supply circuit in the case of a display drive device. The display driving device further includes:
A drive unit for driving the display panel using the second voltage;
The display driving device according to claim 1, wherein the first power supply wiring is further electrically connected to the driving unit. The display driving device further includes:
A first substrate electrically connected to the transparent substrate;
The first power supply wiring is formed on the first substrate;
The display driving apparatus according to claim 2, wherein the first smoothing capacitor is mounted on the first substrate. The power supply circuit is
A booster circuit that generates the second voltage by boosting the first voltage;
A regulator circuit that generates a third voltage using the second voltage generated by the booster circuit;
The regulator circuit includes an operational amplifier using the second voltage as a power source,
The first power supply wiring is further electrically connected to the operational amplifier,
The display driving device further includes:
The display drive apparatus according to claim 1, further comprising a drive unit that drives the display panel using the third voltage. The semiconductor integrated circuit further includes the regulator circuit,
The semiconductor integrated circuit further includes:
A second output terminal for outputting the third voltage generated by the regulator circuit;
The display driving device further includes:
A second power supply wiring electrically connected to the second output terminal via a mounting resistor added when the semiconductor integrated circuit is mounted on the transparent substrate;
The display driving device according to claim 4, further comprising: a second smoothing capacitor electrically connected to the second power supply wiring. The display driving device further includes:
A first substrate electrically connected to the transparent substrate;
The first power supply wiring and the second power supply wiring are formed on the first substrate,
The display driving apparatus according to claim 5, wherein the first smoothing capacitor and the second smoothing capacitor are mounted on the first substrate. The power supply circuit is
Boost capacity,
A first switch having one end applied with the first voltage and the other end connected to one end of the boost capacitor;
A second switch having one end grounded and the other end connected to one end of the boost capacitor;
A third switch in which the first voltage is applied to one end and the other end is connected to the other end of the boost capacitor;
The display drive device according to claim 1, further comprising: a fourth switch having one end connected to the first output terminal and the other end connected to the other end of the boost capacitor. The control circuit turns on the first switch and the fourth switch, and turns on the second switch and the third switch when the comparator determines that the voltage of the voltage monitor terminal is smaller than the reference voltage. By alternately repeating the first state to turn off and the second state to turn on the second switch and the third switch while turning off the first switch and the fourth switch, By turning off the first switch, the second switch, the third switch, and the fourth switch when the comparator determines that the voltage at the voltage monitor terminal is greater than the reference voltage. The display driving device according to claim 7, wherein the boosting operation of the power supply circuit is stopped. A display panel for displaying images,
A display device comprising: the display driving device according to claim 1, wherein the display panel is driven.

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