JP2010267772A - Method of manufacturing mounting structure - Google Patents

Method of manufacturing mounting structure Download PDF

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JP2010267772A
JP2010267772A JP2009117453A JP2009117453A JP2010267772A JP 2010267772 A JP2010267772 A JP 2010267772A JP 2009117453 A JP2009117453 A JP 2009117453A JP 2009117453 A JP2009117453 A JP 2009117453A JP 2010267772 A JP2010267772 A JP 2010267772A
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insulating resin
electronic component
circuit board
chip
shape
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Takayuki Higuchi
貴之 樋口
Yoshihiro Tomura
善広 戸村
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Panasonic Corp
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Panasonic Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L24/743—Apparatus for manufacturing layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83194—Lateral distribution of the layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a mounting structure for reducing air bubbles that occur between an electronic component and an insulating resin. <P>SOLUTION: The manufacturing method includes an insulating resin arranging step of forming a sheet-like insulating resin 16 on a circuit board 14, a mounting step in which an electronic component 11 is positioned from above the insulating resin 16 so that a bump 13 formed on an electrode 12 of the electronic component 11 is opposed to a counter electrode 15 of the circuit board 14, and a joining step where the insulating resin 16 is cured by heating and pressurizing so that the electronic component 11 is joined to the circuit board 14. The side surface of the insulating resin 16 has such a shape as the portion abutting with the insulating resin 16 and a lower surface of the electronic component 11 expand as the electronic component 11 gets down when aligned in the mounting step or when joined in the joining step. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、電子回路用プリント基板に電子部品を実装した実装構造体の製造方法に関するものである。   The present invention relates to a method for manufacturing a mounting structure in which electronic components are mounted on a printed circuit board for electronic circuits.

本明細書では、電子回路用プリント基板を単に「回路基板」と称するが、この「回路基板」は、インタポーザや電子部品が装着される他の部品などの被装着体を意味する。   In this specification, the printed circuit board for an electronic circuit is simply referred to as a “circuit board”, and this “circuit board” means an object to be mounted such as an interposer and other components on which an electronic component is mounted.

本発明は、例えば、このような回路基板に、ＩＣチップ、ＣＳＰ（Ｃｈｉｐ Ｓｉｚｅ Ｐａｃｋａｇｅ）、ＭＣＭ（Ｍｕｌｔｉ Ｃｈｉｐ Ｍｏｄｕｌｅ）、ＢＧＡ（Ｂａｌｌ Ｇｒｉｄ Ａｒｒａｙ）や表面弾性波（ＳＡＷ）デバイスなどの電子部品を単体（ＩＣチップの場合にはベアＩＣ）状態で実装する、電子部品実装構造体の製造方法に関するものである。   In the present invention, for example, an electronic component such as an IC chip, a CSP (Chip Size Package), an MCM (Multi Chip Module), a BGA (Ball Grid Array), or a surface acoustic wave (SAW) device is provided on such a circuit board. The present invention relates to a method for manufacturing an electronic component mounting structure that is mounted in a (bare IC in the case of an IC chip) state.

今日、電子回路基板は、あらゆる製品に使用されるようになり、日増しにその性能が向上し、回路基板上で用いられる周波数も高くなっており、インピーダンスが低くなるフリップチップ実装は高周波を使用する電子機器に適した実装方法となっている。また、携帯機器の増加から、回路基板にＩＣチップをパッケージではなく裸のまま搭載するフリップチップ実装が求められている。また、上記フリップチップ以外にもＣＳＰ（Ｃｈｉｐ Ｓｉｚｅ Ｐａｃｋａｇｅ）、ＢＧＡ（Ｂａｌｌ Ｇｒｉｄ Ａｒｒａｙ）等が用いられるようになってきている。   Today, electronic circuit boards are used in various products, their performance improves day by day, the frequency used on the circuit board is also increasing, and flip chip mounting where impedance is low uses high frequency It is a mounting method suitable for electronic equipment. Also, with the increase in portable devices, flip chip mounting is required for mounting an IC chip on a circuit board as it is, not as a package. In addition to the flip chip, CSP (Chip Size Package), BGA (Ball Grid Array) and the like have been used.

従来、電子機器の回路基板にＩＣチップなどの電子部品を接合する方法としては、電子部品の電極と回路基板の電極とをＡｕ線を用いて作られる突起バンプによって接続し、絶縁性の樹脂のシートで封止し、加熱加圧して絶縁性樹脂を硬化させて、電子部品実装構造体を製造する方法が知られている（例えば、特許文献１参照）。   Conventionally, as a method of joining an electronic component such as an IC chip to a circuit board of an electronic device, an electrode of the electronic component and an electrode of the circuit board are connected by a bump bump made of Au wire, and an insulating resin is used. A method of manufacturing an electronic component mounting structure by sealing with a sheet and heating and pressurizing to cure an insulating resin is known (see, for example, Patent Document 1).

図１１（ａ）〜（ｃ）に、従来の絶縁性樹脂シートを用いる実装構造体の製造方法を説明するための断面模式図を示す。図１１（ａ）は、回路基板上に絶縁性樹脂シートを貼り付ける貼り付け工程を、図１１（ｂ）は、電子部品を回路基板上に位置合わせする実装工程を、図１１（ｃ）は、電子部品を回路基板上に加熱加圧して接合する接合工程を、それぞれ示している。   11A to 11C are schematic cross-sectional views for explaining a method for manufacturing a mounting structure using a conventional insulating resin sheet. FIG. 11A shows an attaching process for attaching an insulating resin sheet on a circuit board, FIG. 11B shows a mounting process for aligning electronic components on the circuit board, and FIG. 1 shows a joining process for joining an electronic component by heating and pressing on a circuit board.

まず、図１１（ａ）に示すように、例えばＩＣチップなどの電子部品１０１の電極１０２にバンプ１０３を形成しておき、一方、回路基板１０４側には、電子部品１０１の大きさより若干大きな寸法にてカットされた絶縁性樹脂シート１０６を貼り付ける。   First, as shown in FIG. 11A, bumps 103 are formed on the electrodes 102 of an electronic component 101 such as an IC chip, for example. On the other hand, the dimensions slightly larger than the size of the electronic component 101 are formed on the circuit board 104 side. The insulating resin sheet 106 cut in step 1 is attached.

そして、図１１（ｂ）に示すように、回路基板１０４の電極１０５に相対するように、電子部品１０１のバンプ１０３が付いた電極１０２を位置合わせして実装する。   Then, as shown in FIG. 11B, the electrodes 102 with the bumps 103 of the electronic component 101 are positioned and mounted so as to face the electrodes 105 of the circuit board 104.

電子部品１０１を回路基板１０４上に位置合わせして実装した後、図１１（ｃ）に示すように、電子部品１０１の上から、加熱された加熱加圧ツール１００を押し付け、加熱と加圧を同時に行い、バンプ１０３により電子部品１０１の電極１０２と回路基板１０４の電極１０５間を接合させ、絶縁性樹脂シート１０６を硬化させて接合する。このときの加熱により絶縁性樹脂シート１０６が硬化し、電子部品１０１と回路基板１０４間が封止される。   After the electronic component 101 is positioned and mounted on the circuit board 104, as shown in FIG. 11C, the heated heating / pressing tool 100 is pressed from above the electronic component 101 to perform heating and pressurization. At the same time, the bumps 103 are used to bond the electrodes 102 of the electronic component 101 and the electrodes 105 of the circuit board 104, and the insulating resin sheet 106 is cured and bonded. The insulating resin sheet 106 is cured by heating at this time, and the gap between the electronic component 101 and the circuit board 104 is sealed.

特開平１０−１１２４７５号公報JP-A-10-112475

しかしながら、絶縁性樹脂シートを用いる従来の実装構造体の製造方法では、電子部品と回路基板の間に絶縁性樹脂シートを挟む工程において、絶縁性樹脂と電子部品の接着面との間に気泡が咬みこみ、抜けないことが多かった。   However, in the conventional method for manufacturing a mounting structure using an insulating resin sheet, in the step of sandwiching the insulating resin sheet between the electronic component and the circuit board, bubbles are formed between the insulating resin and the bonding surface of the electronic component. I often bite and I couldn't come off.

すなわち、従来の実装構造体の製造方法では、図１１（ａ）に示すように回路基板１０４に絶縁性樹脂シート１０６を貼り合わせた後に、図１１（ｂ）および（ｃ）に示すように、電子部品１０１を回路基板１０４に貼られた絶縁性樹脂シート１０６に貼り合わせるため、電子部品１０１が下降して絶縁性樹脂シート１０６の表面に接触する際に、絶縁性樹脂シート１０６と電子部品１０１の接着面との間に気泡が咬みこみやすく、その気泡が抜けなくなってしまう。   That is, in the conventional method for manufacturing a mounting structure, as shown in FIGS. 11B and 11C, after the insulating resin sheet 106 is bonded to the circuit board 104 as shown in FIG. Since the electronic component 101 is bonded to the insulating resin sheet 106 attached to the circuit board 104, when the electronic component 101 descends and contacts the surface of the insulating resin sheet 106, the insulating resin sheet 106 and the electronic component 101 are Air bubbles can easily bite between the adhesive surface and the air bubbles cannot be removed.

本発明は、上記従来の課題を考慮して、電子部品と絶縁性樹脂の間に発生する気泡の量を従来よりも低減できる実装構造体の製造方法を提供することを目的とする。   An object of the present invention is to provide a method for manufacturing a mounting structure that can reduce the amount of bubbles generated between an electronic component and an insulating resin, as compared with the prior art, in consideration of the above-described conventional problems.

上述した課題を解決するために、第１の本発明は、
シート状の絶縁性樹脂を回路基板上に形成する絶縁性樹脂配置ステップと、
電子部品の電極上に形成されたバンプが、前記回路基板の対向電極に相対するように、前記絶縁性樹脂の上から前記電子部品を位置合わせする実装ステップと、
加熱および加圧を行って、前記絶縁性樹脂を硬化させて前記電子部品と前記回路基板とを接合する接合ステップとを備えた実装構造体の製造方法であって、
前記絶縁性樹脂の上面および側面の少なくともいずれかの面の形状は、前記実装ステップで位置合わせする際または前記接合ステップで接合する際に前記電子部品を下降させるにしたがって、前記絶縁性樹脂の前記面と前記電子部品の下面との当接する部分が広がる形状を有している、実装構造体の製造方法である。 In order to solve the above-described problem, the first aspect of the present invention provides:
An insulating resin placement step of forming a sheet-like insulating resin on the circuit board;
A mounting step of aligning the electronic component from above the insulating resin so that the bump formed on the electrode of the electronic component is opposed to the counter electrode of the circuit board;
A method for manufacturing a mounting structure comprising a step of heating and pressing to cure the insulating resin to join the electronic component and the circuit board,
The shape of at least one of the upper surface and the side surface of the insulating resin is such that when the electronic component is lowered during alignment in the mounting step or bonding in the bonding step, the shape of the insulating resin is increased. It is a manufacturing method of a mounting structure which has the shape where the part which the surface and the lower surface of the above-mentioned electronic component contact is spread.

また、第２の本発明は、
前記絶縁性樹脂は、前記実装ステップで前記電子部品を位置合わせする前には、錐体形状、または、錐台形状、または、角柱の上に連続的に角錐が接続された形状、または、角柱の上に連続的に角錐台が接続された形状、または、楕円柱の上に連続的に楕円錐が接続された形状、または、楕円柱の上に連続的に楕円錐台が接続された形状を有しており、その頂点が前記電子部品側に向いている、第１の本発明の実装構造体の製造方法である。 The second aspect of the present invention
The insulating resin has a pyramid shape, a frustum shape, or a shape in which pyramids are continuously connected on a prism, or a prism, before the electronic component is aligned in the mounting step. A shape in which a truncated pyramid is continuously connected on top, a shape in which an elliptical pyramid is continuously connected on an elliptical column, or a shape in which an elliptical frustum is continuously connected on an elliptical column In the method for manufacturing the mounting structure according to the first aspect of the present invention, the apex is directed to the electronic component side.

また、第３の本発明は、
前記実装ステップまたは前記接合ステップで前記電子部品を下降させる際に、前記錐台または前記角錐台または前記楕円錐台の上面は、前記電子部品の電極に当たらない、第２の本発明の実装構造体の製造方法である。 The third aspect of the present invention
When the electronic component is lowered in the mounting step or the joining step, the upper surface of the frustum, the truncated pyramid, or the elliptical frustum does not hit the electrode of the electronic component. It is a manufacturing method of a body.

また、第４の本発明は、
前記絶縁性樹脂の上面は、前記実装ステップで前記電子部品を位置合わせする前には、前記電子部品に向かって凸部を有する湾曲面である、第１の本発明の実装構造体の製造方法である。 The fourth aspect of the present invention is
The upper surface of the insulating resin is a curved surface having a convex portion toward the electronic component before the electronic component is aligned in the mounting step. It is.

また、第５の本発明は、
前記絶縁性樹脂配置ステップでは、平板状の絶縁性樹脂を、貼り付け面に傾斜面を有する貼り付けツールによって加熱しながら前記回路基板上に貼り付ける、第１〜第４のいずれかの本発明の実装構造体の製造方法である。 The fifth aspect of the present invention provides
In the insulating resin disposing step, the flat insulating resin is attached onto the circuit board while being heated by an attaching tool having an inclined surface on the attaching surface. This is a manufacturing method of the mounting structure.

また、第６の本発明は、
前記絶縁性樹脂は、２層で構成されており、
前記回路基板に接している側の層は、前記電子部品側の層よりも粘度が高い、第１〜第５のいずれかの本発明の実装構造体の製造方法である。 The sixth aspect of the present invention provides
The insulating resin is composed of two layers,
The layer on the side in contact with the circuit board is the method for manufacturing a mounting structure according to any one of the first to fifth aspects of the present invention, which has a higher viscosity than the layer on the electronic component side.

また、第７の本発明は、
前記絶縁性樹脂は、隣接する層の粘度が異なる３層以上で構成されており、
上面側および下面側以外の層は、前記上面側の層および前記下面側の層よりも粘度が高い、第１〜第５のいずれかの本発明の実装構造体の製造方法である。 The seventh aspect of the present invention
The insulating resin is composed of three or more layers having different viscosities of adjacent layers,
The layer other than the upper surface side and the lower surface side is the manufacturing method of the mounting structure according to any one of the first to fifth aspects of the present invention, wherein the viscosity is higher than the upper surface layer and the lower surface layer.

本発明により、電子部品と絶縁性樹脂の間に発生する気泡の量を従来よりも低減できる実装構造体の製造方法を提供できる。   According to the present invention, it is possible to provide a method for manufacturing a mounting structure in which the amount of bubbles generated between an electronic component and an insulating resin can be reduced as compared with the related art.

（ａ）〜（ｃ）本発明の実施の形態１の実装構造体の製造方法を説明するための断面模式図(A)-(c) Cross-sectional schematic diagram for demonstrating the manufacturing method of the mounting structure of Embodiment 1 of this invention. 本発明の実施の形態１の実装構造体の製造に用いる絶縁性樹脂の、ＩＣチップ側から見た上面図The top view seen from the IC chip side of the insulating resin used for manufacture of the mounting structure of Embodiment 1 of this invention （ａ）〜（ｃ）本発明の実施の形態１の実装構造体の製造に用いる絶縁性樹脂の形成方法を説明するための図(A)-(c) The figure for demonstrating the formation method of the insulating resin used for manufacture of the mounting structure of Embodiment 1 of this invention. （ａ）本発明の実施の形態１の絶縁性樹脂の上面図、（ｂ）、（ｃ）本発明の実施の形態１の絶縁性樹脂の側面図(A) Top view of insulating resin of embodiment 1 of the present invention, (b), (c) Side view of insulating resin of embodiment 1 of the present invention （ａ）本発明の実施の形態１の絶縁性樹脂の上面図、（ｂ）〜（ｅ）本発明の実施の形態１の絶縁性樹脂の側面図(A) Top view of insulating resin of embodiment 1 of the present invention, (b) to (e) Side view of insulating resin of embodiment 1 of the present invention （ａ）〜（ｄ）バンプ位置を示した、ＩＣチップの下面図(A)-(d) Bottom view of IC chip showing bump positions （ａ）〜（ｃ）本発明の実施の形態２の実装構造体の製造方法を説明するための断面模式図(A)-(c) Cross-sectional schematic diagram for demonstrating the manufacturing method of the mounting structure of Embodiment 2 of this invention. 本発明の実施の形態２の実装構造体の製造に用いる絶縁性樹脂の、ＩＣチップ側から見た上面図The top view seen from the IC chip side of the insulating resin used for manufacture of the mounting structure of Embodiment 2 of this invention （ａ）本発明の実施の形態２の、粘度の異なる３種類の層構造の絶縁性樹脂を用いた実装構造体の貼り付け工程時の断面模式図、（ｂ）本発明の実施の形態２の、粘度の異なる３種類の層構造の絶縁性樹脂の上面図(A) Schematic cross-sectional view of the mounting structure using the insulating resin having three types of layer structures having different viscosities in Embodiment 2 of the present invention, (b) Embodiment 2 of the present invention Top view of three types of insulating resin with different viscosities （ａ）〜（ｃ）比較例および実施例１〜６において、絶縁性樹脂に最初に接触する領域を示したＩＣチップの下面図(A)-(c) The bottom view of the IC chip which showed the area | region which contacts an insulating resin initially in a comparative example and Examples 1-6. （ａ）〜（ｃ）従来の絶縁性樹脂シートを用いる実装構造体の製造方法を説明するための断面模式図(A)-(c) Cross-sectional schematic diagram for demonstrating the manufacturing method of the mounting structure using the conventional insulating resin sheet.

以下に、本発明にかかる実施の形態を図面に基づいて詳細に説明する。   Embodiments according to the present invention will be described below in detail with reference to the drawings.

（実施の形態１）
本発明の実施の形態１にかかる電子部品、例えばＩＣチップを回路基板に接合して作製する実装構造体の製造方法を、以下に説明する。 (Embodiment 1)
A method for manufacturing a mounting structure in which an electronic component according to the first embodiment of the present invention, for example, an IC chip is manufactured by bonding to a circuit board will be described below.

図１（ａ）〜（ｃ）に、本実施の形態１の実装構造体の製造方法を説明するための断面模式図を示す。ここでは説明をわかりやすくするために、ＩＣチップの四辺に沿って下面の周囲に１列にバンプが設けられた構成のＩＣチップを例に説明する。つまり、図１で説明するＩＣチップ１１は、例えば図６（ａ）の下面図に示すようにバンプが設けられている。   1A to 1C are schematic cross-sectional views for explaining a method for manufacturing a mounting structure according to the first embodiment. Here, for easy understanding, an IC chip having a configuration in which bumps are provided in a row around the lower surface along the four sides of the IC chip will be described as an example. That is, the IC chip 11 described in FIG. 1 is provided with bumps as shown in the bottom view of FIG.

図１（ａ）に示すように、本発明の電子部品の一例であるＩＣチップ１１の表面には、回路配線或いは電極部１２が形成されている。ここでは、電極部１２の例としてＡｌパッドの電極が形成されている。なお、電極の材質はＡｕやＣｕなどでもよく、また下地としてＮｉ等のメッキをした上に金属をメッキした電極でもよい。   As shown in FIG. 1A, circuit wiring or electrode portions 12 are formed on the surface of an IC chip 11 which is an example of the electronic component of the present invention. Here, as an example of the electrode portion 12, an Al pad electrode is formed. The electrode material may be Au, Cu, or the like, or may be an electrode that is plated with Ni or the like and then plated with a metal.

このＩＣチップ１１上の電極部１２に、ワイヤボンディング装置等を用いて、金属線、例えば、金ワイヤ（金線）（なお、金属線の例としては、スズ、アルミニウム、銅、またはこれらの金属に微量元素を含有させた合金のワイヤなどがある。）を熱と超音波をかけながら、電極部１２と接合させ、接合部の面積が大きくなるように押し付けながら、最後は引きちぎり、先端が細くなるようにバンプ（突起電極）１３を形成する。   A metal wire, for example, a gold wire (gold wire) (for example, tin, aluminum, copper, or these metals are used for the electrode portion 12 on the IC chip 11 by using a wire bonding apparatus or the like. Is bonded to the electrode part 12 while applying heat and ultrasonic waves, and is pressed to increase the area of the joint part. A bump (projection electrode) 13 is formed so as to be thin.

次に、図１（ａ）に示すように、回路基板１４の電極部１５上に、絶縁性樹脂１６を形成させる。   Next, as shown in FIG. 1A, an insulating resin 16 is formed on the electrode portion 15 of the circuit board 14.

図２に、この絶縁性樹脂１６の、ＩＣチップ１１側から見た上面図を示す。このように、本実施の形態１の絶縁性樹脂１６は、四角錐台形状をしている。   FIG. 2 shows a top view of the insulating resin 16 as viewed from the IC chip 11 side. As described above, the insulating resin 16 according to the first embodiment has a quadrangular pyramid shape.

本実施の形態１では、絶縁性樹脂１６を、回路基板１４と接する四角錐台形状の底面の面積が、ＩＣチップ１１の面積より若干大きく、ＩＣチップ１１に接する側の四角錐台形状の上面の面積が、ＩＣチップ１１の面積より小さくなるような寸法としている。   In the first embodiment, the area of the bottom surface of the quadrangular pyramid shape in contact with the circuit board 14 of the insulating resin 16 is slightly larger than the area of the IC chip 11, and the upper surface of the quadrangular pyramid shape on the side in contact with the IC chip 11. Is set to be smaller than the area of the IC chip 11.

なお、図１（ａ）において、回路基板１４上に絶縁性樹脂１６を形成させる工程が、本発明の絶縁性樹脂配置ステップの一例にあたる。   In FIG. 1A, the step of forming the insulating resin 16 on the circuit board 14 corresponds to an example of the insulating resin arrangement step of the present invention.

図１（ｂ）に示すように、ＩＣチップ１１を回路基板１４と位置合わせした際に、絶縁性樹脂１６の上面が、ＩＣチップ１１に配列された複数のバンプ１３で囲まれる範囲内に収まるような、絶縁性樹脂１６の配置および形状としている。   As shown in FIG. 1B, when the IC chip 11 is aligned with the circuit board 14, the upper surface of the insulating resin 16 is within the range surrounded by the plurality of bumps 13 arranged on the IC chip 11. Such an arrangement and shape of the insulating resin 16 are used.

したがって、ＩＣチップ１１を回路基板１４と位置合わせまたは接合する際に、回路基板１４に対してＩＣチップ１１を下降させるとき、ＩＣチップ１１が絶縁性樹脂１６の上面と最初に接触するのは、ＩＣチップ１１下面の複数のバンプ１３で囲まれる部分であり、このとき絶縁性樹脂１６の上面はバンプ１３には接触しない。   Therefore, when the IC chip 11 is lowered with respect to the circuit board 14 when aligning or bonding the IC chip 11 to the circuit board 14, the IC chip 11 first comes into contact with the upper surface of the insulating resin 16. It is a portion surrounded by a plurality of bumps 13 on the lower surface of the IC chip 11, and at this time, the upper surface of the insulating resin 16 does not contact the bumps 13.

回路基板１４として、セラミック多層基板、ＦＰＣ、ガラス布積層エポキシ基板（ガラエポ基板）やガラス布積層ポリイミド樹脂基板、アラミド不織布エポキシ基板（例えば、パナソニック株式会社製のアリブ「ＡＬＩＶＨ」（登録商標）として販売されている樹脂多層基板）などが用いられる。   As circuit board 14, ceramic multilayer board, FPC, glass cloth laminated epoxy board (glass epoxy board), glass cloth laminated polyimide resin board, aramid nonwoven fabric epoxy board (for example, “ALIVH” (registered trademark) manufactured by Panasonic Corporation) Resin multilayer substrate) or the like is used.

なお、この回路基板１４上の電極部１５は、例としてＣｕの上にＮｉをメッキし表面をＡｕのフラッシュメッキしたものを使用するが、上記でＩＣチップ１１の電極部１２の材質として挙げたものと同じ材質であっても良い。また、電極部１５は、ＩＣチップ１１の電極部１２と材質が同じであってもよいし、異なっていてもよい。   As the electrode portion 15 on the circuit board 14, for example, Ni is plated on Cu and the surface is flash-plated with Au. However, the electrode portion 15 of the IC chip 11 is mentioned above as an example. The same material may be used. Moreover, the electrode part 15 may be the same material as the electrode part 12 of the IC chip 11, or may be different.

図３（ａ）〜（ｃ）のそれぞれに、図１で用いた本実施の形態１の絶縁性樹脂１６の形成方法を説明する図を示す。   FIGS. 3A to 3C are diagrams illustrating a method for forming the insulating resin 16 according to the first embodiment used in FIG.

本実施の形態１の絶縁性樹脂１６としては、例えば無機フィラーを配合した固体または半固体の絶縁性樹脂層のシートが用いられる。   As the insulating resin 16 according to the first embodiment, for example, a solid or semi-solid insulating resin layer sheet containing an inorganic filler is used.

本実施の形態１の絶縁性樹脂１６として、あらかじめ、図１および図２に示した四角錐台形状に成形としたものを供給してもよい。この場合、あらかじめ所望の形状に成形した絶縁性樹脂１６は、例えば図３（ａ）のような構造で供給される。絶縁性樹脂１６は、カバーフィルム１７と剥離フィルム１８で挟むことによって保護されて供給される。絶縁性樹脂１６を回路基板１４に貼り付ける際に剥離フィルム１８を剥がし、回路基板１４に貼り付けた後、ＩＣチップ１１を実装する直前にカバーフィルム１７を剥がして使用する。   As the insulating resin 16 according to the first embodiment, a resin that has been previously formed into a quadrangular pyramid shape shown in FIGS. 1 and 2 may be supplied. In this case, the insulating resin 16 molded in a desired shape in advance is supplied, for example, with a structure as shown in FIG. The insulating resin 16 is supplied while being protected by being sandwiched between the cover film 17 and the release film 18. When the insulating resin 16 is attached to the circuit board 14, the release film 18 is peeled off, attached to the circuit board 14, and then the cover film 17 is peeled off immediately before mounting the IC chip 11.

図３（ｂ）は、回路基板１４上に貼り付けた後に絶縁性樹脂１６の形状を成形する例を示している。この場合、略垂直な端面を有する直方体形状の絶縁性樹脂１９を用い、平坦なツールで回路基板１４に貼り付けた後、絶縁性樹脂１９の４辺をカットして図１および図２に示したような四角錐台形状の絶縁性樹脂１６とする。   FIG. 3B shows an example in which the shape of the insulating resin 16 is formed after being attached on the circuit board 14. In this case, a rectangular parallelepiped insulating resin 19 having a substantially vertical end face is used, and after being attached to the circuit board 14 with a flat tool, four sides of the insulating resin 19 are cut and shown in FIGS. The insulating resin 16 has a quadrangular pyramid shape.

図３（ｃ）は、回路基板１４に貼り付ける際に、貼り付けツールによって絶縁性樹脂１６を成形する例を示している。この場合、回路基板１４に貼り付ける際の加熱および加圧により絶縁性樹脂を図１に示した絶縁性樹脂１６の形状に変形させるような、貼り付け面の中央が図３（ｃ）に示すような凹型になった貼り付けツール３０を用いる。この貼り付けツール３０によって直方体形状の絶縁性樹脂１９を回路基板１４に貼り付ける際、そのときの加熱および加圧によって、絶縁性樹脂１９を図１に示したような形状の絶縁性樹脂１６に変形させる。   FIG. 3C shows an example in which the insulating resin 16 is formed by an attaching tool when the substrate is attached to the circuit board 14. In this case, the center of the affixing surface that deforms the insulating resin into the shape of the insulating resin 16 shown in FIG. 1 by heating and pressurization when adhering to the circuit board 14 is shown in FIG. Such a concave attaching tool 30 is used. When the rectangular parallelepiped insulating resin 19 is affixed to the circuit board 14 by the affixing tool 30, the insulating resin 19 is transformed into the insulating resin 16 having a shape as shown in FIG. Deform.

本実施の形態１の絶縁性樹脂１６は、例えば６０〜１２０℃（好ましくは、温度は低い方が良い）に熱せられた貼付けツール等により、例えば５〜１０ｋｇｆ／ｃｍ２程度の圧力で、電極部１５が形成された回路基板１４上に貼り付けられる。 Insulating resin 16 of the first embodiment is applied to the electrode at a pressure of, for example, about 5 to 10 kgf / cm 2 with a pasting tool or the like heated to, for example, 60 to 120 ° C. (preferably lower temperature is better). It is affixed on the circuit board 14 in which the part 15 was formed.

ここで、絶縁性樹脂１６としては、球状又は破砕シリカ、アルミナ等のセラミックスなどの無機系フィラーを絶縁性樹脂に分散させて混合し、これをドクターブレード法などにより平坦化し溶剤成分を気化させ固体化したものが好ましいとともに、後工程のリフロー工程での高温に耐えうる程度の耐熱性（例えば、２４０℃に１０秒間耐えうる程度の耐熱性）を有することが好ましい。   Here, as the insulating resin 16, an inorganic filler such as spherical or crushed silica or alumina is dispersed and mixed in the insulating resin, and this is flattened by a doctor blade method or the like to vaporize the solvent component and solidify. It is preferable to have a heat resistance that can withstand high temperatures in a subsequent reflow process (for example, heat resistance that can withstand 240 ° C. for 10 seconds).

本実施の形態１の絶縁性樹脂１６として、例えば、絶縁性熱硬化性樹脂（例えば、エポキシ樹脂、ウレタン樹脂、アクリル樹脂、ポリイミド樹脂、ポリアミド樹脂、ビスマレイミド、フェノール樹脂、ポリエステル樹脂、シリコーン樹脂、オキセタン樹脂など、様々な樹脂を含むことができる）を用いる。これらの絶縁性熱硬化性樹脂は、単独で用いてもよく、２種類以上を組み合わせて用いてもよい。これらのうちでは、特にエポキシ樹脂が好適である。エポキシ樹脂には、ビスフェノール型エポキシ樹脂、多官能エポキシ樹脂、可撓性エポキシ樹脂、臭素化エポキシ樹脂、グリシジルエステル型エポキシ樹脂、高分子型エポキシ樹脂の群から選ばれるエポキシ樹脂も用いることができる。その中でも、例えば、ビスフェノールＡ型エポキシ樹脂、ビスフェノールＦ型エポキシ樹脂、ビスフェノールＳ型エポキシ樹脂、ビフェニル型エポキシ樹脂、ナフタレン型エポキシ樹脂、フェノールノボラック型エポキシ樹脂、クレゾールノボラック型エポキシ樹脂などが好適に用いられる。また、これらを変性させたエポキシ樹脂も用いられる。これらは単独で用いてもよく、２種以上を組み合わせて用いてもよい。   As the insulating resin 16 of the first embodiment, for example, an insulating thermosetting resin (for example, epoxy resin, urethane resin, acrylic resin, polyimide resin, polyamide resin, bismaleimide, phenol resin, polyester resin, silicone resin, Various resins such as oxetane resins can be used. These insulating thermosetting resins may be used alone or in combination of two or more. Among these, an epoxy resin is particularly preferable. As the epoxy resin, an epoxy resin selected from the group of bisphenol type epoxy resin, polyfunctional epoxy resin, flexible epoxy resin, brominated epoxy resin, glycidyl ester type epoxy resin and polymer type epoxy resin can also be used. Among them, for example, bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin, biphenyl type epoxy resin, naphthalene type epoxy resin, phenol novolac type epoxy resin, cresol novolac type epoxy resin and the like are preferably used. . Moreover, the epoxy resin which modified | denatured these is also used. These may be used alone or in combination of two or more.

また、場合によっては絶縁性熱可塑性樹脂（例えば、ポニフェニレンサルファイド（ＰＰＳ）、ポリカーボネイト、変性ポリフェニレンオキサイド（ＰＰＯ）など）を使用することもできる。また、絶縁性熱硬化性樹脂に絶縁性熱可塑性樹脂を混合したものなども使用できる。熱可塑性樹脂のみを使用する場合には、最初は加熱して一旦軟化させたのち、加熱を停止して自然冷却させることにより硬化させる。一方、絶縁性熱硬化性樹脂に熱可塑性樹脂を混合したものを使用する場合には、熱硬化性樹脂の方が支配的に機能するため、熱硬化性樹脂のみの場合と同様に加熱することにより硬化する。   In some cases, an insulating thermoplastic resin (for example, poniphenylene sulfide (PPS), polycarbonate, modified polyphenylene oxide (PPO), etc.) can also be used. Moreover, what mixed the insulating thermoplastic resin in the insulating thermosetting resin etc. can be used. When only a thermoplastic resin is used, it is first softened by heating, and then cured by stopping the heating and allowing it to cool naturally. On the other hand, when using a mixture of an insulating thermosetting resin and a thermoplastic resin, the thermosetting resin functions more dominantly, so heat it in the same way as with the thermosetting resin alone. To cure.

ここでは、代表例として絶縁性熱硬化性樹脂を用いた場合について、以下の説明を続ける。   Here, the following description is continued about the case where an insulating thermosetting resin is used as a representative example.

上記のような絶縁性熱硬化性樹脂と組み合わせて用いる硬化剤としては、チオール系化合物、変性アミン系化合物、多官能フェノール系化合物、イミダゾール系化合物、および酸無水物系化合物の群から選ばれる化合物を用いることができる。これらは単独で用いてもよく、２種以上を組み合わせて用いてもよい。   The curing agent used in combination with the insulating thermosetting resin as described above is a compound selected from the group of thiol compounds, modified amine compounds, polyfunctional phenol compounds, imidazole compounds, and acid anhydride compounds. Can be used. These may be used alone or in combination of two or more.

次に、図１（ｂ）に示すように、電子部品搭載装置において、部品保持部材の先端の熱せられた位置合わせツールにより、上記前工程でバンプ１３が電極部１２上に形成されたＩＣチップ１１を吸着保持しつつ、そのＩＣチップ１１を、上記前工程で準備された回路基板１４に対して、ＩＣチップ１１に形成されたバンプ１３が対応する回路基板１４の電極部１５上に位置するように位置合わせした後、ＩＣチップ１１を回路基板１４に押圧実装する。この位置合わせは、公知の位置認識動作を使用する。   Next, as shown in FIG. 1B, in the electronic component mounting apparatus, the IC chip in which the bump 13 is formed on the electrode portion 12 in the previous step by the heated alignment tool at the tip of the component holding member. The bumps 13 formed on the IC chip 11 are positioned on the corresponding electrode portions 15 of the circuit board 14 with respect to the circuit board 14 prepared in the previous step. After the alignment, the IC chip 11 is pressed and mounted on the circuit board 14. This alignment uses a known position recognition operation.

このときに押圧実装する際の荷重は、バンプ１３の頭部が回路基板１４の電極部１５に届いていれば良く、バンプ１３の頭部が多少は変形する程度の低い荷重でも良い。位置合わせツールにより加熱も行うのは、電極部１５が形成された回路基板１４上に絶縁性樹脂１６を貼り付ける場合と同様に、ＩＣチップ１１の接合面に絶縁性樹脂１６を貼り付けるためである。   The load at the time of pressing and mounting is not limited as long as the heads of the bumps 13 reach the electrode portions 15 of the circuit board 14, and may be loads low enough to deform the heads of the bumps 13 to some extent. The heating is also performed by the alignment tool because the insulating resin 16 is attached to the bonding surface of the IC chip 11 in the same manner as when the insulating resin 16 is attached to the circuit board 14 on which the electrode portion 15 is formed. is there.

なお、図１（ｂ）において、ＩＣチップ１１と回路基板１４を位置合わせする工程が、本発明の実装ステップの一例にあたる。また、ＩＣチップ１１に形成されたバンプ１３と対向する位置に位置合わせされる回路基板１４の電極部１５が、本発明の対向電極の一例にあたる。   In FIG. 1B, the process of aligning the IC chip 11 and the circuit board 14 corresponds to an example of the mounting step of the present invention. Moreover, the electrode part 15 of the circuit board 14 aligned with the position facing the bump 13 formed on the IC chip 11 corresponds to an example of the counter electrode of the present invention.

次に、図１（ｃ）に示すように、加熱加圧ツール１０を用いてＩＣチップ１１の上から加熱加圧をし、ＩＣチップ１１と回路基板１４の間の絶縁性樹脂１６を硬化させる。   Next, as shown in FIG. 1C, heat and pressure are applied from above the IC chip 11 using the heating and pressing tool 10 to cure the insulating resin 16 between the IC chip 11 and the circuit board 14. .

このときの加熱の温度は、絶縁性樹脂１６が硬化する温度以上に設定する。   The heating temperature at this time is set to be equal to or higher than the temperature at which the insulating resin 16 is cured.

また、このときの加圧は、ＩＣチップ１１の電極部１２と回路基板１４の電極部１５との間のバンプ１３を介した接触抵抗を低抵抗にするために、上記した実装工程における荷重よりも高い加圧が必要である。このとき、バンプ１３は、その頭部が、回路基板１４の電極部１５上で変形されながら押しつけられていく。ＩＣチップ１１を介してバンプ１３側に印加する荷重は、バンプ１３の外径により異なるが、バンプ１３の頭部が、必ず変形する程度の荷重を加えることが必要である。この荷重は、最低で２０（ｇｆ／バンプ１ケあたり）であるのが好ましい。このときにＩＣチップ１１を介してバンプ１３側に印加する荷重の上限は、ＩＣチップ１１、バンプ１３、回路基板１４などが損傷しない程度とする。   Further, the pressurization at this time is less than the load in the mounting process described above in order to reduce the contact resistance through the bump 13 between the electrode part 12 of the IC chip 11 and the electrode part 15 of the circuit board 14. High pressurization is necessary. At this time, the bump 13 is pressed while its head is deformed on the electrode portion 15 of the circuit board 14. The load applied to the bump 13 side via the IC chip 11 varies depending on the outer diameter of the bump 13, but it is necessary to apply a load to the extent that the head of the bump 13 is deformed. This load is preferably at least 20 (gf / per bump). At this time, the upper limit of the load applied to the bump 13 side via the IC chip 11 is set such that the IC chip 11, the bump 13, the circuit board 14, etc. are not damaged.

なお、図１（ｃ）において、絶縁性樹脂１６を硬化させてＩＣチップ１１と回路基板１４を接合する工程が、本発明の接合ステップの一例にあたる。   In FIG. 1C, the process of curing the insulating resin 16 and bonding the IC chip 11 and the circuit board 14 is an example of the bonding step of the present invention.

図１に示したように、本実施の形態１の絶縁性樹脂１６は、その上面の面積をＩＣチップの接着面よりも小さくしているので、図１１に示すような端面が略垂直な直方体形状の従来の絶縁性樹脂シート１０６を使用する場合に比べて、回路基板１４に対してＩＣチップ１１を下降させる際にＩＣチップ１１の接着面が最初に絶縁性樹脂シート１０６と接触する面積が小さくなるので、その際にＩＣチップ１１の接着面との間で発生する気泡の量が従来よりも少なくなる。   As shown in FIG. 1, the insulating resin 16 according to the first embodiment has an upper surface area smaller than the bonding surface of the IC chip, so that a rectangular parallelepiped whose end face is substantially vertical as shown in FIG. Compared to the case where the conventional insulating resin sheet 106 having a shape is used, when the IC chip 11 is lowered with respect to the circuit board 14, the area where the bonding surface of the IC chip 11 first contacts the insulating resin sheet 106 is larger. Therefore, the amount of air bubbles generated between the IC chip 11 and the bonding surface at that time is smaller than that in the prior art.

また、本実施の形態１の絶縁性樹脂１６は、回路基板１４と接触している底面の方が上面の面積よりも大きく、回路基板１４に対してＩＣチップ１１を下降させるにしたがってＩＣチップ１１の接触面と接触する部分の面積が大きくなるような形状としているので、ＩＣチップ１１の接着面が最初に絶縁性樹脂シート１０６と接触した後、さらにＩＣチップ１１を下降させていく際にも、ＩＣチップ１１の接着面との間で気泡が咬み込み難い。   Further, the insulating resin 16 according to the first embodiment has a bottom surface in contact with the circuit board 14 larger than the area of the top surface, and the IC chip 11 is lowered as the IC chip 11 is lowered with respect to the circuit board 14. Since the area of the contact portion with the contact surface of the IC chip 11 is increased, the adhesion surface of the IC chip 11 first contacts the insulating resin sheet 106 and then the IC chip 11 is further lowered. It is difficult for air bubbles to bite between the adhesive surface of the IC chip 11.

したがって、本実施の形態１の形状の絶縁性樹脂１６を用いることにより、電子部品と絶縁性樹脂の間に発生する気泡の量を従来よりも低減できる。   Therefore, by using the insulating resin 16 having the shape of the first embodiment, the amount of bubbles generated between the electronic component and the insulating resin can be reduced as compared with the conventional case.

また、接合工程によりＩＣチップ１１を回路基板１４に接合した後に、絶縁性樹脂がＩＣチップ１１の外形よりもはみ出すフィレットの量も、従来の絶縁性樹脂シート１０６を用いる場合よりも少なくなる。   In addition, after the IC chip 11 is bonded to the circuit board 14 by the bonding process, the amount of fillet that protrudes from the outer shape of the IC chip 11 after the insulating resin is bonded is also smaller than when the conventional insulating resin sheet 106 is used.

絶縁性樹脂の形状は、図１および図２に示したような絶縁性樹脂１６の形状に限らず、ＩＣチップ１１を下降させたときにＩＣチップ１１の接触面と最初に接する部分の面積がＩＣチップ１１の接触面よりも小さく、ＩＣチップ１１を下降させていくにしたがってＩＣチップ１１の接触面と接触する部分の面積が大きくなっていくような形状であれば、上記と同様の効果が得られる。   The shape of the insulating resin is not limited to the shape of the insulating resin 16 as shown in FIGS. 1 and 2, and the area of the portion that first contacts the contact surface of the IC chip 11 when the IC chip 11 is lowered is as follows. If the shape is smaller than the contact surface of the IC chip 11 and the area of the portion in contact with the contact surface of the IC chip 11 increases as the IC chip 11 is lowered, the same effect as described above can be obtained. can get.

図４および図５に、本発明の上記した効果が得られる絶縁性樹脂の形状の例を示している。   4 and 5 show examples of the shape of the insulating resin that can obtain the above-described effects of the present invention.

図４（ａ）および図５（ａ）は、絶縁性樹脂の上面図を示しており、図４（ｂ）および（ｃ）、図５（ｂ）〜（ｅ）は、絶縁性樹脂の側面図を示している。   4 (a) and 5 (a) are top views of the insulating resin, and FIGS. 4 (b) and 4 (c) and FIGS. 5 (b) to 5 (e) are side views of the insulating resin. The figure is shown.

なお、ここに示す絶縁性樹脂の形状は一例であって、本発明の絶縁性樹脂はこれらの形状に限られるものではない。   In addition, the shape of the insulating resin shown here is an example, and the insulating resin of the present invention is not limited to these shapes.

本実施の形態１の上記の説明では、絶縁性樹脂１６の形状を四角錐台形状として説明したが、例えば楕円錐台形状でもあってもよい。つまり、断面図が図１で、上面図が図４（ａ）に示すような形状の楕円錐台形状としてもよい。   In the above description of the first embodiment, the shape of the insulating resin 16 has been described as a quadrangular frustum shape, but may be, for example, an elliptic frustum shape. That is, an elliptic frustum shape having a cross-sectional view as shown in FIG. 1 and a top view as shown in FIG.

また、四角錐台形状に限らず、さらに多角形の角錐台形状であってもよいし、上面図が真円となる円錐台形状であってもよい。   Further, the shape is not limited to a quadrangular pyramid shape, and may be a polygonal truncated pyramid shape or a truncated cone shape whose top view is a perfect circle.

また、下部が角柱形状で、上部にその角柱形状に連続する角錐台形状を有するような形状であってもよい。つまり、上面図が図２で、側面図が図４（ｂ）に示すような形状である。   Further, the shape may be such that the lower part has a prism shape and the upper part has a truncated pyramid shape continuous with the prism shape. That is, the top view is a shape as shown in FIG. 2 and the side view is a shape as shown in FIG.

同様に、下部が楕円柱形状で、上部にその楕円柱形状に連続する楕円錐台形状を有するような形状であってもよい。つまり、上面図が図４（ａ）で、側面図が図４（ｂ）に示すような形状である。   Similarly, the lower part may have an elliptic cylinder shape and the upper part may have an elliptic frustum shape continuous with the elliptic cylinder shape. That is, the top view is a shape as shown in FIG. 4A and the side view is a shape as shown in FIG.

さらに、図４（ｃ）の側面図で示されるような、２つの底面積の異なる角柱の間に、それらの角柱に連続する角錐台が接続されるような形状や、２つの底面積の異なる楕円柱の間に、それらの楕円柱に連続する楕円錐台が接続されるような形状であってもよい。   Further, as shown in the side view of FIG. 4 (c), a shape in which a truncated pyramid connected to the prisms is connected between two prisms with different bottom areas, and the two bottom areas are different. A shape in which an elliptic frustum continuous to the elliptic cylinders is connected between the elliptic cylinders may be used.

また、ＩＣチップ１１に接する側の上面が無い（上面の面積がゼロである）ような形状であってもよい。すなわち、図１および図２で示した四角錐台形状が有しているような上面を有していない、錐体形状などであってもよい。   Alternatively, the shape may be such that there is no upper surface on the side in contact with the IC chip 11 (the area of the upper surface is zero). That is, it may be a pyramid shape that does not have an upper surface that the square frustum shape shown in FIGS. 1 and 2 has.

例えば、図５（ａ）の上面図および図５（ｂ）の側面図で示されるような四角錐形状であってもよいし、側面図が図５（ｂ）で、上面図が楕円となるような、楕円錐形状であってもよい。また、四角錐よりもさらに多角形の角錐形状であってもよい。   For example, it may be a quadrangular pyramid shape as shown in the top view of FIG. 5A and the side view of FIG. 5B, or the side view is an ellipse in FIG. 5B. Such an elliptical cone shape may be used. Further, it may be a polygonal pyramid shape rather than a quadrangular pyramid.

また、側面が図５（ｃ）で表されるような、角柱または楕円柱に、角錐または楕円錐が連続して接続されるような形状であってもよい。   Further, the side surface may be a shape in which a pyramid or an elliptical cone is continuously connected to a prism or an elliptical column as shown in FIG.

また、側面が図５（ｄ）で表されるような、平面と湾曲面で構成されるような形状であってもよい。また、側面が図５（ｅ）で示されるような、円柱や角柱形状に図５（ｄ）で示したような形状が連続して接続されるような形状であってもよい。   Moreover, the shape where a side surface is comprised with a plane and a curved surface as represented in FIG.5 (d) may be sufficient. Moreover, the shape as shown in FIG.5 (d) may be continuously connected to a cylinder or a prismatic shape as a side surface is shown in FIG.5 (e).

また、本実施の形態１の絶縁性樹脂のＩＣチップ１１に接する側の上面の面積は、ＩＣチップ１１に形成されたバンプ１３の配置に関わらず、小さいほどよい。   In addition, the area of the upper surface of the insulating resin of Embodiment 1 on the side in contact with the IC chip 11 is preferably as small as possible regardless of the arrangement of the bumps 13 formed on the IC chip 11.

図６（ａ）〜（ｄ）に、さまざまなＩＣチップの下面図を示す。   6A to 6D are bottom views of various IC chips.

それぞれの下面図には、バンプを黒丸で示し、ＩＣチップの下面のうち、バンプが配置されていない領域を二点鎖線で囲んで示している。   In each bottom view, the bumps are indicated by black circles, and the region where the bumps are not disposed on the bottom surface of the IC chip is surrounded by a two-dot chain line.

絶縁性樹脂がＩＣチップの下面に最初に接する面、例えば、図１で示すような四角錐台の形状の場合の上面が、図６（ａ）〜（ｄ）の二点鎖線で囲んだ領域内となるような面積である絶縁性樹脂とし、その上面部分がＩＣチップの二点鎖線で囲んだ領域内の対向する位置となるように、回路基板上に配置するのが望ましい。   The area where the insulating resin first comes into contact with the lower surface of the IC chip, for example, the upper surface in the case of a quadrangular pyramid shape as shown in FIG. 1, is surrounded by a two-dot chain line in FIGS. It is desirable that the insulating resin has an inner area, and the upper surface portion thereof is disposed on the circuit board so that the upper surface portion is located in an opposite position within a region surrounded by a two-dot chain line of the IC chip.

図６（ａ）〜（ｃ）は、ＩＣチップの外周部の全辺にバンプが存在する例を示しており、それらのバンプの配置により、図６（ａ）〜（ｃ）の順に二点鎖線で囲まれる範囲が小さくなっている。図６（ａ）のようなバンプ配置のＩＣチップでは、絶縁性樹脂の上面の面積を比較的大きくしてもよいが、図６（ｃ）のようなバンプ配置のＩＣチップでは、絶縁性樹脂の上面の面積をかなり小さくする必要があり、この場合、例えば図５（ｂ）に側面図を示したような四角錐形状とするのが望ましい。   FIGS. 6A to 6C show an example in which bumps exist on all sides of the outer peripheral portion of the IC chip, and two points are arranged in the order of FIGS. 6A to 6C depending on the arrangement of the bumps. The area enclosed by the chain line is smaller. In the IC chip with the bump arrangement as shown in FIG. 6A, the area of the upper surface of the insulating resin may be relatively large. However, with the IC chip with the bump arrangement as shown in FIG. In this case, for example, a quadrangular pyramid shape as shown in the side view of FIG. 5B is desirable.

また、図６（ｄ）のように、ＩＣチップの外周部の２辺にしかバンプが存在しないときは、その辺に対応する側の絶縁性樹脂の端面のみ傾斜させるような形状としてもよい。つまり、バンプが配置されていない２辺に対応する側の絶縁性樹脂の端面は、従来のように略垂直な形状としてもよい。   Further, as shown in FIG. 6D, when bumps are present only on the two sides of the outer periphery of the IC chip, only the end face of the insulating resin on the side corresponding to the sides may be inclined. That is, the end surface of the insulating resin on the side corresponding to the two sides where the bumps are not arranged may be substantially vertical as in the conventional case.

（実施の形態２）
次に、本発明の実施の形態２にかかる電子部品、例えばＩＣチップを回路基板に接合して作製する実装構造体の製造方法を、以下に説明する。 (Embodiment 2)
Next, a method for manufacturing a mounting structure in which an electronic component, for example, an IC chip according to the second embodiment of the present invention is manufactured by bonding to a circuit board will be described below.

図７（ａ）〜（ｃ）に、本実施の形態２の実装構造体の製造方法を説明するための断面模式図を示す。なお、図１と同じ構成部分には、同じ符号を用いている。   7A to 7C are schematic cross-sectional views for explaining the method for manufacturing the mounting structure according to the second embodiment. In addition, the same code | symbol is used for the same component as FIG.

本実施の形態２では、製造装置等は図１に示した実施の形態１の場合と同様の物が用いられるが、使用する絶縁性樹脂のみが実施の形態１の場合と異なる。   In the second embodiment, the manufacturing apparatus and the like are the same as those in the first embodiment shown in FIG. 1, but only the insulating resin used is different from that in the first embodiment.

図８に、本実施の形態２の絶縁性樹脂の、ＩＣチップ１１側から見た上面図を示す。   FIG. 8 shows a top view of the insulating resin according to the second embodiment as viewed from the IC chip 11 side.

本実施の形態２で使用する絶縁性樹脂２０、２１は、図７（ａ）および図８に示すように、その外形形状は、実施の形態１の絶縁性樹脂１６同様の四角錐台形状であるが、粘度の異なる２層構造となっている。   As shown in FIGS. 7A and 8, the outer shape of the insulating resins 20 and 21 used in the second embodiment is a quadrangular frustum shape similar to the insulating resin 16 of the first embodiment. There is a two-layer structure with different viscosities.

本実施の形態２の絶縁性樹脂は、ＩＣチップ１１と接する側に、絶縁性樹脂２０よりも低粘度の絶縁性樹脂２１の層が配置されている。   In the insulating resin according to the second embodiment, a layer of an insulating resin 21 having a lower viscosity than the insulating resin 20 is disposed on the side in contact with the IC chip 11.

実施の形態１とは、使用する絶縁性樹脂が異なるのみで、実装構造体の製造方法は同じであるので、製造方法の説明については省略する。   Since only the insulating resin used differs from Embodiment 1, and the manufacturing method of a mounting structure is the same, description of a manufacturing method is abbreviate | omitted.

ＩＣチップ１１側にはバンプ１３があるため、ＩＣチップ１１側の方が回路基板１４側よりも凹凸が多い。樹脂の粘度が低い方がより気泡が抜けやすいので、図８に示すような、凹凸の多いＩＣチップ１１側に低粘度の絶縁性樹脂２１を配置した２層構造とすることにより、実施の形態１の１層構造における絶縁性樹脂１６として絶縁性樹脂２０と同等の粘度の絶縁性樹脂を用いた場合に比べてさらに大きな効果が得られる。   Since there are bumps 13 on the IC chip 11 side, the IC chip 11 side has more irregularities than the circuit board 14 side. Since the bubbles are easier to escape when the viscosity of the resin is lower, the two-layer structure in which the low-viscosity insulating resin 21 is arranged on the side of the IC chip 11 with many irregularities as shown in FIG. As compared with the case where the insulating resin 16 having the same viscosity as that of the insulating resin 20 is used as the insulating resin 16 in the one-layer structure of 1, a greater effect can be obtained.

なお、絶縁性樹脂２０と絶縁性樹脂２１は、全く同じ材料組成で粘度だけ変わっていてもよく、違う組成の材料でもよい。好ましくは、樹脂硬化後の物性が異ならないよう同じ組成である方がよい。   The insulating resin 20 and the insulating resin 21 may have the same material composition but change in viscosity, or may have different compositions. Preferably, it is better to have the same composition so that the physical properties after resin curing are not different.

また、絶縁性樹脂２０の粘度は、一般的な樹脂シートの粘度でよく、ずり粘弾性測定装置で測定して、１０４〜１０６Ｐａ・ｓ（３０℃）であり、絶縁性樹脂２１の粘度は絶縁性樹脂２０より低ければよく、好ましくは絶縁性樹脂２０の粘度より一桁低い方がよい。 Moreover, the viscosity of the insulating resin 20 may be the viscosity of a general resin sheet, which is 10 4 to 10 6 Pa · s (30 ° C.) as measured by a shear viscoelasticity measuring device. The viscosity should be lower than that of the insulating resin 20, and preferably one order of magnitude lower than that of the insulating resin 20.

また、図７および図８では、２種類の粘度の異なる層構造の絶縁性樹脂の例を説明したが、３種類以上の粘度の異なる複数層構造の絶縁性樹脂でもよい。   7 and 8, two examples of insulating resins having a layer structure with different viscosities have been described, but three or more types of insulating resins having a multi-layer structure having different viscosities may be used.

図９（ａ）に、粘度の異なる３種類の層構造の絶縁性樹脂を用いた実装構造体の貼り付け工程時の断面模式図を示し、図９（ｂ）に、その３層構造の絶縁性樹脂のＩＣチップ１１側から見た上面図を示す。   FIG. 9A shows a schematic cross-sectional view of the mounting structure using the insulating resin having three types of layer structures having different viscosities, and FIG. 9B shows the insulation of the three-layer structure. The top view seen from the IC chip 11 side of the functional resin is shown.

３層のうち、回路基板１４に接する側の絶縁性樹脂２２の層と、ＩＣチップ１１に接する側の絶縁性樹脂２３の層に挟まれる真ん中の層の絶縁性樹脂２４の粘度が最も高く、ＩＣチップ１１に接する側の絶縁性樹脂２３の粘度が最も低い。   Of the three layers, the viscosity of the insulating resin 24 in the middle layer sandwiched between the insulating resin 22 layer in contact with the circuit board 14 and the insulating resin 23 layer in contact with the IC chip 11 is the highest, The viscosity of the insulating resin 23 on the side in contact with the IC chip 11 is the lowest.

このように、絶縁性樹脂を３層以上で構成する場合、ＩＣチップ１１にも回路基板１４にも接しない層（図９における絶縁性樹脂２４の層）の絶縁性樹脂層の粘度は特に制限されないが、好ましくは樹脂内部からの気泡の発生を抑えられるよう高い粘度の方がよい。   Thus, when the insulating resin is composed of three or more layers, the viscosity of the insulating resin layer of the layer that does not contact the IC chip 11 or the circuit board 14 (the layer of the insulating resin 24 in FIG. 9) is particularly limited. However, it is preferable to have a high viscosity so as to suppress the generation of bubbles from the inside of the resin.

ＩＣチップ１１や回路基板１４などの被着体と接する部分の絶縁性樹脂の粘度を低くすることで、これらの被着体との界面に残る気泡を減らすことができる。図８に示した２層構造の場合には、ＩＣチップ１１側のみに低粘度の絶縁性樹脂２１を配置したのに対し、図９に示した３層構造の場合には、ＩＣチップ１１側および回路基板１４側の両側に低粘度の絶縁性樹脂２３および２２を配置しているので、２層構造の絶縁性樹脂を用いた場合よりも、さらに大きな効果が得られる。   By reducing the viscosity of the insulating resin in the portion in contact with the adherend such as the IC chip 11 and the circuit board 14, bubbles remaining at the interface with the adherend can be reduced. In the case of the two-layer structure shown in FIG. 8, the low viscosity insulating resin 21 is arranged only on the IC chip 11 side, whereas in the case of the three-layer structure shown in FIG. Since the low-viscosity insulating resins 23 and 22 are arranged on both sides on the circuit board 14 side, a greater effect can be obtained than when a two-layer insulating resin is used.

なお、各実施の形態では、図１（ｂ）や図７（ｂ）において、ＩＣチップ１１を回路基板１４に位置合わせする工程では、絶縁性樹脂がＩＣチップ１１の接着面に接触していないものとして示しているが、位置合わせする工程において、絶縁性樹脂がＩＣチップ１１の接着面に接触してもよい。   In each embodiment, the insulating resin is not in contact with the bonding surface of the IC chip 11 in the step of aligning the IC chip 11 with the circuit board 14 in FIGS. 1B and 7B. Although shown as a thing, an insulating resin may contact the adhesion surface of the IC chip 11 in the alignment step.

また、各実施の形態では、位置合わせおよび接合する際に、ＩＣチップ１１を下降させると説明したが、回路基板１４に対してＩＣチップ１１が相対的に下降すればよく、例えば回路基板１４が上昇してもよいし、ＩＣチップ１１が下降すると同時に回路基板１４が上昇するような動作であってもよい。   Further, in each embodiment, it has been described that the IC chip 11 is lowered when aligning and bonding. However, the IC chip 11 may be lowered relative to the circuit board 14. The operation may be such that the circuit board 14 is raised at the same time as the IC chip 11 is lowered.

上記したように、本発明の実装構造体の製造方法は、電子部品と回路基板間で、それぞれを接着固定する面の絶縁性樹脂の形状を異なるものとし、具体的には、絶縁性樹脂の形状を回路基板側の面の面積より電子部品側の面の面積の方が小さく、かつ電子部品の面積より小さくしたものである。   As described above, the method for manufacturing a mounting structure according to the present invention is such that the shape of the insulating resin on the surface to which each of the electronic component and the circuit board is bonded and fixed is different. The shape is such that the area of the surface on the electronic component side is smaller than the area of the surface on the circuit board side and smaller than the area of the electronic component.

このように絶縁性樹脂の形状を従来から変更することで、電子部品と絶縁性樹脂間に発生する気泡の量が低減される上、絶縁性樹脂全体の量を減らすことが出来るため、電子部品からフィレットとしてはみ出す量も削減される。   In this way, by changing the shape of the insulating resin from the past, the amount of bubbles generated between the electronic component and the insulating resin can be reduced, and the total amount of the insulating resin can be reduced. The amount that protrudes as a fillet is also reduced.

本発明の実装構造体の製造方法は、現行の実装工程を大きく変えることなく、電子部品と絶縁性樹脂の間に発生する気泡を減らすことができ、絶縁性樹脂を介して電子部品と回路基板を電気的に接合した電子部品実装構造体に汎用的に適用できるものである。   The manufacturing method of the mounting structure of the present invention can reduce bubbles generated between the electronic component and the insulating resin without greatly changing the current mounting process, and the electronic component and the circuit board via the insulating resin. It can be applied universally to an electronic component mounting structure in which are electrically joined.

次に、本発明の効果について、具体例を用いて以下に説明する。   Next, the effects of the present invention will be described below using specific examples.

本発明の電子部品の一例であるＩＣチップとして、厚み１５０μｍ、１０ｍｍ□Ｓｉの四辺にＡｌパッドの電極（サイズは７０×７０μｍ）が各辺１２０個あるものを使用する。そのＩＣチップの電極のうち、各辺１ｍｍ間隔にあたる電極にΦ２５μｍのＡｕ線を用いて、電極接合部の直径５０μｍ、高さ６５μｍ（先端にいくほど径が小さくなり、先端は尖っている）のバンプを作成した。このようにして、ＩＣチップの各辺に１０個のバンプを形成した。   As an IC chip as an example of the electronic component of the present invention, an IC chip having a thickness of 150 μm and 10 mm □ Si having Al pad electrodes (size: 70 × 70 μm) on each side is 120 pieces. Among the electrodes of the IC chip, using a Φ25 μm Au wire for the electrodes that are 1 mm apart on each side, the electrode joint has a diameter of 50 μm and a height of 65 μm (the diameter decreases toward the tip, and the tip is pointed). Created a bump. In this way, ten bumps were formed on each side of the IC chip.

このＩＣチップの下面図を、図１０（ａ）〜（ｃ）に示す。   10A to 10C are bottom views of the IC chip.

図１０（ａ）〜（ｃ）に示す黒丸は、バンプの位置を示している。このように、バンプがＩＣチップの四辺に１０個ずつ配置されている。   The black circles shown in FIGS. 10A to 10C indicate the positions of the bumps. In this way, ten bumps are arranged on each of the four sides of the IC chip.

回路基板には、ＡＬＩＶＨ基板で厚み３４０μｍのものを用い、上記ＩＣチップの各電極に対応する箇所に、４０μｍ□サイズで、Ｃｕの下地にＮｉとフラッシュＡｕメッキによる電極を設けたものを使用した。なお、回路基板の電極の中心とＩＣチップの電極の中心が一致するように設計されている。   As the circuit board, an ALIVH board having a thickness of 340 μm was used, and a part corresponding to each electrode of the IC chip having a size of 40 μm □ and an electrode made of Ni and flash Au plating on a Cu base was used. . The center of the electrode of the circuit board is designed so that the center of the electrode of the IC chip coincides.

比較例、実施例１〜４用の絶縁性樹脂として、エポキシ樹脂にイミダゾール系の硬化剤と粒子径１〜１０μｍのシリカ（ＳｉＯ２）を重量％で５０％混合したものを用いた。 As an insulating resin for Comparative Examples and Examples 1 to 4, an epoxy resin mixed with 50% by weight of an imidazole-based curing agent and silica (SiO 2 ) having a particle diameter of 1 to 10 μm was used.

実施例５用の絶縁性樹脂のうち、高い粘度の絶縁性樹脂として、エポキシ樹脂にイミダゾール系の硬化剤と粒子径１〜１０μｍのシリカ（ＳｉＯ２）を重量％で５０％混合した後、ずり粘弾性測定装置で測定した粘度が１０５Ｐａ・ｓ（３０℃）のものを、低粘度の絶縁性樹脂として、エポキシ樹脂にイミダゾール系の硬化剤と粒子径１〜１０μｍのシリカ（ＳｉＯ２）を重量％で５０％混合した後、ずり粘弾性測定装置で測定した粘度が１０４Ｐａ・ｓ（３０℃）のものを、それぞれ使用した。 Among the insulating resins for Example 5, as an insulating resin having a high viscosity, 50% by weight of imidazole-based curing agent and silica having a particle diameter of 1 to 10 μm (SiO 2 ) were mixed with epoxy resin, and then sheared. An epoxy resin having an viscosity of 10 5 Pa · s (30 ° C.) measured with a viscoelasticity measuring apparatus is used as an epoxy resin, an imidazole-based curing agent, and silica (SiO 2 ) having a particle diameter of 1 to 10 μm. After mixing 50% by weight, those having a viscosity measured by a shear viscoelasticity measuring device of 10 4 Pa · s (30 ° C.) were used.

実施例６用の絶縁性樹脂のうち、高い粘度の絶縁性樹脂として、エポキシ樹脂にイミダゾール系の硬化剤と粒子径１〜１０μｍのシリカ（ＳｉＯ２）を重量％で５０％混合した後、ずり粘弾性測定装置で測定した粘度が１０５Ｐａ・ｓ（３０℃）のものを、低粘度の絶縁性樹脂として、エポキシ樹脂にイミダゾール系の硬化剤と粒子径１〜１０μｍのシリカ（ＳｉＯ２）を重量％で５０％混合した後、ずり粘弾性測定装置で測定した粘度が１０４Ｐａ・ｓ（３０℃）のものを、上記２つの絶縁性樹脂の間の層に挟む絶縁性樹脂として、エポキシ樹脂にイミダゾール系の硬化剤と粒子径１〜１０μｍのシリカ（ＳｉＯ２）を重量％で５０％混合した後、ずり粘弾性測定装置で測定した粘度が１０６Ｐａ・ｓ（３０℃）のものを、それぞれ使用した。 Among the insulating resins for Example 6, as an insulating resin having a high viscosity, after mixing 50% by weight of imidazole-based curing agent and silica (SiO 2 ) having a particle diameter of 1 to 10 μm with epoxy resin, shearing is performed. An epoxy resin having an viscosity of 10 5 Pa · s (30 ° C.) measured with a viscoelasticity measuring apparatus is used as an epoxy resin, an imidazole-based curing agent, and silica (SiO 2 ) having a particle diameter of 1 to 10 μm. After mixing 50% by weight, an insulating resin having a viscosity measured by a shear viscoelasticity measuring apparatus of 10 4 Pa · s (30 ° C.) sandwiched between layers of the two insulating resins, After mixing 50% by weight of an imidazole-based curing agent and silica (SiO 2 ) having a particle diameter of 1 to 10 μm with an epoxy resin, the viscosity measured with a shear viscoelasticity measuring apparatus is 10 6 Pa · s (30 ° C.). Each one And use.

比較例、実施例１〜６のそれぞれにおいて、貼り付け機、実装機と加熱圧着機を用いて試料（実装構造体）を作成した。その後、ＩＣチップの上方から観て、ＩＣチップ側の面の絶縁性樹脂がはみ出ている最大長さをフィレット長として測定した。また、ＳＡＴ（超音波顕微鏡)にて気泡を観察し、ＩＣチップの面積に対して気泡の存在する面積を気泡の残存率として計算した後、電極部を断面観察し、電極部周辺の気泡の状態を１５箇所以上確認されたとき×、１０箇所以上１５箇所未満であれば△、５箇所以上１０箇所未満であれば○、５箇所未満であれば◎とした。その結果を表１に示す。   In each of the comparative examples and Examples 1 to 6, a sample (mounting structure) was prepared using a pasting machine, a mounting machine, and a thermocompression bonding machine. Thereafter, when viewed from above the IC chip, the maximum length of the insulating resin protruding from the surface on the IC chip side was measured as the fillet length. Also, after observing bubbles with an SAT (ultrasonic microscope) and calculating the area where the bubbles exist with respect to the area of the IC chip as the remaining rate of bubbles, the electrode part is cross-sectionally observed and the bubbles around the electrode part are observed. When the state was confirmed at 15 or more locations, it was evaluated as △ if it was 10 or more and less than 15 locations, ◯ if it was 5 or more and less than 10 locations, and ◎ if it was less than 5 locations. The results are shown in Table 1.

比較例、実施例１〜６のそれぞれにおける試料の作成方法は、以下の通りである。   The preparation method of the sample in each of the comparative example and Examples 1 to 6 is as follows.

（比較例）
図１１（ａ）の従来例のような端面が略垂直な直方体形状の構造となるよう、上記絶縁性樹脂を１１ｍｍ□サイズで厚み５０μｍにカットし、貼り付け機にて、貼り付け面が平坦なツールで７０℃に加熱しながら、回路基板に貼り付けた。 (Comparative example)
The insulating resin is cut to a thickness of 50 μm with an 11 mm □ size so that the end face has a substantially vertical rectangular parallelepiped structure as in the conventional example of FIG. It was affixed to the circuit board while heating to 70 ° C. with a simple tool.

その後、実装機にて、３０℃のツールを用い、１０Ｎの荷重で、ＩＣチップを回路基板上に貼り付けられた絶縁性樹脂の上に実装し、加熱圧着機にて、２１０℃のツールで５０Ｎ荷重をかけ、加熱加圧して試料を作成した。   After that, using a tool at 30 ° C with a mounting machine, the IC chip is mounted on an insulating resin affixed on the circuit board with a load of 10N, and with a tool at 210 ° C with a thermocompression bonding machine. A sample was prepared by applying a 50N load and heating and pressing.

（実施例１）
図１（ａ）および図２に示したような四角錐台形状にあらかじめ加工された上記絶縁性樹脂を、基板側の面積１１ｍｍ□サイズ、ＩＣチップ側の面積９ｍｍ□サイズで厚み５０μｍの状態で、貼り付け機にて、貼り付け面が平坦なツールで７０℃に加熱しながら、回路基板に貼り付けた。 Example 1
The insulating resin previously processed into a quadrangular pyramid shape as shown in FIGS. 1A and 2 is in a state of an area of 11 mm □ on the substrate side and an area of 9 mm □ on the IC chip side and a thickness of 50 μm. In the pasting machine, it was pasted on the circuit board while heating to 70 ° C. with a tool having a flat pasting surface.

その後、実装機にて、３０℃のツールを用い、１０Ｎの荷重で、ＩＣチップを回路基板上に貼り付けられた絶縁性樹脂の上に実装し、加熱圧着機にて、２１０℃のツールで５０Ｎ荷重をかけ、加熱加圧して試料を作成した。   After that, using a tool at 30 ° C with a mounting machine, the IC chip is mounted on an insulating resin affixed on the circuit board with a load of 10N, and with a tool at 210 ° C with a thermocompression bonding machine. A sample was prepared by applying a 50N load and heating and pressing.

（実施例２）
比較例１と同様な直方体形状の上記絶縁性樹脂を、１１ｍｍ□サイズで厚み５０μｍにカットし、貼り付け機にて、貼り付け面の中央が凹型になったツールで７０℃に加熱しながら、絶縁性樹脂が図１（ａ）および図２に示したような四角錐台形状で、ＩＣチップ側の面積が１０ｍｍ□以下になるよう回路基板に貼り付けた。つまり、この場合、図３（ｃ）に示した形成方法により、絶縁性樹脂を回路基板に貼り付けた。 (Example 2)
The above rectangular parallelepiped insulating resin as in Comparative Example 1 was cut to a thickness of 50 μm with a size of 11 mm □, and heated to 70 ° C. with a tool in which the center of the attachment surface was a concave shape, The insulating resin has a quadrangular pyramid shape as shown in FIGS. 1A and 2 and was attached to the circuit board so that the area on the IC chip side was 10 mm □ or less. That is, in this case, the insulating resin was attached to the circuit board by the forming method shown in FIG.

その後、実装機にて、３０℃のツールを用い、１０Ｎの荷重で、ＩＣチップを回路基板上に貼り付けられた絶縁性樹脂の上に実装し、加熱圧着機にて、２１０℃のツールで５０Ｎ荷重をかけ、加熱加圧して試料を作成した。   After that, using a tool at 30 ° C with a mounting machine, the IC chip is mounted on an insulating resin affixed on the circuit board with a load of 10N, and with a tool at 210 ° C with a thermocompression bonding machine. A sample was prepared by applying a 50N load and heating and pressing.

（実施例３）
図１（ａ）および図２に示したような四角錐台形状にあらかじめ加工された上記絶縁性樹脂を、基板側の面積１１ｍｍ□サイズ、ＩＣチップ側の面積５ｍｍ□サイズで厚み５０μｍの状態で、貼り付け機にて、貼り付け面が平坦なツールで７０℃に加熱しながら、回路基板に貼り付けた。 (Example 3)
The above-mentioned insulating resin previously processed into a quadrangular pyramid shape as shown in FIGS. 1A and 2 is in a state where the substrate side area is 11 mm □ size, the IC chip side area is 5 mm □ size and the thickness is 50 μm. In the pasting machine, it was pasted on the circuit board while heating to 70 ° C. with a tool having a flat pasting surface.

その後、実装機にて、３０℃のツールを用い、１０Ｎの荷重で、ＩＣチップを回路基板上に貼り付けられた絶縁性樹脂の上に実装し、加熱圧着機にて、２１０℃のツールで５０Ｎ荷重をかけ、加熱加圧して試料を作成した。   After that, using a tool at 30 ° C with a mounting machine, the IC chip is mounted on an insulating resin affixed on the circuit board with a load of 10N, and with a tool at 210 ° C with a thermocompression bonding machine. A sample was prepared by applying a 50N load and heating and pressing.

（実施例４）
図５（ａ）および（ｂ）に示したような四角錐形状にあらかじめ加工された上記絶縁性樹脂を、基板側の面積１１ｍｍ□サイズ、四角錐の高さ５０μｍの状態で、貼り付け機にて、貼り付け面が平坦なツールで７０℃に加熱しながら、回路基板に貼り付けた。 Example 4
The above-mentioned insulating resin previously processed into a quadrangular pyramid shape as shown in FIGS. 5 (a) and 5 (b) is applied to a pasting machine in a state where the area on the substrate side is 11 mm □ and the height of the quadrangular pyramid is 50 μm. Then, it was attached to the circuit board while being heated to 70 ° C. with a tool having a flat attachment surface.

その後、実装機にて、３０℃のツールを用い、１０Ｎの荷重で、ＩＣチップを回路基板上に貼り付けられた絶縁性樹脂の上に実装し、加熱圧着機にて、２１０℃のツールで５０Ｎ荷重をかけ、加熱加圧して試料を作成した。   After that, using a tool at 30 ° C with a mounting machine, the IC chip is mounted on an insulating resin affixed on the circuit board with a load of 10N, and with a tool at 210 ° C with a thermocompression bonding machine. A sample was prepared by applying a 50N load and heating and pressing.

（実施例５）
図７（ａ）および図８に示したような四角錐台形状で、上記の高い粘度の絶縁性樹脂の層（図７（ａ）の絶縁性樹脂２０の層）が２５μｍ、低い粘度の絶縁性樹脂層（図７（ａ）の絶縁性樹脂２１の層）が２５μｍで積層されたものを、回路基板側の面積１１ｍｍ□サイズ、ＩＣチップ側の面積９ｍｍ□サイズの状態で、貼り付け機にて、貼り付け面が平坦なツールで７０℃に加熱しながら、回路基板に貼り付けた。 (Example 5)
In the shape of a quadrangular pyramid as shown in FIGS. 7A and 8, the above-described high-viscosity insulating resin layer (the insulating resin 20 layer in FIG. 7A) has a thickness of 25 μm, and low-viscosity insulation. A laminating layer in which the conductive resin layer (the layer of the insulating resin 21 in FIG. 7A) is laminated with a thickness of 25 μm in a state of an area of 11 mm □ on the circuit board side and an area of 9 mm □ on the IC chip side Then, it was affixed to the circuit board while heating to 70 ° C. with a tool having a flat affixing surface.

その後、実装機にて、３０℃のツールを用い、１０Ｎの荷重で、ＩＣチップを回路基板上に貼り付けられた絶縁性樹脂の上に実装し、加熱圧着機にて、２１０℃のツールで５０Ｎ荷重をかけ、加熱加圧して試料を作成した。   After that, using a tool at 30 ° C with a mounting machine, the IC chip is mounted on an insulating resin affixed on the circuit board with a load of 10N, and with a tool at 210 ° C with a thermocompression bonding machine. A sample was prepared by applying a 50N load and heating and pressing.

（実施例６）
図９（ａ）および（ｂ）に示したような四角錐台形状で、上記の高い粘度の絶縁性樹脂の層（図９（ａ）の絶縁性樹脂２２の層）が２０μｍ、低い粘度の絶縁性樹脂層（図９（ａ）の絶縁性樹脂２３の層）が２０μｍ、２つの樹脂層の間に挟まれ最も粘度の高い絶縁性樹脂の層（図９（ａ）の絶縁性樹脂２４の層）が１０μｍで積層されたものを、回路基板側の面積１１ｍｍ□サイズ、ＩＣチップ側の面積９ｍｍ□サイズの状態で、貼り付け機にて、貼り付け面が平坦なツールで７０℃に加熱しながら、回路基板に貼り付けた。 (Example 6)
In the shape of a quadrangular pyramid as shown in FIGS. 9A and 9B, the above-described high-viscosity insulating resin layer (the insulating resin 22 layer in FIG. 9A) is 20 μm and has a low viscosity. The insulating resin layer (the layer of the insulating resin 23 in FIG. 9A) is 20 μm and is sandwiched between two resin layers, and the insulating resin layer having the highest viscosity (the insulating resin 24 in FIG. 9A). Layer) is laminated with a thickness of 10 μm at a circuit board side area of 11 mm □ size and an IC chip side area of 9 mm □ size. It was affixed to the circuit board while heating.

その後、実装機にて、３０℃のツールを用い、１０Ｎの荷重で、ＩＣチップを回路基板上に貼り付けられた絶縁性樹脂の上に実装し、加熱圧着機にて、２１０℃のツールで５０Ｎ荷重をかけ、加熱加圧して試料を作成した。   After that, using a tool at 30 ° C with a mounting machine, the IC chip is mounted on an insulating resin affixed on the circuit board with a load of 10N, and with a tool at 210 ° C with a thermocompression bonding machine. A sample was prepared by applying a 50N load and heating and pressing.

図１０のＩＣチップの下面図には、比較例および各実施例で、絶縁性樹脂に最初に接触する領域を示している。図１０（ａ）〜（ｃ）のそれぞれにおいて、二点鎖線で囲んだ部分が、絶縁性樹脂が最初に接触する領域を示している。   The bottom view of the IC chip in FIG. 10 shows a region that first contacts the insulating resin in the comparative example and each example. In each of FIGS. 10A to 10C, a portion surrounded by a two-dot chain line indicates a region where the insulating resin first contacts.

図１０（ａ）は、実施例１、実施例２、実施例５および実施例６において絶縁性樹脂が最初に接触する領域を示している。図１０（ｂ）は、実施例３において絶縁性樹脂が最初に接触する領域を示している。図１０（ｃ）は、実施例４において絶縁性樹脂が最初に接触する領域を示している。   FIG. 10A shows a region where the insulating resin first contacts in Example 1, Example 2, Example 5, and Example 6. FIG. FIG. 10B shows a region where the insulating resin first contacts in Example 3. FIG. 10C shows a region where the insulating resin first contacts in Example 4.

なお、比較例の場合には、ＩＣチップの接触面の全面に絶縁性樹脂が接触する。   In the case of the comparative example, the insulating resin contacts the entire contact surface of the IC chip.

Figure 2010267772
Figure 2010267772

表１の結果より、従来構造の比較例に対して、いずれの実施例においても気泡の量が減る効果が見られた。また、フィレットの寸方も短くなる効果が見られた。   From the results of Table 1, the effect of reducing the amount of bubbles was observed in any of the Examples compared to the comparative example of the conventional structure. Moreover, the effect that the dimension of a fillet becomes short was also seen.

実施例１、３および４の結果より、底面積が同じ四角錐台形状の絶縁性樹脂では、上面の面積が小さいほど、気泡の量を低減でき、フィレットの寸法も小さくなることがわかる。   From the results of Examples 1, 3 and 4, it can be seen that, in the insulating resin having a square pyramid shape with the same bottom area, the smaller the upper surface area, the smaller the amount of bubbles and the smaller the size of the fillet.

また、実施例１、５および６の結果より、同じ形状の絶縁性樹脂の場合、粘度が均一の絶縁性樹脂よりも、粘度が異なる複数の層で構成された絶縁性樹脂の方が、気泡の量を低減できるとともにフィレットの寸法も小さくでき、また、粘度が異なる２層で構成された絶縁性樹脂よりも、粘度が異なる３層で構成された絶縁性樹脂の方が、さらに、気泡の量を低減できるとともにフィレットの寸法も小さくできることがわかる。   Further, from the results of Examples 1, 5 and 6, in the case of the insulating resin having the same shape, the insulating resin composed of a plurality of layers having different viscosities is more bubble-like than the insulating resin having a uniform viscosity. In addition to the insulating resin composed of two layers having different viscosities, the insulating resin composed of three layers having different viscosities can further reduce the size of the fillet. It can be seen that the amount can be reduced and the size of the fillet can be reduced.

本発明に係る実装構造体の製造方法は、電子部品と絶縁性樹脂の間に発生する気泡の量を従来よりも低減できる効果を有し、インタポーザや電子部品が装着される他の部品などの被装着体に、ＩＣチップ、ＣＳＰ、ＭＣＭ、ＢＧＡや表面弾性波（ＳＡＷ）デバイスなどの電子部品を単体状態で実装する製造方法として有用である。   The method for manufacturing a mounting structure according to the present invention has an effect that the amount of bubbles generated between an electronic component and an insulating resin can be reduced as compared with the prior art, such as an interposer and other components to which the electronic component is mounted. This is useful as a manufacturing method for mounting electronic components such as IC chips, CSPs, MCMs, BGAs, and surface acoustic wave (SAW) devices in a single state on a mounted body.

１１、１０１ 電子部品（ＩＣチップ）
１２、１０２ 電子部品の電極部
１３、１０３ バンプ（Ａｕ）
１４、１０４ 回路基板
１５、１０５ 回路基板の電極部
１６、２２、２３、２４ 絶縁性樹脂
１７ カバーフィルム
１８ 剥離フィルム
１９ 絶縁性樹脂（直方体形状）
２０ 絶縁性樹脂（高粘度）
２１ 絶縁性樹脂（低粘度）
３０ 貼り付けツール
１０６ 絶縁性樹脂シート 11, 101 Electronic components (IC chip)
12, 102 Electrode part of electronic component 13, 103 Bump (Au)
14, 104 Circuit board 15, 105 Circuit board electrode part 16, 22, 23, 24 Insulating resin 17 Cover film 18 Peeling film 19 Insulating resin (cuboid shape)
20 Insulating resin (high viscosity)
21 Insulating resin (low viscosity)
30 Pasting tool 106 Insulating resin sheet

Claims (7)

シート状の絶縁性樹脂を回路基板上に形成する絶縁性樹脂配置ステップと、
電子部品の電極上に形成されたバンプが、前記回路基板の対向電極に相対するように、前記絶縁性樹脂の上から前記電子部品を位置合わせする実装ステップと、
加熱および加圧を行って、前記絶縁性樹脂を硬化させて前記電子部品と前記回路基板とを接合する接合ステップとを備えた実装構造体の製造方法であって、
前記絶縁性樹脂の上面および側面の少なくともいずれかの面の形状は、前記実装ステップで位置合わせする際または前記接合ステップで接合する際に前記電子部品を下降させるにしたがって、前記絶縁性樹脂の前記面と前記電子部品の下面との当接する部分が広がる形状を有している、実装構造体の製造方法。 An insulating resin placement step of forming a sheet-like insulating resin on the circuit board;
A mounting step of aligning the electronic component from above the insulating resin so that the bump formed on the electrode of the electronic component is opposed to the counter electrode of the circuit board;
A method for manufacturing a mounting structure comprising a step of heating and pressing to cure the insulating resin to join the electronic component and the circuit board,
The shape of at least one of the upper surface and the side surface of the insulating resin is such that when the electronic component is lowered during alignment in the mounting step or bonding in the bonding step, the shape of the insulating resin is increased. A method for manufacturing a mounting structure, wherein a portion where the surface abuts on the lower surface of the electronic component is widened. 前記絶縁性樹脂は、前記実装ステップで前記電子部品を位置合わせする前には、錐体形状、または、錐台形状、または、角柱の上に連続的に角錐が接続された形状、または、角柱の上に連続的に角錐台が接続された形状、または、楕円柱の上に連続的に楕円錐が接続された形状、または、楕円柱の上に連続的に楕円錐台が接続された形状を有しており、その頂点が前記電子部品側に向いている、請求項１に記載の実装構造体の製造方法。   The insulating resin has a pyramid shape, a frustum shape, or a shape in which pyramids are continuously connected on a prism, or a prism, before the electronic component is aligned in the mounting step. A shape in which a truncated pyramid is continuously connected on top, a shape in which an elliptical pyramid is continuously connected on an elliptical column, or a shape in which an elliptical frustum is continuously connected on an elliptical column The manufacturing method of the mounting structure according to claim 1, wherein the apex faces the electronic component side. 前記実装ステップまたは前記接合ステップで前記電子部品を下降させる際に、前記錐台または前記角錐台または前記楕円錐台の上面は、前記電子部品の電極に当たらない、請求項２に記載の実装構造体の製造方法。   The mounting structure according to claim 2, wherein when the electronic component is lowered in the mounting step or the joining step, an upper surface of the frustum, the truncated pyramid, or the elliptical frustum does not hit an electrode of the electronic component. Body manufacturing method. 前記絶縁性樹脂の上面は、前記実装ステップで前記電子部品を位置合わせする前には、前記電子部品に向かって凸部を有する湾曲面である、請求項１に記載の実装構造体の製造方法。   The method for manufacturing a mounting structure according to claim 1, wherein the upper surface of the insulating resin is a curved surface having a convex portion toward the electronic component before the electronic component is aligned in the mounting step. . 前記絶縁性樹脂配置ステップでは、平板状の絶縁性樹脂を、貼り付け面に傾斜面を有する貼り付けツールによって加熱しながら前記回路基板上に貼り付ける、請求項１〜４のいずれかに記載の実装構造体の製造方法。   The said insulating resin arrangement | positioning step affixes flat insulating resin on the said circuit board, heating with the sticking tool which has an inclined surface on a sticking surface. Manufacturing method of mounting structure. 前記絶縁性樹脂は、２層で構成されており、
前記回路基板に接している側の層は、前記電子部品側の層よりも粘度が高い、請求項１〜５のいずれかに記載の実装構造体の製造方法。 The insulating resin is composed of two layers,
The method for manufacturing a mounting structure according to claim 1, wherein the layer on the side in contact with the circuit board has a higher viscosity than the layer on the electronic component side. 前記絶縁性樹脂は、隣接する層の粘度が異なる３層以上で構成されており、
上面側および下面側以外の層は、前記上面側の層および前記下面側の層よりも粘度が高い、請求項１〜５のいずれかに記載の実装構造体の製造方法。 The insulating resin is composed of three or more layers having different viscosities of adjacent layers,
The method for manufacturing a mounting structure according to claim 1, wherein the layers other than the upper surface side and the lower surface side have higher viscosity than the upper surface layer and the lower surface layer.
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