JP2010251430A - Integrated photovoltaic element and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the efficiency of current collection regarding an integrated photovoltaic element or the like applicable to a thin film solar cell. <P>SOLUTION: The integrated photovoltaic element I for which a plurality of cells are connected in series includes: a substrate 10; a plurality of back surface electrode layers 11 formed on the substrate 10 and divided by first patterning having the shape of being projected to the side of another adjacent cell; a plurality of semiconductor layers 12 formed on the back surface electrode layers 11 so as to straddle two adjacent back surface electrode layers 11 and divided by division grooves 15; an electrode layer (transparent electrode layer) 13 formed on the divided semiconductor layers 12, respectively; and a current collecting end part 14 formed by second patterning in the shape following the first patterning dividing the back surface electrode layers 11 at least at a part of the semiconductor layers 12 to collect a current from another adjacent cell. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an integrated photovoltaic device and the like, and more particularly to an integrated photovoltaic device applicable to a thin film solar cell.

  Conventionally, a thin-film solar cell employs a manufacturing method in which a plurality of solar cells are dividedly formed on a substrate by patterning and an integrated structure is formed by connecting them in series (see Patent Documents 1 and 2). ). A solar cell module having an integrated structure has a predetermined voltage obtained by connecting a plurality of solar cells in series.

Japanese Examined Patent Publication No. 58-021827 Japanese Examined Patent Publication No. 62-005353

By the way, for example, a CIS-based thin film solar cell is usually manufactured by the following procedure.
FIG. 3 is a diagram illustrating a manufacturing process of a conventional CIS thin film solar cell. First, after the strip-shaped back electrode layer 2 is formed on the insulating substrate 1 (FIG. 3A), the semiconductor layer 3 is formed by sputtering or the like (FIG. 3B), and then Then, a part of the semiconductor layer 3 is removed in a stripe shape by a mechanical pattern method (FIG. 3C), and then a transparent electrode layer 4 is formed (FIG. 3D), and finally the transparent electrode layer 4 is formed. Dividing into strips by the dividing grooves 5, an integrated structure is formed (FIG. 3E).

Here, in the mechanical pattern method in the conventional manufacturing process, the semiconductor layer 3 is scribed linearly due to its property. For this reason, the distance between the current collecting end portion formed in a straight line and the adjacent cell is increased, the current collecting efficiency is low, and the power generation efficiency is not increased.
An object of the present invention is to increase the current collection efficiency of an integrated photovoltaic device.

Thus, the invention according to the following claims (1) to (10) is provided.
The invention according to claim 1 is an integrated photovoltaic device in which a plurality of cells are connected in series, and has a substrate and a shape formed on the substrate and protruding toward the other adjacent cells. A plurality of back electrode layers divided by patterning, and a plurality of semiconductor layers formed on the back electrode layer so as to straddle two adjacent back electrode layers and divided by dividing grooves Another cell adjacent to each other, formed by an electrode layer formed on each of the semiconductor layers, and a second patterning of a shape following the first patterning for dividing the back electrode layer into at least a part of the semiconductor layer An integrated photovoltaic device having a current collecting end for collecting current from the current collector.

The invention according to claim 2 is such that the second patterning of the current collecting end portion protrudes toward the other cell side so as to reduce a current collecting distance between the current collecting end portion and another adjacent cell. The integrated photovoltaic device according to claim 1, comprising:
The invention according to claim 3 is characterized in that the current collecting end portion includes a metal having a lower electric resistance than the semiconductor layer, and electrically connects the back electrode layer and the electrode layer. The integrated photovoltaic device according to claim 1 or 2.
The invention according to claim 4 is characterized in that the semiconductor layer contains any one selected from group IB elements, group IIIB elements, and group VIB elements. This is an integrated photovoltaic device.
The invention according to claim 5 is the integrated photovoltaic device according to any one of claims 1 to 4, wherein the semiconductor layer includes a Cu-In-Se-based semiconductor having a chalcopyrite structure. It is.
The invention according to claim 6 is the integrated photovoltaic device according to any one of claims 1 to 5, wherein the current collecting end portion contains silver.
The invention according to claim 7 is the integrated photovoltaic device according to any one of claims 1 to 6, wherein the current collecting end portion further includes a glass frit.

  The invention according to claim 8 is a method of manufacturing an integrated photovoltaic device having a plurality of cells connected in series, the back electrode layer forming step for forming the back electrode layer on the substrate, and the film formation A first patterning step of dividing the back electrode layer thus formed and forming a first pattern having a shape such that two adjacent back electrode layers protrude from each other; and a first pattern on the split back electrode layer A second patterning step in which a conductive paste layer is formed by second patterning in a shape following the first patterning, and two adjacent back electrodes covering the formed conductive paste layer A semiconductor layer forming step of forming a semiconductor layer on the back electrode layer so as to straddle the layer, an electrode layer forming step of forming an electrode layer on the formed semiconductor layer, and the formed One of the semiconductor layer and the electrode layer A third patterning step of removing the substrate and forming the divided grooves, and heating the formed conductive paste layer to diffuse at least the conductive particles contained in the conductive paste layer into the semiconductor layer, A current collecting end forming step of forming a current collecting end for electrically connecting the electrode layer and the electrode layer and collecting current from other adjacent cells; It is a manufacturing method of a power generation element.

The invention according to claim 9 is characterized in that the conductive paste layer is formed by printing a conductive paste on the back electrode layer. It is.
The invention according to claim 10 is characterized in that a dielectric layer is formed on the semiconductor layer formed by the semiconductor layer forming step. It is a manufacturing method.

  According to the first aspect of the present invention, the current collection efficiency of the integrated photovoltaic device can be increased as compared with the case where the present invention is not adopted.

  According to the second aspect of the present invention, the efficiency of collecting current from adjacent cells in the integrated photovoltaic device is increased as compared with the case where the present invention is not adopted.

  According to the invention of claim 3, the conductivity from the adjacent cells in the integrated photovoltaic device is improved as compared with the case where the present invention is not adopted.

  According to the invention of claim 4, the power generation efficiency of the integrated photovoltaic device is higher than that of the silicon-based semiconductor layer.

  According to the invention of claim 5, the power generation efficiency is high in the compound semiconductor layer type photovoltaic device.

  According to the invention which concerns on Claim 6, compared with the case where this invention is not employ | adopted, the electrical conductivity of a current collection edge part is high in an integrated photovoltaic device.

  According to the invention which concerns on Claim 7, compared with the case where this invention is not employ | adopted, formation of a current collection edge part is easy in an integrated photovoltaic device.

  According to the eighth aspect of the present invention, an integrated photovoltaic device with improved current collection efficiency can be obtained compared to the case where the present invention is not adopted.

  According to the ninth aspect of the present invention, it is easier to form the current collecting end portion in the integrated photovoltaic device than in the case where the present invention is not adopted.

  According to the invention which concerns on Claim 10, the defect which generate | occur | produces in the interface of a semiconductor layer and an electrode layer is suppressed compared with the case where this invention is not employ | adopted.

It is a figure explaining an example of the integrated photovoltaic device to which this Embodiment is applied. It is a figure explaining the manufacturing process of the integrated photovoltaic device to which this Embodiment is applied. It is a figure explaining the manufacturing process of the conventional CIS thin film type solar cell.

  Hereinafter, embodiments of the present invention will be described in detail. In addition, this invention is not limited to the following embodiment, It can implement by changing variously within the range of the summary. Further, the drawings to be used are for explaining the present embodiment and do not represent the actual size.

The integrated photovoltaic device to which the present invention is applied can be applied to solar cells generally classified as thin-film solar cells. Examples of such a thin film solar cell include a thin film silicon solar cell using hydrogenated amorphous silicon, a HIT solar cell combining amorphous and single crystal silicon, and a compound solar cell using a compound semiconductor.
Furthermore, examples of the compound solar cell include a GaAs-based solar cell, a CIS-based (chalcopyrite) solar cell, a Cu ₂ ZnSnS ₄ (CZTS) solar cell, and a CdTe—CdS-based solar cell.

Among these, a CIS (chalcopyrite) solar cell is IB-IIIB- called a chalcopyrite system made of Cu, In, Ga, Al, Se, S, etc., instead of silicon, as a material of the light absorption layer. Group VIB compounds are used. Typical examples include Cu (In, Ga) Se ₂ , Cu (In, Ga) (Se, S) ₂ , CuInS _{2 and the} like, which are abbreviated as CIGS, CIGSS, and CIS, respectively.
CIS-based (chalcopyrite-based) solar cells have abundant manufacturing methods and combinations of materials, and are polycrystalline, so that they are suitable for large area and mass production, and flexible products are easily obtained.
Hereinafter, an integrated photovoltaic device to which the present embodiment is applied will be described based on an example in which it is applied to a CIS (chalcopyrite) solar cell that is one of thin film solar cells.

FIG. 1 is a diagram illustrating an example of an integrated photovoltaic device to which the present embodiment is applied. FIG. 1A is a plan view. FIG.1 (b) is XX sectional drawing. FIG. 1C is a YY sectional view.
As shown in FIGS. 1A to 1C, the integrated photovoltaic device I includes a plurality of unit cell elements (cells) (Ia, Ib,...) Formed on a common substrate 10. Have These unit cell elements are separated at a predetermined interval by the dividing groove 15.

  Next, each of the plurality of unit cell elements (Ia, Ib,...) Includes a plurality of back electrode layers 11 formed by dividing grooves 16 on the substrate 10 and two adjacent back electrode layers 11. Formed on the back electrode layer 11 using a compound semiconductor so as to straddle the semiconductor layer (= power generation layer) 12 divided by other adjacent cells and the dividing groove 15, and on the divided semiconductor layer 12, respectively. And a transparent electrode layer 13 as the formed electrode layer. Further, a current collecting end portion 14 which is formed at least in a part of the semiconductor layer 12 and electrically couples the back electrode layer 11 and the transparent electrode layer 13 and collects current from other adjacent unit cell elements; , Is provided. The plurality of unit cell elements (Ia, Ib,...) Are electrically connected in series by the current collecting end 14.

As shown in FIG. 1A, the back electrode layer 11 is divided by the dividing groove 16 formed by the first patterning that forms the bent shape portion 160 bent in a key shape. And it has the shape which protrudes from the unit cell element Ia to the adjacent unit cell element Ib side.
The current collecting end portion 14 is formed by second patterning having a shape following the dividing groove 16 of the first patterning for dividing the back electrode layer 11. Then, similarly to the back electrode layer 11, it has a bent portion 140 bent in a key shape so as to protrude from the unit cell element Ia to the adjacent unit cell element Ib.
By having the bent shape portion 140 bent in a key shape so that the current collecting end portion 14 protrudes from the unit cell element Ia to the adjacent unit cell element Ib side, the current collecting end portion 14 Can be shortened. Thereby, the current collection rate is increased, and the power generation efficiency of the photovoltaic device is increased.
In addition, the patterning shape of the dividing groove 16 that divides the back electrode layer 11 and the patterning shape of the current collecting end portion 14 are not limited to the key-like bent shape shown in FIG. In this case, it is necessary that the patterning shape of the current collecting end portion 14 does not extremely reduce the area of the semiconductor layer 12.

Next, components of the integrated photovoltaic element I will be described.
As a material which comprises the board | substrate 10, metal films, such as stainless steel, an organic film, glass etc. are mentioned, for example. Although the magnitude | size of the board | substrate 10 is not specifically limited, In this Embodiment, length x width is 10 cm x 10 cm, and thickness is 0.5 mm.
The material constituting the back electrode layer 11 is preferably a metal, for example, at least one metal selected from Mo, Ti, Cr, Al, Ag, Au, Cu and Pt, or an alloy thereof. In the present embodiment, back electrode layer 11 is a metal thin film having a thickness of about 0.3 μm. The back electrode layer 11 is formed on the substrate 10 by, for example, a vapor deposition method, a sputtering method, a CVD method (Chemical Vapor Deposition), or the like, and then divided by patterning as will be described later.

Examples of the semiconductor layer 12 include chalcopyrite type compound semiconductors containing elements of the IB group, IIIB group, and VIB group of the periodic table. In this embodiment mode, it is preferably formed using a Cu—In—Se semiconductor material having a chalcopyrite structure including copper (Cu), indium (In), and selenium (Se).
In the present embodiment, the thickness of the semiconductor layer 12 is in the range of 0.3 μm to 5 μm.

Metallic material constituting the transparent electrode layer 13 is not particularly limited, for example, _{an In} 2 _{O 3} on the ITO with the addition of Sn as a dopant (Indium Tin Oxide) of indium oxide-based metal material such as, for SnO ₂ or the like with the addition of dopant Examples include tin oxide-based metal materials; AZO in which Al is added to ZnO as a dopant, GZO in which Ga is added to ZnO as a dopant, and zinc oxide-based metal materials such as IZO in which Zn is added as an dopant.
In this embodiment, it is preferable to use a metal material containing at least one selected from ITO, SnO ₂ , and ZnO and form the film by sputtering or evaporation. The thickness of the transparent electrode layer 13 is about 0.6 μm in the present embodiment.

The current collecting end portion 14 is formed by diffusing a metal contained in a conductive paste applied to the surface of the transparent electrode layer 13 to be described later into the semiconductor layer 12 and is transparent to other cells adjacent to the back electrode layer 11. The electrode layer 13 is electrically coupled. Here, the metal contained in the conductive paste is a metal having a lower electrical resistance than the semiconductor layer 12 as described later.
The thickness of the current collecting end 14 is usually at least as thick as the semiconductor layer 12 described above, and is in the range of 0.5 μm to 20 μm in the present embodiment. The width | variety of the current collection end part 14 is the range of 30 micrometers-150 micrometers normally, Preferably, it is the range of 50 micrometers-100 micrometers. If the width of the current collecting end portion 14 is excessively narrow, the electric resistance at the short circuit portion tends to increase. Moreover, since the area of a light-receiving part will become narrow if the width | variety of the current collection end part 14 is too wide, there exists a tendency for conversion efficiency to fall.

In the present embodiment, a buffer layer as a dielectric layer may be provided between the semiconductor layer 12 and the transparent electrode layer 13. In this case, the material constituting the buffer layer is not particularly limited, in the present embodiment, it is preferable to use a InS 3, sulfides such as _ZnS. By providing a buffer layer between the semiconductor layer 12 and the transparent electrode layer 13, defects generated at the interface between the semiconductor layer 12 and the transparent electrode layer 13 can be suppressed.

Next, a method for manufacturing the integrated photovoltaic element I will be described.
FIG. 2 is a diagram for explaining an example of a manufacturing method of the integrated photovoltaic element I. The same components as those in FIG.
First, as shown in FIG. 2A, a substrate 10 made of the above-described material is prepared, and a back electrode layer 11a made of a metal thin film is continuously formed on the substrate 10 by sputtering, for example (back electrode layer). Film forming step).
Subsequently, as shown in FIG. 2B, a part of the continuously formed back electrode layer 11 a is removed by the first patterning, and the back electrode layer divided into a plurality by the plurality of dividing grooves 16. 11 is formed (first patterning step). As shown in FIG. 1A described above, the formed back electrode layer 11a is divided by the first patterning, and two adjacent back electrode layers 11 are formed so as to protrude from each other. . In the present embodiment, the first patterning step employs a laser scribing method using a beam in the infrared region (1,064 nm) such as a neodymium YAG laser.

  Subsequently, as shown in FIG. 2C, a conductive paste layer 14a is formed on a part of the back electrode layer 11 formed in a divided manner by the second patterning that follows the first patterning described above. (Second patterning step). In the present embodiment, the conductive paste layer 14a is formed by applying a conductive paste on the separately formed back electrode layer 11 by a screen printing method.

(Conductive paste)
Here, as the conductive paste used for forming the conductive paste layer 14a, a resin such as a heat-synthetic resin is usually used as a binder, and a fine powder of metal such as silver, copper, or aluminum, carbon black, or the like is used. It is defined as one prepared by adding conductive particles and glass frit and dissolving and dispersing these binder, conductive particles and glass frit in various organic solvents.

  Any binder can be used without particular limitation as long as it has thermal decomposability that has been used as a fired resin composition. Specifically, for example, cellulose derivatives such as methyl cellulose, ethyl cellulose, carboxymethyl cellulose, polyvinyl alcohols, polyvinyl pyrrolidones, acrylic resins, vinyl acetate-acrylate copolymers, butyral resin derivatives such as polyvinyl butyral, phenol-modified alkyds, etc. Examples thereof include resins, alkyd resins such as castor oil fatty acid-modified alkyd resins, thermoplastic polyester resins, and epoxy resins. These resin can be used individually or in mixture of 2 or more types.

The conductive particles are components that impart conductivity to the paste, and commonly used conductive particles can be used. Specifically, for example, powders such as silver powder, silver oxide, silver carbonate, silver acetate, etc., from which silver alone precipitates, copper, nickel and the like can be mentioned. Moreover, composite metal powder coated with other metals such as silver and gold is also used. These can be used alone or in admixture of two or more.
It is preferable that electroconductive particle contains the powder which deposits silver by silver powder or baking, and silver contains 70-100 mass% with respect to electroconductive particle. Among them, for example, particulate silver compounds such as first silver oxide, second silver oxide, silver carbonate, silver acetate, and acetylacetone silver complex are preferable.
The particle shape of such conductive particles is not particularly limited, and flake powder, spherical powder, amorphous powder, or a mixture thereof may be used. Moreover, the average particle diameter (D50) should just be a 20 micrometer or less, and it is preferable that it is 0.1-10 micrometers. When the average particle size is excessively large, the dispersibility in the organic binder (vehicle) decreases, and the operation and printability tend to decrease.

The glass frit usually refers to glass in the form of flakes or powders obtained by melting a mixture of natural raw materials such as silica sand, feldspar, and lime and industrial raw materials at a high temperature and then rapidly cooling them.
Is not particularly restricted but includes glass frit, for _{example, PbO-B} 2 O 3 Pb-based glass frits -SiO ₂ system and the _{like; Bi 2 O 3 -B 2 O} 3 -SiO 2 -CeO 2 -LiO 2 -NaO 2 system Pb-free glass frit such as The shape of the glass frit is not particularly limited, and for example, a spherical shape, an irregular shape, or the like can be used. The particle size of the glass frit is not particularly limited, but from the viewpoint of workability, the average particle size is preferably in the range of 0.01 μm to 10 μm, and more preferably in the range of 0.05 μm to 1 μm.
The addition amount of the glass frit is usually 0.1 to 10 parts by weight, preferably 1 to 5 parts by weight with respect to 100 parts by weight of the conductive particles.

Here, in the present embodiment, the conductive particles contained in the conductive paste have a lower electrical resistance than the semiconductor layer 12 and are diffused into at least a part of the semiconductor layer 12 by heat treatment described below. A current collecting end 14 is formed.
The electric resistance of such a metal that diffuses into a part of the semiconductor layer 12 to form the current collecting end 14 is usually in the range of 1 × 10 ⁻³ Ωcm or less, preferably 1 × 10 ⁻⁴ Ωcm or less. It is.
If the electric resistance of the metal contained in the current collecting end portion 14 is excessively large, the electric resistance of the short-circuit portion is not sufficiently reduced, so that power generation loss tends to occur.

  The organic solvent is not particularly limited as long as it can dissolve the binder. Specific examples include dioxane, hexane, toluene, ethyl cellosolve, cyclohexanone, butyl cellosolve, butyl cellosolve acetate, butyl carbitol acetate, diethylene glycol diethyl ether, diacetone alcohol, terpineol, and benzyl alcohol. These can be used individually or in mixture of 2 or more types.

In addition, a plasticizer, an antifoamer, a dispersing agent, a leveling agent, a stabilizer, an adhesion promoter, etc. can be mix | blended with an electrically conductive paste as an additive as needed. Among these, as the plasticizer, phthalic acid esters, glycolic acid esters, phosphoric acid esters, sebacic acid esters, adipic acid esters, citrate esters, and the like can be used.
As such a conductive paste, a conventionally known paste that is commercially available can be used. In the present embodiment, for example, Ag paste manufactured by NAMICS Co., Ltd .: XFP5383-2 is used.

Next, as shown in FIG. 2D, the front surface of the plurality of back electrode layers 11 divided by the first patterning step and the conductive paste layer 14a formed by the second patterning step are covered and adjacent to each other. The semiconductor layer 12a is formed on the back electrode layer 11 so as to straddle the two back electrode layers 11 to be formed (semiconductor layer forming step).
Subsequently, as shown in FIG. 2E, a transparent electrode layer 13a is formed on the formed semiconductor layer 12a (electrode layer forming step).
In the present embodiment, the semiconductor layer 12a is preferably formed by stacking a plurality of p-type semiconductor forming precursor layers and n-type semiconductor forming precursor layers. That is, in this embodiment, a Cu-In-Se-based semiconductor material is used as the compound semiconductor, and a p-type semiconductor forming precursor made of a mixture of Cu and Se that can easily form a p-type semiconductor on the back electrode layer 11 side. It is preferable to form a body layer, and then form an n-type semiconductor forming precursor layer made of a mixture of In and Se, which easily forms an n-type semiconductor, on the transparent electrode layer 13a side. The p-type semiconductor forming precursor layer and the n-type semiconductor forming precursor layer are melt-diffused with each other in a heat treatment step to be described later, thereby generating a semiconductor layer 12 made of a semiconductor having good crystallinity, A pn junction can be formed.

Subsequently, as shown in FIG. 2F, the conductive paste layer 14a formed on the back electrode layer 11 by screen printing is subjected to heat treatment, and the conductive particles contained in the conductive paste layer 14a are at least converted into semiconductors. A current collecting end portion 14 is formed to diffuse in the layer 12a and electrically couple the back electrode layer 11 and the transparent electrode layer 13 (current collecting end forming step).
Although the temperature which heat-processes the conductive paste layer 14a is not specifically limited, In this Embodiment, it is 300 to 600 degreeC normally, Preferably, it is 350 to 500 degreeC.

In such a heat treatment process, it is considered that the conductive particles in the conductive paste layer 14a diffuse into the semiconductor layer 12a.
In the present embodiment, the current collecting end portion 14 diffuses into the semiconductor layer 12 a and reaches the transparent electrode layer 13, thereby electrically connecting the back electrode layer 11 and the transparent electrode layer 13.
The semiconductor layer 12a is also heated by such heat treatment, and the p-type semiconductor forming precursor layer and the n-type semiconductor forming precursor layer of the semiconductor layer 12a are melted and diffused to each other, thereby providing good crystallinity. Thus, the semiconductor layer 12 made of a semiconductor having n is generated.

  Next, as shown in FIG. 2G, a part of the formed semiconductor layer 12 and the transparent electrode layer 13a is removed by patterning, and a plurality of unit cell elements (Ia, Ib,...) Are formed to obtain an integrated photovoltaic device I (third patterning step). In the present embodiment, the third patterning step uses, for example, a mechanical scribing method in which a part of the semiconductor layer 12 and the transparent electrode layer 13a is cut into a strip shape using a metal blade, a cutter knife, a metal needle, a needle, or the like. Adopted.

As described above, the manufacturing method of the integrated photovoltaic device I to which the present embodiment is applied is a method in which a conductive paste is printed by screen printing, for example, as compared with a conventional manufacturing process of a CIS thin film solar cell. By doing so, the electrical resistance of a part of the semiconductor layer 12 is lowered, and the transparent electrode layer 13 and the back electrode layer 11 are electrically short-circuited to enable integration.
By adopting a printing method such as screen printing, a degree of freedom of patterning shape is generated. For this reason, the distance between an adjacent cell and a current collection end is reduced by making the shape of the current collection end, which has been conventionally formed in a straight line, into a shape protruding toward the other adjacent cell. Thereby, the current collection rate is increased, and the power generation efficiency of the photovoltaic device is increased.
Moreover, since the semiconductor layer 12 and the transparent electrode layer 13 can be continuously and continuously formed without passing through the mechanical scribing step, the opportunity for the semiconductor layer 12 including the compound semiconductor to be exposed to the air is reduced, and the solar cell Performance degradation is prevented.
Furthermore, a reduction in mass productivity can be prevented by reducing the mechanical scribing process that usually takes a long time. Furthermore, deterioration from the cut end face that occurs after mechanical scribing is suppressed.

In addition, the integrated photovoltaic device I to which the present exemplary embodiment is applied has a current collecting end portion 14 that electrically short-circuits the back electrode layer 11 and the transparent electrode layer 13, thereby providing a thickness of the transparent electrode layer 13. Therefore, it can be expected that the manufacturing cost is reduced and the light transmittance is improved and the power generation efficiency is increased.
That is, in the conventional integrated photovoltaic device, in order to reduce the interconnect resistance, it is necessary to form a thick transparent electrode layer at the expense of some reduction in conversion efficiency.
However, like the integrated photovoltaic device I in the present embodiment, the current collector in which the conductive particles in the conductive paste are diffused into the semiconductor layer 12 only in the portion where the conductive paste of the back electrode layer 11 is applied. By providing the end portion 14, the above-described problem is solved.

In addition, the above description is only an example for demonstrating embodiment of this invention, and this invention is not limited to this embodiment.
The present invention can be applied to a photovoltaic device including a semiconductor layer composed of a plurality of elements and two electrode layers sandwiching the semiconductor layer, and a method for manufacturing a photovoltaic device having such a structure. For example, a III-V group semiconductor typified by a Cd-Te system, an I-III-VI group semiconductor typified by a Cu-In-Se system, and an I-II typified by a Cu-Zn-Sn-S system compound The present invention can also be applied to an IV group semiconductor composed of two or more elements such as an -IV-VI group semiconductor, an II-IV-V group semiconductor, and a Si-Ge group.

  Hereinafter, the present embodiment will be described in more detail based on examples. The present embodiment is not limited to the following examples.

Example 1
The integrated photovoltaic device I shown in FIG. 1 was prepared by the following operation. A Mo (molybdenum) layer as the back electrode layer 11a formed on the glass substrate 10 was divided by a laser scribing method. Next, the conductive paste layer 14a was formed on a part of the surface of the separately formed back electrode layer 11a by screen printing. As the conductive paste, Ag paste XFP5383-2 manufactured by NAMICS CORPORATION was used.
Subsequently, a semiconductor layer 12a formed by sequentially stacking a first In—Se layer, a first Cu—Se layer, a second In—Se layer, a second Cu—Se layer, and a third In—Se layer is formed by sputtering. An Al—Zn—O layer was formed thereon as the transparent electrode layer 13a.

Next, heating is performed in nitrogen gas at 400 ° C. for about 2 hours to form the semiconductor layer 12 made of a compound semiconductor crystal, and the conductive particles contained in the conductive paste layer 14a are diffused in the semiconductor layer 12, A current collecting end portion 14 for electrically coupling the back electrode layer 11 and the transparent electrode layer 13a was formed.
Subsequently, a part of the formed semiconductor layer 12 and the transparent electrode layer 13a is removed by patterning, and an integrated type having a plurality of unit cell elements (Ia, Ib,...) Divided by a plurality of dividing grooves 15. A photovoltaic device I was prepared.

In order to check whether or not the unit cell elements (Ia, Ib,...) In the prepared integrated photovoltaic element I are connected in series, the voltage across the integrated photovoltaic element I and the unit cell element ( The voltage between the back electrode layer 11 and the transparent electrode layer 13 of Ia, Ib,.
As a result, the voltage at both ends of the integrated photovoltaic element I was 1650 mV, and the voltage of each cell of the unit cell elements (Ia, Ib,...) Was 410 mV. As a result, it has been found that integration is possible by the integration method according to the present invention.

DESCRIPTION OF SYMBOLS 1,10 ... Board | substrate, 2, 11, 11a ... Back electrode layer, 3, 12, 12a ... Semiconductor layer, 4, 13, 13a ... Transparent electrode layer, 14 ... Current collecting edge part, 14a ... Conductive paste layer, 15 ... Dividing grooves, I ... Integrated photovoltaic elements

Claims (10)

An integrated photovoltaic device in which a plurality of cells are connected in series,
A substrate,
A plurality of back electrode layers formed on the substrate and divided by a first patterning having a shape protruding to the side of another adjacent cell;
A plurality of semiconductor layers formed on the back electrode layer so as to straddle two adjacent back electrode layers, and divided by a dividing groove;
An electrode layer formed on each of the divided semiconductor layers;
A current collecting end for collecting current from other adjacent cells, formed by second patterning following the first patterning to divide the back electrode layer into at least part of the semiconductor layer;
An integrated photovoltaic device comprising:   The second patterning of the current collecting end portion has a shape protruding toward the other cell side so as to reduce a current collecting distance between the current collecting end portion and another cell adjacent thereto. Item 8. The integrated photovoltaic device according to Item 1.   The said current collection edge part contains the metal whose electrical resistance is low compared with the said semiconductor layer, and electrically couple | bonds the said back surface electrode layer and the said electrode layer. Integrated photovoltaic device.   4. The integrated photovoltaic device according to claim 1, wherein the semiconductor layer includes any one selected from a group IB element, a group IIIB element, and a group VIB element. 5.   5. The integrated photovoltaic device according to claim 1, wherein the semiconductor layer includes a Cu—In—Se based semiconductor having a chalcopyrite structure.   The integrated photovoltaic device according to claim 1, wherein the current collecting end portion contains silver.   The integrated photovoltaic device according to any one of claims 1 to 6, wherein the current collecting end portion further includes a glass frit. A method of manufacturing an integrated photovoltaic device having a plurality of cells connected in series,
A back electrode layer film forming step of forming a back electrode layer on the substrate;
A first patterning step of dividing the filmed back electrode layer to form a first pattern having a shape such that two adjacent back electrode layers protrude from each other;
A second patterning step of forming a conductive paste layer on a part of the divided back electrode layer by a second patterning of a shape following the first patterning;
A semiconductor layer forming step of forming a semiconductor layer on the back electrode layer so as to straddle two adjacent back electrode layers while covering the formed conductive paste layer;
An electrode layer forming step of forming an electrode layer on the formed semiconductor layer;
A third patterning step of removing a part of the formed semiconductor layer and the electrode layer to form a dividing groove;
The formed conductive paste layer is heated, conductive particles contained in the conductive paste layer are diffused into at least the semiconductor layer, and the back electrode layer and the electrode layer are electrically coupled and adjacent to each other. A current collecting end forming step for forming a current collecting end collecting current from other cells;
A method of manufacturing an integrated photovoltaic device, comprising:   9. The method of manufacturing an integrated photovoltaic device according to claim 8, wherein the conductive paste layer is formed by printing a conductive paste on the back electrode layer.   10. The method for manufacturing an integrated photovoltaic device according to claim 8, wherein a dielectric layer is formed on the semiconductor layer formed by the semiconductor layer forming step.

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