JP2010239151A - Integrated optical waveguide element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that it is difficult to achieve reduction of cost and power consumption without degrading original performance using a conventional semiconductor light emitting device due to its low light output at a constant actuating current and due to restriction in ridge width when it is integrated with an optical element such as a Mach-Zehnder optical modulator. <P>SOLUTION: In the semiconductor light emitting device having a ridge, ridge width is widened while keeping single transverse mode by setting a low refractive index difference between the ridge and other components. In this device, generation of diffusion current and increase in refractive index difference are prevented by forming substantially vertical grooves along both sides of the ridge, and degradation of performance due to regrowth is prevented by forming a diffraction grating on the ridge. When it is integrated with an optical element such as a Mach-Zehnder optical modulator, the semiconductor light emitting device is integrated with the optical element by using a tapered waveguide without increasing the number of growth cycles with no restriction of the ridge with. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a semiconductor light emitting device and an integrated optical waveguide element in which the semiconductor light emitting device and an optical modulator are integrated.

  In recent years, it has become increasingly important to reduce the power consumption and the cost of integrated semiconductor optical waveguide devices in which semiconductor light-emitting devices and semiconductor light-emitting devices are integrated with electroabsorption optical modulators. Semiconductor light-emitting devices are mainly divided into ridge type and embedded type. Among these, the ridge type is easy to manufacture and has a small number of growths, which is advantageous for cost reduction. ing. A ridge-type semiconductor light-emitting device is formed by laminating a lower clad layer, a multiple or single well layer, an upper clad layer, and a ridge on a substrate made of an n-type semiconductor. The integrated semiconductor optical waveguide device (EA / DFB) is configured by integrating the ridge type semiconductor light emitting device and the electroabsorption optical modulator having the ridge on a common substrate.

  In the field of information, with the increase in the amount of information to be recorded, high speed recording is required, and as a result, high output of the semiconductor light emitting device has been required. For this purpose, it is sufficient to increase the operating current, but this is disadvantageous for low power consumption. On the other hand, in the field of communication, in the current trunk line system and urban network, the transmission speed is mainly 2.5 Gbit / s or 10 Gbit / s. Therefore, an integrated semiconductor optical waveguide device in which optical modulators are monolithically integrated is advantageous for cost reduction for high-speed modulation of a transmitter. However, on the other hand, power consumption increases as the transmission distance increases and the bit rate increases. Therefore, development of EA / DFB that does not require temperature adjustment at −5 to 85 ° C. has been performed for the purpose of reducing power consumption (Non-patent Document 1: OFCNFOEC OFC POSTDEADLINE PAPERS Thursday, March 10, 2005 PDP14). To achieve this, it is necessary to further increase the light output under a constant operating current of the semiconductor light emitting device. As described above, in order to reduce the power consumption of the semiconductor light emitting device for both information and communication, it is required to increase the optical output under a constant operating current.

  One method for increasing the output of a semiconductor light emitting device is to increase the ridge width. Usually, in a semiconductor light emitting device, when the operating current is increased, the amount of heat generation increases, so that the light output is saturated at a certain current value, and a sufficient output cannot be obtained. On the other hand, in a semiconductor light emitting device with an expanded ridge width, the electrical resistance at the time of current injection is lowered, so that the amount of heat generation is suppressed and the saturation current is increased accordingly. As a result, the saturation output also increases and the light output at a constant operating current increases. The expansion of the ridge width can be realized by forming an upper buffer layer between the upper cladding layer and the ridge. Due to the formation of the upper buffer layer, the difference in the average refractive index in the stacking direction is smaller in the part including the ridge and in the part not including the ridge than in the case where the upper buffer layer is not provided. The width increases, and the ridge width can be increased under the horizontal single mode condition.

  As another method, there is a method of suppressing an increase in the threshold value of the semiconductor light emitting device. If the threshold value is low, the light output at a constant operating current increases, so that the output of the semiconductor light emitting device can be increased. As a method for suppressing an increase in the threshold value, for example, there is one disclosed in JP-A-2004-214372 (Patent Document 1). This is because a coating layer in which Fe is implanted into both sides of a ridge of a conventional ridge type semiconductor light emitting device formed of an InP system is formed by regrowth, and this is used as an Fe supply source to the upper cladding layer. By insulating the layer, the current injected from the ridge is prevented from diffusing in the upper cladding layer, and the threshold is prevented from rising. Conventionally, when these lasers are converted to DFB, a diffraction grating is formed in the upper part of the n substrate, the multiple well layer, or the upper buffer layer.

  On the other hand, regarding EA / DFB, for example, in the semiconductor optical waveguide device in which the embedded semiconductor light emitting device and the ridge type electroabsorption optical modulator are integrated, the mode spread is different in each part. Japanese Patent Laid-Open No. 8-78792 (Patent Document 2) has been proposed in which ridge-type coupling portions are tapered and integrated. Japanese Patent Laid-Open No. 2000-66046 (Patent Document 3) has been proposed in which the light emission side of a semiconductor optical waveguide device is tapered in order to improve optical coupling with a fiber. However, none of the above-mentioned high-power lasers with enlarged ridges or lower thresholds were integrated.

JP 2004-214372 A JP-A-8-78792 JP 2000-66046 A

OFCNFOEC OFC POSTDEADLINE PAPERS Thursday, March 10, 2005 PDP14

  As described above, it is effective to insert the upper buffer layer between the upper clad layer and the ridge in order to increase the output of the semiconductor light emitting device. On the other hand, particularly in the lateral direction of the p-side carrier. There is a problem that diffusion increases and the threshold value increases. In addition, since the difference in average refractive index between the portion including the ridge and the portion not including the ridge is small, the mode shape spreads horizontally, and the spread of the far-field image is greatly different between the horizontal direction and the vertical direction and becomes asymmetric. This increases the coupling loss with the outside such as a fiber.

  In order to suppress the increase in the threshold value, application of the method disclosed in Patent Document 1 is conceivable. However, in this method, crystal regrowth is required to form a coating layer. Therefore, it is disadvantageous for cost reduction. Furthermore, since the semiconductor light emitting device is limited to the InP system, it cannot be applied to other materials such as a GaAs semiconductor light emitting device.

  In order to increase the output of the semiconductor light emitting device, it is effective to increase the ridge width by inserting an upper buffer layer between the upper cladding layer and the ridge. This method is an integrated semiconductor such as EA / DFB. The application of the optical waveguide device has another problem. For example, if the ridge width of the semiconductor light emitting device is set to 2 μm in order to increase the output of the semiconductor light emitting device, the electric capacity in the electroabsorption optical modulator portion increases and the band decreases. On the other hand, if the ridge width of the semiconductor light emitting device is set to 1.4 μm in accordance with the ridge width of 1.4 μm of the electroabsorption optical modulator portion, the thermal characteristics of the semiconductor light emitting device are deteriorated, and high output cannot be obtained. Therefore, the EA / DFB ridge width is different from the original optimum ridge width, and the overall characteristics are deteriorated. However, the EA / DFB ridge width has been integrated to a value of about 1.6 μm as a compromise value that facilitates the function.

  Furthermore, the insertion position of the diffraction grating also affects the laser characteristics. Conventional diffraction gratings were manufactured at the top of the n substrate, in the multiple well layer, or in the upper buffer layer. When a diffraction grating is inserted in the multi-well layer or in the upper buffer layer, regrowth occurs after formation of the diffraction grating, but the carrier concentration changes at the regrowth interface and traps the carriers, resulting in higher output. For this reason, the characteristics are deteriorated. On the other hand, when it is fabricated on the n substrate, the above-mentioned problems can be ignored. However, since the diffraction grating is formed before the multi-well layer is formed, the wavelength controllability is deteriorated.

  As described above, the above method has not yet achieved both low power consumption and low cost, and the design of the semiconductor light emitting device and the electroabsorption optical modulator, particularly the ridge width, has been limited for integration. Each device has not been integrated under optimum conditions.

  The present invention achieves higher output of a semiconductor light emitting device, and further reduces the power consumption of integrated semiconductor optical waveguide elements in which the semiconductor light emitting device with higher output is integrated with an electro-absorption optical modulator and the respective characteristics. It accumulates at a low cost without degrading.

  First, a semiconductor light emitting device is formed on an n-type semiconductor substrate from a lower clad layer, a multiple or single well layer, an upper clad layer, an upper buffer layer, and a ridge. Furthermore, by forming an insulating groove with a low refractive index cut into the upper buffer layer on both sides of the ridge, lateral diffusion of current injected from the ridge is suppressed, thereby suppressing an increase in threshold value. To do.

  Further, in a semiconductor light emitting device formed of an n-type semiconductor substrate with a lower clad layer, a multiple or single well layer, an upper clad layer, a ridge, etc., a refractive index higher than that of a semiconductor material mainly constituting the ridge in the ridge By forming a diffraction grating with a semiconductor material having the above characteristics, the diffraction grating is formed on the upper cladding layer without deterioration in characteristics due to impurity contamination due to regrowth after formation of the diffraction grating and a change in carrier concentration.

  On the other hand, in an integrated semiconductor optical waveguide device such as EA / DFB, when integrating an electroabsorption optical modulator having a ridge and a semiconductor light emitting device, the electroabsorption optical modulator having the ridge and ridge of the semiconductor light emitting device is integrated. These ridges are coupled by a waveguide having a tapered ridge.

  According to the present invention, it is possible to realize a semiconductor light emitting device having a high output and a low threshold, and in an integrated semiconductor optical waveguide element such as EA / DFB, the characteristics of the semiconductor light emitting device and the electroabsorption optical modulator can be changed. The maximum characteristics can be exhibited, low optical loss, suppression of the anisotropy of how the far-field image of the emitted light spreads in the vertical and horizontal directions, and without increasing the number of growth during integration It can be integrated at low cost.

It is a figure explaining the first half of the manufacture process of the semiconductor light-emitting device with the upper buffer layer used as the premise of this invention. It is a figure which shows the second half of the manufacture process of the semiconductor light-emitting device with the upper buffer layer used as the premise of this invention, and shows a completion state. It is a figure which shows the result of having comprised the semiconductor light-emitting device which is substantially the same structure as the semiconductor light-emitting device used as the premise of this invention, and without an upper buffer layer, and having compared the operating characteristic. It is a figure explaining the first half of the manufacturing process of the semiconductor light-emitting device of Example 1 of this invention from the structure of Fig.2 (a) as a starting point. It is a figure explaining the latter half of the manufacture process of the semiconductor light-emitting device of Example 1 of this invention. It is a figure which shows the completion state of the semiconductor light-emitting device of Example 1 of this invention. (A) is a figure explaining the characteristic of the semiconductor light-emitting device of Example 1, (b) is a characteristic figure which evaluated the relationship between the groove width of an upper buffer layer, and a cutoff width. (A)-(c) is a figure which shows the principal part and completion state of the manufacture process which implement | achieved the semiconductor light-emitting device of Example 2 of this invention by the structure which started the n-type GaAs semiconductor substrate. (A)-(e) is a figure explaining the first half of the manufacture process of the integrated optical waveguide element of Example 3 of this invention. (A)-(d) is a figure explaining the second half of the manufacture process of the integrated optical waveguide element of Example 3 of this invention. It is a figure which shows the completion state of the integrated optical waveguide element of Example 3 of this invention. In the case where the ridge width of the semiconductor light emitting device of the integrated optical waveguide device of Example 3 of the present invention is 2.0 μm and 2.5 μm, and the ridge width of the electroabsorption optical modulator is 1.4 μm, the waveguide length is It is a figure which shows the result of having taken on the axis | shaft and taking the transmittance | permeability on the vertical axis | shaft. It is a figure which shows the completion state of the integrated optical waveguide element of Example 4 which employ | adopted the Mach-Zehnder optical modulator instead of the electro-absorption optical modulator for the integrated optical waveguide element of this invention.

  Hereinafter, preferred embodiments of the present invention will be described with respect to Examples 1 to 4 with reference to the related drawings.

[Example 1]
First, a first embodiment in which the present invention is applied to a 1.5 μm band ridge waveguide semiconductor light emitting device will be described. However, the size of the figure does not necessarily match the scale described in the first embodiment. A semiconductor light-emitting device having an upper buffer layer, which is a premise of the present invention, will be described with reference to FIGS. 1 and 2, and then low-refractive-index insulating grooves cut into the upper buffer layer are formed on both sides of the ridge. Examples of the semiconductor light emitting device of the present invention will be described.

  As shown in FIG. 1A, an n-type InP buffer layer 2 (thickness 0.15 μm), n by an organic metal vapor phase growth method (MOCVD method) on an n-type InP semiconductor substrate 1 (thickness 2 mm). Type InGaAsP-based lower cladding layer 3 (thickness 0.13 μm), 1.0% compressive strain InGaAsP (thickness 7 nm, composition wavelength 1.5 μm) well layer and 0.5% tensile strain InGaAsP A multi-quantum well active layer 4 (thickness 0.114 μm) obtained by laminating six periods of a barrier layer (thickness 12 nm, composition wavelength 1.3 μm), an upper cladding layer 5 (thickness 0.1 μm) made of InGaAsP, p-type InP upper buffer layer 6 (thickness 0.2 μm), InGaAsP-based etching stop layer 7 (thickness 5 nm), p-type InP lower spacer layer 8 (thickness 20 nm), InG Consisting AsP system laminating diffraction grating layer 9 (thickness 30 nm). In this example, the emission wavelength of the multiple quantum well active layer is about 1.5 μm.

  Next, as shown in FIG. 1B, a diffraction grating is formed on the diffraction grating layer 9 by performing a known interference exposure method and subsequent etching with a phosphoric acid solution on the diffraction grating layer 9. In Example 1, since there is an InP spacer layer 8 between the etching stop layer 7 and the diffraction grating layer 9, a floating type diffraction grating is formed, and the diffraction grating is manufactured with high accuracy even if the etching time is slightly different for each manufacturing. It becomes possible.

  Subsequently, as shown in FIG. 1C, a p-type InP layer 10 (thickness: 2.0 μm), InGaAsP (composition wavelength: 1.3 μm), and InGaAs are formed on the diffraction grating layer 9 on which the diffraction grating is formed by MOCVD. A contact layer 11 (thickness: 0.3 μm) is laminated.

  Thereafter, as shown in FIG. 1 (d), the lower spacer layer 8, the diffraction grating layer 9, the p-type InP layer 10 and the contact layer are etched by etching up to the etching stop layer 7 leaving a ridge (width 2.8 μm). 11 is formed.

  Subsequently, as shown in FIG. 2A, a silicon oxide film 13 (thickness of 0.1 μm) is formed on the entire surface above the etching stopper layer 7 by a thermal-chemical vapor deposition (T-CVD) method. ). Next, as shown in FIG. 2B, the insulating film (silicon oxide film 13) on the contact layer 11 above the ridge 12 is removed. In the first embodiment, the silicon oxide film 13 is used as an insulating film, but a silicon nitride film or the like can also be used. Next, as shown in FIG. 2C, a polyimide resin layer 14 is provided on the insulating film 13 on both sides of the ridge 12, and the wafer surface is flattened. Further, after forming a p-electrode 15 on the ridge 12 and an n-electrode 16 on the back surface of the n-type InP substrate 1, an element having a resonator length of 300 μm is cut out by a cleavage process, and a reflective film having a reflectivity of 95% is formed on the rear end surface. The surface was coated with a low reflection film having a reflectance of 0.1%.

  It was confirmed that when the semiconductor light emitting device shown in FIG. 2C was operated in a range of up to 300 mA operating current at −5 ° C. to 85 ° C., a transverse single mode was obtained. In addition, good oscillation characteristics were exhibited with a threshold of 15 to 25 mA and an oscillation efficiency of 0.3 to 0.4 W / A at room temperature and continuous oscillation conditions. A threshold of about 35 mA and an oscillation efficiency of 0.15 to 0.2 W / A were obtained at an operating temperature of 85 ° C.

  FIG. 3 is a diagram showing a result of comparing the operating characteristics of a semiconductor light emitting device having substantially the same configuration as that of the semiconductor light emitting device shown in FIG. In FIG. 3, the horizontal axis represents the operating current, and the vertical axis represents the optical output. A solid line 21 indicates the characteristics of the semiconductor light emitting device with the upper buffer layer 6 at an operating temperature of 85 ° C., and a broken line 22 indicates the characteristics of the semiconductor light emitting device without the upper buffer layer 6 at the same temperature. Comparing the operating current of 150 mA, the light output of the semiconductor light emitting device with the upper buffer layer 6 increased by about 20% compared to the semiconductor light emitting device without the upper buffer layer 6. The threshold at this time was 5 to 10 mA larger in the semiconductor light emitting device having the upper buffer layer 6.

  In the above configuration, the oscillation wavelength of the laser, that is, the emission wavelength of the multiple quantum well active layer is set to 1.5 μm, but the same effect can be obtained even when the wavelength is set to the 1.3 μm band. The same effect can be obtained even with the distributed Bragg reflection type or the Fabry-Perot type, not the distributed feedback type. A light emitting device having similar characteristics can be obtained even when an InGaAlAs system is used instead of the InGaAsP system. Furthermore, the upper buffer layer 6 may be InGaAsP-based or InGaAlAs-based instead of InP.

  It can be understood that it is effective to increase the ridge width by inserting the upper buffer layer 6 between the upper cladding layer 5 and the ridge 12 in order to increase the output of the semiconductor light emitting device. As described in the problem to be solved and the explanation with reference to FIG. 3, there is a problem that the threshold value increases. In order to solve this problem, in the first embodiment of the present invention, a notch that cuts into the upper buffer layer 6 along the side surface of the ridge 12 is provided to suppress the diffusion of the current flowing into the multiple quantum well active layer 4 to reduce the threshold value. Prevent increase.

  4A is a diagram showing the structure of the manufacturing process in which the silicon oxide film 13 is formed on the entire surface above the etching stopper layer 7 as in FIG. 2A. The structure of the semiconductor light emitting device of Example 1 is shown in FIG. It is a figure used as a starting point.

  After the silicon oxide film 13 is formed, the silicon oxide film 13 is removed by a dry etching process. At this time, if the silicon oxide film 13 is formed in advance so that the contact layer portion above the ridge 12 is thickened, the silicon oxide film 13 remains on the ridge 12 as shown in FIG. The ridge 12 covered with the oxide film 13 is in a riding form.

  FIG. 4C is a view showing a state in which a resist film 17 is formed on the upper surface of the etching stopper layer 7 while avoiding the ridge 12.

  FIG. 4D is a diagram showing a state in which the silicon oxide film 13 is removed while leaving the resist film 17 in the photolithography process. In this state, as can be seen from the figure, the ridge 12 is placed on the etching stopper layer 7 and only the resist film 17 around the ridge 12 is removed in a groove shape.

  In FIG. 5A, from the state shown in FIG. 4D, using the resist film 17 removed in the groove shape as a mask, the etching stopper layer 7 is first removed in the groove shape with a phosphoric acid-based solution, and then It is a figure which shows the state which etched the upper buffer layer 6 in groove shape with the hydrochloric acid type solution. At this time, the depth of the groove can be adjusted by adjusting the etching time. In Example 1, a groove having a depth of 0.1 μm was formed with respect to the film thickness of the upper buffer layer 6 of 0.2 μm. Since the thickness of the silicon oxide film 13 is 0.1 μm, the width of the groove formed in the upper buffer layer 6 is also 0.1 μm. The grooves could be formed almost vertically. More specifically, the width between the both side surfaces of the ridge and the upper buffer layer is more than 0 and 200 nm or less, and 90 ° ± 10 ° with respect to the surface of the substrate at the position of the central portion of the depth. A groove having an angle can be formed.

  In the embodiment shown in the figure, the groove is formed in half of the thickness of the upper buffer layer 6, but the groove may be formed over the entire thickness of the upper buffer layer 6. In this case, there is an effect in preventing an increase in threshold value due to the provision of the upper buffer layer 6, but there is a possibility of affecting the output light pattern of the semiconductor light emitting device. Whether to do this should be considered depending on the case.

  FIG. 5B is a diagram showing a state in which the resist film 17 has been removed. As apparent from comparison with FIG. 1D, this state is the same as that in FIG. 1D except that grooves are formed in the etching stopper layer 7 and the upper buffer layer 6 along the ridge 12. The same.

  In FIG. 5C, the silicon oxide film 23 is formed on the entire surface above the etching stop layer 7 by a thermal-chemical vapor deposition (T-CVD) method, as described with reference to FIG. It is a figure which shows the state which formed (thickness 0.1 micrometer). At first glance, this state looks similar to the silicon oxide film 13 of FIG. 4A, but the silicon oxide film 13 of FIG. 4A is provided to form a groove along the ridge 12, The silicon oxide film 23 is provided to form an insulating layer including the formed groove, while it is removed after use.

  5D, the insulating film (silicon oxide film 23) on the contact layer 11 above the ridge 12 is then removed in the same manner as described with reference to FIG. Here, in the first embodiment, the silicon oxide film 23 is an insulating film, but a silicon nitride film or the like can also be used.

  In FIG. 6, a polyimide resin 24 is formed on the upper surface of the silicon oxide film 23 to flatten the wafer surface, then a p-electrode 15 is formed on the ridge 12, and an n-electrode 16 is formed on the back surface of the n-type InP substrate 1. It is a figure which shows the state formed.

  Thereafter, the device is cut out by a cleavage process, and a reflective film having a reflectivity of 95% is coated on the rear end face, and a low reflective film having a reflectivity of 0.1% is coated on the front end face to complete a semiconductor light emitting device.

  FIG. 7A is a diagram for explaining the characteristics of the semiconductor light emitting device of Example 1 shown in FIG. 6. Corresponding to FIG. 3, the operating characteristics of the semiconductor light emitting device without the upper buffer layer 6 and the upper buffer are shown. It is a figure which shows the result of having compared the operating characteristic about the presence or absence of the groove | channel which reaches the middle of the upper buffer layer 6 at the time of providing the layer 6. FIG. As in FIG. 3, the horizontal axis represents the operating current, and the vertical axis represents the optical output. A solid line 21 ′ indicates a characteristic at an operating temperature of 85 ° C. in the semiconductor light emitting device of Example 1, and a broken line 22 indicates a characteristic of the semiconductor light emitting device without the upper buffer layer 6 at the same temperature. A thin solid line 21 indicates characteristics when the upper buffer layer 6 shown in FIG. As can be seen by comparing the solid line 21 ′ and the broken line 22, according to the first embodiment, the threshold values are equal, and an increase in the threshold value due to the provision of the upper buffer layer 6 can be suppressed. Further, as can be seen by comparing the solid line 21 'and the solid line 21, the light output can also be increased.

  FIG. 7B is a characteristic diagram in which the relationship between the groove width and the cut-off width of the upper buffer layer 6 is evaluated. The horizontal axis represents the groove width, and the vertical axis represents the cut-off width. As described above, the output of the semiconductor light emitting device can be increased by increasing the ridge width. On the other hand, the increase in the ridge width is negative for the single mode condition. As shown in the first embodiment, in the present invention, the ridge width can be effectively increased by providing the upper buffer layer 6 and providing a groove for preventing current diffusion in the upper buffer layer 6. FIG. 7B shows the result of evaluating the relationship between the groove width and the cut-off width under conditions that can satisfy the single mode. As described above, a cut-off width (ridge width) of 2.8 μm can be realized with a groove width of 0.1 μm, but a cut-off width (ridge width) of 2.8 μm can be realized even with a groove width of 0.2 μm. However, it can be seen that the cut-off width becomes smaller as the groove width becomes wider. Note that, as described in Japanese Patent Application Laid-Open No. 2004-214372 described above, a case where an insulating layer is formed by regrowth is described together with a result of examination. Depending on the regrowth, when the InP system is regrown, the crystal plane appears and the groove angle becomes 126 ° or more, and the groove width of 0.1 μm cannot be formed. Can not be satisfied.

  When the semiconductor light emitting device of Example 1 was operated in a range of up to 300 mA operating current at -5 ° C. to 85 ° C., the operating characteristics shown in FIG. 7A were obtained, and it was confirmed to be in the horizontal single mode. . Further, from the result of FIG. 7B, it is understood that the groove width is desirably 0.8 μm or less in consideration of manufacturing errors and the like.

  When the far-field image was evaluated, in the semiconductor light-emitting device having only the upper buffer layer 6 and not having the groove along the side surface of the ridge 12, the spread of the far-field image is 45 ° in the direction perpendicular to the substrate 1. The horizontal direction was 20 °. On the other hand, in the semiconductor light emitting device of Example 1, the spread of the far-field image is 45 ° in the vertical direction with respect to the substrate 1 and 25 ° in the horizontal direction, and the anisotropy in the spread direction is relaxed. confirmed.

  Furthermore, the semiconductor light emitting device of Example 1 showed good oscillation characteristics such as a threshold value of 10 to 20 mA and an oscillation efficiency of 0.3 to 0.4 W / A at room temperature and continuous oscillation conditions. Further, a threshold value of about 20 to 30 mA and an oscillation efficiency of 0.15 to 0.2 W / A were obtained at an operating temperature of 85 ° C. At 85 ° C., the light output increased by about 20 to 40% when the operating current was 150 mA with the same threshold as that of the semiconductor light emitting device without the upper buffer layer.

  In Example 1, the oscillation wavelength of the laser, that is, the emission wavelength of the multiple quantum well active layer is set to 1.5 μm, but the same effect can be obtained when the wavelength is set to the 1.3 μm band. The same effect can be obtained with a distributed Bragg reflection type or Fabry-Perot type, even if it is not a distributed feedback type. It goes without saying that the same effect can be obtained if grooves having the same angle can be formed even if the manufacturing methods are different. Further, an InGaAlAs system may be used instead of the InGaAsP system. Further, although the silicon oxide film is used as the insulating film, a silicon nitride film or the like can also be used.

  In Example 1, a diffraction grating having an oscillation wavelength suitable for the absorption edge wavelength of the optical modulator region can be manufactured by manufacturing a diffraction grating in the upper cladding layer. There is an advantage that the difference (ΔH) between the wavelength of the oscillation light and the absorption edge wavelength in the optical modulator region can be kept constant.

[Example 2]
The semiconductor light emitting device to which the present invention is applied can be realized by a configuration starting from an n-type GaAs semiconductor substrate instead of the configuration starting from an n-type InP semiconductor substrate. FIGS. 8A to 8C are diagrams showing a semiconductor light emitting device realized by a configuration starting from an n-type GaAs semiconductor substrate as a second embodiment.

  The semiconductor light-emitting device shown in Example 2 is different in material and part of the manufacturing process by using different substrates as starting points, but can be configured with similar procedures, so the description is simplified.

As shown in FIG. 8A, an n-type GaAs buffer layer (film thickness 0.5 μm) 32, an n-type (Al _x ) 32 is formed on an n-type GaAs semiconductor substrate (thickness 2 mm) 31 by MO-CVD. Lower cladding layer (film thickness 2.5 μm) 33 made of Ga _1-x ) _0.5 In _0.5 P (x = 0.60), GaInP (thickness 6 nm) well having 1.1% compressive strain Multi-quantum well in which a layer and a barrier layer of (Al _x Ga _1-x ) _0.5 In _0.5 P (x = 0.45) (thickness 6 nm) having a 0.7% tensile strain are stacked in two periods An active layer (thickness 0.024 μm) 34, an upper cladding layer (thickness 0.02 μm) 35 made of p-type (Al _x Ga _1-x ) _0.5 In _0.5 P (x = 0.50), _(Al x _{Ga 1-x)} upper buffer layer composed of _{0.5 In} 0.5 P (thickness 0.3μm _{36, (Al x Ga 1-} x) 0.5 In 0.5 P (x = 0.60) layer (thickness 2.0 .mu.m) of 40, a contact layer made of GaAs (thickness 0.2 [mu] m) 41 Are stacked. In this example, the emission wavelength of the multiple quantum well active layer is about 0.66 μm.

  As shown in FIG. 8B, the ridge 42 is formed by etching until the surface of the upper buffer layer 36 is exposed by a dry etching process. The width of the ridge 42 was 1.7 μm.

  Thereafter, the same process as in FIGS. 4 (a)-(d) and FIGS. 5 (a)-(d) is performed, and as shown in FIG. 8 (c), the semiconductor has a structure starting from an n-type GaAs semiconductor substrate. A light emitting device can be realized. Here, 43 is a silicon oxide film, which is an insulating layer corresponding to the silicon oxide film 23 of the first embodiment. A polyimide resin 44 is provided on the upper surface of the silicon oxide film 43 to flatten the wafer surface. This corresponds to the polyimide resin 24 of Example 1. Reference numerals 45 and 46 denote p and n electrodes, respectively, corresponding to the p and n electrodes 15 and 16 of the first embodiment. Further, the device is cut out by a cleavage process, and a reflective film having a reflectance of 92% is coated on the rear end face, and a low reflective film having a reflectance of 7% is coated on the front end face. Since the semiconductor light emitting device of Example 2 is a Fabry-Perot type laser, it is not necessary to form a diffraction grating layer on the ridge 42.

  Also in the second embodiment, when the groove is formed by etching along the ridge 42, the depth of the groove can be adjusted by adjusting the etching time. In Example 2, a groove having a width of 0.1 μm and a depth of 0.1 μm was formed with respect to the film thickness of the upper buffer layer 36 of 0.3 μm. Moreover, the groove angle was almost vertical.

  It was confirmed that when the semiconductor light emitting device of Example 2 was operated in the range of the operating current of 450 mA at −10 ° C. to 80 ° C., the horizontal single mode was obtained. It was confirmed that the width of the ridge can be expanded even if the grooves formed in this way are formed. Further, good oscillation characteristics were exhibited, with a threshold value of 40 to 55 mA and an oscillation efficiency of 1.0 to 1.2 W / A at room temperature and continuous oscillation conditions. Thus, the optical output increased by about 20 to 40% when the operating current was 400 mA at the same threshold value as the semiconductor light emitting device without the upper buffer layer.

  In Example 2, the oscillation wavelength of the semiconductor light emitting device, that is, the emission wavelength of the multiple quantum well active layer is set to 0.66 μm. However, the same effect can be obtained when the wavelength is set to other wavelengths. be able to. The semiconductor light emitting device manufactured as described above can be applied to a DVD LD.

[Example 3]
An example of an embodiment of an integrated optical waveguide device to which the present invention is applied will be described with reference to FIGS. 9 (a)-(e), 10 (a)-(d), and FIG. However, the drawings are only for explaining the present embodiment, and the size of the drawings and the scale described in the present embodiment do not always coincide.

  As shown in FIG. 9A, first, an n-type InP buffer layer 52 (film thickness 0.5 μm), n-type InGaA1As (composition wavelength) is formed on an n-type InP semiconductor substrate 51 (thickness 2 mm) by MO-CVD. 0.92 μm) of an electroabsorption optical modulator lower cladding layer 53 (film thickness of 0.1 μm), an InGaA1As well layer (film thickness of 7 nm, composition wavelength of 1.5 μm) having 0.6% compression strain, An electro-absorption optical modulator comprising an InGaA1As barrier layer (film thickness: 10 nm, composition wavelength: 1.35 μm) having nine periods and a multi-quantum well active layer 54 of InGaA1As (composition wavelength: 0.92 μm) having a tensile strain of .6% An upper cladding layer 55 (film thickness of 0.1 μm) is laminated.

  Next, as shown in FIG. 9B, etching is performed to the surface of the n-type InP buffer layer 52 leaving a width (for example, 300 μm) corresponding to the electroabsorption optical modulator.

  Next, as shown in FIG. 9C, a waveguide lower cladding layer 56 (film thickness 0.1 μm) made of n-type InGaAsP (composition wavelength 1.10 μm) and a conductor made of InGaAsP (composition wavelength 1.3 μm). A waveguide upper cladding layer 58 (0.1 μm) made of a waveguide core 57 (film thickness 0.16 μm) and InGaAsP (composition wavelength 1.15 μm) is laminated.

  Next, as shown in FIG. 9D, etching is performed up to the surface of the n-type Inp buffer layer 52 leaving an electroabsorption optical modulator having a length of 300 μm and a waveguide having a length of 150 μm.

  Next, as shown in FIG. 9E, the lower cladding layer 59 made of n-type InGaAsP (composition wavelength 1.10 μm) of the light emitting device is formed as an InGaAsP well layer (film) having a compressive strain of 0.13 μm and 1.0%. A 5-quantum multi-quantum well active layer 60 having a thickness of 7 nm, a composition wavelength of 1.5 μm, and an InGaASP barrier layer having a tensile strain of 0.5% (film thickness of 12 nm, composition wavelength of 1.3 μm), InGaAsP (composition wavelength) 1.10 μm) upper cladding layer 61 (film thickness 0.10 μm), p-type InP upper buffer layer 62 (film thickness 0.2 μm), InGaAsP (composition wavelength 1.3) etching stop layer 63 (composition wavelength 1.3) 0.005 μm thickness), lower spacer layer 64 made of p-type InP (0.02 μm thickness), and diffraction grating layer 65 made of InGaAsP (composition wavelength 1.3 μm) (film) 0.03μm) are stacked. The emission wavelength of the multiple quantum well active layer is about 1.5 μm.

  As shown in FIG. 10A, next, a diffraction grating is formed on the diffraction grating layer 65 by a known interference exposure method on the diffraction grating layer 65 and subsequent etching with a phosphoric acid solution. Further, a window 66 is formed in the electroabsorption optical modulator. Since there is a lower spacer layer 64 made of Inp between the etching stop layer 63 and the diffraction grating layer 65, it becomes a floating type diffraction grating, and the diffraction grating can be accurately manufactured even if the etching time is slightly different.

  As shown in FIG. 10B, subsequently, the p-type InP is formed on the diffraction grating layer 65 in which the diffraction grating is formed by the MO-CVD method, the upper cladding layer 58 and the n-type InP buffer layer 52 in which the window 66 is formed. A layer 67 (thickness 2.0 μm), InGaAsP (composition wavelength 1.3 μm) and InGaAs contact layer 68 (thickness 0.3 μm) are stacked. Here, since the p-type InP layer 67 has a film thickness of 2.0 μm, which is an order of magnitude thicker than other layers, the laminated surface is substantially flattened.

  Thereafter, as shown in FIG. 10C, the ridge 69 is formed by etching the electroabsorption optical modulator upper cladding layer 55, the waveguide upper cladding layer 58, and the light emitting device etching stop layer 63. Then, as shown in FIG. At this time, the ridge width of the light emitting device was set to 2.5 μm, and the ridge width of the electroabsorption optical modulator was set to 1.5 μm. The width of the ridge of the waveguide connecting them is tapered so as to continuously change from the light emitting device portion toward the electroabsorption optical modulator portion.

  Next, as shown in FIG. 10D, the contact layer 68 of the waveguide was removed, and the contact layer of the light emitting device and the electroabsorption optical modulator was separated.

  FIG. 11 is a diagram illustrating a completed state of the integrated optical waveguide device according to the third embodiment. This is obtained by performing the following steps following the configuration shown in FIG. As described in FIG. 5C, the silicon oxide film 70 (on the entire surface above the electroabsorption optical modulator upper cladding layer 55, the waveguide upper cladding layer 58, and the light emitting device etching stop layer 63 by T-CVD). A thickness of 0.1 μm) is formed. Next, as described in FIG. 5D, the insulating film on the contact layer 68 on the ridge 69 of the semiconductor light emitting device and the electroabsorption optical modulator is removed (at this time, the silicon is formed on the upper portion of the waveguide). The oxide film 70 remains). Here, although the silicon oxide film is used as the insulating film in the third embodiment, a silicon nitride film or the like can also be used. Next, as described with reference to FIG. 6, the wafer surface is flattened by the polyimide resin 71. Finally, a p-electrode 72 is formed on the contact layer 68 of the semiconductor light emitting device, a p-electrode 73 is formed on the contact layer 68 of the electroabsorption optical modulator, and an n-electrode 74 is formed on the back surface of the n-type InP substrate 51. Thereafter, the element was cut out by a cleavage process, and a reflective film having a reflectance of 95% was coated on the rear end face, and a low reflective film having a reflectance of 0.1% was coated on the front end face.

  In the third embodiment, since the diffraction grating 65 is formed on the etching stop layer 63, the diffraction grating is integrated into the upper cladding layer 61 and the upper buffer layer 62 by four times of growth unlike the case where the diffraction grating is formed. Is possible. The order of growth of the electroabsorption optical modulator, the waveguide, and the semiconductor light emitting device is not limited to this. As described in the second embodiment, an InGaAlAs system can be adopted as a material for the semiconductor light emitting device, instead of the InGaAsP system. Further, an InGaAsP system may be used instead of the InGaAlAs system as a material for the electroabsorption optical modulator.

  In Example 3, the ridge width is 2.0 μm in the region of the semiconductor light emitting device, 1.4 μm in the region of the electroabsorption optical modulator, and the waveguide connecting the both has a length of 150 μm and is coupled in a tapered shape. did. As a result, the ridge of the semiconductor light emitting device and the ridge of the electroabsorption optical modulator could be coupled with almost no optical loss.

  FIG. 12 shows the case where the ridge width of the semiconductor light emitting device is 2.0 μm and 2.5 μm, and the ridge width of the electroabsorption optical modulator is 1.4 μm. It is a figure which shows the result of having taken and evaluated. As can be seen from the figure, substantially the same characteristics are obtained when the waveguide length is in the range of 10 μm to 150 μm. Therefore, unless coupling is performed with an extreme step, coupling can be performed without being affected by the inclination of the taper. Further, by providing the window 66, the optical coupling with the optical fiber is facilitated, and the coupling loss can be suppressed to 3 dB or less.

  Further, when the far-field image of the integrated optical waveguide device of Example 3 was measured, the spread of the semiconductor light emitting device alone was 45 ° in the vertical direction and 20 ° in the horizontal direction. In the integrated semiconductor waveguide device, it was confirmed that the spreading anisotropy was relaxed by 45 ° in the vertical direction and 35 ° in the horizontal direction. The operating current of the semiconductor light emitting device was operated in the range of 70 to 150 mA at -5 ° C to 85 ° C. In addition, the offset bias is optimally adjusted in the voltage applied to the p-electrode 73 of the electroabsorption optical modulator at −5 ° C. to 85 ° C., and the modulation amplitude voltage is set to 2.5 V or less, so that the optical output is 1 dBm or more and dynamic. An extinction ratio of 10 dB or more and a bandwidth of 10 Gbps or more could be obtained. As a result, it became possible to obtain a good eye opening at a transmission distance of 40 km or more at a bit rate of 10 Gbps without adjusting the temperature at -5 ° C to 85 ° C.

  The semiconductor light-emitting device of the integrated optical waveguide element of Example 3 has the same configuration as that of the semiconductor light-emitting device that is the premise of the present invention described in FIGS. 1 and 2, but is shown in FIG. 6 described in Example 1. A grooved structure may be used.

[Example 4]
Example 4 of an integrated optical waveguide device to which the present invention is applied will be described with reference to FIG. 13 as an example of an integrated optical waveguide device that employs a Mach-Zehnder optical modulator instead of an electroabsorption optical modulator. To do. However, the drawings are only for explaining the present embodiment, and the size of the drawings and the scale described in the present embodiment do not always coincide.

  FIG. 13 is a diagram illustrating a configuration of an integrated optical waveguide device according to the fourth embodiment. In the integrated optical waveguide device of the fourth embodiment, a semiconductor light emitting device LD, a waveguide WG, a Mach-Zehnder optical modulator MZ, and a window 66 are formed on an n-type InP substrate 1 and an InP buffer layer 2, and cascaded. Are combined. The semiconductor light emitting device LD has the same configuration as the semiconductor light emitting device as the premise of the present invention described with reference to FIGS. The waveguide WG is the same as the waveguide in the configuration of the integrated optical waveguide device according to the second embodiment described with reference to FIGS. 9-11, but the drawing is complicated, and thus the reference numerals are omitted. The Mach-Zehnder type optical modulator MZ is connected to the waveguide WG and is shunted to the two optical paths 81 and 82, and then reconnected and connected to the window 66. The contact layer 11 is formed in one of the two optical paths 81 and 82. Similarly to the waveguide WG, the two optical paths 81 and 82 also include a waveguide lower cladding layer 56, a waveguide core 57 made of InGaAsP (composition wavelength 1.3 μm), and InGaAsP (composition wavelength 1.15 μm). A waveguide upper cladding layer 58 is laminated.

  The manufacturing process will be briefly described. First, in the same manner as shown in FIG. 1C, after the semiconductor light emitting devices LD are stacked, the region of the waveguide WG and the Mach-Zehnder type optical modulator MZ is changed to InP. Etching is performed up to the surface of the buffer layer 2, and waveguide portions 56-58 are laminated thereon. After the window 66 is formed, the p-type InP layer and the contact layer 11 are stacked. This state is the same as the situation shown in FIG. Thereafter, in the same manner as shown in FIGS. 10C and 10D, the configuration shown in FIG. 13 is obtained. Thereafter, the integrated optical waveguide device of Example 4 is completed in the same manner as in FIG. 11, but the illustration is omitted.

  Here, the optical path lengths of the two optical paths 81 and 82 are configured to be different from each other by a half of the wavelength of the transmission frequency of the semiconductor light emitting device LD. When the voltage applied between the electrode connected to the contact layer 11 of the optical path 81 and the electrode provided on the lower surface of the substrate 1 reaches a predetermined value, the refractive index of the optical path 81 changes, and the transparent optical path length is changed. For example, the optical path lengths of the optical paths 81 and 82 are made equal. As a result, when there is no voltage between the electrodes, no optical signal is output, and when a voltage is applied between the electrodes, an optical signal is output.

  Also in the fourth embodiment, for example, the ridge width of the semiconductor light emitting device LD is 2.0 μm, and the ridge width of the Mach-Zehnder type optical modulator MZ is 1.0 μm so that they can be coupled with almost no optical loss. The ridge of the waveguide WG was tapered. Further, the window 66 facilitates optical coupling with the optical fiber, and the coupling loss can be suppressed to 3 dB or less. The operating current of the semiconductor light emitting device LD was operated in the range of 70 to 150 mA at -5 ° C to 85 ° C. Further, the voltage applied to the electrode 11 of the Mach-Zehnder type optical modulator is adjusted to an offset bias optimally at -5 ° C. to 85 ° C., and by adjusting the modulation amplitude voltage to 2.5 V or less, the optical output is 3 dBm or more. An effective extinction ratio of 10 dB or higher and a bandwidth of 10 Gbps or higher were obtained. As a result, it became possible to obtain a good eye opening at a transmission distance of 40 km or more at a bit rate of 10 Gbps without adjusting the temperature at -5 ° C to 85 ° C.

  The Mach-Zehnder optical modulator MZ is not limited to this, and may be an optical waveguide element having a function equivalent to this. In addition to the optical modulator, integration with an optical amplifier or the like is also possible.

DESCRIPTION OF SYMBOLS 1 ... n-type InP semiconductor substrate, 2 ... n-type InP buffer layer, 3 ... n-type InGaAsP lower clad layer, 4 ... Multiple quantum well active layer, 5 ... InGaAsP upper clad layer, 6 ... p-type InP upper buffer layer, 7 ... InGaAsP etching stop layer, 8 ... p-type InP lower spacer layer, 9 ... InGaAsP diffraction grating layer, 10 ... p-type InP layer, 11 ... InGaAs contact layer made of InGaAsP and InGaAs, 12 ... ridge, 13 ... silicon oxide film, 14 ... polyimide resin layer, 15 ... p electrode, 16 ... n electrode, 17 ... resist film, 23 ... silicon oxide film, 24 ... polyimide resin layer, 31 ... n-type GaAs semiconductor substrate, 32 ... n-type GaAs buffer layer, 33 ... n-type _{(Al x Ga 1-x)} 0.5 In 0.5 P (x = 0.60) lower cladding layer, 34 ... multi Quantum well active layer, 35 ... p-type _{(Al x Ga 1-x)} 0.5 In 0.5 P (x = 0.50) upper cladding _{layer, 36 ... (Al x Ga 1} -x) 0.5 In Upper buffer layer made of _0.5 P, 40... (Al _x Ga _1-x ) _0.5 In _0.5 P (x = 0.60) layer, 41 GaAs contact layer, 42 ridge, 43 silicon Oxide film, 44 ... polyimide resin, 45 ... p electrode, 46 ... n electrode, 51 ... n-type InP semiconductor substrate, 52 ... n-type InP buffer layer, 53 ... n-type InGaA1As electroabsorption optical modulator lower cladding layer, 54 ... Multiple quantum well active layer, 55 ... InGaA1As electroabsorption optical modulator upper cladding layer, 56 ... n-type InGaAsP waveguide lower cladding layer, 57 ... InGaAsP waveguide core, 58 ... InGaAsP waveguide upper cladding layer Lad layer, 59 ... n-type InGaAsP lower cladding layer, 60 ... multiple quantum well active layer, 61 ... InGaAsP upper cladding layer, 62 ... p-type InP upper buffer layer, 63 ... InGaAsP etching stop layer, 64 ... p-type InP lower spacer 65, diffraction grating layer, 66 ... window, 67 ... p-type InP layer, 68 ... contact layer made of InGaAsP and InGaAs, 69 ... ridge, 70 ... silicon oxide film, 71 ... polyimide resin, 72 ... p electrode, 73 ... p electrode, 74 ... n electrode, 81 ... optical path, 82 ... optical path, LD ... semiconductor light emitting device, WG ... waveguide, MZ ... Mach-Zehnder type optical modulator.

Claims (5)

In the integrated optical waveguide device in which the first optical waveguide device and the second optical waveguide device are coupled in cascade,
The first optical waveguide element is
A well layer disposed on the first conductivity type semiconductor layer;
A second conductivity type semiconductor layer disposed on the well layer;
A first electrode disposed on the second conductive semiconductor layer;
A second electrode disposed under the first conductivity type semiconductor layer,
And,
A ridge is formed by the second conductivity type semiconductor layer above the well layer,
The second optical waveguide element is
A first ridge waveguide core coupled in cascade with the well layer of the first optical waveguide element on the first conductivity type semiconductor layer, shunted, and shunted again after being shunted; An integrated optical waveguide device comprising a Mach-Zehnder type optical modulator comprising an electrode for applying a voltage to a path. In claim 1,
Including the third optical waveguide element cascade-coupled in the order of the first optical waveguide element, the third optical waveguide element, and the second optical waveguide element;
The third optical waveguide element is
A second ridge waveguide core overlying the first conductivity type semiconductor layer;
An insulating film on the second ridge waveguide core;
The integrated optical waveguide element, wherein the second ridge waveguide core is coupled in cascade with the well layer of the first optical waveguide element and the first ridge waveguide core of the second optical waveguide element . In claim 1,
The fourth optical waveguide element cascade-coupled in the order of the first optical waveguide element, the second optical waveguide element, and the fourth optical waveguide element,
The integrated optical waveguide device, wherein the fourth optical waveguide device forms a window. In claim 1,
The well layer of the first optical waveguide element is composed of InGaAlAs,
An integrated optical waveguide element, wherein the first ridge waveguide core of the second optical waveguide element is made of InGaAsP having a shorter composition wavelength than the well layer. In claim 2,
The well layer of the first optical waveguide element is made of InGaAsP;
The first ridge waveguide core of the second optical waveguide element is composed of InGaAsP having a shorter composition wavelength than the well layer,
An integrated optical waveguide element, wherein the second ridge waveguide core of the third optical waveguide element is made of InGaAsP having a shorter composition wavelength than the well layer.

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