JP2010225795A - Manufacturing method for tape carrier for semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method for a tape carrier for a semiconductor device, which enables an opening to be coated by copper plating at a current density higher than a conventional density to improve the productivity of the tape carrier and enhance the connection reliability. <P>SOLUTION: The manufacturing method has steps of: forming an opening 23 penetrating an insulating film 21 in the direction of thickness; pasting a copper foil 24 on the upper surface of the insulating film 21 to expose the copper foil 24 from the lower surface of the insulating film 21 through the opening 23; placing a mask 26 on the upper surface of the copper foil 24 and then plating the portion exposed through the opening 23 on the lower surface of the copper foil 24 by copper plating 27 to reduce the depth of the opening 23; photoetching the copper foil 24 stripped of the mask 26 from the upper surface thereof after the plating filling step, to form a conductive pattern 28; and forming a surface plating process layer 29 on the conductive pattern 28. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device tape carrier used as a connection medium when connecting a semiconductor element to an external substrate or the like, and more particularly to a method for manufacturing a semiconductor device tape carrier used for a BGA type package. is there.

  A semiconductor device using a BGA (Ball Grid Array) type package is suitable for high pin count and high density mounting. As shown in FIG. 4 showing the BGA type package, FIG. 5 showing the upper surface of the tape carrier 102 for a semiconductor device, and FIG. 6 showing the lower surface thereof, in particular, the tape carrier 102 manufactured by the reel-to-reel method. The fine pitch of the formed conductor pattern 103 can be achieved.

  Specifically, as shown in FIG. 7 which is a diagram (cross-sectional view) showing a manufacturing order of a conventional tape carrier for a semiconductor device, an adhesive layer 111 is provided on a polyimide film 110 serving as a substrate (FIG. 7 ( a)), 112 is provided with a via hole penetrating through the polyimide film 110 with the adhesive layer 111 in the thickness direction (FIG. 7B), and the copper foil 113 is bonded with the rolls 114a and 114b (FIG. 7C). (D)). Next, a copper foil 113 is formed on the conductor pattern 115 by a photoetching method (FIG. 7E). Then, a masking tape 116 is attached to the conductor pattern 115, and the copper plating 117 is filled into the via hole 112 to reduce the depth of the via hole (FIG. 7 (f)). Thereafter, the masking tape 116 is peeled off (FIG. 7G), and the solder resist 119 is formed in a predetermined shape, and then the surface plating layer 118 is provided (FIG. 7H). Through this series of steps, the semiconductor device tape carrier 120 is manufactured.

  In summary, on the upper surface side of the tape carrier 120 in which the conductor pattern 115 is formed on the polyimide film 110 having an opening (via hole) penetrating in the thickness direction, as shown in FIGS. After the electrode 105 of the semiconductor element 104 is connected with a bonding wire 106 such as a gold wire and molded with a sealing resin 107, the solder ball 109 is connected to the conductor pattern 103 via the via hole 108 on the lower surface side of the tape carrier 102. Thus, a configuration of the semiconductor device 101 can be given. In this case, there is an advantage that thinning and downsizing, that is, high density can be achieved.

In order to promote further higher density, it is necessary not only to increase the fine pitch of the conductor pattern 103 on the upper surface side, but also to increase the fine pitch of the via holes 108 on which the solder balls 109 are mounted on the lower surface side serving as external connection terminals. is there.
For this purpose, it is necessary to reduce the diameter of the via hole 108, but simply reducing the diameter of the via hole 108 may cause a problem in joining the solder ball 109 and the conductor pattern 103.

  Therefore, the problem is solved by filling the via hole 108 in which the solder ball 109 is mounted with a metal plating layer and reducing the depth of the via hole 108 (see, for example, Patent Documents 1 and 2). In addition, as related art, what changes the addition amount of the additive used when applying this metal plating layer for every component of an additive is known (for example, refer patent document 3).

Japanese Patent No. 3238074 Japanese Patent No. 3510219 JP 2001-152398 A

On the other hand, when metal plating is performed on the via hole as described above, it is necessary to consider the current density when performing metal plating.
For example, in the case of bright electrolytic copper plating by a copper sulfate plating solution system generally performed on a TAB tape carrier which is one of the tape carriers, the plating solution manufacturer sets the current density at the time of copper plating to 1 It is recommended to be about ˜5 A / dm ² .
Furthermore, because of the TAB tape manufacturing method, which is manufactured reel-to-reel, there are restrictions on the structure of the copper plating equipment, such as the distance between the electrodes cannot be close, and the influence on the plating thickness distribution due to the non-uniform conductor pattern Considering that the allowable current is reduced due to the thin conductor pattern, it is difficult to increase the current density during plating from 1 to 5 A / dm ² as a result.

When the current density cannot be increased in this way, in the reel-to-reel method, plating is performed over time by lowering the conveying speed, or plating is performed by extending the plating tank while maintaining the conveying speed high. There is a need. In the latter case, the equipment cost becomes enormous, so it is not so realistic, and the former is often selected. In the case where an opening having a depth of 50 μm is embedded by copper plating at a current density of 5 A / dm ² , the calculation takes about 45 minutes.

  In addition, when copper plating is performed over time as described above, the copper plating and the conductor pattern in the via hole are usually different in the manufacturing method, and as a result, the physical properties are different, so that the copper plating and the conductor pattern are joined. It is necessary to consider. In particular, when the copper foil for forming a conductor pattern used in the TAB tape carrier is an electrolytic copper foil, it is necessary to consider this bonding.

For example, when an electrolytic copper foil manufacturer manufactures a copper foil, the opposing electrodes can be brought close to each other in the drum plating method, and the current density during plating in the reel-to-reel method is 1 to 5 A / dm ^2. In contrast, the drum plating method achieves operation at a high current density of about 15 to 60 A / dm ² . For example, when an electrolytic copper foil having a thickness of 50 μm is formed at a current density of 60 A / dm ² , the calculation takes about 4 minutes.

  Therefore, the plating current density is different between the copper foil used in the TAB tape manufacturing process and the copper plating applied in the TAB tape manufacturing process, and while using the same copper as the metal, crystal orientation, etc. The physical properties are different.

  In such semiconductor devices with different physical properties such as crystal orientation between copper foil and copper plating, copper is assumed assuming mechanical stress such as bending and excessive environmental load (temperature, humidity, etc.). It is desirable to strengthen the bond between the foil and the copper plating.

  An object of the present invention is to provide a method for manufacturing a tape carrier for a semiconductor device, which improves the productivity of the tape carrier and improves the connection reliability by enabling the filling of the opening with copper plating at a higher current density than before. Is to provide.

The first aspect of the present invention is the step of providing an opening penetrating the insulating film in the thickness direction, and bonding the copper foil to the upper surface of the insulating film, thereby allowing the lower surface of the insulating film to pass through the opening. The step of exposing the copper foil, and masking the upper surface of the copper foil, and then performing copper plating on the exposed portion of the lower surface of the copper foil through the opening, thereby reducing the depth of the opening. A plating filling step, and after the plating filling step, a step of forming a conductor pattern by photo-etching the copper foil from which the masking has been removed from the upper surface side, and forming a surface plating layer on the conductor pattern And a step of performing.

According to a second aspect of the present invention, in the invention described in the first aspect, the plating filling step is performed by an electrolytic plating method, and a current density during the plating filling step is 15 to 60 A / dm ^2. Features.

  According to a third aspect of the present invention, in the invention described in the first or second aspect, the copper plating solution used in the plating filling step is a copper sulfate-based electrolytic copper plating solution, and has surface activity as an additive component. And / or a brightening agent.

  According to a fourth aspect of the present invention, in the invention according to any one of the first to third aspects, the plating filling step is performed in a reel-to-reel system and used in the reel-to-reel system. One copper plating tank is used, and the jet pressure of the copper plating solution in the copper plating tank is set to 0.1 MPa or more, and as a pretreatment of the plating filling step, a portion exposed through the opening on the lower surface of the copper foil is prevented. The rust film is removed with a chemical polishing liquid.

  According to a fifth aspect of the present invention, in the invention according to any one of the first to fourth aspects, the copper foil is an electrolytic copper foil.

  According to the present invention, there is provided a method for manufacturing a tape carrier for a semiconductor device that improves the productivity of the tape carrier and increases the connection reliability by enabling the copper plating filling of the opening at a higher current density than before. Can be provided.

It is sectional drawing which shows the manufacture order of the tape carrier for semiconductor devices in one Embodiment of this invention. It is a schematic plan view of the copper plating apparatus used for the plating filling process in one Embodiment of this invention. It is a figure which shows the evaluation result in a present Example and a comparative example. It is sectional drawing which shows a BGA type package. It is explanatory drawing at the time of seeing 1 unit of tape carriers from the upper surface side. It is explanatory drawing at the time of seeing one unit of tape carriers from the lower surface side. It is sectional drawing which shows the manufacture order of the conventional tape carrier for semiconductor devices.

The inventors of the present invention have studied various methods for manufacturing a semiconductor device tape carrier that can fill the opening with copper plating at a higher current density than before.
As a result, the inventors have found that after the copper plating is filled into the opening, the copper pattern can be filled into the opening at a higher current density than before by forming a conductor pattern. .

  Below, the manufacturing method of the tape carrier for semiconductor devices which concerns on one Embodiment of this invention is demonstrated.

FIG. 1 is a cross-sectional view showing the manufacturing sequence of a semiconductor device tape carrier according to an embodiment of the present invention.
In the manufacture of the tape carrier for a semiconductor device according to one embodiment of the present invention, first, the adhesive layer 22 is provided on the insulating film 21 (FIG. 1A).
The insulating film 21 only needs to have insulating properties, and examples thereof include a polyimide film. The outer shape may be any shape as long as it can be used as a substrate, for example, a long rectangular shape.
The adhesive layer 22 may be located between the copper foil 24 and the insulating film 21, which will be described later, as long as it can adhere the copper foil 24 and the insulating film 21 via the adhesive layer 22. An epoxy resin adhesive layer is mentioned.

  Next, via holes 23 (hereinafter also referred to as openings 23) penetrating in the thickness direction are provided in the polyimide film 21 with the adhesive layer 22 by a mold punch (FIG. 1B).

Thereafter, the copper foil 24 is bonded to the upper surface side of the insulating film 21 (FIGS. 1C and 1D). This bonding is performed through the adhesive layer 22, and a laminating method using rolls 25a and 25b is used.
Thus, the copper foil 24 is exposed to the lower surface of the insulating film 21 through the opening 23 by bonding the copper foil 24 to the upper surface of the insulating film 21.
The opening 23 provided as described above becomes a solder ball mounting via hole having a shape in which the upper surface side of the insulating film 21 is closed with the copper foil 24.
The copper foil 24 is preferably an electrolytic copper foil. By reducing the difference between the current density when forming the copper foil 24 and the current density when forming copper-filled plating 27 (hereinafter also referred to as copper plating) to be described later, physical properties such as crystal orientation are different. This is because it is possible to suppress the occurrence of the occurrence of the problem and to strengthen the bonding between the copper foil 24 and the copper plating 27.

  Thereafter, in a reel-to-reel type copper plating apparatus, the upper surface of the copper foil 24 is masked with a slightly adhesive tape 26 and then exposed to the portion exposed through the opening 23 on the lower surface of the copper foil 24. On the other hand, copper plating 27 is performed to fill the opening 23 and reduce the depth of the opening 23 (FIG. 1E) (hereinafter, this process is also referred to as a plating filling process). In addition, although copper plating is performed in the present embodiment, other appropriate metals can be substituted.

Conventionally, the conductor pattern is usually formed before the plating filling step. On the other hand, in this embodiment, after the plating filling step, the masking tape 26 is peeled off (FIG. 1 (f)), and the conductor pattern 28 is formed by a photoetching method (FIG. 1 (g)).
When the copper plating 27 is applied before the formation of the conductor pattern 28 as in this embodiment, and when the copper plating 117 is applied after the formation of the conductor pattern 115 as in the prior art shown in FIG. The cross-sectional area of the copper foil 24 is different. As described above, the copper plating 27 is applied to the exposed portion of the lower surface of the copper foil 24 through the opening 23. However, the etching is still performed when the copper plating is performed before the conductor pattern 28 is formed. Therefore, the cross-sectional area of the copper foil 24 to which the copper plating 27 is applied is large. Since the cross-sectional area of the copper foil 24 is large, the allowable current in the plating filling process is high, and as a result, it is a favorable condition for plating at a high current density.

Further, the plating filling process is carried out in electroplating, the current density at that time is preferably set to 15~60A / dm ^2. As described above, in this embodiment, the copper plating 27 can be filled into the opening 23 at a higher current density than in the prior art. Therefore, when the electrolytic plating method is used, the time required for the plating filling process can be shortened. This is because the productivity of the tape carrier can be improved. Moreover, since the current density close to the current density at the time of electrolytic copper foil creation can be selected, the physical properties equivalent to the electrolytic copper foil (for example, crystal orientation) can be obtained, and the bonding reliability at the interface between the copper foil and the plating is high. improves.

  Moreover, it is preferable that the copper plating solution used at the time of the said plating filling process is a copper sulfate type electrolytic copper plating solution.

  Furthermore, it is preferable to contain a surfactant and / or a brightener as an additive component to the copper plating solution. Examples of the surfactant include PEG (polyethylene glycol) and PPG (polypropylene glycol). Examples of the brightener include SPS (bis (3-sulfopropyl) disulfide disodium).

Finally, final plating as a surface plating layer 29 is performed on the upper and side surfaces of the conductor pattern 28 in the order of nickel and gold (FIG. 1 (h)). Through this series of steps, the tape carrier 31 for a semiconductor device is manufactured.
The surface plating layer 29 may be selected from another metal plating such as tin or solder according to the bonding method. Further, when the surface plating layer 29 is provided, a solder resist 30 may be provided in a predetermined shape as an insulating layer.

  Here, the plating filling process in the manufacturing process of the semiconductor device tape carrier according to the embodiment of the present invention will be described in detail.

FIG. 2 is a schematic plan view of a copper plating apparatus used in the plating filling process in one embodiment of the present invention.
As shown in FIG. 2, the tape carrier 32 in the state of FIG. 1D in which the copper foil 24 is bonded to the upper surface of the insulating film 21 is reel-toe unwound from the reel 34 at the unwinding portion 33. -It is preferable to use the reel method.

  Next, after the upper surface of the copper foil 24 of the tape carrier 32 is brought into contact with the front power supply roll (cathode side) 35, a slightly adhesive masking tape is bonded to the upper surface of the copper foil 24 of the tape carrier 32 by the masking tape applying device 36.

As a pretreatment of the plating filling process, the tape carrier 32 is washed in an acid degreasing tank 37, and then the surface of the copper foil 24 in the opening 23 is etched with a hydrogen peroxide-sulfuric acid type chemical polishing liquid in an acid washing tank 38. To do. As described above, it is preferable to remove the portion of the anticorrosive film exposed through the opening 23 on the lower surface of the copper foil 24 with the chemical polishing liquid. A portion of the lower surface of the copper foil 24 exposed through the opening 23 is usually attached with a different metal such as nickel or zinc as a rust preventive film. This is because the rust preventive coating layer needs to be removed with a chemical polishing solution in the pretreatment of the copper plating in order to prevent a decrease in bonding reliability due to the mixing of different metals under this situation.
Although not shown in FIG. 2, the tape carrier 32 is washed with water between the tanks. Similar processing is performed in the subsequent steps.

And after performing the pre-process of a plating filling process with respect to the tape carrier 32, the copper plating tank 39 is passed.
It is preferable that the copper plating tank 39 is not a multi-stage tank but only one tank in the copper plating apparatus. In the case of a multi-stage tank, copper plating is interrupted when the tank is moved, so that the copper plating is formed to be a multi-stage layer, and as a result, a brittle interface is formed. .

The copper plating tank 39 is filled with a copper plating solution 41 made of copper sulfate, and further, an insoluble electrode (anode side) 40 is disposed therein. Furthermore, in this embodiment, the jet nozzle 42 for performing jet stirring is arrange | positioned. Even if the jet nozzle 42 is not provided, stirring is performed in the copper plating tank 39, and the tape carrier 32 itself is further transported to form a slight stirring state. This is because the agitation state can be further increased, which is advantageous for improving the current density. The jet pressure of the jet nozzle 42 is 0. It is preferable to be 1 MPa or more. This is because the vicinity of the plated portion can be satisfactorily stirred, and copper ions can be supplied smoothly even at a higher current density than in the past.

In summary, in this copper plating tank 39, the copper plating solution 41 is jetted onto the tape carrier 32 by the jet nozzle 42 while applying an electric field by the insoluble electrode (anode side) 40.
Thereby, when the tape carrier 32 passes through the copper plating tank 39, the copper plating 27 is applied to the portion exposed through the opening 23 on the lower surface of the copper foil 24. In addition, about the other part of the copper foil 24, since the copper foil 24 is not exposed to the first place, or since it is masked by the masking tape 26, the copper plating 27 is not performed.

After passing through the copper plating tank 39, the copper plating solution 41 is washed away in the post-cleaning tank 43. Then, the masking tape 26 is peeled off by the masking tape peeling device 44, and the upper surface of the copper foil 24 is brought into contact with the rear power supply roll (cathode side) 45.
Further, after washing with water in the post-water washing tank 46, it is dried in the drying tank 47 and taken up on the reel 49 by the take-up unit 48.

  As described above, according to the present embodiment, it is possible to improve the productivity of the tape carrier and increase the connection reliability by enabling the copper plating 27 to be filled in the opening 23 at a higher current density than before. Can do. The tape carrier for a semiconductor device manufactured according to the present embodiment is suitable for a semiconductor device, particularly a fine pitch BGA type package (F-BGA).

An embodiment of the present invention will be described below with reference to FIG.
Example 1
First, an adhesive layer 22 (Yodogawa X: thickness 12 μm) is provided on a polyimide film 21 (Upilex S: thickness 50 μm) serving as a substrate (FIG. 1A), and the polyimide film 21 with the adhesive layer 22 is attached. A via hole 23 (φ280 μm) penetrating in the thickness direction was provided (FIG. 1B), and copper foil 24 (VLP foil: thickness 18 μm) was bonded by rolls 25a and 25b (FIGS. 1C and 1D). )).
And the masking tape 26 was affixed on the copper foil 24, and the copper plating 27 was filled with 40 micrometer with respect to the via hole 23 (FIG.1 (e)).
At this time, the jet pressure of the copper plating solution was 0.1 MPa, and the current density during copper plating was 15 A / dm ² .
After the plating filling step, the masking tape 26 was peeled off (FIG. 1 (f)), and the copper foil 24 was photoetched to form a conductor pattern 28 (FIG. 1 (g)).
Finally, a solder resist 30 having insulating properties was formed into a predetermined shape, and then a surface plating layer 29 made of gold and nickel was provided (FIG. 1 (h)). Through this series of steps, the semiconductor device tape carrier 31 in this example was manufactured.

(Examples 2-3)
In Example 2, a tape carrier 31 for a semiconductor device was produced in the same manner as in Example 1 except that the current density at the time of copper plating was 30 A / dm ² .
In Example 3, a tape carrier 31 for a semiconductor device was produced in the same manner as in Example 1 except that the current density at the time of copper plating was 60 A / dm ² .

(Comparative Examples 1-2)
As shown in FIG. 7, in Comparative Example 1, the conductive pattern 115 is formed before the plating filling step, and then the plating filling step is performed, and the current density at the time of copper plating is set to 30 A / dm ^2. In the same manner as in Example 1, a semiconductor device tape carrier 120 was produced.
In Comparative Example 2, the conductor pattern 115 was formed before the plating filling step, and then the plating filling step was performed. The current density during copper plating was 5 A / dm ² and the copper plating solution was not jetted. Except for the above, a tape carrier 120 for a semiconductor device was produced in the same manner as in Example 1.

About the sample of the Example and comparative example produced as mentioned above, plating required time, plating appearance and current efficiency, and connection reliability were evaluated. The result is shown in FIG.
The current efficiency was calculated from the plating current, the plating time, and the weight difference of the sample before and after the plating filling step, that is, the plating deposition amount. Specifically, if the plating deposition amount is the theoretical deposition amount, the current efficiency was calculated assuming that the current efficiency was 100%. The connection reliability was judged from the presence or absence of cracking between the copper foil 24 and the copper plating 27 after the temperature cycle test. In this temperature cycle test, the low temperature side was −65 ° C., the high temperature side was 150 ° C., the hold time of each set temperature was 30 minutes, and 100 cycles were performed.

  From FIG. 3 showing the evaluation results, in Examples 1 to 3, it was possible to increase the current density compared to the comparative example, and the time required for plating could be shortened to 1/3 to 1/12 of the conventional case. Moreover, the plating appearance and current efficiency were normal, and the occurrence of cracks between the copper foil 24 and the copper plating 27 could not be confirmed.

In Comparative Example 1, a plating abnormality (discoloration plating) occurred. Although it is the same current density as Example 2, since the copper plating 117 was performed after conductor pattern 115 preparation, it is estimated that the allowable current value became small.
In Comparative Example 2, the plating appearance and current efficiency are normal, but the plating time requires a long time compared with the present example, and the occurrence frequency of cracks between the copper foil 113 and the copper plating 117 is 5%. Since it occurred at a rate, it was judged to be inferior to the present example.

21 Insulating film 22 Adhesive layer 23 Opening 24 Copper foil 25 Roll 26 Masking tape 27 Copper plating 28 Conductive pattern 29 Surface plating layer 30 Solder resist 31 Tape carrier 32 for semiconductor device Tape carrier 33 Unwinding part 34 Reel 35 Front power supply roll (Cathode)
36 Masking tape application device 37 Acidic degreasing bath 38 Pickling bath 39 Copper plating bath 40 Insoluble electrode (anode)
41 Copper Plating Solution 42 Plating Solution Jet Nozzle 43 Back Washing Tank 44 Masking Tape Peeling Device 45 Rear Feed Roll (Cathode)
46 Post-water washing tank 47 Drying tank 48 Winding part 49 Reel 101 Semiconductor device 102 Tape carrier 103 Conductive pattern 104 Semiconductor element 105 Electrode 106 Bonding wire 107 Sealing resin 108 Via hole 109 Solder ball 110 Polyimide film 111 Adhesive layer 112 Opening 113 Copper foil 114 Roll 115 Conductor pattern 116 Masking tape 117 Copper plating 118 Surface plating layer 119 Solder resist 120 Tape carrier for semiconductor device

Claims (5)

Providing an opening penetrating the insulating film in the thickness direction;
Bonding the copper foil to the upper surface of the insulating film to expose the copper foil through the opening on the lower surface of the insulating film;
After performing masking on the upper surface of the copper foil, by performing copper plating on the exposed portion of the lower surface of the copper foil through the opening, a plating filling step for reducing the depth of the opening;
After the plating filling step, a step of forming a conductor pattern by photoetching the copper foil from which the masking has been removed from the upper surface side;
Forming a surface plating layer on the conductor pattern;
A method for producing a tape carrier for a semiconductor device, comprising: ^{2. The} method of manufacturing a tape carrier for a semiconductor device according to claim 1, wherein the plating filling step is performed by an electrolytic plating method, and a current density during the plating filling step is 15 to 60 A / dm ² .   3. The semiconductor according to claim 1, wherein a copper plating solution used in the plating filling step is a copper sulfate-based electrolytic copper plating solution, and includes a surfactant and / or a brightening agent as an additive component. 4. Manufacturing method of tape carrier for apparatus. The plating filling process is performed by a reel-to-reel method,
The copper plating tank used in the reel-to-reel method is one tank,
The jet pressure of the copper plating solution in the copper plating tank is 0.1 MPa or more,
4. The semiconductor according to claim 1, wherein as a pretreatment in the plating filling step, a portion of the rust preventive film exposed through the opening on the lower surface of the copper foil is removed by a chemical polishing liquid. 5. Manufacturing method of tape carrier for apparatus. The method for manufacturing a tape carrier for a semiconductor device according to any one of claims 1 to 4, wherein the copper foil is an electrolytic copper foil.

Images