JP2010169556A - Speed monitoring device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a speed monitoring device capable of detecting easily and inexpensively an output pulse abnormality of an encoder including an abnormality caused by a disconnection of a noise. <P>SOLUTION: This device includes an encoder 41 for outputting first and second pulses having each mutually different phase by rotation of a motor 30 driven by a power converter 20, UP counters 42A, 42B for counting respectively each pulse generated during a control period, speed operation means 45A, 45B for determining respectively first and second speed operation values from the count values, a comparison means 48 for discriminating an abnormality of an output pulse of the encoder 41 by comparing a difference between each speed operation value with a variable abnormality discrimination reference value, and a reference value operation means 49 for generating the abnormality discrimination reference value. The reference value operation means 49 generates the abnormality discrimination reference value based on the control period, a resolution of the encoder 41, and a variable set parameter. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a speed monitoring device provided with a speed calculation value monitoring function for configuring a safety device compliant with international safety standards in a power converter such as an inverter or a servo amplifier that drives an electric motor.

Conventionally, inverters and servo systems that calculate the speed of a motor, the position of a rotor, and the like from an output signal of a rotary encoder attached to the motor and feed back these calculated values to drive the motor at a variable speed have become widespread. In this type of system, if there is an abnormality in the output signal of the encoder, it will be difficult to operate the motor normally.There are various methods for stopping the operation of the motor by detecting an abnormality in the encoder or a wiring abnormality due to disconnection, etc. Is provided.
Typical examples of these conventional abnormality detection methods are as follows.

(1) Anomaly detection by logical operation of output signals of sine wave and cosine wave encoder In the anomaly detection apparatus described in Patent Document 1, absolute values of sine wave and cosine wave output from the encoder are obtained, and these are detected. The absolute value of each is compared with a threshold value by a comparator. A NOR circuit is connected to the output side of each comparator, and an abnormality is detected via the NOR circuit when the absolute values of the sine wave and cosine wave are both below the threshold value.
In other words, this abnormality detection principle will be explained. Under normal conditions, the sine wave and cosine wave output from the encoder are 90 degrees out of phase, and even if one is below the threshold value, the other is above the threshold value. The circuit output is normal. However, if an abnormality occurs in one of the sine wave and the cosine wave, both signals may be below the threshold value. Therefore, the encoder abnormality is detected based on this time point.

(2) What detects a disconnection using a pulse encoder capable of outputting two pulses whose phases are different by 90 degrees In the disconnection detection device described in Patent Document 2, the A-phase pulse and B-phase pulse output from the encoder Among them, a counter is provided that rises and falls according to the state of the other pulse for each edge of one pulse, and when the state where the count value of the counter for a certain period is equal to or less than a threshold value continues for a predetermined number of times , It is detected that a disconnection has occurred in at least one of the B-phase pulses.

(3) Disconnection is detected by using a pulse encoder capable of outputting two pulses whose phases are different by 90 degrees, and the disconnection can be detected even when one-phase / single-edge is detected. The detecting device has a function of resetting the count value counted up by the edge of the A phase pulse by the edge of the B phase pulse and a function of resetting the count value counted up by the edge of the B phase pulse by the edge of the A phase pulse. And the disconnection of the signal line is detected by comparing these count values with a predetermined threshold value.

JP-A-2-27219 (second page, lower left column, line 3 to page 3, upper right column, second line, FIG. 1, FIG. 3, etc.) JP 2001-249154 A (paragraphs [0020] to [0040], FIGS. 1 to 3 etc.) Japanese Patent Laying-Open No. 2006-177733 (paragraphs [0010] to [0022], FIGS. 1 to 5 etc.)

In the prior art according to Patent Document 1 of (1) described above, since a sine wave encoder is assumed as an application target, application to a pulse encoder is difficult.
Moreover, although the prior art which concerns on patent document 2 of (2) detects a disconnection using a pulse encoder, abnormalities other than a disconnection (for example, an abnormal pulse is detected, an abnormal pulse is detected by noise, etc.) ) Is not applicable.
Further, the prior art according to Patent Document 3 of (3) detects a disconnection similarly to (2), and cannot be applied to an abnormality other than the disconnection. In the second embodiment of the prior art, since it is necessary to input a high-frequency pulse signal such as a clock signal to the counter that performs the disconnection determination, it is difficult to use a simple microprocessor built-in timer or the like, For example, as a result of separately requiring a logic integrated circuit such as a gate array, the cost may increase.

  Accordingly, the problem to be solved by the present invention is to provide a speed monitoring device that solves the problems of each of the above-described conventional techniques, and that can easily and inexpensively detect encoder output pulse abnormalities including abnormalities due to disconnection or noise. It is in.

In order to solve the above problem, an invention according to claim 1 is a speed monitoring device that monitors a speed calculation value of an electric motor driven by a power converter.
An encoder that outputs first and second pulses having different phases by rotation of the electric motor;
First and second counters that respectively count first and second pulses generated within a certain control period;
Speed calculation means for obtaining the first and second speed calculation values from the count values of the first and second counters,
A comparison means for comparing the difference between the first and second speed calculation values with a variable abnormality determination reference value to determine an abnormality in the output pulse of the encoder;
A reference value calculation means for generating the abnormality determination reference value,
The reference value calculating means includes
The abnormality determination reference value is generated based on the control cycle, the encoder resolution, and a variable setting parameter.

The speed monitoring device according to claim 2 is the speed monitoring device according to claim 1,
The comparison means compares a difference between the first and second speed calculation values with a variable abnormality determination reference value for a speed range in which at least one pulse is generated within the control cycle.

The speed monitoring device according to claim 3 is the speed monitoring device according to claim 1 or 2,
Another speed calculation means for obtaining a third speed calculation value for speed control of the power converter,
The comparison means compares the difference between the first or second speed calculation value and the third speed calculation value with a variable abnormality determination reference value.

The speed monitoring device according to claim 4 is the speed monitoring device according to any one of claims 1 to 3,
When an abnormality is detected by the comparison means, information on the pulse phase where the abnormality has occurred is output as an alarm.

The present invention has the following effects.
(1) It is possible to monitor and detect various abnormalities such as disconnection and failure inside the encoder, abnormal electrical signals in the encoder output system, abnormal pulse generation due to noise, etc., and safe operation of the motor And it can stop quickly.
(2) Since the main part of the apparatus can be realized by using a built-in timer of a normal microprocessor, the cost can be reduced.
(3) A double check conforming to international safety standards is possible.
(4) This is a method of monitoring using a speed calculation value that is simply obtained separately from the speed calculation value used for speed feedback control in the control signal calculation apparatus, and has no influence of deterioration of control performance, dead time, etc. Can be realized at low cost.
(5) Cause analysis at the time of abnormality detection becomes easy, and the time and cost for investigating the cause can be reduced.

1 is a block diagram showing a first embodiment of the present invention. It is a timing chart which shows operation at the time of normality in a 1st embodiment. It is a timing chart which shows operation at the time of abnormality in a 1st embodiment. It is a block diagram which shows 2nd Embodiment of this invention.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
First, the gist of the present invention is to count the number of two-phase (A-phase, B-phase) pulses output from a pulse encoder such as an incremental encoder at a constant control cycle, and calculate the speed calculation value obtained from these count values. By comparing the difference with a variable reference value, an abnormality in the electrical signal in the output system of the encoder including disconnection, a failure in the encoder, and the like are detected.

FIG. 1 is a block diagram showing a first embodiment of the present invention.
In FIG. 1, 10 is an AC or DC power source, 20 is a power converter having a semiconductor switching element, and 30 is an AC or DC motor.
Reference numeral 50 denotes a control signal arithmetic unit for controlling the power converter 20 based on a command value such as speed and torque and a stop command. The control signal calculation device 50 calculates a voltage command for controlling the power converter 20 from the command value, and creates an on / off signal of the semiconductor switching element of the power converter 20 based on the voltage command. In the present embodiment, the configuration of the control signal calculation device 50 is not particularly limited, and a general inverter or servo amplifier control device is assumed.

Hereinafter, the configuration and operation of the speed monitoring apparatus according to the present embodiment will be described.
Reference numeral 41 denotes an incremental encoder attached to the rotation shaft of the electric motor 30. The encoder 41 outputs an A-phase pulse and a B-phase pulse whose phases are shifted by 90 degrees. Each of these phase pulses is input to the UP counters 42A and 42B. The UP counters 42A and 42B, for example, detect the rising edge of the input pulse and perform a count-up operation.

The count values of the UP counters 42A and 42B are cleared by the compare match signal from the fixed cycle counter 44, and the count value is latched by the latch signal from the fixed cycle counter 44 before being cleared. 43A and 43B are stored.
In the speed calculation means 45A and 45B, the speed calculation value n _det [r / min] according to Equation 1 for each of the A phase and the B phase from each count value _Nc and the control cycle T _s stored by the latches 43A and 43B. Ask for.

The difference between the two speed calculation values obtained for each of the A phase and the B phase according to Equation 1 is calculated by the subtracting means 46, and the absolute value calculating means 47 calculates the absolute value of the difference. Although not shown, instead of the two speed calculation values, the difference between the count values _Nc stored by the latches 43A and 43B may be taken and converted into a speed, and the absolute value thereof may be calculated.

The absolute value calculated by the absolute value calculation means 47 is compared with the abnormality determination reference value from the reference value calculation means 49 in the comparison means 48. If the absolute value exceeds the abnormality determination reference value, it is determined that an abnormality has occurred in either the A phase pulse or the B phase pulse, and an abnormality detection signal is generated. Based on the abnormality detection signal, power conversion is performed. A stop command for forcibly turning off the semiconductor switching element of the vessel 20 is generated and output to the control signal arithmetic unit 50.
Hereinafter, a method of creating the abnormality determination reference value in the reference value calculation means 49 will be described.

First, when the comparison unit 48 performs the comparison, if the motor 30 is stopped or is rotating at such a low speed that no pulse is detected from the encoder 41 within the control period, the encoder 41 itself or It is impossible to determine whether the output pulse is normal or abnormal. Therefore, regarding this speed range (speed range below the lowest discriminable speed n ₀ ), normality / abnormality discrimination in the comparison means 48 is invalidated. The lowest discriminable speed n ₀ is calculated by Equation 2.

In other words, outside of the speed range where at least one pulse of the A phase or B phase can be detected at least once, the abnormality detection signal generated by the comparison means 48 is invalidated to prevent operation stop due to erroneous detection. .
Further, the abnormality determination reference value n _lim is calculated by Equation 3 using the above-described minimum discriminable speed n ₀ .

In Equation 3, k is a setting parameter, and this parameter k is set to 2 at start-up, and is changed according to the speed difference when the difference in the number of pulses between the A phase and the B phase is two or more. After starting, the abnormality determination reference value n _lim is arbitrarily set by changing the setting parameter k according to the increase in speed.
When k is increased, the abnormality determination reference value n _lim is increased and the detection margin is increased. When k is decreased, the abnormality determination reference value n _lim is decreased and the detection margin is decreased, so that the abnormality determination is performed in a short period. be able to.

Therefore, by adjusting the setting parameter k in accordance with the characteristics of the motor 30 and the resolution of the encoder 41 and making the abnormality determination reference value n _lim variable, there are various kinds of cases compared to the case where the reference value n _lim is made constant. It becomes possible to cope with electric motors and encoders, and it becomes possible to improve versatility and prevent erroneous detection of abnormalities. Note that the k setting method and the calculation formula (formula 3) of the abnormality determination reference value n _lim are merely examples, and are not limited at all.

Next, FIG. 2 is a timing chart showing the normal operation in the present embodiment. Under normal conditions, the A-phase pulse and the B-phase pulse from the encoder 41 are sequentially generated according to the rotation direction with the phase shifted by 90 degrees. In this embodiment, the rising edge of each pulse is counted by the UP counters 42A and 42B regardless of the rotation direction, and the speed calculation values of the A phase and the B phase are obtained by the above-described equation 1 for each control period T _s . When these two speed calculation values match, the difference between the speed calculation values of the A phase and the B phase (that is, zero) is equal to or less than the abnormality determination reference value n _{lim in} Equation 3, and therefore the output pulse of the encoder 41 is The abnormality determination signal (or stop command) that is determined to be normal and generated by the comparison means 48 is “L”.

On the other hand, FIG. 3 is a timing chart showing an operation when an erroneous pulse occurs in the B phase due to the influence of noise or the like and the number of B phase pulses increases as an example of an abnormality.
When the number of B-phase pulses increases, the count values by the UP counters 42A and 42B differ between the A-phase and the B-phase, so that a difference occurs in the speed calculation value of each phase. If k = 2 in the abnormality determination reference value n _lim of Equation 3 described above, it is determined that there is an abnormality based on the abnormality determination reference value n _lim when there are two or more count differences. Is generated and the operation is stopped by the stop command.

  The main part of the speed monitoring apparatus according to the first embodiment described above has a simple configuration including the UP counters 42A and 42B, the fixed period counter 44, the latches 43A and 43B, and the like, using a general-purpose timer included in the microprocessor. Since the reference value calculation means 49 and the comparison means 48 are realized by the software of the microprocessor, it is not necessary to use an external logic integrated circuit or the like, thereby simplifying the configuration and reducing the cost. Can be planned.

Next, a second embodiment of the present invention will be described.
International safety standards recommend multiplexing sensor interfaces. For this reason, the speed calculation means of the electric motor may be provided in the speed monitoring apparatus as in the present invention separately from those normally used in the control signal calculation apparatus for feedback control of the speed. . For this reason, it is conceivable to execute processing such as operation stop when an abnormality is detected by using a total of three speed calculation values in the control signal calculation device and two speed calculation values in the speed monitoring device.
Moreover, the speed calculation value calculated | required by the speed monitoring apparatus like 1st Embodiment is a simple thing which calculates speed from the pulse number and fixed time, and is not so high as precision. Therefore, by using the speed calculation value for speed monitoring separately from the high-precision speed calculation value for control signal calculation, it is possible to prevent deterioration of control performance, increase in delay time, and the like.

The second embodiment shown in FIG. 4 has been made in consideration of the above points, and will be described below with a focus on differences from FIG.
As described above, the speed calculation value of the first embodiment calculated by Equation 1 ignores the time error between the pulses sequentially generated in each phase of the encoder 41. The accuracy is worse than the speed calculation value. Therefore, the abnormality determination reference value used for abnormality determination is calculated in consideration of the above time error.
4, when the velocity calculation value by the speed calculating means 51 of the control signal calculation device 50a and n _1, the time T _i of between successively generated pulses and the pulse from the encoder 41 [sec] is based on the formula 1 Equation 4 is obtained.

The reference value calculation means 49 in FIG. 4 calculates the abnormality determination reference value n _{L according} to Expression 5 in consideration of Expression 4.

In comparison means 48a, using the larger value of the abnormality judgment reference value n _lim of the abnormality judgment reference value n _L and Equation 3 in Equation 5 as the abnormality judgment reference value.
Further, the three speed calculation values input to the comparison means 48a are compared according to the following sequence. 4 includes a function for calculating an absolute value of each speed calculation value (corresponding to the absolute value calculation means 47 in FIG. 1).
(1) The speed calculation value n ₁ obtained by the speed calculation means 51 (referred to as a third speed calculation value for convenience) and the speed calculation value calculated from the A-phase pulse (the output of the speed calculation means 45A, the first speed It is determined whether or not the difference from the calculated value is larger than the abnormality determination reference value.
(2) The difference between the speed calculation value n ₁ (third speed calculation value) and the speed calculation value calculated from the B-phase pulse (the output of the speed calculation means 45B, referred to as the second speed calculation value) is abnormal. A comparison is made as to whether or not it is greater than the discrimination reference value, and if it is greater, it is determined as abnormal.
(3) If both (1) and (2) are normal (the difference between the respective speed calculation values is smaller than the abnormality determination reference value), the stop command becomes invalid, and (1) and (2) The stop command is made valid when at least one of the above is abnormal.

As described above, by selecting a large value from the abnormality determination reference values n _L and n _lim and comparing it with the difference between the speed calculation values, as in the first embodiment, the versatility is high and the erroneous detection can be eliminated. A simple speed monitoring device can be realized.

In addition, as described in claim 4, in the sequence shown in the second embodiment, when the difference in the speed calculation value according to (1) is larger than the abnormality determination reference value, the abnormality in the A phase, and the speed according to (2) When the difference between the calculated values is larger than the abnormality determination reference value, it is desirable to notify the user as an alarm by means of display or the like as a B phase abnormality.
Further, when the encoder itself is faulty, since the speed calculating means 51 using the output pulses of the encoder it is also possible that incorrect speed calculated value n ₁ obtained, stores the speed command value Alternatively, abnormality determination may be performed by comparing the speed command value with the abnormality determination reference value.

DESCRIPTION OF SYMBOLS 10: Power supply 20: Power converter 30: Electric motor 41: Encoder 42A, 42B: UP counter 43A, 43B: Latch 44: Fixed period counter 45A, 45B, 51: Speed calculation means 46: Subtraction means 47: Absolute value calculation means 48 48a: comparison means 49: reference value calculation means 50, 50a: control signal calculation device

Claims (4)

In a speed monitoring device that monitors a speed calculation value of an electric motor driven by a power converter,
An encoder that outputs first and second pulses having different phases by rotation of the electric motor;
First and second counters that respectively count first and second pulses generated within a certain control period;
Speed calculation means for respectively obtaining first and second speed calculation values from the count values of the first and second counters;
A comparison means for comparing the difference between the first and second speed calculation values with a variable abnormality determination reference value to determine an abnormality in the output pulse of the encoder;
A reference value calculation means for generating the abnormality determination reference value,
The reference value calculating means includes
A speed monitoring device that generates the abnormality determination reference value based on the control cycle, the resolution of the encoder, and a variable setting parameter. The speed monitoring device according to claim 1,
The comparison means compares the difference between the first and second speed calculation values with a variable abnormality determination reference value for a speed range in which at least one pulse is generated within the control cycle. Speed monitoring device. In the speed monitoring device according to claim 1 or 2,
Another speed calculation means for obtaining a third speed calculation value for speed control of the power converter,
The comparison means compares the difference between the first or second speed calculation value and the third speed calculation value with a variable abnormality determination reference value. In the speed monitoring device according to any one of claims 1 to 3,
A speed monitoring device that outputs information on a pulse phase in which an abnormality has occurred as an alarm when an abnormality is detected by the comparison means.

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