JP2006300699A - Speed detector, and abnormal speed detecting method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To detect the abnormality of a speed caused by a dispersion or a noise in a pulse edge of an encoder. <P>SOLUTION: This speed detecting method for a detector has the encoder for outputting a two-phase signal having 90°of phase difference by rotation of rotor, a pulse generating circuit for generating normal and reverse pulses respectively during normal and reverse rotations therefor, normal and reverse side counters for counting respectively the normal and reverse pulses, and a circuit for reading values of a timer reset in a logical sum of the normal pulse and the reverse pulse and for conducting an up-count operation till the next reset, and negative/positive side counter timers, to find an incremental pulse number from the last reading-in to the reading in this time and a time between the pulses and to compute the speed in every computation period. In a procedure of the method, a speed difference value obtained by subtracting a speed command value from a speed detection value is found during the rotation at a fixed command speed, average values of the positive/negative speed difference values are found respectively, and the abnormality is determined when exceeding a preset average speed difference allowance value. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a speed detection device for detecting the speed of a rotating body from the output of a rotary encoder arranged coaxially with a motor, and an abnormal speed detection method thereof.

FIG. 4 is a block diagram of a conventional apparatus that performs speed detection by this type of speed detection method. In the figure, 1 is a rotating body, 2 is a rotary encoder, 3 is a pulse generator, 4 is a positive counter, 5 is a negative counter (reverse counter), 6 is a T timer, 7 is an OR circuit, and 8 is a CPU. It is.
5 (a) and 5 (b) are time charts of FIG. 4 at the time of forward rotation and reverse rotation, respectively, and FIG. 6 is a time chart for explaining a speed detection method. In all the drawings, the same reference numerals indicate the same or corresponding members. An A-phase signal SA and a B-phase signal SB having a phase difference are output from the rotary encoder 2 due to the rotation of the rotating body 1. The A phase signal SA and the B phase signal SB are 90 degrees out of phase with each other. The pulse generator 3 outputs a positive pulse AP at the rising edge of the A-phase signal SA at the time of forward rotation as shown in FIG. 5 (a) due to the phase relationship between the A-phase signal SA and the B-phase signal SB, and at the time of reverse rotation, FIG. b) Output a reverse pulse at the falling edge of the A-phase signal SA as shown in FIG.

  The forward pulse AP and the reverse pulse BP are up-counted by the next-stage positive counter 4 and reverse counter 5 respectively. At the same time, the T timer 6 is reset by the logical sum of the positive pulse PA and the reverse pulse PB by the logical sum circuit 7. When the T-timer 6 is reset, the count value becomes zero, the time is counted again after the reset is released, and the up-counting operation is performed until the next reset. The CPU 8 reads the values of the positive counter 4, the reverse counter 5, and the T timer 6 every predetermined calculation time, and calculates the speed f (Hz) by the following equation (1).

  “Δ” in FIG. 6 is the reading time of the forward counter 4, the reverse counter 5, and the T timer 6 of the CPU 8.

f = {(N _{F, n} −N _{F, n−1} ) − (N _{R, n} −N _{R, n−1} )} / (T + T _n−1 −T _n ) = ΔN / T _1. 1)
Here, f is the speed (Hz), N _{F, n} is the current count value of the positive counter 4, N _{F, n-1} is the previous count value of the positive counter 4, and N _{R, n} is the current reverse value. Count value of the side counter 5, N _{R, n-1} is the count value of the reverse counter 5 of the previous time, T _n is the reading time (current value) of the CPU 8 from the generation of the pulse, and T _n-1 is the CPU 8 from the generation of the pulse. Reading time (previous value), ΔN is the number of incremental pulses counted from the previous reading to the current reading (positive pulse is assumed to be +), T ₁ is the pulse AP1 to T _n output at time T _n-1 The time between pulses up to the pulse AP _{n + 1} output at the time, T is the time from the reading point of the previous T timer 6 and counters 4 and 5 of the CPU 8 to the reading point of the current T timer 6 and counters 4 and 5 Calculation time.
Further, Patent Document 1 discloses a pulse detection circuit that detects a pulse having a frequency proportional to the speed of a moving object in order to obtain a speed detection device that can detect an abnormality caused by noise signal superposition and prevent erroneous detection. A count value calculation circuit for calculating a pulse count value and a measurement reference time, a pulse count circuit for outputting a time measurement command every time the number of pulses reaches the count value, and a pulse wave number in relation to the measurement reference time. A time measurement circuit that measures the period time of a time measurement command using a clock with a constant frequency, and a speed that detects the speed of the moving object based on the count value and measurement reference time, and the measured wave number and period time A detection circuit and an abnormality detection means for determining the presence or absence of an abnormality based on a combination of a wave number and a period time measured corresponding to a measurement value and a measurement reference time What has been disclosed.
JP-A-8-233842

The conventional speed detection method uses the procedure of calculating the speed by obtaining the time between pulses from the pulse edge timing of the rotary encoder. Therefore, the pulse speed is affected by pulse edge variations due to defective rotary encoders and erroneous pulses due to noise. There is a problem in that it is not possible to detect that the calculation speed is abnormal even if the time is shifted.
The present invention has been made in view of such problems, and a speed detection apparatus and an abnormal speed detection method capable of determining and detecting speed abnormalities due to variations in pulse edges and noise of rotary encoders. The purpose is to provide.

In order to solve the above problem, the present invention is as follows.
According to the first aspect of the present invention, there is provided a rotary encoder that outputs a two-phase signal having a phase difference of 90 degrees with the rotation of the rotating body, and a forward rotation from the two-phase signal during the normal rotation of the rotating body. A pulse generation circuit for generating a reverse pulse during reverse rotation, a forward counter and a reverse counter for counting the forward pulse and the reverse pulse, respectively, and a logical sum of the forward pulse and the reverse pulse. A timer that performs an up-counting operation until it is reset and then reset, and the values of the positive counter, the reverse counter, and the timer are read, the number of incremental pulses from the previous reading to the current reading, Find the time between the forward or reverse pulse output immediately before reading and the forward or reverse pulse output immediately before reading this time. In the speed detecting method of the speed detection device including an arithmetic circuit for performing serial rotator speed operation of the constant operation per cycle,
While rotating at a constant command speed, a speed difference value obtained by subtracting the speed command value from the speed detection value is obtained, and when the difference value is positive, a positive speed difference average value is obtained, and when the speed difference value is negative, A procedure for obtaining a negative speed difference average value and determining that an abnormality occurs when the positive speed difference average value or the negative speed difference average value exceeds a preset average speed difference allowable value. It is.
The invention according to claim 2 counts the number of times that the absolute value of the speed difference value exceeds a preset allowable speed difference value, and determines that it is abnormal when the count value exceeds a certain number of times. It has a procedure to do.
According to a third aspect of the present invention, there is provided a rotary encoder that outputs a two-phase signal having a phase difference of 90 degrees with the rotation of the rotating body, and during the normal rotation of the rotating body from the two-phase signal. A pulse generation circuit for generating a forward rotation pulse, a reverse rotation pulse during reverse rotation, a forward counter and a reverse counter for counting the forward rotation pulse and the reverse rotation pulse, respectively, and logic of the forward rotation pulse and the reverse rotation pulse A timer that performs an up-counting operation until it is reset by the sum and is reset next time, and reads the values of the positive counter and the reverse counter and the timer, the number of incremental pulses from the previous reading to the current reading, The time between pulses from the forward or reverse pulse output just before the previous reading to the forward or reverse pulse output immediately before the current reading In the speed detecting device and a computing circuit for performing speed calculation of Umate the rotating body to a constant calculation each cycle,
While rotating at a constant command speed, the speed difference value obtained by subtracting the speed command value from the speed detection value is obtained, the positive speed difference average value is obtained when the difference value is positive, and the negative side when the speed difference value is negative. A speed abnormality determining unit that obtains a speed difference average value and determines that an abnormality occurs when the positive speed difference average value or the negative speed difference average value exceeds a preset average speed difference allowable value. It is.

  According to the first and third aspects of the invention, it is possible to determine an abnormality in the detection speed when the time between pulses is shifted due to variations in pulse edges due to defective rotary encoders. In addition, according to the second aspect of the present invention, it is possible to determine an abnormality in the detection speed caused by a random event such as an erroneous pulse due to noise.

  Hereinafter, specific examples of the method of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram showing the configuration of a speed detection apparatus that implements the method of the present invention. 1, the same components as those in FIG. 4 are denoted by the same reference numerals. In FIG. 1, 1 is a rotating body, 2 is a rotary encoder, 3 is a pulse generator, 4 is a positive counter, 5 is a negative counter (reverse counter), 6 is a T timer, 7 is an OR circuit, A speed detection unit 10 is a speed abnormality determination unit. In FIG. 1, a portion different from the conventional one is a portion provided with a speed abnormality determination unit 10 that performs abnormality determination of the detection speed output by the speed detection unit 9. The present invention is executed every predetermined calculation time T using the CPU 8.

FIG. 2 is a flowchart showing a processing procedure for determining an abnormality in the detected speed in the speed detecting device. The method of the present invention will be described step by step with reference to this figure.
First, it is determined whether the motor is rotating at a constant command speed [step 11]. If the motor is rotating at a constant command, the command speed is subtracted from the detected speed obtained by the equation (1) to calculate a speed difference [Step 12], and whether the speed difference is positive or negative is determined [Step 13]. If the speed difference is positive, a positive speed difference average value is obtained [Step 14], the positive speed difference average value is compared with a preset average speed difference value [Step 15], and a positive speed difference average value is obtained. If it exceeds the average speed difference value, it is determined that the speed is abnormal [step 18]. If the speed difference is negative, an average value of the negative speed difference is obtained [step 16], and the absolute value of the negative speed difference average value is compared with a preset average speed difference value [step 17], and the negative side If the absolute value of the speed difference average value exceeds the average speed difference value, it is determined that the speed is abnormal [step 18].
Thus, during rotation at a constant command speed, a speed difference value obtained by subtracting the speed command value from the speed detection value is obtained, and when the difference value is positive and negative, a speed difference average value is obtained for each, and a preset average is obtained. Since it is compared with the speed difference allowable value, it is possible to determine an abnormality in the detected speed when the time between pulses is shifted due to variations in the pulse edge due to a defective rotary encoder or the like.

FIG. 3 is a flowchart showing the second processing procedure.
First, it is determined whether or not the motor is rotating at a constant command speed [step 21]. If the motor is rotating at a constant command, the command speed is subtracted from the detected speed obtained by Equation 1, and the absolute value is obtained as a speed difference [step 22]. The speed difference is compared with a preset speed difference allowable value [step 23], and if the speed difference exceeds the speed difference allowable value, the speed difference counter is counted up [step 24]. The count value of the speed difference counter is compared with a preset threshold A [Step 25], and if the count value of the speed difference counter exceeds the threshold A, it is determined that the detected speed is abnormal [Step 26]. .

Thus, during rotation at a constant command speed, the speed command value is subtracted from the speed detection value, the absolute value is used as the speed difference value, and the number of times that the difference value exceeds the preset speed difference tolerance value is counted. Since the count value is compared with a preset threshold value, it is possible to determine an abnormality in the detection speed caused by a random event such as an erroneous pulse due to noise.
After detecting an error, if an encoder speed error is displayed on the display (not shown) or if the error level deviates significantly from the set tolerance, not only the error display alarm but also the base of the power transistor in the inverter main circuit You can also block and stop the operation.

  While rotating at a constant command speed, find the speed difference value obtained by subtracting the speed command value from the speed detection value, and if the difference value is positive or negative, find the speed difference average value, and set the preset average speed difference tolerance Therefore, it is possible to determine abnormalities in the detection speed when the time between pulses is shifted due to variations in pulse edges due to defective rotary encoders, etc. The present invention can also be applied to general rotating machine control devices that detect speed from a rotary encoder that outputs a two-phase signal.

The block diagram which shows the structure of the speed detection apparatus to which the method of this invention is applied. The flowchart which shows the process sequence of the method of this invention. The flowchart which shows the process sequence of the 2nd method of this invention. The block diagram which shows the structure of the speed detector which applied the conventional method FIG. 4 is a time chart of each phase signal and forward / reverse pulse generated by the rotating body in FIG. 4 of the conventional example, (a) is a waveform diagram during forward rotation, and (b) is a waveform diagram during reverse rotation. It is a time chart for explaining a general speed detection method, (a) is an A phase signal SA waveform diagram, (b) is a B phase signal SB waveform diagram, (c) is a positive pulse AP diagram, (d) is a waveform diagram. Reverse pulse BP diagram, (e) is a time course diagram

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Rotating body 2 Rotary encoder 3 Pulse generation circuit 4 Positive side counter 5 Reverse side counter 6 T timer 7 OR circuit 8 CPU
9 Speed detection unit 10 Speed abnormality determination unit 11, 18 Step 21, 26 Step f Speed N _{F, n} Count value N _{F, n-1} of current positive counter 4 Count value N _{R, n of} previous positive counter 4 _n Count value N _{R, n-1} of the current reverse counter 5 Read time of the CPU 8 from the generation of the count value T _n pulse of the previous reverse counter 5 (current value)
CPU 8 read time from generation of T _n-1 pulse (previous value)
ΔN Number of incremental pulses counted from the previous reading to the current reading (positive pulse is assumed to be +)
T1 T _n-1 T timer 6 of the time T CPU 8 of the last inter-pulse time from the pulse AP1 output up pulse AP n _{+ 1} which is outputted to the T _n time, the reading point of the counter 4 and 5 of this Calculation time to T timer 6, counter 4 and 5 reading point

Claims (3)

A rotary encoder that outputs a two-phase signal having a phase difference of 90 degrees with the rotation of the rotating body, and a forward rotation pulse during the normal rotation of the rotating body from the two-phase signal, and a reverse rotation pulse during the reverse rotation. A pulse generation circuit for generating the forward rotation pulse, a forward counter and a reverse counter for counting the forward rotation pulse and the reverse rotation pulse, respectively, and a logical sum of the forward rotation pulse and the reverse rotation pulse, and up until the next reset. Reads the timer that performs the count operation, the positive counter, the reverse counter, and the timer, the number of incremental pulses from the previous reading to the current reading, and the positive pulse output immediately before the previous reading. The speed calculation of the rotating body is performed by calculating the time between pulses from the rotation pulse or reverse rotation pulse to the forward rotation pulse or reverse rotation pulse output immediately before the current reading. In the speed detecting method of the speed detection device including an arithmetic circuit for performing every calculation cycle,
While rotating at a constant command speed, a speed difference value obtained by subtracting the speed command value from the speed detection value is obtained, and when the difference value is positive, a positive speed difference average value is obtained, and when the speed difference value is negative, A negative speed difference average value is obtained, and when the positive speed difference average value or the negative speed difference average value exceeds a preset average speed difference allowable value, an abnormality is determined. An abnormal speed detection method for a detection device.   2. The speed according to claim 1, wherein the number of times that the absolute value of the speed difference value exceeds a preset speed difference allowable value is counted, and the speed is determined to be abnormal when the count value exceeds the set number of times. An abnormal speed detection method for a detection device. A rotary encoder that outputs a two-phase signal having a phase difference of 90 degrees with the rotation of the rotating body, and a forward rotation pulse during the normal rotation of the rotating body from the two-phase signal, and a reverse rotation pulse during the reverse rotation. A pulse generation circuit for generating the forward rotation pulse, a forward counter and a reverse counter for counting the forward rotation pulse and the reverse rotation pulse, respectively, and a logical sum of the forward rotation pulse and the reverse rotation pulse, and up until the next reset. The timer for performing the count operation, the positive counter, the reverse counter, and the timer value are read, the number of incremental pulses from the previous reading to the current reading, and the positive pulse output immediately before the previous reading. The speed calculation of the rotating body is performed by calculating the time between pulses from the rotation pulse or reverse rotation pulse to the forward rotation pulse or reverse rotation pulse output immediately before the current reading. In the speed detecting device and a computing circuit for performing the every calculation cycle,
While rotating at a constant command speed, the speed difference value obtained by subtracting the speed command value from the speed detection value is obtained, the positive speed difference average value is obtained when the difference value is positive, and the negative side when the speed difference value is negative A speed abnormality determination unit is provided that calculates a speed difference average value and determines that an abnormality occurs when the positive speed difference average value or the negative speed difference average value exceeds a preset average speed difference allowable value. A speed detection device characterized by the above.

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