JP2010153751A - Semiconductor package - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor package which is securely connected to a mounting substrate while securing a desired number of lands. <P>SOLUTION: An LGA package is provided with an outer peripheral land group 3 on an outer peripheral side of a substrate 2 and with an inner peripheral land group 4 on an inner peripheral side. Two arrays of lands 3a and 3b are arranged in the outer peripheral land group 3, and two arrays of lands 4a and 4b are arranged in the inner peripheral land group 4. The respective lands 3a and 3b, and 4a and 4b are arranged at a pitch P in an X direction and a Y direction. An X-directional or Y-directional distance L between a land 3b of the outer peripheral land group 3 and a land 4a of the outer peripheral land group 4 position which is positioned right near it is 1.5 time as large as the pitch P. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a semiconductor package, and more particularly to a semiconductor package having a plurality of lands and mounted on a mounting substrate.

  One of semiconductor packages in which a semiconductor chip (IC chip) is sealed with a resin is an LGA (Land Grid Arrey) package. In the LGA package, for example, an IC chip is mounted on the surface of a substrate such as glass epoxy. Each terminal of the IC chip is electrically connected to a predetermined copper wiring formed on the substrate by wire bonding. On the other hand, a plurality of lands are formed on the back surface of the substrate with a predetermined pitch. The copper wiring is electrically connected to the corresponding land through vias penetrating the substrate. The IC chip mounted on the substrate is sealed with a sealing resin such as an epoxy resin.

  On the other hand, a plurality of lands corresponding to the arrangement of the lands of the LGA package are formed on the mounting substrate on which the LGA package is mounted. By soldering each land of the LGA package to the corresponding land of the mounting board, the LGA package is mounted on the mounting board. At this time, a solder paste is applied on the land of the mounting board using a predetermined metal mask.

Next, the corresponding land of the LGA package is placed on the mounting substrate to which the solder paste is applied. Reflow is performed under a predetermined temperature to melt the solder paste, and the land of the LGA package is electrically connected to the predetermined land of the mounting board. Thus, the LGA package is mounted on the mounting substrate. Note that Patent Document 1 or Patent Document 2 is a document that discloses this type of semiconductor package.
JP 2002-261226 A JP 2006-261492 A

  However, the conventional semiconductor package has the following problems. In recent years, LGA packages are also required to be miniaturized in order to meet the needs for weight reduction and miniaturization of electronic devices. In order to reduce the size of the LGA package, it is necessary to reduce the land pitch, and it is also necessary to reduce the land pitch of the mounting substrate to which the land is connected.

  As described above, the solder paste is applied to the land of the mounting board. If the pitch of the lands is reduced and the solder paste applied to the lands and the solder paste applied to other lands adjacent to the lands are not brought into contact with each other, the amount of solder paste supplied to one land is reduced. It is necessary to reduce. However, if the amount of solder paste supplied to one land is reduced, the land of the LGA package is not reliably connected to the land of the mounting substrate, which may cause a mounting (connection) defect.

  As means for securing the supply amount of solder paste per land, there are a method of increasing the thickness of the metal mask when applying the solder paste and a method of expanding the area where the solder paste is applied. In the former method, when the metal mask is removed, the solder paste adheres to the metal mask and the amount of the applied solder paste is likely to vary. Therefore, the latter method is mainly employed.

  When the land pitch of the mounting substrate is, for example, 0.8 mm pitch or 0.65 mm pitch, a desired amount of solder can be obtained even if the lands are arranged in a grid pattern (full matrix shape) on the surface of the mounting substrate. An area for applying the paste can be secured. However, when the land pitch is reduced to 0.5 mm or less, it becomes difficult to secure a region to which a desired amount of solder paste is applied in a full matrix land arrangement.

  However, in order to solve this problem, if the layout pattern of the mounting board lands is changed from a full-matrix layout pattern to a layout pattern that eliminates one row of lands, the land of the semiconductor package corresponding to the layout pattern is changed. However, there is a problem that the number of lands is insufficient for the number of lands required to function as an LGA package.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a semiconductor package that is securely connected to a mounting board while securing a desired number of lands.

  A semiconductor package according to the present invention includes a predetermined substrate having a main surface, and a first land group and a second land group. The first land group is formed on the main surface along the outer periphery of the substrate. A plurality of first lands are arranged with a first pitch in the X direction and in the Y direction intersecting the X direction. The second land group is formed at a predetermined distance from the first land group, and a plurality of second lands are arranged with a first pitch in the X direction and the Y direction, respectively. The predetermined distance is the distance in the X direction and the distance in the Y direction between the first land located on the second land group side in the first land group and the second land closest to the first land in the second land group. Is set to a distance shorter than 1.5 times the first pitch and shorter than twice the first pitch.

  Another semiconductor package according to the present invention includes an outer peripheral land group and an inner peripheral land group. The outer peripheral land group is formed along the outer periphery of a rectangular region on a predetermined substrate, and a plurality of first lands are arranged with a first pitch. In the inner peripheral land group, a plurality of second lands are arranged with a first pitch in a region inside the outer peripheral land group. In the inner peripheral land group, the number of lands located on one side of the outermost periphery is in a state where the lands are arranged in a matrix with a first pitch in a rectangular region, and after removing the lands corresponding to the outer peripheral land group, The number is obtained by subtracting 1 from the number of lands located along the side corresponding to one side.

  In the semiconductor package according to the present invention, the distance between the first land group and the second land group is such that the first land located on the second land group side in the first land group and the first land in the second land group are closest to the first land. One of the distance in the X direction and the distance in the Y direction with respect to the second land is set to a distance that is 1.5 times or more of the first pitch and shorter than twice the first pitch. As a result, when the semiconductor package is mounted on the mounting substrate, the number of lands can be secured while securing the supply amount of the solder paste.

  In another semiconductor package according to the present invention, the number of lands located on one side of the outermost periphery of the inner peripheral land group is changed from a state in which the lands are arranged in a matrix with a first pitch in a rectangular region to the outer peripheral land group. After the corresponding land is removed, the inner peripheral land group is formed so as to be the number obtained by subtracting 1 from the number of lands located along the side corresponding to one side, so that the semiconductor package is mounted on the mounting substrate. When mounting, the number of lands can be secured while securing the supply amount of the solder paste.

  An LGA package will be described as a semiconductor package according to the present invention. As shown in FIGS. 1 and 2, in the LGA package 1, for example, an IC chip 7 is mounted on a surface of a substrate 2 such as glass epoxy with a die attach material 6 interposed. Each terminal of the IC chip 7 is electrically connected to a predetermined copper wiring 9 formed on the substrate 2 by a gold wire 8 (wire bonding). On the other hand, as shown in FIGS. 3 and 4, a plurality of lands 3a, 3b, 4a, 4b are formed on the back surface of the substrate 2 with a predetermined pitch. The land arrangement pattern will be described later. The copper wiring 9 is electrically connected to the corresponding lands 3 a, 3 b, 4 a, 4 b through vias 11 penetrating the substrate 2. The IC chip 7 mounted on the substrate 2 is sealed with a sealing resin 10 such as an epoxy resin.

  Next, the land arrangement pattern exposed on the back surface of the substrate 2 will be described. As shown in FIG. 5, in the LGA package, an outer peripheral land group 3 is provided on the outer peripheral side of the substrate 2, and an inner peripheral land group 4 is provided on the inner peripheral side. In the outer peripheral land group 3, two rows of lands 3 a and 3 b are arranged along the outer periphery of the substrate 2. The inner peripheral land group 4 is located in a region surrounded by the outer peripheral land group 3. In the inner peripheral land group 4, two rows of lands 4 a and 4 b are arranged along the land 3 b of the outer peripheral land group 3.

  As shown in FIG. 6, each land 3a, 3b of the outer peripheral land group 3 is arranged with a pitch P in the X direction and the Y direction. The lands 4a and 4b of the inner peripheral land group 4 are also arranged with a pitch P in the X direction and the Y direction. Of the outer peripheral land group 3, the distance (center of the land) L in the X direction or the Y direction between the land 3b located on the inner side and the land 4a of the inner peripheral land group 4 located in the immediate vicinity is 1 of the pitch P. .5 times.

  Next, a mounting substrate on which the LGA package is mounted will be described. As shown in FIGS. 7 and 8, on the surface of the mounting substrate 21, an outer peripheral land group 23 in which lands 23a and 23b corresponding to the lands 3a and 3b of the outer peripheral land group 3 of the LGA package are arranged, and the LGA package Inner peripheral land groups 24a and 24b are formed in which lands 24a and 24b corresponding to the lands 4a and 4b of the inner peripheral land group 4 are arranged. In the mounting substrate 21, regions other than the lands 23 a, 23 b, 24 a, 24 b are covered with the solder resist 22.

  Next, a method for mounting the above-described LGA package 1 on the mounting substrate will be described. First, a metal mask for applying a solder paste to the land of the mounting board is set on the mounting board. As shown in FIG. 9, the metal mask 31 has an opening 31a corresponding to the land. In order to secure the amount of solder paste to be supplied to the corresponding lands 23a, 23b, 24a, 24b, each opening 31a exposes the substantially circular lands 23a, 23b, 24a, 24b, as well as surrounding areas ( For example, it is formed in an elliptical shape so as to expose the land peripheral area.

  In particular, for the land 23b located on the inner side of the outer peripheral land group 23, the land peripheral region is a region between the land 23b and the land 24a set to a distance L that is 1.5 times the pitch P of each land. Is secured. In addition, for the land 24a located on the outer side of the inner peripheral land group 24, a land peripheral region is secured in a region between the land 23b and the land 24a.

  Next, as shown in FIG. 10, a solder paste 32 is applied on the metal mask 31. By filling the applied solder paste 32 into the opening 31a of the metal mask 31 using the squeegee 34, the solder paste 32 is printed on each land 23a, 23b, 24a, 24b as shown in FIG. Thereafter, the metal mask 31 is removed.

  Next, as shown in FIG. 12, the LGA package 1 is arranged at a predetermined position with respect to a mounting substrate (not shown). Next, as shown in FIG. 13, each land 3a, 3b, 4a, 4b of the LGA package 1 is brought into contact with each land 23a, 23b, 24a, 24b of the corresponding mounting substrate 21. Next, the solder paste 32 is melted by performing a reflow process at a predetermined temperature, and then cooled. Thus, as shown in FIG. 14, the lands 3a, 3b, 4a, 4b of the LGA package 1 are connected to the lands 23a, 23b, 24a, 24b of the corresponding mounting substrate 21 by the solder 33, so that the LGA package 1 Is mounted on the mounting substrate 21.

  In the LGA package 1 described above, the outer peripheral land group 3 and the inner peripheral land group 4 are formed as lands corresponding to the lands of the mounting substrate, and the outer peripheral land group 3 land 3b and the inner peripheral land group positioned in the immediate vicinity thereof. The distance L between the four lands 4a in the X direction or the Y direction is set to 1.5 times the pitch P (see FIG. 6). As a result, the number of lands can be secured while securing the amount of solder paste supplied, as compared with the case of the LGA package in which lands for one row are opened from the arrangement of lands in a full matrix. Next, this will be described.

  First, as an LGA package, for example, in an LGA package assuming a land of 11 rows × 11 columns full matrix (pitch P), the total number of lands is 121. As shown in FIG. 15, an arrangement in which the third land from the outside is opened is assumed as the land arrangement in which one row of lands is opened from the land arrangement. In this case, the distance LL in the X direction or the Y direction between the land 103b of the outer peripheral land group 103 and the land 104a of the inner peripheral land group located in the immediate vicinity thereof is twice the pitch P. In this LGA package, the total number of lands is 96.

  On the other hand, in the above-described LGA package 1, as shown in FIG. 16, the land 3b of the outer peripheral land group 3 and the land 4a of the inner peripheral land group 4 positioned in the immediate vicinity thereof are in the X direction or the Y direction. The distance L is set to 1.5 times the pitch P. As a result, even if the land pitch is narrower than 0.5 mm, for example, the total number of lands is 105, and the number of lands is increased by 9 compared to the case of the LGA package shown in FIG. Can do. As a result, the total number of lands can be secured while securing the amount of solder paste supplied.

  In the above-described LGA package, lands are formed in a substantially square area and the number of lands corresponding to one side is equal. However, as an LGA package, lands are formed in a substantially rectangular area. The present invention can also be applied to an LGA package that is formed and has different lands corresponding to the short sides and lands corresponding to the long sides.

  In the above-described LGA package, the distance L in the X direction or the Y direction between the land 3b and the land 4a positioned in the immediate vicinity thereof is described as an example of 1.5 times the pitch P. L is not limited to 1.5 times the pitch P. If the pitch P is 1.5 times or more of the pitch P and shorter than twice the pitch P, the total number of lands can be secured while ensuring the amount of solder paste supplied. Can also be secured.

  Furthermore, although the elliptical shape has been described as an example of the shape of the opening of the metal mask, an elliptical shape can be used as long as the peripheral area secured in the region between the land 23b and the land 24a can be exposed. It is not limited to shape.

  In addition, as an LGA package, in the inner peripheral land group, the number of lands located on one side of the outermost periphery corresponds to the peripheral land group from the state in which the lands are arranged in a matrix with a pitch P in a rectangular region. An LGA package may be obtained by subtracting 1 from the number of lands located along the side corresponding to the one side after removing. For example, in the LGA package shown in FIG. 16, on the side corresponding to one side after removing the lands of the two rows of outer peripheral land groups 103 shown in FIG. As shown in FIG. 16, the number of lands located along one side of the outer periphery of the inner peripheral land group is 6, which is obtained by subtracting 1 from the number 7 of the lands. I understand that.

In the above-described embodiment, the LGA package has been described as an example of the semiconductor package. However, the land arrangement described above is also applied to a BGA (Ball Grid Arrey) package in which solder balls are connected to the land. It is possible.

  Even in the case of the BGA package, when the BGA package is mounted on the mounting board, a solder paste is applied to the mounting board. As the size of the solder balls becomes smaller and the pitch of the land of the mounting board becomes smaller as the BGA package becomes smaller, the amount of solder connecting the BGA package and the corresponding land of the mounting board becomes smaller. It is possible that there will be a shortage.

  In such a case, for example, by adopting the land arrangement shown in FIG. 5, the land 23a, 23b, 24a24b of the mounting board corresponding to each solder ball 43 of the BGA package 41 is adopted as shown in FIG. On the other hand, a predetermined amount of solder paste 32 can be supplied. As a result, the BGA package can be reliably mounted on the mounting substrate 21 while ensuring the number of lands.

  The embodiment disclosed this time is an example, and the present invention is not limited to this. The present invention is defined by the terms of the claims, rather than the scope described above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

It is a perspective view including the partial internal structure of the LGA package which concerns on embodiment of this invention. FIG. 2 is a cross-sectional view taken along a cross-sectional line II-II shown in FIG. 1 in the same embodiment. In the same embodiment, it is the perspective view of the LGA package seen from the land of the LGA package. FIG. 4 is a partial cross-sectional view taken along a cross-sectional line IV-IV shown in FIG. 3 in the same embodiment. In the same embodiment, it is a top view which shows arrangement | positioning of a land. FIG. 6 is a partially enlarged plan view of the land shown in FIG. 5 in the same embodiment. FIG. 6 is a partial plan view showing the arrangement of lands formed on the mounting board for explaining a method of mounting the LGA package on the mounting board in the embodiment. FIG. 8 is a partial cross-sectional view taken along a cross-sectional line VIII-VII shown in FIG. 7 in the same embodiment. In the same embodiment, it is a top view which shows 1 process of the method of mounting an LGA package on a mounting board. FIG. 10 is a cross-sectional view showing a step performed after the step shown in FIG. 9 in the same embodiment. FIG. 11 is a partial cross sectional view taken along a cross sectional line XI-XI shown in FIG. 9 showing a process performed after the process shown in FIG. 10 in the same embodiment. FIG. 12 is a cross-sectional view showing a step performed after the step shown in FIG. 11 in the same embodiment. FIG. 13 is a cross-sectional view showing a step performed after the step shown in FIG. 12 in the same embodiment. FIG. 14 is a cross-sectional view showing a step performed after the step shown in FIG. 13 in the same embodiment. It is a top view which shows arrangement | positioning of the conventional land for a comparison. In the same embodiment, it is a top view which shows arrangement | positioning of the land for demonstrating the effect of a LGA package. In the same embodiment, it is sectional drawing which shows 1 process of the method of mounting the BGA package which concerns on a modification on a mounting board.

Explanation of symbols

  1 LGA package, 2 substrate, 3 outer peripheral land group, 3a land, 3b land, 4 inner peripheral land group, 4a land, 4b land, 5 solder resist, 6 die attach material, 7 IC chip, 8 gold wire, 9 copper wiring, 10 epoxy resin (sealing resin), 11 via, 21 mounting substrate, 22 solder resist, 23 outer peripheral land group, 23a land, 23b land, 24 inner peripheral land group, 24a land, 24b land, 31 metal mask, 31a opening, 32 solder paste, 33 solder, 34 squeegee, 41 BGA package, 42 land, 43 solder ball.

Claims (5)

A predetermined substrate having a main surface;
A first land group formed on the main surface along the outer periphery of the substrate, wherein a plurality of first lands are arranged with a first pitch in the X direction and the Y direction intersecting the X direction;
A second land group that is formed at a predetermined distance from the first land group, and in which a plurality of second lands are arranged with the first pitch in the X direction and the Y direction, respectively.
The predetermined distance is a distance in the X direction between a first land located on the second land group side in the first land group and a second land closest to the first land in the second land group. And any one of the distances in the Y direction is set to a distance that is 1.5 times or more of the first pitch and shorter than twice the first pitch. In the first land group, a plurality of the first lands are arranged with a predetermined number of rows along an outer periphery of a rectangular region on the substrate.
2. The semiconductor package according to claim 1, wherein in the second land group, the plurality of second lands are arranged in a region inside the first land region with a predetermined number of rows.   The semiconductor package according to claim 1, wherein the first land and the second land are in a land grid array mode. An outer peripheral land group formed along the outer periphery of a rectangular region on a predetermined substrate and having a plurality of first lands arranged at a first pitch;
An inner peripheral land group in which a plurality of second lands are arranged with the first pitch in a region inside the outer peripheral land group;
With
In the inner peripheral land group, the number of lands located on one side of the outermost periphery is from the state in which the lands are arranged in a matrix with the first pitch in the rectangular area, excluding lands corresponding to the outer peripheral land group. After that, a semiconductor package is obtained by subtracting 1 from the number of lands located along the side corresponding to the one side.   The semiconductor package according to claim 4, wherein the first land and the second land are in a land grid array mode.

Images