JP2010135580A - Method of manufacturing compound semiconductor epitaxial wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a compound semiconductor epitaxial wafer which can adjust a current gain by thermal treatment. <P>SOLUTION: In the method of manufacturing a compound semiconductor epitaxial wafer, material gas is supplied on a heated substrate 1, and an epitaxial layer including a sub collector layer 2, a collector layer 3, a carbon-doped base layer 4, an emitter layer 5 and an emitter contact layer 6 is formed. Immediately after the emitter contact layer 6 is formed, thermal treatment is carried out. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a method of manufacturing a compound semiconductor epitaxial wafer used in an HBT (Hetero Junction Bipolar Transistor).

  Compound semiconductors such as GaAs and InGaAs have a feature of higher electron mobility than Si (silicon) semiconductors. Taking advantage of this feature, GaAs and InGaAs are often used in devices that require high-speed operation and high-efficiency operation. A typical example is HBT. The HBT is widely used as an amplifier for microwave communication for mobile phone transmission and the like.

  In a conventional compound semiconductor epitaxial wafer for HBT, an n-type subcollector layer, an n-type collector layer, a p-type base layer, an n-type emitter layer, and an n-type emitter contact layer are grown on a semi-insulating substrate. Structures are known. Crystal growth of this epitaxial wafer for HBT is mainly performed by metal organic vapor phase epitaxy (MOVPE method), and carbon (C) with little diffusion is used as the p-type dopant of the base layer (for example, (See Patent Document 1 and Patent Document 2).

Conventionally, the current gain (collector current / base current) β of the HBT is adjusted by adjusting the supply amount of a carbon dopant raw material (such as CBr ₄ ) at the time of base layer growth. Increasing the resistance value of the base layer by decreasing the C doping amount increases the current gain β, and decreasing the resistance value of the base layer by increasing the doping amount decreases the current gain β.

In addition, hydrogen, which is a carrier gas during epitaxial growth, and hydrogen of a hydride such as arsine (AsH ₃ ) and phosphine (PH ₃ ) are combined with the C acceptor of the base layer, resulting in a decrease in hole carrier concentration. In order to solve this problem, an annealing treatment is performed to diffuse and expel hydrogen in the base layer. For example, in Patent Document 1, annealing is performed after the base layer is grown and before the emitter layer is grown. In Patent Document 2, after the emitter layer is grown, the emitter layer is removed by etching to expose the base layer. Annealing is performed in the state.
JP-A-9-134925 Japanese Patent Laid-Open No. 11-186278

  However, in the current adjustment of the current gain by the carbon doping amount, there are cases where it is difficult to adjust the current gain β when the resistance value and carrier concentration of the base layer are limited in device fabrication.

  An object of the present invention is to provide a method for manufacturing a compound semiconductor epitaxial wafer capable of adjusting the current gain by solving the above problems and performing heat treatment.

In the first aspect of the present invention, a gas including a group III source gas and a group V source gas is supplied onto a heated substrate, and a subcollector layer, a collector layer, a carbon-doped base layer, an emitter layer, an emitter are provided. In the method of manufacturing a compound semiconductor epitaxial wafer in which an epitaxial layer including a contact layer is formed, a heat treatment is performed immediately after the formation of the emitter contact layer.

According to a second aspect of the present invention, in the method for producing a compound semiconductor epitaxial wafer according to the first aspect, the base layer has a carbon carrier concentration of 1 × 10 ¹⁹ cm ⁻³ or more and 5 × 10 ¹⁹ cm ⁻³ or less, and a thickness. A p-type GaAs layer having a thickness of 80 nm to 2000 nm, and the emitter layer is an n-type InGaP layer having a carrier concentration of 3 × 10 ¹⁷ cm ^{−3 to} 9 × 10 ¹⁷ cm ⁻³ and a thickness of 20 nm to 100 nm. The emitter contact layer is an n-type GaAs layer having a carrier concentration of 2 × 10 ¹⁸ cm ^{−3 to} 6 × 10 ¹⁸ cm ⁻³ and a thickness of 80 nm to 2000 nm.

  According to a third aspect of the present invention, in the method for producing a compound semiconductor epitaxial wafer according to the first aspect or the second aspect, the heat treatment is performed at a temperature of the substrate of 600 ° C. or higher and 750 ° C. or lower in a hydrogen gas atmosphere. The furnace is characterized in that the pressure in the furnace is 50 to 70 Torr and the treatment time is 5 to 20 minutes.

  According to a fourth aspect of the present invention, in the method for manufacturing a compound semiconductor epitaxial wafer according to any one of the first to third aspects, the epitaxial layer may be any one of GaAs, AlGaAs, InGaAs, InGaP, AlGaP, and InGaAlP. It is characterized by using.

  According to the present invention, it is possible to provide a method of manufacturing a compound semiconductor epitaxial wafer capable of adjusting and controlling a current gain by performing a heat treatment immediately after formation of an emitter contact layer.

  Below, the manufacturing method of the compound semiconductor epitaxial wafer which concerns on embodiment of this invention is demonstrated.

FIG. 1 shows a schematic cross-sectional structure of a compound semiconductor epitaxial wafer manufactured in this embodiment.
As shown in FIG. 1, on a semi-insulating GaAs substrate 1, an n-type GaAs subcollector layer 2, an n-type GaAs collector layer 3, a C-doped p-type GaAs base layer 4, an n-type InGaP emitter layer 5, n A type GaAs emitter contact layer 6 and an n type InGaAs non-alloy contact layer 7 are laminated.

The C-doped p-type GaAs base layer 4 has a C carrier concentration of 1 × 10 ¹⁹ cm ^{−3 to} 5 × 10 ¹⁹ cm ⁻³ and a thickness of 80 nm to 2000 nm (more preferably 80 nm to 500 nm). preferable. The Si or Se-doped n-type InGaP emitter layer 5 preferably has a carrier concentration of 3 × 10 ¹⁷ cm ^{−3 to} 9 × 10 ¹⁷ cm ⁻³ and a thickness of 20 nm to 100 nm. The n-type GaAs emitter contact layer 6 preferably has a carrier concentration of 2 × 10 ¹⁸ cm ^{−3 to} 6 × 10 ¹⁸ cm ⁻³ and a thickness of 80 nm to 2000 nm (more preferably 80 nm to 300 nm).

  The epitaxial layers 2 to 7 include GaAs (gallium arsenide), AlGaAs (aluminum gallium arsenide), InGaAs (indium gallium arsenide), InGaP (indium gallium phosphide), AlGaP (aluminum gallium phosphide), InGaAlP (indium gallium aluminum). Phosphorus) can be used.

The metal organic vapor phase epitaxy (MOVPE method) can be used for the production of the compound semiconductor epitaxial wafer of FIG. A GaAs substrate 1 on which an epitaxial layer is grown is set on a susceptor in a growth furnace of the MOVPE apparatus, and the GaAs substrate 1 is heated with a heater. On the heated GaAs substrate 1, a group III source gas, a group V source gas, a dopant source gas and a carrier gas are supplied. The source gas is decomposed by heat, and an epitaxial layer grows on the GaAs substrate 1.

As the group V raw material, AsH ₃ (arsine), As (CH ₃ ) ₃ (trimethyl arsenic), TBA (tertiary butyl arsine), PH ₃ (phosphine) or TBP (tertiary butyl phosphine) can be used.
Group III raw materials include Al (CH ₃ ) ₃ (trimethylaluminum), Ga (CH ₃ )
₃ (trimethylgallium), an In _{(CH 3) 3} (trimethyl _{indium), Al (CH 3 CH 2} ) 3 ( _{triethylaluminum), Ga (CH 3 CH 2} ) 3 ( triethyl helium), In _(CH 3 _{CH 2 3} (triethylindium) can be used.
H ₂ (hydrogen), N ₂ (nitrogen), or Ar (argon) can be used as a dilution gas.
As a p-type (C-doped) dopant material, CBr ₄ and CCl ₃ Br can be used.
As the n-type dopant raw material, SiH ₄ (monosilane), Si ₂ H ₆ (disilane), or H ₂ Se (hydrogen selenide) can be used.

  The process characterized by the manufacturing method of the present embodiment is to stop supplying gas other than hydrogen gas after growing the n-type GaAs emitter contact layer 6 and before growing the n-type InGaAs non-alloy contact layer 7, Heat treatment (annealing) is performed. The current gain can be adjusted by the annealing process during the growth (while the growth is interrupted).

In the growth furnace, in addition to the source gas, a large amount of hydrogen exists as a dilution gas, and a large amount of hydrogen is taken into the p-type GaAs base layer 4. It is possible to increase the current gain by growing the GaAs base layer 4 at a low V / III ratio (1.5 to 10), but the hydrogen in the GaAs base layer 4 has a low V / III ratio. In the GaAs base layer 4 to be grown, it becomes an obstacle to the movement of holes, and the effective resistance value near the interface with the InGaP emitter layer 5 is increased.

When annealing is performed after the emitter contact layer 6 is grown, hydrogen in the GaAs base layer 4 diffuses and escapes from the interface on the InGaP emitter layer 5 side. Utilizing this property, the hydrogen concentration in the vicinity of the interface between the base layer 4 and the emitter layer 5 can be reduced (see FIG. 2), and the minute leak of the base current in the vicinity of the interface can be adjusted by adjusting the annealing conditions. Thus, the value of the current gain β can be adjusted and controlled.
In the above-described adjustment of the current gain by the carbon doping amount in the prior art, when the resistance value and carrier concentration of the base layer are limited, it may be difficult to adjust the current gain β by the C doping amount. In the invention, the current gain β can be adjusted according to conditions such as the temperature, time, pressure, and processing gas of the annealing process.
Moreover, the fluctuation of the current gain of the HBT manufactured from the obtained compound semiconductor epitaxial wafer is small, and the long-term reliability of the HBT is improved.

The annealing treatment is preferably performed in a hydrogen gas atmosphere under conditions of a substrate temperature of 600 ° C. to 750 ° C., a pressure of about 6666 Pa to 9333 Pa (50 Torr to 70 Torr), and a treatment time of 5 minutes to 20 minutes. If this condition / range is exceeded, there is a possibility that a minute leak of the base current is expanded and a device cannot be manufactured. During the annealing process, only hydrogen gas is allowed to flow into the growth furnace, for example, at a flow rate of 10,000 cm ³ / min.
Among the above heat treatment (annealing) conditions, the present inventors have examined the processing time, and in the processing time of less than 5 minutes, there is a variation in the adjustment amount of the current gain β. There was a problem that the gain β was not stable. Furthermore, the treatment time is more preferably 10 minutes or more and 20 minutes or less. When the time is 10 minutes or more and 20 minutes or less, the current gain β after device fabrication becomes more stable.

In this embodiment, after the formation of the GaAs emitter contact layer 6, heat treatment (annealing) is performed to diffuse and escape hydrogen near the interface of the GaAs base layer 4. That is, the heat treatment is performed immediately after the GaAs emitter contact layer 6 is formed, not immediately after the GaAs base layer 4 is formed. This is because the GaAs emitter contact layer 6 can be grown at a high V / III ratio (20 to 30), and Ga
By growing the As emitter contact layer 6 at a high V / III ratio and improving the crystallinity of the GaAs base layer 4, even if heat treatment is performed after the growth of the GaAs emitter contact layer 6, the vicinity of the interface of the emitter contact layer 6 can be obtained. The flatness is not deteriorated, and the layer immediately after the non-alloy contact layer 7 is based on the knowledge that there is no fear of leakage of the base current and heat treatment is possible. Further, the non-alloy contact layer 7 has a property that the surface tends to become cloudy by heating, and the inventors have found that it is preferable to perform a heat treatment immediately after the growth of the emitter contact layer 6.

On the other hand, in the method of Patent Document 1 in which annealing is performed after the growth of the base layer and before the growth of the emitter layer, the GaAs base layer is grown at a low V / III ratio. As a result of the subsequent heat treatment, the crystallinity of the GaAs base layer becomes poor, the flatness near the interface with the InGaP emitter layer becomes rough, and there is a risk of leakage of the base current.
In addition, in the method of Patent Document 2 in which the heat treatment is performed with the base layer exposed after the emitter layer is grown, the InGaP emitter layer becomes cloudy because the flatness of the surface layer becomes rough when placed in a hydrogen atmosphere after the layer growth. Become.

  In the above embodiment, the InGaP-HBT epitaxial wafer in which the emitter layer / base layer is an InGaP / GaAs heterojunction has been described. The same applies to an AlGaAs-HBT epitaxial wafer in which an AlGaAs / GaAs heterojunction is used. Can be applied.

  Next, examples of the present invention will be described.

  In this example, an HBT epitaxial wafer having the same structure as the compound semiconductor epitaxial wafer shown in FIG. 1 manufactured in the above embodiment was produced. Table 1 shows the thickness and carrier concentration of each epitaxial layer.

The substrate temperature during growth was 700 ° C., the pressure in the growth furnace was about 9333 Pa (70 Torr), and the dilution gas was hydrogen.
Ga (CH ₃ ) ₃ , AsH ₃ , and Si ₂ H ₆ were used for the growth of the n-type GaAs subcollector layer 2. Each of those flow rate 90cm ³ / min 19cm ³ / min, 3400 cm ³ / min.
Ga (CH ₃ ) ₃ , AsH ₃ , and Si ₂ H ₆ were used for the growth of the n-type GaAs collector layer 3. Their flow rates are 200 cm ³ / min, 640 cm ³ / min and 10 cm ³ / min, respectively.
For the growth of the p-type GaAs base layer 4, CBr ₄ was used as a C dopant material in addition to Ga (CH ₃ CH ₂ ) ₃ and AsH ₃ . _{Ga (CH 3 CH 2) 3} , each of the flow rate AsH ₃ 500 cm ³ / min, 10 cm ³ / min, the flow rate of CBr ₄ is 17cm ³ / min.
For the growth of the n-type In _0.56 GaP emitter layer 5, In (CH ₃ ) ₃ , Ga (CH ₃ C)
H ₂ ) ₃ , PH ₃ , Si ₂ H ₆ were used. Their flow rates are 260 cm ³ / min, 130 cm ³ / min, 1.0 cm ³ / min, and 50 cm ³ / min, respectively.
Ga (CH ₃ ) ₃ , AsH ₃ , and Si ₂ H ₆ were used for the growth of the n-type GaAs emitter contact layer 6. Each of those flow rate 90cm ³ / min 19cm ³ / min, 3400 cm ³ / min.
For the growth of the n-type InGaAs non-alloy contact layer 6, H ₂ Se was used in addition to Ga (CH ₃ CH ₂ ) ₃ , In (CH ₃ ) ₃ and AsH ₃ . Their flow rates are 200 cm ³ / min, 400 cm ³ / min, 120 cm ³ / min, and 300 cm ³ / min, respectively.

In the above growth process, in Example 1, after the growth of the n-type GaAs emitter contact layer 6, the hydrogen flow rate was 10,000 cm ³ / min, the substrate temperature was 700 ° C., the time was 10 minutes, and the pressure was about 666.
Annealing (heat treatment) was performed at 6 Pa (50 Torr). In Example 2, an epitaxial wafer for HBT was produced under the same annealing conditions and growth conditions as in Example 1 except that the annealing time was 20 minutes.
Furthermore, in the comparative example, the annealing treatment was not performed, and the other growth conditions were the same as those in Example 1, and an HBT epitaxial wafer was manufactured.

  FIG. 2 shows the results of measuring the hydrogen concentration in the p-type GaAs base layer 4 for the epitaxial wafers of Example 1 and Comparative Example. As shown in FIG. 2, in Example 1, the hydrogen concentration of the GaAs base layer 4 in the vicinity of the interface with the emitter layer 5 is greatly reduced as compared with the comparative example. It can be seen that is diffused from the interface of the emitter layer 5 to the emitter layer 5 to escape.

Next, a simple device is manufactured using the HBT epitaxial wafers of Examples 1 and 2 (annealing time 10 minutes, 20 minutes) and comparative example (no annealing (annealing time 0 minutes)) manufactured by the above method. The current gain β was measured. The result is shown in FIG. As shown in FIG. 3, the current gain β could be reduced by the annealing process without changing the C doping amount. It was also found that the current gain β can be controlled by adjusting the annealing time.
Further, in the above example, the annealing process was performed in a hydrogen gas atmosphere at a substrate temperature of 700 ° C., a pressure of 50 Torr, and a processing time of 10 minutes (Example 1) or 20 minutes (Example 2). Similarly, good results were obtained by performing a heat treatment in a hydrogen gas atmosphere under conditions of a substrate temperature of 600 ° C. or higher and 750 ° C. or lower, a pressure of 50 Torr or higher and 70 Torr or lower, and a processing time of 5 minutes or longer and 20 minutes or shorter. .

In Examples 1 and 2, the substrate temperature at the time of crystal growth and the substrate temperature at the time of annealing were set equal (set to 700 ° C.), but the substrate temperature at the time of crystal growth and the substrate temperature at the time of annealing were May be changed. In that case, it is preferable to make the substrate temperature during the annealing process higher than the substrate temperature during crystal growth.
Further, it is preferable that the substrate temperature during the growth of the non-alloy contact layer after the annealing process is lower than or equal to the substrate temperature during the annealing process. That is, when the substrate temperature is increased for the annealing treatment, the substrate temperature during the growth of the non-alloy contact layer is lowered to the substrate temperature during the growth before the annealing treatment, or the substrate during the growth before the annealing treatment. Lower than temperature. If the substrate temperature during the growth before annealing is equal to the substrate temperature during the annealing, the non-alloy contact layer can be grown at the same substrate temperature or at a lower substrate temperature. Is good.

It is typical sectional drawing which shows the structure of the compound semiconductor epitaxial wafer which concerns on embodiment and Example of this invention. It is a graph which shows the hydrogen concentration profile of the base layer in the epitaxial wafer of an Example and a comparative example. It is a graph which shows the relationship between annealing time and a current gain.

Explanation of symbols

1 GaAs substrate 2 n-type GaAs subcollector layer 3 n-type GaAs collector layer 4 p-type GaAs base layer 5 n-type InGaP emitter layer 6 n-type GaAs emitter contact layer 7 n-type InGaAs non-alloy contact layer

Claims (4)

An epitaxial layer including a subcollector layer, a collector layer, a carbon-doped base layer, an emitter layer, and an emitter contact layer is formed on a heated substrate by supplying a gas including a group III source gas and a group V source gas. In the method for producing a compound semiconductor epitaxial wafer,
A method of manufacturing a compound semiconductor epitaxial wafer, wherein a heat treatment is performed immediately after the formation of the emitter contact layer. The base layer is a p-type GaAs layer having a carbon carrier concentration of 1 × 10 ¹⁹ cm ^{−3 to} 5 × 10 ¹⁹ cm ⁻³ and a thickness of 80 nm to 2000 nm.
The emitter layer is an n-type InGaP layer having a carrier concentration of 3 × 10 ¹⁷ cm ^{−3 to} 9 × 10 ¹⁷ cm ⁻³ and a thickness of 20 nm to 100 nm.
2. The compound according to claim 1, wherein the emitter contact layer is an n-type GaAs layer having a carrier concentration of 2 × 10 ¹⁸ cm ^{−3 to} 6 × 10 ¹⁸ cm ⁻³ and a thickness of 80 nm to 2000 nm. Manufacturing method of semiconductor epitaxial wafer.   The heat treatment is performed in a hydrogen gas atmosphere under conditions of a temperature of the substrate of 600 ° C. to 750 ° C., a furnace pressure of 50 Torr to 70 Torr, and a treatment time of 5 minutes to 20 minutes. The manufacturing method of the compound semiconductor epitaxial wafer of Claim 1 or 2.   4. The method of manufacturing a compound semiconductor epitaxial wafer according to claim 1, wherein any one of GaAs, AlGaAs, InGaAs, InGaP, AlGaP, and InGaAlP is used for the epitaxial layer.

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