JP2003318185A - Method for manufacturing compound semiconductor wafer and compound semiconductor element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a compound semiconductor wafer and a compound semiconductor element by which an InGaP-based HBT with an improved characteristic of current amplification factor can be manufactured. <P>SOLUTION: When a sub-emitter layer 45 is formed to manufacture a semiconductor wafer 1 for manufacturing the InGaP-based HBT after forming an emitter layer 44 by an MOCVD method, the sub-emitter layer 45 is grown at 600°C or lower and/or at a V/III ratio of 20 or less. Thus, the generation of a Ga defect can be controlled in the sub-emitter layer 45, and the semiconductor wafer 1 can be manufactured so that a bipolar semiconductor element with a hetero joint can be manufactured without reducing a current amplification factor of β. In addition, a base layer 43 is treated by dehydrogenation annealing before the sub-emitter layer 45 is formed, thereby resulting in the bipolar semiconductor element with a hetero joint having a large value of current amplification factor β. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a compound semiconductor wafer for a semiconductor device for high-speed communication operating in a frequency range above the microwave band, and a compound semiconductor device manufactured using the same. is there.

[0002]

2. Description of the Related Art Heterojunction bipolar transistors (H
BT) is a bipolar transistor in which the emitter-base junction is a heterojunction using a material having a bandgap larger than that of the base layer in order to improve the emitter injection efficiency, and it is used in the frequency range above the microwave band. Since it is suitable as a semiconductor device, it is expected as a semiconductor device for next-generation mobile phones.

The structure of HBT is, for example, InGaP-based HB.
In the case of T, n ⁺ -GaAs is generally formed on the semi-insulating GaAs substrate by using the metal organic thermal decomposition method (MOCVD method).
Layer (sub-collector layer), n-GaAs layer (collector layer), p-GaAs layer (base layer), n-InGaP layer (emitter layer), n-GaAs layer (sub-emitter layer) are successively grown by crystal growth. Thus, the thin film crystal wafer having the above-mentioned layer structure in which the pn junction which is the emitter-base junction has a heterojunction structure is formed, and the HBT is manufactured using this.

FIG. 6 is a diagram schematically showing a general structure of an InGaP-based HBT. The HBT 100 includes a sub-collector layer 102 composed of an n ⁺ -GaAs layer, a collector layer 103 composed of an n-GaAs layer, a base layer 104 composed of a p-GaAs layer 104, and n on a semi-insulating GaAs substrate 101.
-Emitter layer 105 composed of InGaP layer and n ⁺ -G
Sub-emitter layer 106 made of aAs layer, n ⁺ -InG
The emitter contact layer 107 made of an aAs layer is formed as a semiconductor thin film crystal layer in this order by using an appropriate vapor phase growth method such as MOCVD, and the subcollector layer 10 is formed.
2, a collector electrode 108 on the base layer 104, a base electrode 109 on the base layer 104, and an emitter contact layer 10
7 has a structure in which emitter electrodes 110 are respectively formed.

When the InGaP-based HBT transistor shown in FIG. 6 is manufactured, a compound semiconductor thin film layer having the same layer structure as that shown in FIG. 6 is formed on a GaAs substrate by, for example, metal organic thermal decomposition (MOCVD) method. First, a compound semiconductor wafer is manufactured by stacking the layers by the method described above. The characteristics of the sub-emitter layer 106 provided as a contact layer for reducing the contact resistance at the time of electrode attachment are HBT10.
It is known that the current amplification factor characteristic of 0 is greatly affected.

[0006]

This sub-emitter layer has a conventional growth temperature of 620 ° C. and V / I
It is common to grow the II ratio at a value of about 30. However, when the sub-emitter layer is formed under the conventional growth conditions, there is a problem that the current amplification factor β of the obtained HBT becomes low. When the carrier concentration of the sub-emitter layer is as low as 3 × 10 ¹⁸ cm ⁻³ , the injection efficiency is improved by increasing the film thickness and the current amplification factor β is increased.
There is a problem that the value of becomes low. Here, the V / III ratio is the supply amount ratio of the group 5 raw material and the group 3 raw material during the growth of the group 3-5 compound semiconductor crystal. Generally, in the metal-organic vapor phase epitaxy method, the raw material is supplied in a gas state from a gas cylinder or bubbler. The amount of gas supplied from the gas cylinder is controlled by a flow rate control device such as a mass flow controller installed in the supply line,
(Gas concentration in cylinder) x (gas flow rate) is the actual flow rate of the raw material. The amount of gas supplied from the bubbler is controlled by a flow rate control device such as a mass flow controller installed in a carrier gas supply line that flows through the bubbler, and (carrier gas flow rate) x (material vapor pressure in bubbler) / (bubbler internal pressure) is the raw material. Is the actual flow rate. The actual flow rate of the raw materials supplied by these methods, which is the ratio of the supply amounts of the group 5 raw material and the group 3 raw material, is generally called the V / III ratio. The term V / III ratio is also used herein to comply with the above definition.

Although the reason why the sub-emitter layer influences the current amplification factor β is not always clear, it is thought that Ga defects generated in the sub-emitter layer diffuse to the base layer and become recombination centers. Has been.

An object of the present invention is to provide a method for manufacturing a compound semiconductor wafer and a compound semiconductor device capable of solving the above-mentioned problems in the prior art.

An object of the present invention is to provide a method for producing a compound semiconductor wafer for producing an InGaP-based HBT capable of forming a sub-emitter layer without causing a decrease in current amplification factor, and a compound using the same. It is to provide a semiconductor device.

Another object of the present invention is to provide a method of manufacturing a compound semiconductor wafer for manufacturing an InGaP-based HBT capable of increasing the current amplification factor, and a compound semiconductor device using the same.

[0011]

[Means for Solving the Problems] In order to solve the above problems, the present inventors have conducted various experiments and researches, and as a result,
When a collector layer, a base layer, an emitter layer and a sub-emitter layer are sequentially formed on a compound semiconductor substrate by vapor phase growth using the MOCVD method to form a bipolar semiconductor device having a heterojunction, the sub-emitter layer is formed. It was found that the value of the current amplification factor can be prevented from being lowered by selecting the vapor phase growth condition for forming the same, and the dehydrogenation annealing of the base layer is performed before forming the sub-emitter layer, and then the sub-emitter layer is formed. It was found that the value of the current amplification factor can be improved by forming the above, and the present invention has been completed based on these findings.

In the present invention, the InGaP-based H is formed by forming the sub-emitter layer after forming the emitter layer by the MOCVD method.
When manufacturing a compound semiconductor wafer for BT manufacturing, the sub-emitter layer is grown at a growth temperature of 600 ° C. or lower and / or V /
The growth is made under the condition that the III ratio is 20 or less. By selecting the above-mentioned growth conditions, it is possible to control the generation of Ga defects in the sub-emitter layer, and as a result, it is possible to manufacture a heterojunction bipolar semiconductor device without lowering the current amplification factor β. A semiconductor wafer can be manufactured.

Further, according to the present invention, in the case of manufacturing a compound semiconductor wafer for InGaP-based HBT manufacturing by forming a sub-emitter layer after forming a base layer and an emitter layer by MOCVD method, before forming the sub-emitter layer. By performing the dehydrogenation annealing process on the layer, it is possible to obtain a heterojunction bipolar semiconductor device having a large current amplification factor β.

According to the first aspect of the present invention, the collector layer, the base layer, the emitter layer and the sub-emitter layer are vapor-deposited in this order using the MOCVD method on the compound semiconductor substrate to produce a compound for manufacturing an InGaP-based HBT. A method for producing a semiconductor wafer, wherein an n-type GaAs layer is grown as the sub-emitter layer under growth conditions such that a V / III ratio is in the range of 20 to 1.0. A method of manufacturing a semiconductor wafer is proposed.

According to the invention of claim 2, in the invention of claim 1, the n-type GaAs layer has a V / III ratio of 1
A method of manufacturing a compound semiconductor wafer is proposed in which the growth is performed within the range of 0 to 1.0.

According to the third aspect of the present invention, the collector layer, the base layer, the emitter layer and the sub-emitter layer are vapor-deposited in this order using the MOCVD method on the compound semiconductor substrate to form a compound for manufacturing an InGaP-based HBT. A method for manufacturing a semiconductor wafer, wherein an n-type GaAs layer is grown as the sub-emitter layer at a growth temperature within a range of 600 ° C to 500 ° C, and a compound semiconductor wafer is manufactured. A method is proposed.

According to the invention of claim 4, in the invention of claim 3, the n-type GaAs layer is grown at the growth temperature of 580.
A method of manufacturing a compound semiconductor wafer is proposed in which the growth is performed in the range of ℃ to 500 ℃.

According to the invention of claim 5, in the invention of claim 3, a method of manufacturing a compound semiconductor wafer, wherein the n-type GaAs layer is grown with a V / III ratio within the range of 20 to 1.0. Is proposed.

According to the invention of claim 6, in the invention of claim 4, a method for producing a compound semiconductor wafer in which the n-type GaAs layer is grown with a V / III ratio within the range of 10 to 1.0. Is proposed.

According to the present invention, a collector layer, a base layer, an emitter layer and a sub-emitter layer are vapor-deposited in this order on the compound semiconductor substrate using the MOCVD method to produce a compound for manufacturing an InGaP-based HBT. A method for manufacturing a semiconductor wafer, wherein a dehydrogenation annealing treatment of the base layer is performed before forming the sub-emitter layer is proposed. .

According to the invention of claim 8, in the invention of claim 7, the sub-emitter layer is an n-type GaAs layer, the growth temperature is in the range of 600 ° C. to 500 ° C., and the V / III ratio is 20. A method of manufacturing a compound semiconductor wafer is proposed in which the growth is performed within the range of 1.0.

According to the invention of claim 9, there is proposed a compound semiconductor device manufactured by using the method of manufacturing a compound semiconductor wafer according to any one of claims 1 to 8.

When the sub-collector layer is crystal-grown by vapor phase growth by MOCVD, the growth temperature is set to 600 ° C. or lower, which is slightly lower than the conventional temperature, and / or the V / III ratio is reduced. As a result of suppressing the generation of Ga defects, it is considered that the current amplification factor is not reduced. Here, as the impurity added to bring the carrier concentration of the sub-emitter layer to a required level, a publicly known appropriate substance such as Si can be used, and it is not necessary to use a special impurity.

[0024]

BEST MODE FOR CARRYING OUT THE INVENTION An example of an embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a layer structure diagram schematically showing an example of a thin film crystal wafer for HBT manufactured by the method of the present invention. This thin film crystal wafer is an InGaP-based HBT
An example of an embodiment in the case of manufacturing the compound semiconductor wafer used for manufacturing the semiconductor wafer having the layer structure shown in FIG. 1 by the method of the present invention will be described. Therefore, the method of the present invention is not limited to the production of the compound semiconductor wafer having the structure shown in FIG.

The structure of the semiconductor wafer 1 shown in FIG. 1 is as follows. The semiconductor wafer 1 is made of semi-insulating GaA.
MOCV on GaAs substrate 2 which is an s compound semiconductor crystal
It is configured by stacking a plurality of semiconductor thin film crystal growth layers one after another using the D method. The semiconductor wafer 1 will be described with reference to FIG. 1. The GaAs substrate 2 is made of a semi-insulating GaAs (001) layer, and the buffer layer 3 made of an i-GaAs layer is formed on the GaAs substrate 2.

An HBT functional layer 4 is formed on the buffer layer 3. In the HBT functional layer 4, an n ⁺ -GaAs layer serving as the sub-collector layer 41 and an n ⁻ -GaAs layer serving as the collector layer 42 are sequentially formed on the buffer layer 3 as semiconductor epitaxial growth crystal layers with a predetermined thickness. ing. A p ⁺ -GaAs layer serving as the base layer 43 is also formed on the collector layer 42 as a semiconductor epitaxial growth crystal layer.
An n-InGaP layer serving as the emitter layer 44 is formed on the third layer 3. And on the emitter layer 44, n ⁺
The -GaAs layer serves as the sub-emitter layer 45, and n ⁺ -Ga
An As layer and an n ⁺ -InGaAs layer are formed as the emitter contact layers 46 and 47, respectively.

Next, a method for forming each of the above layers as an epitaxially grown semiconductor thin film crystal layer by MOCVD will be described in detail.

FIG. 2 shows the semiconductor wafer 1 shown in FIG.
1 schematically shows a main part of a vapor phase growth semiconductor manufacturing apparatus 10 used for manufacturing a semiconductor by MOCVD. The vapor phase growth semiconductor manufacturing apparatus 10 includes a reactor 12 to which a raw material gas from a raw material supply system (not shown) is supplied via a raw material supply line 11, and the GaAs substrate 2 is provided in the reactor 12.
A susceptor 13 for mounting and heating is provided. In this embodiment, the susceptor 13 is a polygonal prism, and a plurality of GaAs substrates 2 are attached to the surface thereof.
The susceptor 13 has a known structure that can be rotated by a rotating device 14. Reference numeral 15 indicates a susceptor 1.
3 is a coil for high frequency induction heating. Coil 1
The GaAs substrate 2 can be heated to a required growth temperature by supplying a heating current to the heater 5 from the heating power source 16. By this heating, the raw material gas supplied into the buffer layer 3 through the raw material supply line 11 is thermally decomposed on the GaAs substrate 2, and a desired semiconductor thin film crystal is vapor-phase grown on the GaAs substrate 2 by the MOCVD method. You can do it. The used gas is discharged to the outside from the exhaust port 12A and sent to the exhaust gas treatment device.

FIG. 3 is a diagram showing growth temperature conditions at the time of forming each layer when the semiconductor wafer 1 having the structure shown in FIG. 1 is manufactured by using the vapor phase growth semiconductor manufacturing apparatus 10 shown in FIG.

Hereinafter, referring to FIG. 3, the GaAs substrate 2
A method of sequentially forming each layer on the above will be described.

GaAs is formed on the susceptor 13 in the reactor 12.
After mounting a plurality of substrates 2, a growth temperature is set to 700 ° C., hydrogen is used as a carrier gas, arsine and trimethylgallium (TMG) are used as raw materials, and GaAs is grown as a buffer layer 3 to a thickness of about 500 nm. Then, the sub-collector layer 41 is formed on the buffer layer 3 by n ⁺ -.
As a GaAs layer, growth temperature is 620 ° C., V / III ratio is 20
As a result, it is formed by growing 500 nm.

In addition to the above-mentioned source gas, phosphine and trimethylindium (TMI) can be appropriately supplied from a source gas supply system (not shown) in accordance with the composition of each thin film layer to be formed, which will be described later. .

Next, the growth temperature is raised to 660 ° C. and n ⁺ −
A GaAs layer is formed as the collector layer 42. Then, the growth temperature is set to 620 ° C. again, and the base layer 43 and the emitter layer 44 are formed to have predetermined thicknesses. After the ballast treatment, the sub-emitter layer 45 is formed with the growth temperature lowered to 575 ° C. and the V / III ratio set to 20.
As an n ⁺ -GaAs layer.

As described above, as a growth condition for forming the sub-emitter layer 45, the growth temperature is lower than 620 ° C. which is a conventional general growth temperature for film formation of this kind.
The temperature is set to 75 ° C., and n ⁺ − is formed on the emitter layer 44 under this growth condition.
When GaAs is epitaxially grown, this n ⁺ -G
The generation of Ga defects during the growth period of the aAs layer can be effectively suppressed, and the sub-emitter layer 4 having few Ga defects can be effectively formed.
5 can be formed. When the growth temperature is 500 ° C. or less, the growth rate is in a region depending on the temperature, and the growth rate sharply decreases, which is unrealistic. Therefore, in this case, the lower limit of the growth temperature is preferably 500 ° C.

When the formation of the sub-emitter layer 45 is completed in this manner, the supply of the raw material gas is stopped and arsine is caused to flow in a predetermined annealing atmosphere to form the GaAs layer in which the respective layers are laminated as described above. The substrate 2 is heated for a predetermined time. After the annealing process is completed, the growth temperature is set to 49.
By forming the emitter contact layers 46 and 47 at 0 ° C., the semiconductor wafer 1 having the layer structure shown in FIG. 1 is obtained.

When the semiconductor wafer 1 is formed as described above, G generated in the sub-emitter layer 45 when it is formed.
Since it is possible to effectively suppress the occurrence of a defects, the semiconductor wafer 1 thus obtained is used to obtain an In structure as shown in FIG.
When a GaP-based HBT is manufactured, the value of the current amplification factor β does not decrease, and In
A GaP-based HBT can be obtained.

In the above embodiment, the sub-emitter layer 45
By making the growth temperature at the time of formation of 575 ° C. lower than the growth temperature at the time of forming the sub-emitter layer in the related art, it is possible to effectively suppress the generation of Ga defects in the sub-emitter layer 45, and thereby to increase the current amplification factor. I tried to suppress the decline. However, the present invention is not limited to this one embodiment.

The growth temperature of the sub-emitter layer 45 is 600 ° C.
It may be the following or less, preferably 580 ° C or less. As described above, by lowering the growth temperature, Ga defects generated in the sub-emitter layer 45 are less likely to occur, and it is presumed that the Ga defects generated in the sub-emitter layer 45 may be the cause. It is considered that the occurrence of defects that become recombination centers in 1) is reduced, and the current amplification factor of the HBT manufactured using the semiconductor wafer 1 can be prevented from lowering than the expected value.

Here, in place of or in addition to lowering the growth temperature at the time of forming the sub-emitter layer 45, V / I at the time of forming the sub-emitter layer 45.
When the value of the II ratio is 20 or less, similarly, the generation of Ga defects in the sub-emitter layer 45 can be significantly suppressed, and the same effect as when the growth temperature is lowered can be obtained. That is, when the sub-emitter layer 45 is formed, V / I
By performing the growth under the condition that the II ratio is 20 or less, the same effect as when the growth temperature is 600 ° C. or less can be obtained. Of course, when the sub-emitter layer 45 is formed, the growth temperature may be set to 600 ° C. or lower and the V / III ratio may be set to 20 or lower, and in this case, a better effect can be obtained.

FIG. 4 is a diagram showing another growth temperature condition for explaining another embodiment of the present invention. The embodiment according to the diagram shown in FIG. 4 is significantly different from the embodiment shown in FIG. 3 in that the annealing treatment is performed before the formation of the sub-emitter layer 45, and the other steps are similar to those of the embodiment shown in FIG. Is similar to the case of the embodiment described with reference to FIG.

Therefore, only the steps of this different portion will be described with reference to FIG. After forming the emitter layer 44 and performing the ballast process, an annealing process is performed prior to the formation of the sub-emitter layer 45. This annealing treatment is a dehydrogenation annealing treatment for desorbing hydrogen from the base layer 43.
Annealing treatment is performed at a temperature of 75 ° C. for 5 minutes.

After the dehydrogenation annealing of the base layer 43 is performed in this manner, the growth temperature is set to 575 ° C. and the sub-emitter layer 45 is formed. The method of forming the sub-emitter layer 45 here is the same as that of the sub-emitter layer 45 described with reference to FIG.
Is exactly the same as the method of forming. After forming the sub-emitter layer 45, the emitter contact layers 46 and 47 are formed.

As described above, if the dehydrogenation annealing is performed on the base layer 43 before the formation of the sub-emitter layer 45, Ga defects in the base layer 43 can be reduced. It is considered that Ga defects are generated again in the base layer 43 by the dehydrogenation annealing from.

In the method according to FIG. 4, the base layer 43
Even if the sub-emitter layer 45 is formed after the dehydrogenation annealing treatment on the base layer 43, the growth temperature at that time is 600 ° C. or lower, which is sufficiently lower than the annealing temperature.
Is less likely to cause Ga defects.

For the above reasons, the annealing treatment greatly improves the current amplification factor, and an HBT having a large current amplification factor can be manufactured.

[0047]

EXAMPLES Example 1 A compound semiconductor wafer having the layer structure shown in FIG. 1 was manufactured according to the diagram shown in FIG. The growth conditions of the sub-emitter layer 45 at this time are as follows.
As shown in FIG. 5, the temperature was 575 ° C., the V / III ratio was 10, and the film thickness was 500 Å. The HB having the structure shown in FIG. 6 is manufactured by using the compound semiconductor wafer manufactured as described above.
When T was manufactured and the current amplification factor was measured, it was 115. Further, although the film thickness was set to 2000 Å under the same conditions, almost no decrease in the current amplification factor was observed, and the film thickness was 115 as in the previous case.

Comparative Example For comparison with Example 1, the growth conditions of the sub-emitter layer 45 were set to a growth temperature of 620 ° C., a V / III ratio of 30, and a thickness of 500 Å. When the current amplification factor was measured in the same manner as in Example 1, it was 105. The carrier concentration of the sub-emitter layer 45 at this time was 3 × 10 ¹⁸ cm ⁻³ . Another sample was made under the same conditions with a film thickness of 2000 Å, but the current amplification factor was 80 by increasing the film thickness.
Was about 15% lower than that when the film thickness was 500Å.

In FIG. 5, the measurement results of Example 1 and Comparative Example are shown with the horizontal axis representing the film thickness and the vertical axis representing the current amplification factor. From FIG. 5, it can be seen that in the case of the present invention, the decrease in the current amplification factor is favorably suppressed without being affected by the film thickness of the sub-emitter layer 45.

Example 2 A compound semiconductor wafer having the layer structure shown in FIG. 1 was manufactured according to the diagram shown in FIG. The growth conditions of the sub-emitter layer 45 at this time were such that the growth temperature was 575 ° C. as shown in FIG. 4, the V / III ratio was 10, and the film thickness was 2000Å. When the HBT having the structure shown in FIG. 6 was manufactured using the compound semiconductor wafer manufactured in this manner and the current amplification factor was measured, it was 130.

The reason why the current amplification factor increased to 130 in the case of Example 2 is considered as follows. When the dehydrogenation annealing of the base layer 43 is performed after the growth of the sub-emitter layer 45, the substrate temperature becomes about 660 ° C. Even if the growth conditions of the sub-emitter layer 45 are optimized to suppress the generation of Ga defects, the subsequent dehydrogenation is performed. Ga defects are generated again by annealing. However, if the dehydrogenation annealing of the base layer 43 is performed before the growth of the sub-emitter layer 45, Ga defects will not occur due to the combination with the low-temperature growth condition of the sub-emitter layer 45. Before the growth of the sub-emitter layer 45, dehydrogenation annealing of the base layer 43 is performed to
Is grown at a high growth temperature of 600 ° C. or higher, hydrogen is taken into the base layer 43 again during the growth of the sub-emitter layer 45, so that the current amplification factor β is improved, but the drift of the collector current is increased. I will end up.

[0052]

As described above, according to the present invention, it is possible to suppress the generation of Ga defects in the sub-emitter layer only by controlling the growth conditions, and to effectively suppress the decrease in the current amplification factor of the HBT. Therefore, a compound semiconductor wafer having excellent electrical characteristics can be manufactured at low cost, and a high-performance semiconductor device can be provided at low cost.

Further, since the current amplification factor of the HBT can be increased only by annealing the base layer before forming the sub-emitter layer, a compound excellent in electrical characteristics at low cost can be obtained. A semiconductor wafer can be manufactured, and a high-performance semiconductor device can be provided at low cost.

[Brief description of drawings]

FIG. 1 is a layer structure diagram schematically showing an example of a thin film crystal wafer for HBT manufactured by the method of the present invention.

2 is a diagram schematically showing a main part of a vapor phase growth semiconductor manufacturing apparatus used for manufacturing the semiconductor wafer shown in FIG. 1 by a MOCVD method.

3 is a diagram showing growth temperature conditions at the time of forming each layer when the semiconductor wafer having the structure shown in FIG. 1 is manufactured using the vapor phase growth semiconductor manufacturing apparatus shown in FIG.

4 is a diagram showing another growth temperature condition at the time of forming each layer when the semiconductor wafer having the structure shown in FIG. 1 is manufactured using the vapor phase growth semiconductor manufacturing apparatus shown in FIG.

FIG. 5 is a graph showing the measurement results of Example 1 and Comparative Example, with the horizontal axis representing the film thickness and the vertical axis representing the current amplification factor.

FIG. 6 is a diagram schematically showing the structure of an InGaP-based HBT.

[Explanation of symbols]

1 Semiconductor wafer 2 GaAs substrate 3 buffer layers 4 HBT functional layer 10 Vapor growth semiconductor manufacturing equipment 11 Raw material supply line 12 reactor 12A exhaust port 13 Susceptor 15 coils 41 Sub-collector layer 42 Collector layer 43 Base layer 44 Emitter layer 45 Sub-emitter layer 46, 47 Emitter contact layer

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Tomoyuki Takada             6 Kitahara, Tsukuba City, Ibaraki Sumitomo Chemical Co., Ltd.             Inside the company F-term (reference) 5F003 AZ01 BA92 BB04 BE04 BE90                       BF06 BM03 BP32 BP42                 5F045 AA04 AB10 AB17 AC08 AD08                       AD09 AD10 AF04 AF05 BB16                       CA02 DA53 DA63 DP16 DP27                       EE12 EK02 HA06

Claims (9)

[Claims] 1. A collector layer, a base layer, an emitter layer and a sub-emitter layer are formed on a compound semiconductor substrate in this order by MO.
A method for producing a compound semiconductor wafer for producing an InGaP-based HBT by vapor-phase growth using a CVD method, wherein an n-type GaAs layer is V / III as the sub-emitter layer.
A method for producing a compound semiconductor wafer, characterized in that the compound semiconductor wafer is grown under a growth condition in which the ratio is in the range of 20 to 1.0. 2. The method for producing a compound semiconductor wafer according to claim 1, wherein the n-type GaAs layer is grown with the V / III ratio within the range of 10 to 1.0. 3. A collector layer, a base layer, an emitter layer, and a sub-emitter layer are formed on a compound semiconductor substrate in this order by MO.
A method for producing a compound semiconductor wafer for InGaP-based HBT production by vapor deposition using a CVD method, wherein an n-type GaAs layer is used as the sub-emitter layer and a growth temperature is in a range of 600 ° C to 500 ° C. A method of manufacturing a compound semiconductor wafer, wherein the compound semiconductor wafer is grown as an inside. 4. The growth temperature of the n-type GaAs layer is set to 5
The method for producing a compound semiconductor wafer according to claim 3, wherein the growth is performed within a range of 80 ° C to 500 ° C. 5. The method for producing a compound semiconductor wafer according to claim 3, wherein the n-type GaAs layer is grown with a V / III ratio within a range of 20 to 1.0. 6. The method for producing a compound semiconductor wafer according to claim 4, wherein the n-type GaAs layer is grown with a V / III ratio within a range of 10 to 1.0. 7. A collector layer, a base layer, an emitter layer, and a sub-emitter layer are formed on a compound semiconductor substrate in this order by MO.
A method for producing a compound semiconductor wafer for InGaP-based HBT production by vapor deposition using a CVD method, comprising: performing dehydrogenation annealing treatment of the base layer before forming the sub-emitter layer. A method of manufacturing a compound semiconductor wafer, comprising: 8. The sub-emitter layer is an n-type GaAs layer grown at a growth temperature of 600 ° C. to 500 ° C. and a V / III ratio of 20 to 1.0. Item 8. A method for producing a compound semiconductor wafer according to item 7. 9. A compound semiconductor device manufactured by using the method for manufacturing a compound semiconductor wafer according to claim 1. Description: