JP2010128410A - Image display - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image display for reducing a reactive power in a whole plasma display panel (PDP) by reducing a panel capacitance by separating X and Y electrodes at a center of the PDP. <P>SOLUTION: In the image display, each of a plurality of Y electrodes 7L and 7R, and a plurality of X electrodes 8L and 8Y, of the PDP 6, is separated at a screen center section of the PDP 6 to right and left, and its separation part is insulated. The plurality of Y electrodes 7L and 7R, and the plurality of X electrodes 8L and 8Y, are drawn from both ends of the PDP 6, and respectively connected to Y electrode driving circuit 4L and 4R, and an X electrode driving circuit 5L and 5R. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an image display apparatus using a plasma display panel (hereinafter referred to as PDP), and more particularly to power saving.

  In recent years, a plasma television (PDP-TV) using a PDP has become widespread in the large screen television market.

  The light emission principle of the PDP is excited by causing a sustain discharge in a discharge cell by a sustain pulse which is a drive pulse applied between a common electrode (hereinafter referred to as X electrode) and a scanning electrode (hereinafter referred to as Y electrode). The ultraviolet rays generated from the discharge gas are converted into visible light by a phosphor. When gradation representation is performed by PDP, one field is temporally divided into a plurality of subfields, and the number of sustain pulses corresponding to the weighted value is applied to each subfield, so that the number of pulses can be increased. The discharge cell emits light with brightness (luminance).

  Each subfield is separated into a reset period, an address period, and a sustain period. In the reset period, reset processing of each subfield is performed, address discharge for selecting a discharge cell to be lit in the address period is performed, and sustain discharge for display by a sustain pulse is performed in the sustain period.

  However, in the PDP, there is a dielectric layer between the X and Y electrodes, which forms a capacitor. That is, it has a large capacity.

  When a sustain pulse is applied to such an electrode, when charging and discharging the interelectrode capacitance, when the panel capacitance is CP and the power supply voltage is VS, energy P1 supplied from the power supply to the panel capacitance is expressed by the following equation (1): It is represented by

P1 = CP × VS ² (1)
The energy P1 supplied from the power source to the panel capacitance is expressed by the above-described equation (1). However, every pulse is consumed by the resistance of the switching element and the resistance of the panel. Is not involved at all. The power consumed when charging / discharging the panel capacitor CP without being involved in this discharge is called reactive power. Since the reactive power is proportional to the panel capacity CP, the reactive power increases as the panel size increases.

  Conventionally, such PDP driving circuits with reduced reactive power are disclosed in, for example, Japanese Patent Application Laid-Open No. 62-192798 (Patent Document 1) and Japanese Patent Application Laid-Open No. 8-152865 (Patent Document 2). was there.

  A conventional PDP driving circuit will be described with reference to FIG. FIG. 6 is a schematic diagram for explaining the configuration of a driving circuit of a conventional PDP.

  As shown in FIG. 6, the driving circuit of the PDP includes a Y electrode driving circuit 4 and an X electrode driving circuit 5 having the same configuration as the Y electrode driving circuit 4, and both the Y electrode driving circuit 4 and the X electrode driving circuit. The circuit 5 is coupled by the panel capacitance CP of the PDP. Here, the circuit configuration and the operation thereof will be briefly described on behalf of the Y electrode drive circuit 4.

  First, the Y electrode drive circuit 4 connects the recovery coil 48 to the Y electrode [point N1] of the PDP, and connects the four switches 41, 42, 43, 44 to both ends of the recovery coil 48, and two A power recovery capacitor 47 is commonly connected to one ends of the switches 41 and 42. Diodes 45 and 46 are connected between the switches 41 and 42.

  In the Y electrode drive circuit 4, the recovery coil 48 and the panel capacitance CP cause series resonance to charge and discharge the panel capacitance CP. On the other hand, the power used for charging / discharging the panel capacitance CP is recovered by the power recovery capacitor 47, thereby reducing the power newly supplied from the power source VS.

  The power loss P2 at one sustain pulse in the panel capacitance CP of the Y electrode drive circuit 4 described above is represented by tr1 as the rise time of the Y electrode pulse, and the series resistance corresponding to the resistance of the switch 41 or the switch 42 of the Y electrode drive circuit 4 and the PDP. Is R and the inductance of the recovery coil 48 is L, the following equation (2) is established.

P2 = {(tr1 × R) / (4 × L)} × CP × VS ² (2)
For this reason, when compared with the circuit of the formula (1) that does not perform the charge recovery described above, it can be seen that the power loss is small by the (tr1 × R) / (4 × L) coefficient. Further, there is a relationship of the following equation (3) between the rise time tr1 and fall time tf1 of each pulse and the inductance L and the panel capacitance CP of the recovery coil 48.

tr1 = tf1 = π × {(L × CP) ^1/2 } (3)
Substituting this equation (3) into the above equation (2) yields the following equation (4).

P3 = (π / 4) × R × {(CP / L) ^1/2 } × CP × VS ² (4)
Therefore, the smaller the panel capacitance CP or the larger the inductance L of the recovery coil 48, the smaller the loss.
Japanese Patent Laid-Open No. 62-192798 JP-A-8-152865

  In order to reduce the reactive power in the above-described conventional drive circuit, it is necessary to increase the inductance L of the recovery coil 48, which increases tr1 and tf1, as can be seen from the equation (3). However, when tr1 and tf1 are increased, the period of the sustain pulse is increased correspondingly (the drive frequency is decreased). In the PDP, there is a problem that the sustain pulse drive frequency and the number of gradation representations are substantially proportional, and the gradation deteriorates when the drive frequency decreases.

  SUMMARY OF THE INVENTION An object of the present invention is to provide an image display device in which the X and Y electrodes are separated to the left and right at the central portion of the PDP, the panel capacity is reduced, and the reactive power in the entire PDP can be reduced. It is in.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  That is, the outline of a typical one is that the plurality of scanning electrodes and the plurality of common electrodes of the display panel are separated from each other at the center of the screen of the display panel, the separated portions are insulated, and both ends of the display panel A plurality of scanning electrodes and a plurality of common electrodes are drawn out from the above and connected to the drive circuit.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  In other words, the effect obtained by a typical one is that the reactive power can be reduced and the number of gradation representations can be maintained by separating the X and Y electrodes left and right at the center of the PDP. it can.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

  In the following, a plasma display device using a PDP will be described as an example of an image display device.

(Embodiment 1)
The configuration of the plasma display device according to Embodiment 1 of the present invention will be described with reference to FIG. FIG. 1 is a block diagram showing a configuration of a plasma display device according to Embodiment 1 of the present invention, and shows a basic configuration of a plasma display device that drives a PDP that is a display panel.

  In FIG. 1, a plasma display apparatus includes a signal processing circuit 1, a subfield (hereinafter referred to as SF) generation circuit 2, an address electrode driving circuit 3, Y electrode driving circuits 4L and 4R, X electrode driving circuits 5L and 5R, PDP 6, and Y electrodes. 7L, 7R, X electrodes 8L, 8R, address electrodes 9, and discharge cells 10.

  Here, the Y electrode and the X electrode are physically separated at the center of the screen, and the Y electrodes 7L and 7R and the X electrodes 8L and 8R are insulated from each other.

  In the conventional PDP, the Y electrode and the X electrode are separated from each other and drawn from one side, but in this embodiment, the Y electrode 7L and the X electrode 8L, and the Y electrode 7R and the X electrode 8R are drawn from the same end face. Yes.

  In the conventional PDP, there is only one Y electrode driving circuit and X electrode driving circuit corresponding to the Y electrode and the X electrode, respectively, but in this embodiment, there are two in total, one on each side. is doing.

  Next, the operation of each block will be described. The signal processing circuit 1 performs resolution conversion for matching the video signal to the resolution of the PDP 6 and also performs image quality adjustments such as contrast, brightness, and gamma correction according to user preferences.

  Next, the SF generation circuit 2 divides one field into a plurality of subfields, and controls lighting / non-lighting of each discharge cell 10 in accordance with the video signal in each subfield, and the Y electrode driving circuits 4L, 4R. The control signals for the X electrode drive circuits 5L and 5R are generated.

  The PDP 6 is a display panel that selectively discharges a plurality of discharge cells 10 for each subfield to display an image in gradation, and includes a plurality of Y electrodes 7L, 7R, X electrodes 8L, 8R, and address electrodes 9. The

  The address electrodes 9 are arranged in the vertical direction of the screen, the Y electrodes 7L and 7R, the X electrodes 8L and 8R are arranged in the horizontal direction of the screen, and each electrode is separated at the center. A discharge cell 10 is formed at each intersection of the Y electrodes 7L and 7R, the X electrodes 8L and 8R, and the address electrode 9, and each discharge cell 10 constitutes a pixel on the screen. The address electrode drive circuit 3 is connected to the plurality of address electrodes 9 of the PDP 6 and applies a write pulse to the corresponding address electrode 9 in the address period.

  The internal configuration of the Y electrode drive circuits 4L and 4R is the same as that of the conventional drive circuit shown in FIG. The drive circuits are connected to the Y electrodes 7L and 7R, and write pulses are sequentially applied to the Y electrodes 7L and 7R in the address period. As a result, address discharge is performed in the corresponding discharge cell 10.

  The Y electrode drive circuits 4L and 4R simultaneously apply a sustain pulse, which is a periodic drive pulse, to the Y electrodes 7L and 7R in the sustain period.

  The X electrode drive circuits 5L and 5R have the same internal configuration as the Y electrode drive circuits 4L and 4R, and are connected to the X electrodes 8L and 8R. In the sustain period, the sustain electrodes of the Y electrodes 7L and 7R are connected to the X electrodes 8L and 8R. A sustain pulse that is 180 ° out of phase with the pulse is simultaneously applied. As a result, a sustain discharge is performed in the corresponding discharge cell 10 and an image is displayed.

  Next, the operation during the sustain period of the plasma display device according to the first embodiment of the present invention will be described with reference to FIG. FIG. 2 is an explanatory diagram for explaining the operation during the sustain period of the plasma display device according to the first embodiment of the present invention, and shows the operation during the sustain period in the Y electrode drive circuits 4L and 4R shown in FIG. .

  First, the switch 41 is turned on and the switch 44 is turned off. At this time, the switches 42 and 43 are off. As a result, the voltage at the node N1 gradually rises due to LC resonance caused by the recovery coil 48 and the panel capacitance CP.

  Next, the switch 41 is turned off and the switch 43 is turned on. As a result, the voltage at the node N1 rapidly increases, the voltage at the node N1 is fixed at VS, and a sustain discharge is generated by the discharge current supplied from the power supply VS.

  Next, the switch 43 is turned off and the switch 42 is turned on. As a result, the voltage at the node N1 gradually drops due to LC resonance caused by the recovery coil 48 and the panel capacitance CP. Thereafter, the switch 42 is turned off and the switch 44 is turned on. As a result, the voltage at the node N1 drops rapidly and is fixed to the ground potential.

  Next, in this embodiment, the reason why the reactive power is reduced by physically separating the Y electrode and the X electrode at the center of the screen and insulating the Y electrodes 7L and 7R and the X electrodes 8L and 8R will be described. To do.

  The reactive power P3 in the conventional driving circuit is expressed by the above-described equation (4).

On the other hand, in this embodiment, considering only reactive power generated on one side, for example, the Y electrode drive circuit 4L and the X electrode drive circuit 5L, the panel capacitance is halved, so the Y electrode drive circuit 4L and the X electrode drive The reactive power generated in the circuit 5L is (π / 4) × R × {(CP / 2L) ^1/2 } × CP / 2 × VS ² .

  This is doubled because it is consumed by the drive circuits on both sides. Therefore, when the reactive power in the present embodiment is P4, P4 is expressed by the following equation (5).

P4 = (π / 4) × R × {(CP / 2L) ^1/2 } × CP × VS ² (5)
From this equation (5), it can be seen that (1/2) ^1/2 times = about 0.7 times the reactive power P3 in the conventional drive circuit, leading to a reduction in reactive power.

  Furthermore, in this embodiment, another effect can be expected. The dotted arrows in FIG. 1 indicate the direction of the charge / discharge current flowing through the Y electrode / X electrode in the present embodiment.

  For example, if the charge / discharge current of the Y electrode 7L is set to the right direction, the charge / discharge current of the X electrode 8L is returned to the left direction. As described above, since the charge / discharge currents flowing through the Y electrode / X electrode are opposite to each other, unnecessary radiated electromagnetic waves due to the charge / discharge current can be reduced.

  In the present embodiment, since the Y electrode and the X electrode are physically separated at the center of the screen, the current flowing through the Y electrode and the X electrode can be reduced, so that the Y electrode drive circuits 4L and 4R can be reduced. , Less current flows through the switches used in the X electrode drive circuits 5L and 5R, reducing the size of the switch and the number of switches (when multiple switches are arranged in parallel to withstand the required current). can do.

(Embodiment 2)
In the second embodiment, the X electrode drive circuits 5L and 5R are eliminated and the X electrodes 8L and 8R are grounded to the ground in the first embodiment.

  The configuration of the plasma display device according to the second embodiment of the present invention will be described with reference to FIG. FIG. 3 is a block diagram showing the configuration of the plasma display device according to Embodiment 2 of the present invention.

  In FIG. 3, the configuration of the block is the same as that of the first embodiment shown in FIG. 1 except that the X electrode drive circuits 5L and 5R are eliminated and the X electrodes 8L and 8R are grounded.

  Next, the configuration of the Y electrode drive circuit of the plasma display device according to the second embodiment of the present invention will be described with reference to FIG. FIG. 4 is a block diagram showing the configuration of the Y electrode drive circuit of the plasma display device according to Embodiment 2 of the present invention.

  In FIG. 4, the configuration is the same as the configuration of the Y electrode driving circuit shown in FIG. 6 except that the switch 44 is not connected to the ground but connected to the -VS power supply.

  In the present embodiment, the X electrodes 8L and 8R are grounded to the ground, and a ± VS sustain panel is added to the Y electrodes 7L and 7R, thereby performing a charge / discharge operation to the panel capacitance.

  Thereby, in the present embodiment, the cost can be reduced by deleting the X electrode drive circuits 5L and 5R, and the Y electrode and the X electrode are arranged at the center of the screen as in the first embodiment. By physically separating and insulating the Y electrodes 7L and 7R and the X electrodes 8L and 8R, reactive power can be reduced.

(Embodiment 3)
In the third embodiment, the separation portions of the Y electrodes 7L and 7R and the X electrodes 8L and 8R in the first embodiment are arranged in a staggered arrangement or a random arrangement instead of one row in the center of the screen.

  The configuration of the plasma display device according to Embodiment 3 of the present invention will be described with reference to FIG. FIG. 5 is a block diagram showing the configuration of the plasma display apparatus according to Embodiment 3 of the present invention.

  In FIG. 5, the first embodiment shown in FIG. 1 is different except that the separation portions of the Y electrodes 7L and 7R and the X electrodes 8L and 8R are not in one row at the center of the screen but in a staggered arrangement or a random arrangement. It is the same. The operations of the Y electrode drive circuits 4L and 4R and the X electrode drive circuits 5L and 5R are the same as in the first embodiment.

  Here, the Y electrodes 7L and 7R and the X electrodes 8L and 8R not only serve as signal lines for supplying a sustain pulse to each discharge cell, but also serve to prevent reflection of external light. The Y electrodes 7L and 7R The separation part of the X electrodes 8L and 8R has no electrode, and thus the external light is slightly reflected.

  In the present embodiment, the separation of the Y electrodes 7L and 7R and the X electrodes 8L and 8R is arranged in a staggered arrangement or a random arrangement so that the reflection of the external light is not linear, so that the reflection of the external light is visible. In addition, as in the first embodiment, the screen is physically separated by the Y electrode and the X electrode, and the Y electrodes 7L and 7R and the X electrodes 8L and 8R are insulated, thereby providing reactive power. Can be reduced.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  The present invention relates to an image display apparatus using a plasma display panel or the like, and can be widely applied to an apparatus having a circuit for reducing reactive power.

It is a block diagram which shows the structure of the plasma display apparatus which concerns on Embodiment 1 of this invention. It is explanatory drawing for demonstrating the operation | movement of the sustain period of the plasma display apparatus which concerns on Embodiment 1 of this invention. It is a block diagram which shows the structure of the plasma display apparatus which concerns on Embodiment 2 of this invention. It is a block diagram which shows the structure of the Y electrode drive circuit of the plasma display apparatus which concerns on Embodiment 2 of this invention. It is a block diagram which shows the structure of the plasma display apparatus which concerns on Embodiment 3 of this invention. It is the schematic for demonstrating the structure of the drive circuit of the conventional PDP.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Signal processing circuit, 2 ... Subfield (SF) generation circuit, 3 ... Address electrode drive circuit, 4, 4L, 4R ... Y electrode drive circuit, 5, 5L, 5R ... X electrode drive circuit, 6 ... PDP, 7L , 7R ... Y electrode, 8L, 8R ... X electrode, 9 ... address electrode, 10 ... discharge cell, 41, 42, 43, 44 ... switch, 45,46 ... diode, 47 ... capacitor for power recovery, 48 ... recovery coil .

Claims (5)

A plurality of scan electrodes, a plurality of common electrodes, and a plurality of address electrodes, wherein the scan electrodes and the common electrodes are arranged in parallel to each other, and the address electrodes intersect the scan electrodes and the common electrodes. A display panel in which a plurality of discharge cells are formed at a location where the scan electrode and the common electrode intersect the address electrode;
A drive circuit for generating a discharge by applying a sustain pulse from the scan electrode and the common electrode to the discharge cell;
The plurality of scanning electrodes and the plurality of common electrodes of the display panel are each separated from the left and right at the center of the screen of the display panel, the separated portions are insulated, and a plurality of each from both ends of the display panel. An image display device, wherein the scanning electrode and the plurality of common electrodes are drawn out and connected to the driving circuit. The image display device according to claim 1,
The drive circuit includes a left drive circuit to which the plurality of scan electrodes and a plurality of the common electrodes drawn from the left end of the display panel are connected, and a plurality of the scan electrodes and a plurality of leads drawn from the right end of the display panel. An image display device comprising a right drive circuit to which the common electrode is connected. The image display device according to claim 1,
The plurality of common electrodes are grounded,
The image display apparatus, wherein the drive circuit applies a sustain pulse only to the plurality of scan electrodes. The image display device according to claim 1,
2. The image display device according to claim 1, wherein the separated portions of the plurality of scanning electrodes and the plurality of common electrodes are linear in the vertical direction at the center of the screen of the display panel. The image display device according to claim 1,
2. The image display device according to claim 1, wherein the separated portions of the plurality of scanning electrodes and the plurality of common electrodes have a staggered arrangement or a random number arrangement shifted in units of several pixels in the vertical direction at the center of the screen of the display panel.

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