JP2010128315A - Signal processing device and image display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a signal processing device outputting a gray-scale reference voltage according to gradation characteristics of a display panel, and an image display device. <P>SOLUTION: The signal processing device includes: a display panel for receiving an output image signal obtained by converting an input image signal according to a γ curve and displaying an image, a reference voltage generation part for generating a reference voltage constituting the γ curve, a resistance network having a plurality of resistance elements connected in series and configured to output the reference voltage input between the resistance elements as a gray-scale reference voltage for gradation display, an input position switching part disposed between the reference voltage generation part and the resistance network and configured to switch the input position of the reference voltage input between the resistance elements, an input position control unit for controlling the switching operation of the input position at the input position switching part, and a selector part for converting the signal into the output image signal by using the gray-scale reference voltage. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a signal processing device and an image display device.

  An image display device using an organic EL (Electro Luminescence) element that emits light by recombination of holes and electrons injected into a light emitting layer has been proposed. As an image display device, for example, pixels having thin film transistors (hereinafter referred to as “TFTs”) made of amorphous silicon, polycrystalline silicon, or the like, and organic light emitting diodes are arranged in a matrix. There is what I did. In such an image display device, the luminance of each pixel is controlled by setting an appropriate current value for each pixel. The luminance of each pixel is determined based on the output image signal obtained by converting the input image signal into an output image signal according to the γ curve.

  In the image display apparatus as described above, it is known that tone response characteristics (hereinafter referred to as tone characteristics) with respect to an input image signal are different for each display panel. Therefore, the gradation reference voltage for gradation display is adjusted in accordance with the gradation characteristics of the display panel. Further, a technique for adjusting the gradation reference voltage has been proposed (see, for example, Patent Document 1).

JP 2006-189785 A

  By the way, in a display panel using an amorphous silicon TFT in a pixel circuit, it is necessary to control the gate voltage of the amorphous silicon TFT in a wide range from a negative voltage to a positive voltage in order to depict a dark part. However, the amorphous silicon TFT has a characteristic that the rate of change of the drain current with respect to the change of the gate voltage is small in the region where the gate voltage is negative, and the rate of change of the drain current with respect to the change of the gate voltage is large in the region where the gate voltage is positive. A point (inflection point) at which the gradation reference voltage changes abruptly in the low gradation part of the gradation characteristic due to the characteristic can be seen. In such a case, in order to display a smooth gradation image on the display panel, it is necessary to match the gradation reference voltage including the inflection point to the gradation characteristics of the display panel.

  The present invention has been made in view of the above, and an object of the present invention is to provide a signal processing device and an image display device that can generate a gradation reference voltage in accordance with the gradation characteristics of a display panel. .

  A signal processing apparatus according to an embodiment of the present invention includes a reference voltage generation unit that generates a plurality of reference voltages, and a plurality of resistance elements connected in series and parallel, and the reference input between the resistance elements A resistor network that outputs a voltage as a gradation reference voltage for gradation display; and an input position switching unit that switches an input position of the reference voltage input between the resistance elements.

An image display device according to an embodiment of the present invention includes a display panel on which an output image signal obtained by converting an input image signal according to a γ curve is input and an image is displayed, and a reference voltage constituting the γ curve. A reference voltage generation unit for generating, a resistor network having a plurality of resistance elements connected in series and parallel, and outputting the reference voltage input between the resistance elements as a gradation reference voltage for gradation display; An input position switching unit that is provided between the reference voltage generation unit and the resistor network and switches an input position of the reference voltage input between the resistance elements, and switching of the input position in the input position switching unit An input position control unit that controls the operation; and a selector unit that converts the output image signal using the gradation reference voltage.
Further, in the image display device according to an embodiment of the present invention, the input position control unit specifies the input position in the resistor network so that the gradation reference voltage corresponds to a gradation characteristic of the display panel. To do.
In the image display device according to an embodiment of the present invention, a first storage unit that stores data based on the gradation characteristics and a second storage unit that stores data based on the gradation reference voltage are further included. The input position control unit compares the data based on the gradation characteristic stored in the first storage unit with the data based on the gradation reference voltage stored in the second storage unit, The input position that is the switching destination in the input position switching unit is specified so that the data based on the gradation reference voltage is combined with the data based on the gradation characteristics.
In the image display device according to an embodiment of the present invention, the input position control unit includes the input position specified as a switching destination in the input position switching unit, and the gradation reference voltage at the input position. Is stored in the second storage means.

  ADVANTAGE OF THE INVENTION According to this invention, the signal processing apparatus and image display apparatus which can produce | generate the gradation reference voltage according to the gradation characteristic of a display panel can be provided.

  Hereinafter, a signal processing device and an image display device according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings. In addition, this invention shall not be limited to the following embodiment.

<Configuration of image display device>
First, the image display apparatus according to the present embodiment will be described. FIG. 1 is a diagram illustrating a configuration of an image display apparatus according to the present embodiment. As shown in the figure, the image display device includes a display panel 20 in which pixel circuits 10 are arranged in a matrix (two-dimensional plane), a timing controller 31, a frame memory 32, a scan driver 33, and a reference. A voltage generation unit 34, a source driver 35, and an input position adjustment unit 40 are provided. FIG. 1 shows an example in which pixel circuits 10 for m columns and n rows are arranged in a matrix. The signal processing device includes a reference voltage generation unit 34, a resistance net 353 described later, and an input position switching unit 355 described later.

  The display panel 20 is a display unit that displays an image. A control line 21 such as a first power line 211, a second power line 212, and a scanning line 213, which will be described later, is arranged in the horizontal direction of the screen (the row direction in the figure). Has been. This control line 21 is electrically connected to the scanning driver 33. In addition, image signal lines 22 are arranged in the screen vertical direction (column direction in the figure) of the display panel 20. The image signal line 22 is electrically connected to the source driver 35.

  The timing controller 31 can be configured using, for example, a control device such as an IC or counter that includes an arithmetic circuit, a logic circuit, and the like. The timing controller 31 generates a clock signal corresponding to the horizontal direction and the vertical direction of the screen based on the reference clock CLK, the horizontal synchronization signal HSYNC, and the vertical synchronization signal VSYNC input from the outside, and the scanning driver 33 and the source driver 35. To control the operation timing of the scan driver 33 and the source driver 35.

  The timing controller 31 sequentially stores input image signals in units of frames input from the outside in the frame memory 32, and synchronizes the input image signals of frames that are symmetrical in display with the clock signal in the horizontal direction of the screen. To the source driver 35. In this embodiment, it is assumed that 6-bit RGB data for each color is input as an input image signal.

  The frame memory 32 is a storage element for holding an input image signal in units of frames input from the outside. The input image signal of each frame stored in the frame memory 32 is sequentially read out by the timing controller 31.

  The scan driver 33 can be configured using, for example, a switching element, a shift register, or the like. The scanning driver 33 controls the timing at which various control signals generated inside itself are supplied to the control line 21 based on the clock signal input from the timing controller 31.

The reference voltage generation unit 34 can be configured using a D / A conversion circuit and a plurality of resistance elements connected in a mesh shape. The reference voltage generation unit 34 generates a plurality of reference voltages constituting a γ curve used for converting an input image signal into an output image signal described later. In the present embodiment, the reference voltage generation unit 34 generates the 10-level reference voltages V _{R0 to} V _R9 having different potentials. However, the present invention is not limited to this example.

The source driver 35 can be configured using a shift register 351, a load latch 352, a resistor network 353, an input position setting register 354, an input position switching unit 355, a selector unit 356, an image signal voltage supply unit 357, and the like which will be described later. (See FIG. 5). The source driver 35 converts an input image signal in frame units to be displayed into an output image signal based on a gradation reference voltage obtained by dividing the reference voltages V _{R0 to} V _R9 . Further, the source driver 35 controls the timing of supplying the output image signal to the image signal line 22 based on the clock signal input from the timing controller 31. Details of the source driver 35 will be described later.

  The input position adjustment unit 40 is configured to input the reference position in the resistor network 353 to which the reference voltage generated by the reference voltage generation unit 34 is input so that the gradation characteristic of the display panel 20 and the output of the resistor network 353 match as much as possible. Adjust. Details of the input position adjustment unit 40 will be described later.

  In the above configuration, the layout relating to the control line 21, image signal line 22, timing controller 31, frame memory 32, scan driver 33, reference voltage generation unit 34, source driver 35, and input position adjustment unit 40 shown in FIG. It shows an example and is not limited to these layouts.

  For example, as shown in FIG. 2, the frame memory 32 may be removed from the configuration of FIG. 1, and an external input image signal may be directly input to the source driver 35. In the case of this configuration, it is assumed that image signals are sequentially input in units of frames.

  In the configuration of FIG. 1, the timing controller 31, the frame memory 32, the scan driver 33, the reference voltage generation unit 34, the source driver 35, and the input position adjustment unit 40 are disposed outside the display panel 20. Any or all of the circuits may be arranged inside the display panel 20.

<Configuration of pixel circuit>
Next, the pixel circuit 10 constituting the display panel 20 will be described. FIG. 3 is a diagram showing an example of the configuration of the pixel circuit 10 (one pixel) shown in FIG. As shown in the figure, the pixel circuit 10 includes an organic EL element OLED that is a light emitting element, a drive transistor _Td that is a driver element for driving the organic EL element OLED, and a potential ( hereinafter, comprising a capacitive element C _s for holding) of the image signal voltage, and a switching transistor T _s as a switching element for controlling application of image signal voltage. Since the organic EL element OLED functions as a capacitor when a reverse voltage is applied, this is equivalently represented as an organic EL element capacitance C _{oled in} FIG.

The drive transistor _Td has a first terminal t11, a second terminal t12, and a third terminal t13. The first terminal t11 is electrically connected to the third terminal t23 of the switching transistor T _s . The second terminal t12 is electrically connected to the first power supply line 211 as the control line 21, and the third terminal t13 is electrically connected to the anode electrode of the organic EL element OLED. Here, the first terminal t11 corresponds to a gate electrode (gate), one of the second terminal t12 and the third terminal t13 corresponds to a drain electrode (drain), and the other corresponds to a source electrode (source). Note that the relative potential relationship between the second terminal t12 and the third terminal t13 varies according to each control period described later. “Drain” and “source” are defined by the conductivity type and relative potential relationship of the transistor.

  In the n-type transistor used in this embodiment, of the two terminals (that is, the second terminal t12 and the third terminal t13) arranged with the channel region interposed therebetween, the terminal on the high potential side is “drain”. ”And the terminal on the low potential side becomes“ source ”. Further, in a p-type transistor, of two terminals arranged with a channel region interposed therebetween, a low potential side terminal is a “drain” and a high potential side terminal is a “source”.

In the driving transistor _Td , the potential applied to the first terminal t11, more specifically, the voltage value applied to the gate with respect to the source (gate-source voltage) is adjusted, so that the drain and the source The amount of current flowing between them is adjusted. A state in which current can flow between the drain and source (on state) and a state in which current cannot flow (off state) are selectively set by the potential applied to the first terminal t11. .

  In the organic EL element OLED, when a potential difference equal to or higher than the conduction voltage of the organic EL element OLED is generated between the anode electrode and the cathode electrode, a current flows through the light emitting layer between the anode electrode and the cathode electrode. Emits light. Specifically, a metal such as aluminum, silver, copper, or gold, or an alloy thereof can be used as the anode electrode. As the cathode electrode, a light-transmitting conductive material such as indium tin oxide (ITO), a material such as magnesium, silver, aluminum, or calcium can be used. Note that the light emitting layer generates light by recombination of holes and electrons injected into the light emitting layer.

  The light emitting layer is made of a light emitting material such as Alq3 (tris (8-quinolinolato) aluminum complex). In order to increase luminous efficiency, a host material having a hole transporting property or an electron transporting property is doped with an organic metal compound such as tris [pyridinyl-kN-phenyl-kC] iridium or a dye such as coumarin as a dopant material. Layers may be configured. The density | concentration of the dopant material which comprises a light emitting layer shall be 0.5 mass% or more and 20 mass% or less, for example. Examples of the host material having a hole transporting property include α-NPD and TPD. Examples of a host material having an electron transporting property include bis (2-methyl-8-quinolinolato) -4- (phenylphenolato) aluminum, 1,4-phenylenebis (triphenylsilane), 1,3-bis ( Triphenylsilyl) benzene, 1,3,5-tri (9H-carbazol-9-yl) benzene, CBP, Alq3, or SDPVBi. Note that, as a material constituting each layer of the light emitting layer, an appropriate material is selected according to the color of emitted light. Examples of a dopant material that emits red light include tris (1-phenylisoquinolinato-C2, N) iridium or DCJTB. Examples of dopant materials that emit green light include tris [pyridinyl-kN-phenyl-kC] iridium or bis [2- (2-benzoxazolyl) phenolato] zinc (II). Examples of the dopant material that emits blue light include a distyrylarylene derivative, a perylene derivative, or an azomethine zinc complex. The light emitting layer is not limited to a single layer structure, and may have a multiple layer structure.

The anode electrode of the organic EL element OLED is electrically connected to the third terminal t13 of the drive transistor _Td , and the cathode electrode is electrically connected to the second power supply line 212 as the control line 21. In the pixel circuit 10 used in the present embodiment, the cathode electrode of the organic EL element OLED is a common cathode type that is common to all the pixel circuits 10 constituting the display panel 20, but not limited thereto. A common anode type configuration in which the anode electrode of the organic EL element OLED is common to all the pixel circuits 10 constituting the display panel 20 may be adopted.

The switching transistor T _s has a first terminal t21, a second terminal t22, and a third terminal t23. The first terminal t21 is electrically connected to the scanning line 213 as the control line 21, and the second terminal t22 is electrically connected to the image signal line 22. The third terminal t23 is electrically connected to the first terminal t11 of the driving transistor _Td . The first terminal t21 corresponds to the gate electrode, the second terminal t22 corresponds to the drain electrode, and the third terminal t23 corresponds to the source electrode.

In the switching transistor T _s , the potential applied to the first terminal t21, more specifically, the voltage value (gate-source voltage) applied between the first terminal t21 and the third terminal t23 is adjusted. Thus, the amount of current flowing between the drain and the source is adjusted. The potential applied to the first terminal t21 selectively sets a state where current can flow between the drain and source (on state) and a state where current cannot flow (off state). .

The capacitive element C _s has a function of holding a charge amount corresponding to an output image signal during a writing period described later. One electrode 1a of the capacitive element C _s is conductively connected to a wiring that electrically connects the first terminal t11 of the driving transistor T _d and the third terminal t23 of the switching transistor T _s . Yes. Further, the other electrode 1b of the capacitive element C _s is conductively connected to a wiring that electrically connects the third terminal t13 of the driving transistor _Td and the anode electrode of the organic EL element OLED.

The drive transistor T _d and the switching transistor T _s described above are configured by TFTs formed of, for example, amorphous silicon or polycrystalline silicon. In each drawing referred to below, the type (n-type or p-type) of the TFT channel is not clearly shown, but it is either n-type or p-type. In this embodiment, the n-type is used. This TFT is used.

<Operation of pixel circuit>
Next, the operation of the pixel circuit 10 will be described with reference to FIG. The operation of the pixel circuit 10 described below is realized by the control of the timing controller 31, the scan driver 33, the reference voltage generation unit 34, the source driver 35, and the input position adjustment unit 40 shown in FIG. 1 (or FIG. 2). It is what is done.

  FIG. 4 is a timing chart showing an example of a signal waveform (drive waveform) when driving the pixel circuit 10. FIG. 4 shows signal waveforms when the organic EL element OLED is caused to emit light sequentially by the light emission method. Here, the sequential light emission method refers to writing control of an image signal voltage for each pixel circuit for each frame and light emission control of each pixel circuit for each group of pixel circuits commonly connected to the same control line or power supply line ( (For example, every row, every column, etc.) In the present embodiment, it is assumed that writing control and light emission control are performed for each row of the display panel 20 shown in FIG. 1 (or FIG. 2).

  In FIG. 4, the horizontal axis indicates time, and in order from the top, (a) a potential applied to the first power supply line 211, (b) a potential applied to the second power supply line 212, and (c) a scanning line 213 The waveform of the applied potential and (d) the potential applied to the image signal line 22 (output image signal) are shown.

In the sequence of each of these lines, C _s initialization period, a write period, a write completion period, light emission preparation period, the light emission period, and wherein one cycle of six control periods extinction period, the organic EL element OLED by the control of the 1 cycle Is emitted once. Hereinafter, driving of the image display apparatus will be described. Note that the second power supply line 212 common to all pixel circuits is always at a zero potential (0 V), and thus description thereof is omitted as appropriate.

<C _s initialization period>
In the C _s initialization period, as shown in FIG. 4, the first power supply line 211 is set to zero potential (0 V), the scanning line 213 is set to high potential V _gH , and the image signal line 22 is set to zero potential (0 V). This control switching transistor T _s is turned on, the potential of the first terminal t11 side of the capacitor C _s is for the 0V, the potential across the capacitive element C _s is reset to zero potential.

In the present embodiment, the zero potential in the first power supply line 211 and the second power supply line 212 is set to 0 V, but a voltage that offsets the voltage stored in the first capacitor element C _s1 (= reference potential of the power supply line). There is no limitation to this. Further, the potential of the image signal line 22 is set to zero potential, but this may be a potential for defining luminance when the image signal has 0 gradation, that is, the reference potential of the image signal line 22, and is not limited thereto. Is not to be done.

<Writing period>
In the writing period, as shown in FIG. 4, the zero potential (0 V) of the first power supply line 211 and the high potential V _gH of the scanning line 213 are maintained, and the image signal line 22 is output as a display target. The potential (image signal voltage) V _data corresponding to the image signal is used. At this time, if satisfying the relationship of "image signal voltage V _data> threshold voltage of the driving transistor", since the potential difference between both ends of the capacitor C _s is an image signal voltage V _data, capacitive element C _s in the image signal voltage V The charge for _data is accumulated.

  Note that the “threshold voltage” means a gate-source voltage that becomes a boundary when a transistor changes from an off state (a state where a drain current does not flow) to an on state (a state where a drain current flows). .

<Writing end period>
In the writing end period, as shown in FIG. 4, the zero potential (0 V) of the first power supply line 211 and the image signal voltage V _data of the image signal line 22 are maintained, and the scanning line 213 is set to the low potential V _gL . Is done. By this control, the switching transistor T _s is turned off, and the charge amount (image signal voltage V _data ) accumulated in the capacitive element C _s is determined.

<Light emission preparation period>
In the light emission preparation period, as shown in FIG. 4, the zero potential (0 V) of the first power supply line 211 and the low potential V _gL of the scanning line 213 are maintained, and the image signal line 22 is set to the zero potential (0 V). Is done. At this time, since data is also written to the pixel circuit 10 in the next row, the potential of the image signal line 22 becomes indefinite, but the image signal line 22 and the capacitive element C _s are separated by the switching transistor T _s . Therefore, there is no influence, and the charge amount determined at the end of writing is held.

<Light emission period>
In the light emission period, as shown in FIG. 4, the low potential V _gL of the scanning line 213 and the zero potential (0 V) of the image signal line 22 are maintained, and the first power supply line 211 is set to the high potential (V _DD ). Is done.

When the first power supply line 211 becomes a high potential, the potential of the second terminal t12 of the driving transistor _Td becomes higher than the potential of the third terminal t13. Therefore, in this light emission period, the second terminal t12 serves as a drain and the third terminal t13 serves as a source. As a result, the capacitive element C _s holding the image signal voltage V _data is connected in series, and the gate-source voltage V _gs of the drive transistor T _d is V _gs = V _data . As a result, the drive transistor T _d is turned on, and a current corresponding to V _data flows through the path of the first power supply line 211 → the drive transistor T _d → the organic EL element OLED → the second power supply line 212, and the organic EL element OLED Emits light.

At this time, when the organic EL element OLED emits light, the potential of the third terminal t13 (source) of the drive transistor _Td becomes the same value as the anode potential of the organic EL element OLED, and thus varies from the potential of the data writing period. become. At that time, the gate of the driving transistor T _d is because it is connected to the anode side of the organic EL element OLED through the capacitor C _s, the gate potential to follow the variation of the anode potential of the organic EL element OLED fluctuate. Therefore, the gate voltage maintains the value in the data writing period, that is, V _data .

<Quenching period>
In the extinction period, as shown in FIG. 4, the low potential V _gL of the scanning line 213 and the zero potential (0 V) of the image signal line 22 are maintained, and the first power supply line 211 is set to the zero potential (0 V). The This control eliminates the forward potential of the organic EL element OLED, and the organic EL element OLED is extinguished. At this time, the potential on the first terminal t11 side of the capacitive element Cs is V _data , and the potential on the second terminal t12 side is the same potential as the second power supply line 212, that is, 0V.

<Configuration of source driver and input position adjustment unit>
Next, the configuration of the source driver 35 and the input position adjustment unit 40 will be described in detail. FIG. 5 is a diagram schematically illustrating the configuration of the source driver 35 and the input position adjustment unit 40. As shown in the figure, the source driver 35 includes a shift register 351, a load latch 352, a resistor network 353, an input position setting register 354, an input position switching unit 355, a selector unit 356, and an image signal voltage. And a supply unit 357.

  The shift register 351 controls the timing for serial-parallel conversion of the image signal input from the timing controller 31 in synchronization with the clock signal input from the timing controller 31.

  The load latch 352 is sequentially enabled to latch the input image signal by being enabled by the output of the shift register 351 in synchronization with the clock signal input from the timing controller 31, and as an input image signal to the pixel circuits 10 for one row. Output in parallel.

The resistance network 353 includes a plurality of resistance elements connected in a mesh shape, and a reference voltage input point connected to an output terminal of an input position switching unit 355 described later (in FIG. 6) between the resistance elements. An input point N _in ) is provided. The plurality of resistance elements constituting the resistance network 353 generate a predetermined number of different voltages by dividing the difference voltage between the reference voltages input through any of the input points, and output the voltage to the selector unit 356 in the subsequent stage.

FIG. 6 is a diagram illustrating an example of the resistance net 353. As shown in the figure, the resistance net 353 is composed of a plurality of resistance elements R connected in a mesh shape. Of resistive element R between the input points N _in provided, so each of the reference voltage V _R1 ~V _R8 output from the input position switching unit 355 to any one of eight input points N _in s is input ing. The reference voltages V _R0 and V _R9 are input to the upper and lower ends of the resistor network 353, respectively. However, the present invention is not limited to this, and any one of the input points N _in is similar to V _{R1 to} V _R8. It is good also as an input form.

The reference voltages V _{R0 to} V _R9 input to the resistance network 353 are divided by the resistance elements R according to the input positions. Each voltage divided by the resistor network 353 is used as a gradation reference potential for gradation display. In the present embodiment, 64 output points _Nout are provided at the right end of the resistor network 353 so that 64 steps (64 gradations) of voltage are output from the reference voltages V _{R0 to} V _R9. To do.

Specifically, as the reference voltages V _{R1 to} V _R8 are input to the input point N _in at a position close to the output point N _out , the number of resistance elements R that contribute to the voltage division decreases. The potential difference changes rapidly. Therefore, a later-described γ curve represented by the gradation reference voltage has a shape like a line graph. Further, as the reference voltages V _{R1 to} V _R8 are input to the input point N _in at a position distant from the output point N _out, the number of resistance elements R that contribute to voltage division increases, so the potential difference between the reference voltages is It changes slowly. Therefore, a later-described γ curve represented by the gradation reference voltage shows a smooth curve. In FIG. 6, the number of mesh stages constituted by the resistance element R is three with respect to the output direction of the gradation reference voltage, but the present invention is not limited to this.

  The input position setting register 354 holds setting information stored by the control unit 42 described later so that each input position switching unit 355 can read the setting information.

The input position switching unit 355 is provided between the reference voltage generation unit 34, that is, each input line of the reference voltages V _{R1 to} V _R8 , and the resistance network 353. Each of the input position switching units 355 is electrically connected to one input terminal electrically connected to the input line of the reference voltage V _Ri (i is 1 to 8) and each input point N _in of the resistor network 353. A plurality of output ends.

Here, each of the plurality of output terminals is connected to an input point N _in corresponding to the input position of the initial setting of the reference voltage V _Ri and another input point N _{in the} vicinity of the input point N _in . The input position of the reference voltage V _Ri can be switched by switching the connection destination to one output terminal. The range of input points N _{in that} can be switched by each input position switching unit 355 is preferably determined in advance based on the shape of a γ curve, which will be described later.

Each of the input position switching units 355 refers to the setting information for the input position switching unit 355 held in the input position setting register 354, and the output terminal corresponding to the input point N _in indicated by the setting information. To switch the output destination of the reference voltage V _Ri .

FIG. 7 is a diagram illustrating a configuration of the input position switching unit 355. In the figure, the terminal T _in is an input terminal of the reference voltage V _Ri is input. Also a plurality of terminals T _out0 through T _outn an output terminal, is connected to each of the input points N _in provided between the resistance elements R constituting the resistance network 353. Here, the input position switching section 355, when the connection destination of the terminal T _in to one terminal T _out0 through T _outn is switched, the input position of the reference voltage V _Ri at resistor network 353 is changed, the reference voltage V _The partial pressure result (partial pressure distribution) around _Ri will change.

  Returning to FIG. 5, the selector unit 356 includes a predetermined number of selector circuits 3561. Each of the selector circuits 3561 selectively uses the 64-step gradation reference voltage divided by the resistor network 353 to convert the image signal input from the load latch 352 into an image signal voltage.

  The image signal voltage supply unit 357 has as many output circuits 3571 as the number of selector circuits 3561, and supplies the image signal voltages generated by the selector circuits 3561 to the image signal lines 22.

  FIG. 8 is a diagram showing the relationship (gamma curve) between the gradation reference voltage (output voltage) output from the resistor network 353 and the gradation. In the figure, the vertical axis represents the potential of the output voltage, which means that the potential increases as it goes upward. The horizontal axis represents the gradation, meaning that the gradation becomes higher toward the right.

  Here, the “gradation” is used as a parameter indicating the degree of brightness of each color. For example, in the gradation expression of a predetermined bit (6 bits in the present embodiment), the gradation of each color is the minimum. A value (for example, 0 gradation) means the darkest reproduction, and a maximum value (for example, 64 gradation) means the brightest reproduction.

The arrows shown at the bottom of the horizontal axis represent the 64 output points N _out in the resistor network 353, respectively. From the left to the right, the arrows are from the top to the bottom in the resistor network 353 shown in FIG. This corresponds to the output point _Nout . Gradation reference voltage output from the output point N _out one has the tone and correspond respectively, in the configuration of the present embodiment, the gradation reference voltage 64 steps, the gradation display of 64 gradations Realized. Note that the curves shown by the solid lines in FIG. 7 are obtained by connecting the 64 gradation reference voltages. Hereinafter, this curve is referred to as a γ curve.

  In addition, a curve indicated by a broken line in FIG. 8 indicates a gradation characteristic of a certain display panel 20. The gradation characteristics of the display panel 20 are different for each display panel. Here, the “gradation characteristic” is a response characteristic of the panel luminance with respect to the input voltage, and this input voltage corresponds to the gradation reference voltage. That is, smooth gradation display can be realized by inputting a gradation reference voltage according to the gradation characteristics to the display panel 20.

  By the way, in the display panel using the amorphous silicon TFT in the pixel circuit, as shown in the gradation characteristic of FIG. 8, there is a point where the voltage changes abruptly (hereinafter referred to as an inflection point) in the low gradation portion. . For example, in FIG. 8, the inflection point at which the voltage in the low gradation portion of the display panel 20 changes abruptly is the inflection point C. As described above, in order to realize a smooth gradation display, it is necessary to input a gradation reference voltage in accordance with the gradation characteristics to the display panel 20, but in the conventional technique, an input to which a reference voltage is assigned. Since the position is fixedly set, there is a problem that it is difficult to reproduce the gradation characteristics around the inflection point.

In order to deal with such a problem, in this embodiment, the input position of the reference voltage V _{R1 to} V _R8 output from the input position switching unit 355 in the resistor network 353 is adjusted by the control of the input position adjusting unit 40 described later. Thus, the shape of the γ curve represented by the gradation reference voltages of the reference voltages V _{R0 to} V _R9 is brought close to the shape of the gradation characteristics of the display panel 20.

  Hereinafter, the configuration of the input position adjustment unit 40 will be described. As shown in FIG. 5, the input position adjustment unit 40 includes a storage unit 41 and a control unit 42.

  The storage unit 41 is configured by a non-volatile storage medium, and stores a program 411, a reference table 412 corresponding to the first storage unit, and a setting table 413 corresponding to the second storage unit.

  The program 411 is a program for realizing various operations of the control unit 42, and realizes an input position control unit 421 described later in cooperation with the control unit 42.

  The reference table 412 is a data table in which information (data) related to the gradation characteristics of the display panel 20 is recorded. Here, the “information about the gradation characteristics” is information for representing the gradation characteristics shown in FIG. 7, for example, information in which all gradations representing the gradation characteristics are associated with their voltage values. Or a relational expression representing gradation characteristics. Note that when the shape of the gradation characteristic differs for each RGB color, information on the gradation characteristic for each color is recorded in the reference table 412.

In the setting table 413, an initial setting input position (input point N _in ) of the reference voltage V _Ri input from each input position switching unit 355 and information (data) representing a γ table as a result of the voltage division are recorded. This is a data table. When the initial input position differs for each RGB color, the initial input position for each color and the γ table corresponding to the input position are recorded in the setting table 413. .

  The control unit 42 is configured using a CPU, a RAM, and the like, and implements various controls and operations by reading and executing a program 411 stored in the storage unit 41. The control unit 42 includes an input position control unit 421 as a result of executing the program 411.

The input position control unit 421 compares the data based on the gradation characteristics of the display panel 20 represented by the information recorded in the reference table 412 with the data based on the γ curve recorded in the setting table 413, thereby obtaining a γ curve. The input position of the reference voltage V _Ri necessary to make the shape of the same as the shape of the gradation characteristic, that is, the position of the input point N _{in as} the switching destination is specified by each input position switching unit 355.

Specifically, the input position control unit 421 inputs the reference voltage V _Ri based on the structure of the resistance element provided in the resistor network 353, the input position of the reference voltages V _R1 and V _R9 , and the position of the input point N _in. An input point N of the reference voltage V _{Ri from which} a partial pressure result (γ curve) when input to each of the points N _in is comprehensively calculated and a γ curve closest to the shape of the gradation characteristic of the display panel 20 is obtained is obtained. _in the respective specified. The relational expression for deriving the γ curve is assumed to be stored in advance in the storage unit 41 or the like. However, when the conditions differ for each RGB color, the input point N _in is specified for each color. And

As another method, a table in which a combination of a connection between the reference voltage V _Ri and each input point N _in and a partial pressure result (γ curve) in each connection pattern is recorded in advance in the storage unit 41 or the like. By storing and referring to this table, the input point N _in of the reference voltage V _{Ri from which} the γ curve closest to the shape of the gradation characteristic of the display panel 20 is obtained may be specified. If the conditions differ for each RGB color, it is assumed that a table is prepared for each color.

When it is determined that the gradation characteristics recorded in the reference table 412 and the γ curve recorded in the setting table 413 are substantially equal as a result of comparison, the input position control unit 421 inputs the input recorded in the setting table 413. The position (input point N _in ) is specified. In addition, although the threshold value used as an index for determination of approximately equal is not particularly limited, an arbitrary value can be set. Further, when a new input position (input point N _in ) is specified, the input position may be associated with the γ table, and the reference table 412 may be overwritten as an initial setting.

Further, the input position control unit 421 stores setting information indicating the position of the input point N _in specified for each of the reference voltages V _{Ri in} the input position setting register 354, and the input position switching unit 355 refers to the setting information. Make it possible. It is assumed that the input position setting register 354 is stored in a state where it is possible to identify which input position switching unit 355 is the setting information. Specifically, the input position setting register 354 may be provided for each input position switching unit 355, or the storage area in the input position setting register 354 is divided for each input position switching unit 355. It is good.

In the input position switching unit 355, the input point N _in which becomes the input position of the reference voltage V _R1 by switching the output terminal according to the setting information held in the input position setting register 354 under the control of the input position control unit 421 described above. Is adjusted so that the result of voltage division by the resistor network 353 is equivalent to the gradation characteristics of the display panel 20.

<Operation of source driver and input position adjustment unit>
Hereinafter, operations of the input position switching unit 355 and the input position control unit 421 will be described with reference to FIG.

FIG. 9 is a flowchart showing the procedure of the input position adjustment process realized by the input position switching unit 355 and the input position control unit 421 described above. As a premise of this processing, it is assumed that information regarding the gradation characteristics shown in FIG. 8 is recorded in the reference table 412 in advance. Further, it is assumed that the initial setting input position of the reference voltage V _Ri is recorded in the setting table 413 in advance.

  First, the input position control unit 421 compares the gradation characteristics recorded in the reference table 412 with the γ curve recorded in the setting table 413 (step S11), and the shapes of the gradation characteristics and the γ curve are substantially the same. It is determined whether or not they are equivalent (step S12).

  Here, a method for determining whether or not the gradation characteristics and the γ curve have substantially the same shape will be described. First, a gradation value with a large change in gradient of the gradation characteristic is assumed in advance, and the difference between the potential of the gradation characteristic and the potential of the γ curve at the assumed point is determined by programming. Then, the value of the difference is squared, and it is determined whether or not the square rooted solution is located within the range of gradation values adjacent to the assumed point. If the solution is located within the range of the adjacent gradation values, it is determined that the gradation characteristics and the shape of the γ curve are substantially equal. If the solution is not located within the range of the adjacent gradation values, it is determined that the shape of the gradation characteristics and the γ curve are different.

If it is determined in step S12 that they are substantially equivalent (step S12; Yes), the input position control unit 421 specifies each position of the input point N _in recorded in the setting table 413 as an input position of the reference voltage V _Ri. (Step S13), the process proceeds to Step S15.

In Step S12, when it is determined that the shape of the gradation characteristic and the γ curve are different (Step S12; Yes), the input position control unit 421 makes the shape of the γ curve substantially the same as the shape of the gradation characteristic. For this purpose, each position of the input point N _in which is the input destination of the reference voltage V _Ri is specified as the input position (step S14), and the process proceeds to step S15.

Here, a method for adjusting the position of the input point N _in will be described. First, in FIG. 6, the coordinate of the resistance ladder in the vertical direction and the horizontal direction of the resistance ladder is assumed. Then, a tangent line is drawn on the γ curve at the gradation value assumed in advance, and the intersection of the tangent line and the γ curve is set as the coordinate position in the vertical direction of the resistance ladder. Further, the curvature of gradation at the intersection is calculated, and the curvature is set as the coordinate position in the left-right direction of the resistance ladder. From these two coordinate positions, the input point N _in can be obtained. Incidentally, the ideal input points N _in obtained from the coordinate position, selects the closest feed portion of the feed portion which can serve as the input point N _in the resistance mesh as input points N _in.

  In step S15, the input position control unit 421 stores the setting information indicating the input position specified in step S13 or S14 in the input position setting register 354 in a state where it can be identified to which input position switching unit 355. (Step S15). When the input position specified in step S14 and the γ curve corresponding to the input position are overwritten in the setting table 413 as initial settings, it is preferably performed before and after the process of step S15.

On the other hand, the respective input position switching section 355 in accordance with setting information for its input position switching section 355 which is held in the input position setting register 354, the reference voltage V input point to the destination is designated by the setting information _Ri N _in (Step S16), and this process is terminated.

As a result, the voltage _dividing state in the vicinity of the reference voltage V _Ri in the resistance network 353 changes, and the shape of the γ curve generated based on the reference voltages V _{R0 to} V _R9 is the same as that of the display panel 20 as shown in FIG. This is substantially the same as the gradation characteristic.

  As described above, according to the present embodiment, the input position of the reference voltage can be adjusted according to the gradation characteristics of the display panel 20, so that it is possible to flexibly deal with the shape of the gradation characteristics. Become. Thereby, since the gradation reference voltage according to the gradation characteristic unique to the display panel 20 can be generated, smooth gradation display can be realized in the gradation display on the display panel 20.

In the present embodiment, FIG. 6 is shown as an example of the configuration of the resistance net 353, but it is not limited to this example. For example, as shown in FIG. 11, a configuration may be adopted in which a plurality of resistance elements R are connected in series between the output points _Nout so that the positions of the output points _Nout are non-linear. When this configuration is adopted, the distance between the input point N _in and the output point N _out can be increased, and the number of resistances between the two points can be increased. As a result, the impedance between the two points can be increased, the amount of current flowing between the two points can be reduced, and the power consumption can be suppressed. Further, a plurality of input points N _in can be selected, the value of the output voltage with respect to the gradation can be easily adjusted, and as shown in FIG. 12, it is easy to realize an S-shaped γ curve. This is particularly effective when the shape of the gradation characteristic of the display panel 20 is S-shaped.

In the present embodiment, each of the reference voltages V _{R1 to} V _R8 is input to any one of the input points N _in. However, the present invention is not limited to this, and any reference voltage is not input to the resistor network 353. It is good also as a form to control.

Further, in the case where the shape of the gradation characteristics varies depending on the temperature of the display panel 20, it is possible to cope with this by adopting the following configuration. First, the gradation characteristics measured at a plurality of temperatures (for example, discrete temperatures of 10, 20, 30, 40 ° C. and temperatures at which the gradation characteristics change) are recorded in the reference table 412. . Further, a temperature sensor for detecting the temperature of the display panel 20 itself or the atmosphere around the display panel 20 is separately provided, and the detected temperature is input to the input position control unit 421. The input position control unit 421 reads the gradation characteristic corresponding to the temperature detected by the temperature sensor from the reference table 412, and based on this gradation, determines the position of the input point N _in as the input destination of the reference voltage V _Ri. Identify.

  The embodiment according to the present invention has been described above, but the present invention is not limited to this, and various modifications, substitutions, additions, and the like are possible without departing from the spirit of the present invention.

It is the figure which showed the structure of the image display apparatus. It is the figure which showed the other aspect of the image display apparatus. It is the figure which showed an example of the structure of a pixel circuit. It is a timing chart showing an example of a signal waveform when driving a pixel circuit. It is the figure which showed the detailed structure of the source driver and input position adjustment part which were shown in FIG. It is the figure which showed an example of the resistance net | network shown in FIG. It is the figure which showed the structure of the input position switching part shown in FIG. FIG. 6 is a diagram illustrating an example of a relationship between an output voltage from the resistor network illustrated in FIG. 5 and a gradation. 6 is a flowchart illustrating a procedure of input position adjustment processing realized by the input position switching unit and the input position control unit illustrated in FIG. 5. It is the figure which showed the relationship between the output voltage from a resistance net | network after an input position adjustment process was performed, and a gradation. It is the figure which showed the other example of the resistance net | network shown in FIG. It is the figure which showed an example of the relationship between the output voltage from the resistance network shown in FIG. 11, and a gradation.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Pixel circuit 20 Display panel 21 Control line 211 1st power supply line 212 2nd power supply line 213 Scan line 22 Image signal line 31 Timing controller 32 Frame memory 33 Scan driver 34 Reference voltage generation part 35 Source driver 351 Shift register 352 Load latch 353 Resistor network 354 Input position setting register 355 Input position switching section 356 Selector section 3561 Selector circuit 357 Image signal voltage supply section 3571 Output circuit 40 Input position adjustment section 41 Storage section 411 Program 412 Reference table 413 Setting table 42 Control section 421 Input position control part C _oled organic EL element capacitance C _s1 first capacitive element C _s2 second capacitive element OLED organic EL element T _d driving transistor T _rst reset transistor T _s switching transistor T _th Value voltage detecting transistor R resistive element N _in input point N _out output point

Claims (5)

A reference voltage generator for generating a plurality of reference voltages;
A resistor network having a plurality of resistance elements connected in series and parallel, and outputting the reference voltage input between the resistance elements as a gradation reference voltage for gradation display;
An input position switching unit that switches an input position of the reference voltage input between the resistance elements;
A signal processing apparatus comprising: A display panel in which an output image signal obtained by converting an input image signal according to a γ curve is input and an image is displayed;
A reference voltage generation unit for generating a reference voltage constituting the γ curve;
A resistor network having a plurality of resistance elements connected in series and parallel, and outputting the reference voltage input between the resistance elements as a gradation reference voltage for gradation display;
An input position switching unit that is provided between the reference voltage generation unit and the resistor network and switches an input position of the reference voltage input between the resistance elements;
An input position control unit for controlling the switching operation of the input position in the input position switching unit;
A selector unit for converting into the output image signal using the gradation reference voltage;
An image display device comprising: The image display device according to claim 2,
The image display apparatus, wherein the input position control unit specifies the input position in the resistor network so that the gradation reference voltage corresponds to a gradation characteristic of the display panel. The image display device according to claim 3,
A first storage unit for storing data based on the gradation characteristics;
A second storage unit for storing data based on the gradation reference voltage;
Further comprising
The input position control unit compares data based on the gradation characteristics stored in the first storage unit with data based on the gradation reference voltage stored in the second storage unit, An image display device characterized in that the input position as a switching destination in the input position switching unit is specified so that data based on a reference voltage is combined with data based on the gradation characteristic. The image display device according to claim 4,
The input position control unit causes the second storage unit to store the input position specified as a switching destination in the input position switching unit and the gradation reference voltage at the input position. Image display device.

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