JP2010107799A - Signal processing device and image display apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a signal processing device that outputs a gradation reference voltage matching the gradation characteristics of a display panel, and to provide an image display apparatus. <P>SOLUTION: The signal processing device includes: a reference voltage generating section that generates a plurality of reference voltages for composing a γ curve; a ladder resistor that has a plurality of resistance elements connected in series, receives the reference voltage input between the resistance elements, and outputs it as a gradation reference voltage for gradation display; and a partial-voltage position switching section that is disposed between the reference voltage generating section and the ladder resistor, and switches the input position of the reference voltage input to the resistance element. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a signal processing device and an image display device.

  An image display device using an organic EL (Electro Luminescence) element that emits light by recombination of holes and electrons injected into a light emitting layer has been proposed. As such an image display device, for example, a pixel circuit including a thin film transistor (hereinafter referred to as “TFT”) formed of amorphous silicon or polycrystalline silicon, a plurality of organic light emitting diodes, and the like are provided. These pixels have a display panel arranged in a matrix, and the luminance of each pixel is controlled by setting an appropriate current value for each pixel. The luminance of each pixel is determined based on the output image signal obtained by converting the input image signal into an output image signal according to the γ curve.

  By the way, it is known that in the image display apparatus as described above, the response characteristics of the gradation with respect to the input image signal (hereinafter referred to as gradation characteristics) are different for each display panel. Therefore, the gradation reference voltage for gradation display is adjusted in accordance with the gradation characteristics of the display panel.

  Various techniques for adjusting the gradation reference voltage have been proposed (see, for example, Patent Document 1 below).

JP 2006-189785 A

  By the way, in a display panel using an amorphous silicon TFT in a pixel circuit, it is necessary to control the gate voltage of the amorphous silicon TFT in a wide range from a negative voltage to a positive voltage in order to depict a dark part. However, the amorphous silicon TFT has a characteristic that the rate of change of the drain current with respect to the change of the gate voltage is small in the region where the gate voltage is negative, and the rate of change of the drain current with respect to the change of the gate voltage is large in the region where the gate voltage is positive. A point (inflection point) at which the gradation reference voltage changes abruptly in the low gradation part of the gradation characteristic due to the characteristic can be seen. In such a case, in order to display a smooth gradation image on the display panel, it is necessary to match the gradation reference voltage including the inflection point to the gradation characteristics of the display panel.

  The present invention has been made in view of the above, and an object of the present invention is to provide a signal processing device and an image display device that can generate a gradation reference voltage in accordance with the gradation characteristics of a display panel. .

  A signal processing apparatus according to an embodiment of the present invention includes a reference voltage generation unit that generates a plurality of reference voltages constituting a γ curve, and a plurality of resistance elements connected in series, and the resistance elements are connected between the resistance elements. A ladder resistor that receives a reference voltage and outputs it as a gradation reference voltage for gradation display and an input of the reference voltage that is provided between the reference voltage generator and the ladder resistor and is input to the resistance element. A partial pressure position switching unit that switches positions.

An image display device according to an embodiment of the present invention includes an output image signal obtained by converting an input image signal according to a γ curve, and a display panel that displays an image according to the output image signal, and the γ curve. A reference voltage generation unit that generates a reference voltage and a plurality of resistance elements connected in series, and the reference voltage is input between the resistance elements and output as a gradation reference voltage for gradation display A voltage dividing position switching unit that is provided between the ladder resistor, the reference voltage generating unit, and the ladder resistor, and that switches an input position of the reference voltage that is input to the resistance element, and the voltage dividing position switching unit. A voltage dividing position control unit that controls the switching operation of the input position, and a selector unit that converts the input image signal into the output image signal using the gradation reference voltage.
In the image display device according to the embodiment of the present invention, the voltage dividing position control unit may determine the input position of the ladder resistor so that the gradation reference voltage corresponds to the gradation characteristic of the display panel. decide.
Further, in the image display device according to an embodiment of the present invention, the voltage dividing position control unit is the voltage dividing position switching unit such that the reference voltage is positioned near an inflection point included in the gradation characteristic. The input position to be the switching destination is determined.
Further, in the image display device according to an embodiment of the present invention, the first storage unit that stores the gradation at the inflection point in advance and the initial input position selected by the partial pressure position selection unit are provided. A second storage unit that prestores corresponding gradations, wherein the partial pressure position control unit stores gradations stored in the first storage unit and gradations stored in the second storage unit. And the input position corresponding to the difference between the two gradations is determined as a switching destination in the partial pressure position switching unit.

  ADVANTAGE OF THE INVENTION According to this invention, the signal processing apparatus and image display apparatus which can produce | generate the gradation reference voltage according to the gradation characteristic of a display panel can be provided.

  Exemplary embodiments of a signal processing apparatus and an image display apparatus according to the present invention will be explained below in detail with reference to the accompanying drawings. In addition, this invention shall not be limited to the following embodiment.

[First Embodiment]
<Configuration of image display device>
First, an image display apparatus suitable for this embodiment will be described. FIG. 1 is a diagram schematically showing a configuration of an image display device suitable for the present embodiment. As shown in the figure, the image display device includes a display panel 20 in which pixel circuits 10 are arranged in a matrix (two-dimensional plane), a timing controller 31, a frame memory 32, a scan driver 33, and a reference. A voltage generation unit 34, a source driver 35, and a partial pressure position adjustment unit 40 are provided. FIG. 1 shows an example in which pixel circuits 10 for m columns and n rows are arranged in a matrix. The signal processing device includes a reference voltage generation unit 34, a ladder resistor 353 described later, and a voltage dividing position switching unit 355 described later.

  The display panel 20 is a display unit that displays an image. A control line 21 such as a first power line 211, a second power line 212, and a scanning line 213, which will be described later, is arranged in the horizontal direction of the screen (the row direction in the figure). Has been. This control line 21 is electrically connected to the scanning driver 33. In addition, image signal lines 22 are arranged in the screen vertical direction (column direction in the figure) of the display panel 20. The image signal line 22 is electrically connected to the source driver 35.

  The timing controller 31 can be configured using, for example, a control device such as an IC or counter that includes an arithmetic circuit, a logic circuit, and the like. The timing controller 31 generates a clock signal corresponding to the horizontal direction and the vertical direction of the screen based on the reference clock CLK, the horizontal synchronization signal HSYNC, and the vertical synchronization signal VSYNC input from the outside, and the scanning driver 33 and the source driver 35. To control the operation timing of the scan driver 33 and the source driver 35.

  The timing controller 31 sequentially stores input image signals in units of frames input from the outside in the frame memory 32, and synchronizes the input image signals of frames that are symmetrical in display with the clock signal in the horizontal direction of the screen. To the source driver 35. In this embodiment, it is assumed that 6-bit RGB data for each color is input as an input image signal.

  The frame memory 32 is a storage element for holding an input image signal in units of frames input from the outside. The input image signal of each frame stored in the frame memory 32 is sequentially read out by the timing controller 31.

  The scan driver 33 can be configured using, for example, a switching element, a shift register, or the like. The scanning driver 33 controls the timing at which various control signals generated inside itself are supplied to the control line 21 based on the clock signal input from the timing controller 31.

The reference voltage generation unit 34 can be configured using a D / A conversion circuit and a plurality of resistance elements connected in series. The reference voltage generation unit 34 generates a plurality of reference voltages constituting a γ curve used for converting an input image signal into an output image signal described later. In the present embodiment, the reference voltage generation unit 34 generates the 10-level reference voltages V _{R0 to} V _R9 having different potentials. However, the present invention is not limited to this example.

The source driver 35 is configured using a shift register 351, a load latch 352, a ladder resistor 353, a voltage dividing position setting register 354, a voltage dividing position switching unit 355, a selector unit 356, an image signal voltage supply unit 357, and the like which will be described later. (See FIG. 5). The source driver 35 converts an input image signal in frame units to be displayed into an output image signal based on a gradation reference voltage obtained by dividing the reference voltages V _{R0 to} V _R9 . Further, the source driver 35 controls the timing of supplying the output image signal to the image signal line 22 based on the clock signal input from the timing controller 31. Details of the source driver 35 will be described later.

  The voltage dividing position adjusting unit 40 receives the reference voltage generated by the reference voltage generating unit 34 so that the gradation reference voltage characteristic required by the gradation characteristic of the display panel 20 matches the output of the ladder resistor as much as possible. A voltage dividing position as an input position at a ladder resistor 353 described later is adjusted. Details of the partial pressure position adjustment unit 40 will be described later.

  In the above configuration, the layout relating to the control line 21, the image signal line 22, the timing controller 31, the frame memory 32, the scan driver 33, the reference voltage generation unit 34, the source driver 35, and the voltage dividing position adjustment unit 40 illustrated in FIG. An example thereof is shown, and the present invention is not limited to these layouts.

  For example, as shown in FIG. 2, the frame memory 32 may be removed from the configuration of FIG. 1, and an external input image signal may be directly input to the source driver 35. In the case of this configuration, it is assumed that image signals are sequentially input in units of frames.

  1, the timing controller 31, the frame memory 32, the scan driver 33, the reference voltage generation unit 34, the source driver 35, and the voltage dividing position adjustment unit 40 are arranged outside the display panel 20. Any or all of these circuits may be arranged inside the display panel 20.

<Configuration of pixel circuit>
Next, the pixel circuit 10 constituting the display panel 20 will be described. FIG. 3 is a diagram showing an example of the configuration of the pixel circuit 10 (one pixel) shown in FIG. As shown in the figure, the pixel circuit 10 includes an organic EL element OLED that is a light emitting element, a drive transistor _Td that is a driver element for driving the organic EL element OLED, and a potential ( hereinafter, comprising a capacitive element C _s for holding) of the image signal voltage, and a switching transistor T _s as a switching element for controlling application of image signal voltage. Since the organic EL element OLED functions as a capacitor when a reverse voltage is applied, this is equivalently represented as an organic EL element capacitance C _{oled in} FIG.

The drive transistor _Td has a first terminal t11, a second terminal t12, and a third terminal t13. The first terminal t11 is electrically connected to the third terminal t23 of the switching transistor T _s . The second terminal t12 is electrically connected to the first power supply line 211 as the control line 21, and the third terminal t13 is electrically connected to the anode electrode of the organic EL element OLED. Here, the first terminal t11 corresponds to a gate electrode (gate), one of the second terminal t12 and the third terminal t13 corresponds to a drain electrode (drain), and the other corresponds to a source electrode (source). Note that the relative potential relationship between the second terminal t12 and the third terminal t13 varies according to each control period described later. “Drain” and “source” are defined by the conductivity type and relative potential relationship of the transistor.

  In the n-type transistor used in this embodiment, of the two terminals (that is, the second terminal t12 and the third terminal t13) arranged with the channel region interposed therebetween, the terminal on the high potential side is “drain”. ”And the terminal on the low potential side becomes“ source ”. Further, in a p-type transistor, of two terminals arranged with a channel region interposed therebetween, a low potential side terminal is a “drain” and a high potential side terminal is a “source”.

In the driving transistor _Td , the potential applied to the first terminal t11, more specifically, the voltage value applied to the gate with respect to the source (gate-source voltage) is adjusted, so that the drain and the source The amount of current flowing between them is adjusted. A state in which current can flow between the drain and source (on state) and a state in which current cannot flow (off state) are selectively set by the potential applied to the first terminal t11. .

  In the organic EL element OLED, when a potential difference equal to or higher than the conduction voltage of the organic EL element OLED is generated between the anode electrode and the cathode electrode, a current flows through the light emitting layer between the anode electrode and the cathode electrode. Emits light. Specifically, a metal such as aluminum, silver, copper, or gold, or an alloy thereof can be used as the anode electrode. As the cathode electrode, a light-transmitting conductive material such as indium tin oxide (ITO), a material such as magnesium, silver, aluminum, or calcium can be used. Note that the light emitting layer generates light by recombination of holes and electrons injected into the light emitting layer.

  The light emitting layer is made of a light emitting material such as Alq3 (tris (8-quinolinolato) aluminum complex). In order to increase luminous efficiency, a host material having a hole transporting property or an electron transporting property is doped with an organic metal compound such as tris [pyridinyl-kN-phenyl-kC] iridium or a dye such as coumarin as a dopant material. Layers may be configured. The density | concentration of the dopant material which comprises a light emitting layer shall be 0.5 mass% or more and 20 mass% or less, for example. Examples of the host material having a hole transporting property include α-NPD and TPD. Examples of a host material having an electron transporting property include bis (2-methyl-8-quinolinolato) -4- (phenylphenolato) aluminum, 1,4-phenylenebis (triphenylsilane), 1,3-bis ( Triphenylsilyl) benzene, 1,3,5-tri (9H-carbazol-9-yl) benzene, CBP, Alq3, or SDPVBi. Note that, as a material constituting each layer of the light emitting layer, an appropriate material is selected according to the color of emitted light. Examples of a dopant material that emits red light include tris (1-phenylisoquinolinato-C2, N) iridium or DCJTB. Examples of dopant materials that emit green light include tris [pyridinyl-kN-phenyl-kC] iridium or bis [2- (2-benzoxazolyl) phenolato] zinc (II). Examples of the dopant material that emits blue light include a distyrylarylene derivative, a perylene derivative, or an azomethine zinc complex. The light emitting layer is not limited to a single layer structure, and may have a multiple layer structure.

The anode electrode of the organic EL element OLED is electrically connected to the third terminal t13 of the drive transistor _Td , and the cathode electrode is electrically connected to the second power supply line 212 as the control line 21. In the pixel circuit 10 used in the present embodiment, the cathode electrode of the organic EL element OLED is a common cathode type that is common to all the pixel circuits 10 constituting the display panel 20, but not limited thereto. A common anode type configuration in which the anode electrode of the organic EL element OLED is common to all the pixel circuits 10 constituting the display panel 20 may be adopted.

The switching transistor T _s has a first terminal t21, a second terminal t22, and a third terminal t23. The first terminal t21 is electrically connected to the scanning line 213 as the control line 21, and the second terminal t22 is electrically connected to the image signal line 22. The third terminal t23 is electrically connected to the first terminal t11 of the driving transistor _Td . The first terminal t21 corresponds to the gate electrode, the second terminal t22 corresponds to the drain electrode, and the third terminal t23 corresponds to the source electrode.

In the switching transistor T _s , the potential applied to the first terminal t21, more specifically, the voltage value (gate-source voltage) applied between the first terminal t21 and the third terminal t23 is adjusted. Thus, the amount of current flowing between the drain and the source is adjusted. The potential applied to the first terminal t21 selectively sets a state where current can flow between the drain and source (on state) and a state where current cannot flow (off state). .

The capacitive element C _s has a function of holding a charge amount corresponding to an output image signal during a writing period described later. One electrode 1a of the capacitive element C _s is conductively connected to a wiring that electrically connects the first terminal t11 of the driving transistor T _d and the third terminal t23 of the switching transistor T _s . Yes. Further, the other electrode 1b of the capacitive element C _s is conductively connected to a wiring that electrically connects the third terminal t13 of the driving transistor _Td and the anode electrode of the organic EL element OLED.

The drive transistor T _d and the switching transistor T _s described above are configured by TFTs formed of, for example, amorphous silicon or polycrystalline silicon. In each drawing referred to below, the type (n-type or p-type) of the TFT channel is not clearly shown, but it is either n-type or p-type. In this embodiment, the n-type is used. This TFT is used.

<Operation of pixel circuit>
Next, the operation of the pixel circuit 10 will be described with reference to FIG. The operation of the pixel circuit 10 described below is controlled by the timing controller 31, the scan driver 33, the reference voltage generation unit 34, the source driver 35, and the voltage dividing position adjustment unit 40 shown in FIG. 1 (or FIG. 2). It is realized.

  FIG. 4 is a timing chart showing an example of a signal waveform (drive waveform) when driving the pixel circuit 10. FIG. 4 shows signal waveforms when the organic EL element OLED is caused to emit light sequentially by the light emission method. Here, the sequential light emission method refers to writing control of an image signal voltage for each pixel circuit for each frame and light emission control of each pixel circuit for each group of pixel circuits commonly connected to the same control line or power supply line ( (For example, every row, every column, etc.) In the present embodiment, it is assumed that writing control and light emission control are performed for each row of the display panel 20 shown in FIG. 1 (or FIG. 2).

  In FIG. 4, the horizontal axis indicates time, and in order from the top, (a) a potential applied to the first power supply line 211, (b) a potential applied to the second power supply line 212, and (c) a scanning line 213 The waveform of the applied potential and (d) the potential applied to the image signal line 22 (output image signal) are shown.

In the sequence of each of these lines, C _s initialization period, a write period, a write completion period, light emission preparation period, the light emission period, and wherein one cycle of six control periods extinction period, the organic EL element OLED by the control of the 1 cycle Is emitted once. Hereinafter, driving of the image display apparatus will be described. Note that the second power supply line 212 common to all pixel circuits is always at a zero potential (0 V), and thus description thereof is omitted as appropriate.

<C _s initialization period>
In the C _s initialization period, as shown in FIG. 4, the first power supply line 211 is set to zero potential (0 V), the scanning line 213 is set to high potential V _gH , and the image signal line 22 is set to zero potential (0 V). This control switching transistor T _s is turned on, the potential of the first terminal t11 side of the capacitor C _s is for the 0V, the potential across the capacitive element C _s is reset to zero potential.

In the present embodiment, the zero potential in the first power supply line 211 and the second power supply line 212 is set to 0 V, but a voltage that offsets the voltage stored in the first capacitor element C _s1 (= reference potential of the power supply line). There is no limitation to this. Further, the potential of the image signal line 22 is set to zero potential, but this may be a potential for defining the luminance when the image signal has 0 gradation, that is, the reference potential of the image signal line 22. It is not limited.

<Writing period>
In the writing period, as shown in FIG. 4, the zero potential (0 V) of the first power supply line 211 and the high potential V _gH of the scanning line 213 are maintained, and the image signal line 22 is output as a display target. The potential (image signal voltage) V _data corresponding to the image signal is used. At this time, if satisfying the relationship of "image signal voltage V _data> threshold voltage of the driving transistor", since the potential difference between both ends of the capacitor C _s is an image signal voltage V _data, capacitive element C _s in the image signal voltage V The charge for _data is accumulated.

  Note that the “threshold voltage” means a gate-source voltage that becomes a boundary when a transistor changes from an off state (a state where a drain current does not flow) to an on state (a state where a drain current flows). .

<Writing end period>
In the writing end period, as shown in FIG. 4, the zero potential (0 V) of the first power supply line 211 and the image signal voltage V _data of the image signal line 22 are maintained, and the scanning line 213 is set to the low potential V _gL . Is done. By this control, the switching transistor T _s is turned off, and the charge amount (image signal voltage V _data ) accumulated in the capacitive element C _s is determined.

<Light emission preparation period>
In the light emission preparation period, as shown in FIG. 4, the zero potential (0 V) of the first power supply line 211 and the low potential V _gL of the scanning line 213 are maintained, and the image signal line 22 is set to the zero potential (0 V). Is done. At this time, since data is also written to the pixel circuit 10 in the next row, the potential of the image signal line 22 becomes indefinite, but the image signal line 22 and the capacitive element C _s are separated by the switching transistor T _s . Therefore, there is no influence, and the charge amount determined at the end of writing is held.

<Light emission period>
In the light emission period, as shown in FIG. 4, the low potential V _gL of the scanning line 213 and the zero potential (0 V) of the image signal line 22 are maintained, and the first power supply line 211 is set to the high potential (V _DD ). Is done.

When the first power supply line 211 becomes a high potential, the potential of the second terminal t12 of the driving transistor _Td becomes higher than the potential of the third terminal t13. Therefore, in this light emission period, the second terminal t12 serves as a drain and the third terminal t13 serves as a source. As a result, the capacitive element C _s holding the image signal voltage V _data is connected in series, and the gate-source voltage V _gs of the drive transistor T _d is V _gs = V _data . As a result, the drive transistor T _d is turned on, and a current corresponding to V _data flows through the path of the first power supply line 211 → the drive transistor T _d → the organic EL element OLED → the second power supply line 212, and the organic EL element OLED Emits light.

At this time, when the organic EL element OLED emits light, the potential of the third terminal t13 (source) of the drive transistor _Td becomes the same value as the anode potential of the organic EL element OLED, and thus varies from the potential of the data writing period. become. At that time, the gate of the driving transistor T _d is because it is connected to the anode side of the organic EL element OLED through the capacitor C _s, the gate potential to follow the variation of the anode potential of the organic EL element OLED fluctuate. Therefore, the gate voltage keeps the value in the data writing period, that is, V _data .

<Quenching period>
In the extinction period, as shown in FIG. 4, the low potential V _gL of the scanning line 213 and the zero potential (0 V) of the image signal line 22 are maintained, and the first power supply line 211 is set to the zero potential (0 V). The This control eliminates the forward potential of the organic EL element OLED, and the organic EL element OLED is extinguished. At this time, the potential on the first terminal t11 side of the capacitive element Cs is V _data , and the potential on the second terminal t12 side is the same potential as the second power supply line 212, that is, 0V.

<Configuration of source driver and partial pressure position adjustment unit>
Next, the configuration of the source driver 35 and the partial pressure position adjustment unit 40 will be described in detail. FIG. 5 is a diagram schematically illustrating the configuration of the source driver 35 and the partial pressure position adjustment unit 40. As shown in the figure, the source driver 35 includes a shift register 351, a load latch 352, a ladder resistor 353, a voltage dividing position setting register 354, a voltage dividing position switching unit 355, a selector unit 356, an image And a signal voltage supply unit 357.

  The shift register 351 controls the timing for serial-parallel conversion of the image signal input from the timing controller 31 in synchronization with the clock signal input from the timing controller 31.

  The load latch 352 sequentially latches the input image signal by being enabled by the output of the shift register 351 in synchronization with the clock signal input from the timing controller 31, and the input image signal to the pixel circuits 10 for one row. To output in parallel.

The ladder resistor 353 has a plurality of resistance elements connected in series between the output terminals of the reference voltages V _{R0 to} V _R9 . The plurality of resistance elements generate a predetermined number of different voltages by dividing the difference voltage generated between the output terminals of the reference voltages V _{R0 to} V _R9 , and outputs the voltage to the selector unit 356 in the subsequent stage. Here, each voltage divided by the ladder resistor 353 is used as a gradation reference potential for gradation display. In the present embodiment, as the voltage of the reference voltage V _R0 ~V _R9 from 64 steps (64 gradations) it can be a partial pressure, a predetermined number of resistive elements between the output terminals of the reference voltage V _R0 ~V _R9 in series It shall be connected.

  The partial pressure position setting register 354 holds the shift amount instructing the switching destination in the partial pressure position switching unit 355 stored by the control unit 42 described later so that the partial pressure position switching unit 355 can read the shift amount.

The partial pressure position switching unit 355 includes an input line of the reference voltage V _R1, provided between the ladder resistor 353, an input line electrically connected to one input terminal of the reference voltage V _R1, the ladder resistor 353 And a plurality of output terminals electrically connected to each other. Here, each of the plurality of output terminals is connected between the resistance elements corresponding to the initial _divided voltage position of the reference voltage V _R1 and between the resistance elements around the resistance element, and one of the output terminals is connected to the output terminal. By switching the connection destination, the voltage dividing position of the reference voltage V _R1 can be switched. In the present embodiment, the partial pressure position switching unit 355 has four output ends, and it is possible to switch to three different partial pressure positions around the partial pressure position in addition to the default partial pressure position. Yes.

Further, the voltage dividing position switching unit 355 refers to the shift amount held in the voltage dividing position setting register 354, and switches the output terminal serving as the output destination of the reference voltage V _R1 according to the shift amount. In the present embodiment, the divided voltage position switching unit 355 is provided for the reference voltage V _R1 . However, the present invention is not limited to this, and the divided voltage position switching unit 355 may be provided for other reference voltages. If the shift amount differs for each RGB, the structure of this embodiment is prepared for each RGB, or the shift amount to be applied is switched according to the color of the input image signal that is symmetric to the processing.

FIG. 6 is a diagram schematically illustrating the configuration of the partial pressure position switching unit 355. In the figure, the terminal T _in is an input terminal of the reference voltage V _R1 is input. Further, the four terminals T _{out0 to} T _out3 are output ends and are connected between the resistance elements R constituting the ladder resistor 353, respectively. Here, when the connection destination of the terminal T _in is switched to one of the terminals T _{out0 to} T _out3 by the voltage _dividing position switching unit 355, the voltage _dividing position between the resistance elements R in the ladder resistor 353 changes. The voltage division result (voltage division distribution) around the voltage V _R1 changes.

  Returning to FIG. 5, the selector unit 356 includes a predetermined number of selector circuits 3561. Each of the selector circuits 3561 selectively uses the 64-step gradation reference voltage divided by the ladder resistor 353 to convert the image signal input from the load latch 352 into an image signal voltage.

  The image signal voltage supply unit 357 includes a number of output circuits 3571 corresponding to the number of selector circuits 3561, and supplies the image signal voltages generated by the selector circuits 3561 to the image signal lines 22.

  FIG. 7 is a diagram showing the relationship (gamma curve) between the gradation reference voltage (output voltage) output from the ladder resistor 353 and the gradation. In the figure, the vertical axis represents the potential of the output voltage, which means that the potential increases as it goes upward. The horizontal axis represents the gradation, meaning that the gradation becomes higher toward the right.

  Here, the “gradation” is used as a parameter indicating the degree of brightness of each color. For example, in the gradation expression of a predetermined bit (6 bits in the present embodiment), the gradation of each color is the minimum. A value (for example, 0 gradation) means the darkest reproduction, and a maximum value (for example, 64 gradation) means the brightest reproduction.

  An arrow shown at the lower part of the horizontal axis represents a voltage dividing position between resistance elements constituting the ladder resistor 353. The gradation reference voltage output from each voltage dividing position corresponds to one gradation, and in the case of the configuration of this embodiment, 64 gradation gradation display is realized by 64 gradation reference voltages. Is done. Note that the curves shown by the solid lines in FIG. 7 are connected to 64 gradation reference voltages, and these curves are hereinafter referred to as γ curves.

  In addition, a curve indicated by a broken line in FIG. 7 indicates a gradation characteristic of a certain display panel 20. The gradation characteristics of the display panel 20 are different for each display panel. Here, the “gradation characteristic” is a response characteristic of the panel luminance with respect to the input voltage, and this input voltage corresponds to the gradation reference voltage. That is, smooth gradation display can be realized by inputting a gradation reference voltage according to the gradation characteristics to the display panel 20.

  By the way, in the display panel using the amorphous silicon TFT in the pixel circuit, as shown in the gradation characteristics of FIG. 7, a point where the voltage changes rapidly (hereinafter referred to as an inflection point) is seen in the low gradation portion. . Here, the inflection point at which the voltage in the low gradation portion of the display panel 20 rapidly changes is the inflection point C. As described above, in order to realize a smooth gradation display, it is necessary to input a gradation reference voltage according to this gradation characteristic to the display panel 20, but in the conventional technique, the reference voltage is allocated. Since the pressure position is fixedly set, there is a problem that it is difficult to reproduce the gradation characteristics around the inflection point.

In order to deal with such a problem, in this embodiment, the voltage dividing position of the reference voltage V _R1 output from the voltage dividing position switching unit 355 is set near the inflection point C by the control of the voltage dividing position adjusting unit 40 described later. By shifting to the partial pressure position corresponding to the gradation, the gradation characteristics around the inflection point C are reproduced.

  Hereinafter, the configuration of the partial pressure position adjustment unit 40 will be described. As shown in FIG. 5, the partial pressure position adjustment unit 40 includes a storage unit 41 and a control unit 42.

  The storage unit 41 is configured by a non-volatile storage medium, and stores a program 411, a reference table 412 corresponding to the first storage unit, and a default setting table 413 corresponding to the second storage unit.

  The program 411 is a program for realizing various operations of the control unit 42, and realizes a partial pressure position control unit 421 described later in cooperation with the control unit 42.

  The reference table 412 is a data table in which information related to the gradation characteristics of the display panel 20 is recorded. Here, the “information about the gradation characteristics” is information for representing the gradation characteristics shown in FIG. 7, and it is assumed that at least the gradation at the inflection point C is recorded. In addition, as information regarding the gradation characteristics, a specific gradation portion including all gradations or the inflection point C representing the gradation characteristics and the voltage value thereof may be recorded in association with each other. May be recorded. Note that when the shape of the gradation characteristic differs for each RGB color, information on the gradation characteristic for each color is recorded in the reference table 412.

The default setting table 413 is a data table in which gradations corresponding to the initially set voltage dividing position of the reference voltage V _R1 are recorded. In the case where the initial divided voltage position differs for each RGB color, the gradation corresponding to the initial divided voltage position for each color is recorded in the default setting table 413.

  The control unit 42 is configured using a CPU, a RAM, and the like, and implements various controls and operations by reading and executing a program 411 stored in the storage unit 41. And the control part 42 is provided with the partial pressure position control part 421 as a function part as a result of performing the program 411. FIG.

The voltage dividing position control unit 421 calculates the gradation at the inflection point recorded in the reference table 412 and the gradation corresponding to the initially set voltage dividing position of the reference voltage V _R1 recorded in the default setting table 413. Comparison is made and a difference value between the two gradations is calculated as a shift amount necessary for positioning the divided position of the reference voltage V _{R1 in} the vicinity of the inflection point C. In the reference table 412 and the default setting table 413, when gradation is recorded for each RGB color, the shift amount is calculated for each color.

Further, the partial pressure position control unit 421 stores the calculated shift amount in the partial pressure position setting register 354 so that the partial pressure position switching unit 355 can refer to the shift amount. With this control, the voltage dividing position switching unit 355 changes the voltage dividing position of the reference voltage V _R1 by switching the output end according to the shift amount held in the voltage dividing position setting register 354, and changes the reference voltage V _R1 to the reference voltage V _R1 . The corresponding gradation is adjusted to be near the gradation of the inflection point C.

<Operation of source driver and partial pressure position adjustment unit>
Hereinafter, operations of the partial pressure position switching unit 355 and the partial pressure position control unit 421 will be described with reference to FIGS. 6, 7, 8, and 9.

FIG. 8 is a flowchart showing the procedure of the partial pressure position adjustment process realized by the partial pressure position switching unit 355 and the partial pressure position control unit 421 described above. As a premise of this process, it is assumed that the gradation for the inflection point C shown in FIG. In addition, it is assumed that the default setting table 413 records in advance gradations corresponding to the initially set voltage dividing position of the reference voltage V _R1 .

First, the partial pressure position control unit 421 compares the gradation at the inflection point C recorded in the reference table 412 with the gradation at the reference voltage V _R1 recorded in the default setting table 413, and both levels. From the tone difference, the shift amount of the voltage dividing position necessary for positioning the gradation corresponding to the reference voltage V _R1 in the vicinity of the gradation of the inflection point C is calculated (step S11). For example, in the case of the inflection point C and the reference voltage V _R1 illustrated in FIG. 7, the voltage dividing position control unit 421 calculates a shift amount instructed to “shift three to the low gradation side”.

  Subsequently, the partial pressure position control unit 421 stores the shift amount calculated in step S11 in the partial pressure position setting register 354 (step S12).

Next, the voltage dividing position switching unit 355 is connected from the initially set output end serving as the output destination of the reference voltage V _R1 to the output end moved by the shift amount in accordance with the shift amount held in the voltage dividing position setting register 354. The destination is switched (step S13), and this process ends.

For example, if the initial output terminal of the voltage dividing position switching unit 355 corresponding to the gradation of the reference voltage V _R1 shown in FIG. 7 is the terminal T _out3 shown in FIG. 6, the voltage _dividing position switching unit. 355 in accordance with the amount of shift that is held in the partial pressure position setting register 354 (the lower tone side 3 shift), switches the connection destination to a terminal T _out0 that three shifts from the terminal T _out3 the low gradation side. As a result, the voltage dividing state in the vicinity of the reference voltage V _R1 in the ladder resistor 353 changes, and the shape of the γ curve generated based on the reference voltages V _{R0 to} V _R9 is as shown in FIG. This is substantially the same as the gradation characteristic.

  As described above, according to the first embodiment, since the voltage dividing position of the reference voltage can be adjusted according to the gradation characteristics of the display panel 20, an inflection point is a key point of the gradation characteristics. It becomes possible to respond flexibly to the surrounding shape. Thereby, since the gradation reference voltage according to the gradation characteristic unique to the display panel 20 can be generated, smooth gradation display can be realized in the gradation display on the display panel 20.

In the present embodiment, the shape of the γ curve is brought close to the gradation characteristics of the display panel 20 by adjusting the voltage dividing position of the reference voltage V _R1 , but in addition to this, the reference voltage generation unit 34 It is also possible to control the potential of the reference voltage V _R1 generated in step (1).

Specifically, the voltage dividing position control unit 421 makes the potential of the reference voltage V _R1 generated by the reference voltage generation unit 34 the same as the input voltage of the inflection point C stored in the standard table 412. The operation of the reference voltage generator 34 is controlled. In the case of this configuration, the gradation at the inflection point C and its input voltage are recorded in association with the reference table 412 so that the voltage dividing position control unit 421 can refer to the initially set potential of the reference voltage V _R1. It is preferable to keep it. Accordingly, since the reference voltage V _R1 can be arranged at the position of the inflection point C shown in FIG. 7, the shape of the γ curve is brought closer to the gradation characteristics of the display panel 20 as shown in FIG. Can do.

  Further, in the case where the position of the inflection point C varies depending on the temperature of the display panel 20, it is possible to cope with this by adopting the following configuration. First, the gradation at the inflection point C measured under a plurality of temperatures (for example, 10, 20, 30, 40 ° C., which are discrete temperatures, or the temperature at which the inflection point changes) is stored in the reference table 412. Record. Further, a temperature sensor that detects the temperature of the display panel 20 itself or the atmosphere around the display panel 20 is separately provided, and the detected temperature is input to the partial pressure position control unit 421. The partial pressure position control unit 421 reads the gradation at the inflection point C corresponding to the temperature detected by the temperature sensor from the reference table 412 and calculates the shift amount based on the gradation.

[Second Embodiment]
Next, a second embodiment will be described. In the first embodiment described above, the aspect in which the voltage dividing position is adjusted with respect to the specific reference voltage (reference voltage V _R1 ) located around the inflection point of the gradation characteristic has been described. In the second embodiment, a description will be given of a mode in which the divided voltage position can be adjusted for all the reference voltages generated by the reference voltage generation unit 34. In addition, about the element which has a function similar to 1st Embodiment, the same code | symbol is provided and description is abbreviate | omitted.

<Configuration of source driver and partial pressure position adjustment unit>
FIG. 11 is a diagram schematically illustrating the configuration of the source driver 36 and the partial pressure position adjustment unit 50 according to the second embodiment.

Here, the source driver 36 corresponds to the source driver 35 in the first embodiment. Moreover, the partial pressure position adjustment unit 50 corresponds to the partial pressure position adjustment unit 40 in the first embodiment. The reference voltage generation unit 37 corresponds to the reference voltage generation unit 34 in the first embodiment, and generates eight levels of reference voltages V _{R0 to} V _R7 having different potentials.

  As shown in FIG. 11, the source driver 36 includes a shift register 351, a load latch 352, a ladder resistor 353, a voltage dividing position setting register 354, a voltage dividing position switching unit 361, a selector unit 356, an image And a signal voltage supply unit 357.

The voltage dividing position switching unit 361 is provided between each input line of the reference voltages V _{R0 to} V _R7 and the ladder resistor 353. Each of the voltage dividing position switching unit 361 has one input terminal electrically connected to the input line of the reference voltage V _Rn (n is 0 to 7), and a plurality of outputs electrically connected to the ladder resistor 353. And has an end. Here, each of the plurality of output terminals is connected between the resistance elements corresponding to the initial _divided voltage position of the reference voltage V _Rn and between the resistance elements around the resistance element, and one of the output terminals is connected to the output terminal. By switching the connection destination, the voltage _dividing position of the reference voltage V _Rn can be switched. In the present embodiment, each of the partial pressure position switching units 361 has eight output ends, and it is possible to switch to seven different partial pressure positions around the partial pressure position in addition to the default partial pressure position. ing.

Further, each of the voltage dividing position switching unit 361 refers to the shift amount with respect to its own voltage dividing position switching unit 361 held in the voltage dividing position setting register 354, and the reference voltages V _{R1 to} V _R7 according to the shift amount. The output terminal that is the output destination of is switched.

  The partial pressure position adjustment unit 50 includes a storage unit 51 and a control unit 52.

The storage unit 51 corresponds to the storage unit 41 in the first embodiment, and stores a reference table 412, a program 511, and a default setting table 512. Here, the program 511 is a program for realizing various operations of the control unit 52, and realizes a partial pressure position control unit 521 to be described later in cooperation with the control unit 52. In the default setting table 512, gradations corresponding to the initially set voltage dividing positions for the reference voltages V _{R0 to} V _R7 are recorded. Note that, in the case where the initial partial pressure positions differ for each RGB color, the initial partial pressure positions for each color are recorded in the default setting table 512.

  The control unit 52 corresponds to the control unit 42 in the first embodiment, and implements various controls and operations by reading and executing the program 511 stored in the storage unit 51. And the control part 52 is provided with the partial pressure position control part 521 as a function part as a result of performing the program 511. FIG.

The voltage dividing position control unit 521 compares the gradation at the inflection point recorded in the reference table 412 with the gradation at each of the reference voltages V _{R0 to} V _R7 recorded in the default setting table 512 to change the gradation. A reference voltage V _Rn (n is 0 to 7) closest to the gradation of the inflection point is specified. Here, a plurality of inflection points may be recorded in the reference table 412. In this case, a plurality of reference voltages V _Rn corresponding to each inflection point are specified.

Further, the voltage _dividing position control unit 521 compares the gradation at the inflection point held in the standard table 412 with the gradation at the specified reference voltage V _Rn and uses the reference voltage V _Rn as the inflection point. The shift amount of the partial pressure position necessary for positioning in the vicinity is calculated. Note that the method for calculating the shift amount is the same as the method for calculating the partial pressure position control unit 421 described above, and a description thereof will be omitted.

  Furthermore, the partial pressure position control unit 521 stores the calculated shift amount in the partial pressure position setting register 354 so that each partial pressure position switching unit 361 can refer to the shift amount. It is assumed that the partial pressure position switching unit 361 stores the partial pressure position switching unit 361 so as to be able to identify the shift amount. Specifically, a mode in which a partial pressure position setting register 354 is provided for each partial pressure position switching unit 361, or a storage area in the partial pressure position setting register 354 is divided for each partial pressure position switching unit 361. It is good also as the aspect currently performed.

Under the control of the voltage _dividing position control unit 521 described above, each of the voltage _dividing position switching units 361 switches the output terminal as the connection destination according to the shift amount held in the voltage _dividing position setting register 354, whereby the reference voltage V _{Rn Are} adjusted so that the gray level corresponding to the reference voltage V _Rn is close to the gray level of the inflection point C.

<Operation of source driver and partial pressure position adjustment unit>
Next, operations of the partial pressure position switching unit 361 and the partial pressure position control unit 521 will be described with reference to FIG. FIG. 12 is a flowchart showing the procedure of the partial pressure position adjustment process realized by the partial pressure position switching unit 361 and the partial pressure position control unit 521.

First, the partial pressure position control unit 521 compares the gradation at the inflection point recorded in the reference table 412 with the gradation at each of the reference voltages V _{R0 to} V _R7 recorded in the default setting table 512. Then, the reference voltage V _Rn closest to the gradation of the inflection point is specified (step S21).

Subsequently, the voltage dividing position control unit 521 compares the gradation of the inflection point stored in the reference table 412 with the gradation at the reference voltage V _Rn specified in step S21, and determines the difference between the two gradations. Then, a shift amount necessary for positioning the reference voltage V _Rn near the inflection point is calculated (step S22).

  Then, the partial pressure position control unit 521 stores the shift amount calculated in step S22 in the partial pressure position setting register 354 in a state where it can be identified to which partial pressure position switching unit 361 (step S23).

_Each of the voltage _dividing position switching unit 361 shifts from the output terminal of the initial setting that is the output destination of the reference voltage V _Rn according to the shift amount with respect to its own voltage _dividing position switching unit 361 held in the voltage _dividing position setting register 354. The connection destination is switched to the output terminal that has been moved by the amount (step S24), and this process is terminated. It should be noted that for the partial pressure position switching unit 361 for which the shift amount is not instructed in the partial pressure position setting register 354, an initial output terminal is selected.

  As described above, according to the second embodiment, in addition to the effects of the first embodiment described above, even when there are a plurality of inflection points that are important points of the gradation characteristics, It is possible to flexibly cope with the shape around the inflection point. Thereby, since the gradation reference voltage according to the gradation characteristic unique to the display panel 20 can be generated, smooth gradation display can be realized in the gradation display on the display panel 20. In the second embodiment, the voltage dividing position switching unit 361 is provided for all the reference voltages generated by the reference voltage generation unit 34. However, a plurality of reference voltages generated by the reference voltage generation unit 34 are provided. Alternatively, the partial pressure position switching unit 361 may be provided only for.

In the present embodiment, the voltage _dividing position of the reference voltage V _Rn is adjusted based on the inflection point of the gradation characteristics. partial pressure position of the reference voltage V _R0 ~V _R7 may manner to adjust. Specifically, information representing the entire gradation characteristics of the display panel 20 is recorded in the reference table 412, and the gradation corresponding to the initial _divided voltage position of the reference voltage V _Rn and its value are stored in the default setting table 512. By recording the output voltage in association with each other and calculating the shift amount of each reference voltage V _Rn so as to be positioned on the gradation characteristic, the shape of the γ curve can be made substantially the same as the gradation characteristic.

  The embodiment according to the present invention has been described above, but the present invention is not limited to this, and various modifications, substitutions, additions, and the like are possible without departing from the spirit of the present invention. For example, a ladder resistor having a plurality of resistance elements connected in series can be configured by providing a plurality of taps on one continuous resistor.

It is the figure which showed the structure of the image display apparatus typically It is the figure which showed the other aspect of the image display apparatus. It is the figure which showed an example of the structure of a pixel circuit. It is a timing chart showing an example of a signal waveform when driving a pixel circuit. It is the figure which showed typically the detailed structure of the source driver which concerns on 1st Embodiment, and a partial pressure position adjustment part. It is the figure which showed typically the structure of the partial pressure position switching part shown in FIG. It is the figure which showed the relationship between the output voltage from the ladder resistance shown in FIG. 5, and a gradation. 6 is a flowchart illustrating a procedure of a partial pressure position adjustment process realized by the partial pressure position switching unit and the partial pressure position control unit illustrated in FIG. 5. It is the figure which showed the relationship between the output voltage from a ladder resistance, and a gradation after performing a partial pressure position adjustment process. It is the figure which showed the relationship between the output voltage from ladder resistance, and a gradation at the time of controlling the electric potential of reference voltage _VR1 in addition to a partial pressure position adjustment process. It is the figure which showed typically the detailed structure of the source driver which concerns on 2nd Embodiment, and a partial pressure position adjustment part. 12 is a flowchart illustrating a procedure of a partial pressure position adjustment process realized by the partial pressure position switching unit and the partial pressure position control unit illustrated in FIG. 11.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Pixel circuit 20 Display panel 21 Control line 211 1st power supply line 212 2nd power supply line 213 Scan line 22 Image signal line 31 Timing controller 32 Frame memory 33 Scan driver 34 Reference voltage generation part 35 Source driver 351 Shift register 352 Load latch 353 Ladder resistance 354 Divided voltage position setting register 355 Divided voltage position switching unit 356 Selector unit 3561 Selector circuit 357 Image signal voltage supply unit 3571 Output circuit 36 Source driver 361 Divided voltage position switching unit 40 Divided voltage position adjustment unit 41 Storage unit 411 Program 412 Reference table 413 Default setting table 42 Control unit 421 Partial pressure position control unit 50 Partial pressure position adjustment unit 51 Storage unit 511 Program 512 Default setting table 52 Control unit 521 Partial pressure level Control unit C _oled organic EL element capacitance C _s1 first capacitive element C _s2 second capacitive element OLED organic EL element T _d driving transistor T _rst reset transistor T _s switching transistor T _th threshold voltage detection transistor

Claims (5)

a reference voltage generation unit for generating a plurality of reference voltages constituting the γ curve;
A ladder resistor having a plurality of resistance elements connected in series, the reference voltage being input between the resistance elements, and outputting as a gradation reference voltage for gradation display;
A voltage dividing position switching unit that is provided between the reference voltage generation unit and the ladder resistor and switches an input position of the reference voltage input to the resistance element;
A signal processing apparatus comprising: A display panel that receives an output image signal obtained by converting the input image signal according to the γ curve, and displays an image according to the output image signal;
A reference voltage generation unit for generating a reference voltage constituting the γ curve;
A ladder resistor having a plurality of resistance elements connected in series, the reference voltage being input between the resistance elements, and outputting as a gradation reference voltage for gradation display;
A voltage dividing position switching unit that is provided between the reference voltage generation unit and the ladder resistor and switches an input position of the reference voltage input to the resistance element;
A partial pressure position control unit that controls a switching operation of the input position in the partial pressure position switching unit;
A selector unit for converting into the output image signal using the gradation reference voltage;
An image display device comprising: The image display device according to claim 2,
The image display apparatus, wherein the voltage dividing position control unit determines the input position at the ladder resistor so that the gradation reference voltage corresponds to a gradation characteristic of the display panel. The image display device according to claim 3,
The voltage dividing position control unit determines the input position as a switching destination in the voltage dividing position switching unit so that the reference voltage is positioned near an inflection point included in the gradation characteristic. An image display device. The image display device according to claim 4,
A first storage unit that stores in advance the gradation at the inflection point;
A second storage unit that stores in advance a gradation corresponding to the initially set input position selected by the partial pressure position selection unit;
Further comprising
The partial pressure position control unit compares the gradation stored in the first storage unit with the gradation stored in the second storage unit, and determines the input position according to the difference between the two gradations. An image display device characterized by being determined as a switching destination in a partial pressure position switching unit.

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