JP2010119083A - Operational amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To limit an output voltage at a stable state by suppressing oscillation. <P>SOLUTION: A comparator 13 can output a larger current than an output current of a constant current circuit 16 of a differential amplification part 11, and, when Vo at an output terminal 19 is higher than a higher side limit voltage VH, outputs a current to a transistor T4. Also, a comparator 14 can output a larger current than a constant current of a constant current circuit 16 of the differential amplification part 11 and, when the voltage Vo of the output terminal 19 is lower than a lower side limit voltage VL, outputs a current to a transistor T3. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an operational amplifier having an output voltage limiting function.

  An operational amplifier having a function of limiting an output voltage is used in various applications. For example, it has a circuit configuration that amplifies a sensor signal using an operational amplifier that operates with a power supply voltage of 5 V, and the output voltage of the operational amplifier is determined to be normal within the range from 0.4 V to 4.6 V, and is out of the voltage range. There is a sensor circuit with a disconnection detection function that sometimes determines that an abnormality such as disconnection has occurred. In this sensor circuit, the output voltage of the operational amplifier is limited by a high potential side limiting voltage of 4.6V and a low potential side limiting voltage of 0.4V.

  Patent Document 1 discloses an operational amplifier with a voltage limiting function on the high potential side. This operational amplifier includes an operational amplifier circuit composed of a differential input unit, an amplifier unit, and an output unit, a voltage conversion unit that divides the output voltage, and a comparator that compares the output voltage of the voltage conversion unit and the high potential side limit voltage. I have. The comparator limits the output voltage by sucking the current flowing from the amplifying unit to the output transistor of the output unit according to the output of the comparator.

JP-A-6-303054

  In the operational amplifier described in Patent Document 1, when the output voltage becomes higher than the high potential side limit voltage, the comparator sucks current, and the output transistor is immediately turned off. Since the output voltage decreases when the output transistor is turned off, the output of the comparator is opened, and the output transistor is turned on again. As described above, in the operational amplifier described in Patent Document 1, since the output node of the comparator that performs the voltage limiting operation is directly connected to the base of the output transistor, the on / off state of the output transistor repeats inversion with a very short period. There was a problem that it was easy to occur and lacked stability.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an operational amplifier that can suppress oscillation and limit an output voltage in a stable state.

  The operational amplifier according to claim 1 includes a differential amplifier, an inverting DC amplifier connected between an output node of the differential amplifier and an output terminal of the operational amplifier, and a first that limits an output voltage. And a comparator. The differential amplifier includes first and second transistors that form a differential pair, third and fourth transistors that form a current mirror circuit connected to the differential pair, a differential pair, and a current mirror circuit And a constant current circuit for supplying a constant current to the circuit. The inverting direct current amplifier is fed back by an impedance element including a capacitor having a phase compensation function.

  The first comparator is a comparator that outputs a current to the third transistor when the voltage at the output terminal of the operational amplifier is higher than the high-potential limit voltage, and when the voltage at the output terminal is higher than the high-potential limit voltage In addition, any one of the comparators that output current to the fourth transistor is configured.

  When a current is additionally supplied from the outside of the differential amplifier to the third and fourth transistors, the output voltage of the differential amplifier changes against the current state in the differential pair. In this case, since the first comparator outputs a current directed to suppress the voltage drop at the output node of the differential amplifier, the output voltage of the differential amplifier increases and the output voltage of the operational amplifier decreases and increases. Clamped to the potential limit voltage. The first comparator is configured to be able to output a current larger than the output current of the constant current circuit so that the output voltage limiting function operates effectively even if the differential input voltage is large. Since the output of the differential amplifier that changes according to the current control of the first comparator is output after being integrated by the capacitor of the inverting DC amplifier, oscillation is unlikely to occur and stable voltage limiting operation is possible. It becomes.

  In the operational amplifier according to claim 2, when the voltage at the output terminal is lower than the low-side limit voltage, the comparator that outputs current to the third transistor and when the output terminal voltage is lower than the low-side limit voltage In addition, a second comparator configured by any one of the comparators that output current to the fourth transistor is provided. When a current is additionally supplied from the outside of the differential amplifier to the third and fourth transistors, the output voltage of the differential amplifier changes against the current state in the differential pair. In this case, since the second comparator outputs a current directed to suppress the voltage increase at the output node of the differential amplifier, the output voltage of the differential amplifier decreases and the output voltage of the operational amplifier increases and decreases. Clamped to the potential limit voltage.

  The second comparator is configured to be able to output a current larger than the output current of the constant current circuit so that the output voltage limiting function operates effectively even if the differential input voltage is large. Since the output of the differential amplifier that changes according to the current control of the second comparator is output by the integration action of the capacitor of the inverting DC amplifier, oscillation is unlikely to occur and stable voltage limiting operation is possible. It becomes.

The operational amplifier according to claim 3 includes both the first and second comparators described above, and performs voltage limitation on the high potential side and the low potential side.
The operational amplifier according to any one of Claims 4 to 7 and Claims 9 to 14, wherein the differential amplifying unit includes a constant current circuit, a first and a second circuit between the pair of high potential side power supply lines and the low potential side power supply lines. And the third and fourth transistors are connected to each other.

  According to the means described in claim 4, when the first comparator is composed of a comparator that outputs current to the fourth transistor, the comparator is a pair of multi-collector transistors, each of which is 1 The fifth and sixth transistors in which the two collectors and the bases of the two are commonly connected are connected between the high-potential side power supply line and the emitters of the fifth and sixth transistors, respectively. And a current output circuit connected between the common connection node of the fifth and sixth transistors and the low-potential-side power supply line. And the other collector of the sixth transistor is connected to the collector of the fourth transistor. When the voltage at the output terminal of the operational amplifier becomes higher than the high potential side limit voltage, a current flows from the high potential side power supply line to the fourth transistor via the eighth and sixth transistors, and the output voltage is limited to the high potential side. Clamped to voltage.

According to the means described in claim 5, when the second comparator is composed of a comparator that outputs current to the third transistor, the comparator forms a differential pair, and the base has a low potential. And a current output circuit connected between the high-potential side power supply line and the emitters of the ninth and tenth transistors. The collector of the tenth transistor is connected to the collector of the third transistor. When the voltage at the output terminal of the operational amplifier becomes lower than the low potential side limit voltage, current flows from the current output circuit to the third transistor via the tenth transistor, and the output voltage is clamped to the low potential side limit voltage. .
The same applies to the means according to claim 7 in which an FET is used in place of the bipolar transistor.

  According to the means described in claim 6, when the first comparator is constituted by a comparator that outputs current to the fourth transistor, the comparator constitutes a differential pair, and the gate has a high potential. Eleventh and twelfth transistors to which a side limit voltage and an output terminal voltage are applied, and input and output transistors constituting a current mirror circuit, the high-potential-side power supply line, the drain of the twelfth transistor, The thirteenth transistor connected between the four transistors, the fourteenth transistor connected between the high-potential-side power supply line and the drain of the fourth transistor, the sources of the eleventh and twelfth transistors, and the low-potential-side power supply. And a current output circuit connected between the lines. When the voltage at the output terminal of the operational amplifier becomes higher than the high potential side limit voltage, current flows from the high potential side power supply line through the thirteenth and twelfth transistors, and accordingly, the high potential side power supply line to the fourteenth transistor. A current flows through the fourth transistor via. As a result, the output voltage is clamped to the high potential side limit voltage.

  According to the means described in claim 8, in the means described in claims 4-7, the output current ratio between the constant current circuit and the current output circuit is set to 1: 2. Such an output current ratio can be easily realized by using transistors of the same size. Further, the current condition of the current output circuit with respect to the constant current circuit can be satisfied by setting the current as small as possible.

  According to the means described in claim 9, when the first comparator is composed of a comparator that outputs current to the fourth transistor, the comparator is a pair of multi-collector transistors, each of which is 1 The fifth and sixth transistors in which the two collectors and the bases of the two are commonly connected are connected between the high-potential side power supply line and the emitters of the fifth and sixth transistors, respectively. A current output circuit connected between the common connection node of the fifth and sixth transistors and the low-potential-side power line, and the seventh and eighth transistors to which the side limiting voltage and the output terminal voltage are applied; Connected between the other collector of the fifth and sixth transistors and the low-potential side power supply line, respectively, the input side and output side of the current mirror circuit A seventeenth and eighteenth transistor, a nineteenth transistor in the form of a diode connection connected between the other collector of the fifth transistor and the low-potential side power line, and a sixth transistor A twentieth transistor in the form of a diode connected between the other collector and the low-potential side power line, and a current mirror circuit together with the twentieth transistor grounded to the low-potential side power line A multi-collector transistor connected between the high-potential-side power supply line and the twenty-first transistor, with one collector connected in common with the base and the other collector connected to the first transistor And a twenty-second transistor connected to the collector of the fourth transistor.

  When the voltage at the output terminal of the operational amplifier becomes higher than the high potential side limit voltage, the current flowing from the high potential side power supply line through the eighth and sixth transistors increases. On the other hand, the current flowing from the high potential side power supply line through the seventh and fifth transistors decreases, and accordingly, the current flowing to the seventeenth and nineteenth transistors also decreases. As a result, the current flowing through the eighth and sixth transistors exceeds the current flowing through the seventeenth transistor that forms the current mirror circuit together with the eighteenth transistor, so that the eighth, A current flows through the twentieth transistor to the twentieth transistor. Accordingly, a current flows from the high potential side power supply line to the fourth transistor through the twenty-second transistor. That is, the first comparator outputs a source current to the fourth transistor. As a result, the output voltage is clamped to the high potential side limit voltage.

  According to the means described in claim 10, when the first comparator is composed of a comparator that outputs current to the third transistor, the comparator is a pair of multi-collector transistors, each of which is 1 The fifth and sixth transistors in which the two collectors and the bases of the two are commonly connected are connected between the high-potential side power supply line and the emitters of the fifth and sixth transistors, respectively. A current output circuit connected between the common connection node of the fifth and sixth transistors and the low-potential-side power line, and the seventh and eighth transistors to which the side limiting voltage and the output terminal voltage are applied; Connected between the other collector of the fifth and sixth transistors and the low-potential side power supply line, respectively, the input side and the output side of the current mirror circuit A seventeenth and eighteenth transistor to be formed, a nineteenth transistor in the form of a diode connection connected between the other collector of the fifth transistor and the low-potential side power line, and a sixth transistor A twentieth transistor in the form of a diode connected between the other collector and the low-potential side power line, and a current mirror circuit together with the twentieth transistor grounded to the low-potential side power line And a 21st transistor whose collector is connected to the collector of the 3rd transistor.

  When the voltage at the output terminal of the operational amplifier becomes higher than the high potential side limit voltage, the current flowing from the high potential side power supply line through the eighth and sixth transistors increases. On the other hand, the current flowing from the high potential side power supply line through the seventh and fifth transistors decreases, and accordingly, the current flowing to the seventeenth and nineteenth transistors also decreases. As a result, the current flowing through the eighth and sixth transistors exceeds the current flowing through the seventeenth transistor that forms the current mirror circuit together with the eighteenth transistor, so that the eighth, A current flows through the twentieth transistor to the twentieth transistor. Accordingly, a current flows from the third transistor to the low potential side power supply line through the twenty-first transistor. That is, the first comparator outputs a sink current to the third transistor. As a result, the output voltage is clamped to the high potential side limit voltage.

  According to the means described in claim 11, when the second comparator is composed of a comparator that outputs current to the fourth transistor, the comparator constitutes a differential pair, and the base has a low potential. Ninth and tenth transistors to which the side limit voltage and the output terminal voltage are applied, a current output circuit connected between the high-potential side power supply line and the emitters of the ninth and tenth transistors, The twenty-third and twenty-fourth transistors are connected between the collector of the tenth transistor and the low-potential side power supply line, respectively, and form the input side and the output side of the current mirror circuit. A 25th transistor in the form of a diode connected between the potential side power supply line, the collector of the 10th transistor, and the low potential side power supply A twenty-sixth transistor in the form of a diode connection connected to the line, and is grounded to the low-potential side power supply line, forms a current mirror circuit together with the twenty-sixth transistor, and the collector serves as the collector of the fourth transistor And a 27th transistor connected thereto.

When the voltage at the output terminal of the operational amplifier becomes lower than the low potential side limit voltage, the current flowing from the current output circuit via the tenth transistor increases. On the other hand, the current flowing from the current output circuit through the ninth transistor decreases, and accordingly, the current flowing through the 23rd and 25th transistors also decreases. As a result, the current flowing through the tenth transistor exceeds the current flowing through the twenty-third transistor constituting the current mirror circuit together with the twenty-fourth transistor, so that the twenty-sixth transistor from the current output circuit through the tenth transistor. Current flows through the transistor. Accordingly, a current flows from the fourth transistor to the low potential side power supply line through the 27th transistor. That is, the second comparator outputs a sink current to the fourth transistor. As a result, the output voltage is clamped to the lower potential limit voltage.
The same applies to the means of claim 14 in which an FET is used instead of the bipolar transistor.

  According to the means described in claim 12, when the second comparator is composed of a comparator that outputs current to the third transistor, the comparator constitutes a differential pair, and the base has a low potential. Ninth and tenth transistors to which the side limit voltage and the output terminal voltage are applied, a current output circuit connected between the high-potential side power supply line and the emitters of the ninth and tenth transistors, The twenty-third and twenty-fourth transistors are connected between the collector of the tenth transistor and the low-potential side power supply line, respectively, and form the input side and the output side of the current mirror circuit. A 25th transistor in the form of a diode connected between the potential side power supply line, the collector of the 10th transistor, and the low potential side power supply A twenty-sixth transistor in the form of a diode connection connected to the line; a twenty-seventh transistor that is grounded to the low-potential side power line and forms a current mirror circuit together with the twenty-sixth transistor; and a high-potential side power supply A multi-collector type transistor connected between the line and the 27th transistor, wherein one collector is connected in common with the base and the other collector is connected to the collector of the third transistor. Transistor.

  When the voltage at the output terminal of the operational amplifier becomes lower than the low potential side limit voltage, the current flowing from the current output circuit via the tenth transistor increases. On the other hand, the current flowing from the current output circuit through the ninth transistor decreases, and accordingly, the current flowing through the 23rd and 25th transistors also decreases. As a result, the current flowing through the tenth transistor exceeds the current flowing through the twenty-third transistor constituting the current mirror circuit together with the twenty-fourth transistor, so that the twenty-sixth transistor from the current output circuit through the tenth transistor. Current flows through the transistor. Along with this, a current flows from the high potential side power supply line to the third transistor via the 28th transistor. That is, the second comparator outputs a source current to the third transistor. As a result, the output voltage is clamped to the lower potential limit voltage.

  According to the means described in claim 13, when the first comparator is constituted by a comparator that outputs current to the fourth transistor, the comparator constitutes a differential pair, and the gate has a high potential. Eleventh and twelfth transistors to which a side limit voltage and an output terminal voltage are applied, and input and output transistors constituting a current mirror circuit, the high-potential-side power supply line, the drain of the twelfth transistor, The thirteenth transistor connected between the four transistors, the fourteenth transistor connected between the high-potential-side power supply line and the drain of the fourth transistor, the sources of the eleventh and twelfth transistors, and the low-potential-side power supply. A current output circuit connected between the high-potential side power supply line and the drains of the eleventh and twelfth transistors, respectively. The 29th and 30th transistors that form the input side and the output side of the current mirror circuit, and the diode connection form connected between the high-potential side power supply line and the drain of the eleventh transistor. 31 transistors.

  When the voltage at the output terminal of the operational amplifier becomes higher than the high potential side limit voltage, the current flowing through the twelfth transistor increases. On the other hand, the current flowing through the eleventh transistor decreases, and accordingly, the current flowing through the 29th and 31st transistors also decreases. As a result, the current flowing through the twelfth transistor exceeds the current flowing through the twenty-ninth transistor constituting the current mirror circuit together with the thirtieth transistor, so that the thirteenth and twelfth transistors from the high potential side power supply line Current flows through. Accordingly, a current flows from the high potential side power supply line to the fourth transistor through the fourteenth transistor. That is, the first comparator outputs a source current to the fourth transistor. As a result, the output voltage is clamped to the high potential side limit voltage.

  According to the means described in claim 15, in the means described in claims 9-14, the output current ratio between the constant current circuit and the current output circuit is set to 1: 4. Such an output current ratio can be easily realized by using transistors of the same size. Further, the current condition of the current output circuit with respect to the constant current circuit can be satisfied by setting the current as small as possible.

  According to the means described in claim 16, the output circuit of the inverting DC amplification unit is connected between the current mirror circuit whose output terminal is the output node, and the high potential side power supply line and the input node of the current mirror circuit. And a sixteenth transistor connected between the high-potential side power supply line and the output node of the current mirror circuit. Since the current flowing through the current mirror circuit is limited by the resistance, even if the output terminal is short-circuited to the high potential side power supply line, the current flowing into the output terminal is limited and protected from overcurrent.

1 is a basic configuration diagram of an operational amplifier showing a first embodiment of the present invention. Specific circuit diagram of operational amplifier Schematic configuration diagram of physical quantity sensor system Output current characteristics of the comparator that limits the high potential side Output current characteristics of the comparator that limits the low potential side I / O characteristics diagram of physical quantity sensor unit FIG. 2 equivalent view showing the second embodiment of the present invention FIG. 1 equivalent view showing a third embodiment of the present invention 2 equivalent diagram 4 equivalent figure Figure equivalent to FIG. Diagram showing a part of the input / output characteristics of the physical quantity sensor unit. FIG. 2 equivalent view showing a fourth embodiment of the present invention FIG. 1 equivalent view showing a fifth embodiment of the present invention 2 equivalent diagram FIG. 1 equivalent view showing a sixth embodiment of the present invention 2 equivalent diagram

(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to FIGS.
FIG. 3 is a schematic configuration diagram of a physical quantity sensor system mounted on a vehicle. The ECU 1 as an electronic control unit supplies a power supply voltage Vcc (for example, 5 V) to the physical quantity sensor unit 2 and inputs a voltage Vo corresponding to a physical quantity such as pressure from the physical quantity sensor unit 2. In the ECU 1, a pull-up resistor 5 or a pull-down resistor 6 is connected between the input terminal of the voltage Vo and the high-potential side power line 3 or the low-potential side power line 4 (ground line). The voltage Vo is converted into a digital signal by the A / D converter 7.

  The physical quantity sensor unit 2 includes a sensing element 8 such as a pressure sensor, an amplifier 9 for amplifying a sensor signal, and an operational amplifier 10 having a voltage follower connection form. The amplifier 9 and the operational amplifier 10 are configured as one IC, but the sensing element 8 may be included in the IC.

  The operational amplifier 10 has a clamping function that limits the output voltage Vo with a high-potential side limit voltage VH (eg, 4.6 V) and a low-potential side limit voltage VL (eg, 0.4 V). The high potential side limiting voltage VH and the low potential side limiting voltage VL may be fixed voltages or voltages that can be changed by a D / A converter (not shown) or the like. The CPU in the ECU 1 detects a physical quantity (pressure) according to the digital signal, and when the digital signal exceeds an upper limit value corresponding to the high potential side limit voltage VH or a lower limit value corresponding to the low potential side limit voltage VL. If it is less than, it is determined as a disconnection state.

  A basic configuration of the operational amplifier 10 is shown in FIG. 1, and a specific circuit configuration thereof is shown in FIG. In these drawings, the first to tenth, fifteenth, and sixteenth transistors referred to in the present invention are represented by T1 to T10, T15, and T16, respectively.

  As shown in FIG. 1, the operational amplifier 10 includes a differential amplifier 11, an inverting DC amplifier 12, a first comparator 13 that clamps the output voltage Vo on the high potential side, and a clamp on the output voltage Vo on the low potential side. The second comparator 14 has a basic configuration. The differential amplifier 11 includes a differential pair 15 including a transistor T1 on the inverting input side and a transistor T2 on the non-inverting input side, a constant current circuit 16 that supplies a constant current to the differential pair 15, and transistors T3 and T4. The current mirror circuit 17 is provided.

  The inverting DC amplifying unit 12 is connected between the output node 18 of the differential amplifying unit 11 and the output terminal 19 of the operational amplifier 10 and is fed back by an impedance element 21 including a phase compensation capacitor 20 from the output to the input. Has been applied. In FIG. 2, the resistance of the impedance element 21 is zero. The inverting DC amplification unit 12 includes a buffer circuit (transistor T19 described later) and an output circuit 22 (see FIG. 2).

  The comparators 13 and 14 are current output type comparators that can output a current larger than the current I output from the constant current circuit 16 to the differential pair 15. The comparator 13 outputs a current to the transistor T4 when the voltage Vo at the output terminal 19 is higher than the high potential side limit voltage VH, and the comparator 14 has the voltage Vo at the output terminal 19 lower than the low potential side limit voltage VL. Sometimes a current is output to the transistor T3.

  The above configuration will be described in more detail. As shown in FIG. 2, a resistor 23, a multi-collector type transistor T17, a differential pair are provided between a pair of high-potential-side power supply line 3 and low-potential-side power supply line 4. 15 and the current mirror circuit 17 are connected in order. The transistor T17 has four collectors and supplies a constant current of 2 × I in total. Two of these collectors are connected to the differential pair 15 to pass a constant current I. The remaining two collectors are connected to the power supply line 4 via transistors T18 and T19, respectively. The transistor T19 is a buffer circuit of the inverting DC amplification unit 12, and its base is connected to the output node 18 of the differential amplification unit 11. The transistor T18 is provided to compensate for the base current of the transistor T19 and ensure the symmetry of the differential amplifier unit 11.

  The output circuit 22 of the inverting DC amplifier 12 includes a current mirror circuit 24 composed of transistors T20 and T21 grounded to the power supply line 4, a resistor 25 connected between the power supply line 3 and the input node of the current mirror circuit 24, and The transistor T15 includes a transistor T16 connected between the power supply line 3 and the output node (output terminal 19) of the current mirror circuit 24. In order to increase the source current capability of the operational amplifier 10, the transistor T16 has a plurality of transistors connected in parallel.

  The bias circuit 26 includes a resistor 27 and transistors T22 and T23 connected in series between the power supply lines 3 and 4, and generates a bias current 2 × I used in the differential amplifier 11 and the comparators 13 and 14. Further, a transistor T24 and a resistor 28 connected in series between the power supply lines 3 and 4 are provided, and a bias current I ′ used in the output circuit 22 is generated. In order to increase the source current capability of the operational amplifier 10 and reduce the current consumption of the operational amplifier 10, the relationship of I <I ′ is set.

  The comparator 13 includes transistors T5 to T8 and transistors T25 and T26. Each of the multi-collector transistors T5 and T6 has two collectors, and the bases of the transistors T5 and T6 and each one collector are connected in common. A transistor T25 that operates as a current output circuit is connected between the common connection node and the power supply line 4. The transistor T25 forms a current mirror circuit together with the transistor T23 of the bias circuit 26, and a 2 × I constant current flows through the transistors T5 and T6.

  Transistors T7 and T8 are connected between the power supply line 3 and the emitters of the transistors T5 and T6, respectively. The high potential side limiting voltage VH is applied to the base of the transistor T7, and the output voltage Vo is applied to the base of the transistor T8. The other collector of the transistor T6 is connected to the collector of the transistor T4 (the output node 18 of the differential amplifier 11), and the other collector of the transistor T5 is connected to the power supply line 4 via the diode-connected transistor T26. It is connected. The transistor T26 is provided to ensure the symmetry of the transistors T5 and T6.

  The comparator 14 has a differential pair 29 including transistors T9 and T10. The low potential side limiting voltage VL is applied to the base of the transistor T9, and the output voltage Vo is applied to the base of the transistor T10. A resistor 30 and a transistor T27 are connected in series between the power supply line 3 and the common emitter of the transistors T9 and T10. The transistor T27 forms a current mirror circuit together with the transistor T24 of the bias circuit 26, and operates as a current output circuit that supplies a constant current of 2 × I to the transistors T9 and T10. The collector of the transistor T10 is connected to the collector of the transistor T3, and the collector of the transistor T9 is connected to the power supply line 4 via the diode-connected transistor T28.

Next, operations and effects of the present embodiment will be described with reference to FIGS.
The differential amplifier 11 amplifies a differential voltage (differential input voltage ΔVin) between the non-inverting input voltage Vinp and the inverting input voltage Vinm and outputs the amplified voltage from the output node 18. The voltage is inverted and amplified and output from the output terminal 19. In this case, since the current flowing to the input side of the current mirror circuit 24 is limited by the resistor 25, the current flowing into the transistor T21 via the output terminal 19 is also limited. Further, the current flowing through the transistor T16 is limited to 3 × I ′. Therefore, protection against a short circuit between the output terminal 19 and the power supply line 3 or the power supply line 4 is achieved.

  FIG. 4 shows the output current characteristics of the comparator 13. In FIG. 4, a characteristic curve roughly expressed for explaining the overall operation of the comparator 13 is indicated by a broken line, and a partial operation thereof (in the vicinity where the voltage Vo coincides with a high potential side limit voltage VH described later). The characteristic curve expressed in detail for explaining the operation of (2) is shown by a solid line. As shown by a broken line in FIG. 4, as the differential input voltage ΔVin becomes positive and the voltage ΔVinh of the output terminal 19 having the high potential side limit voltage VH (4.6 V) as a reference potential increases in the positive direction, the transistor The ratio of the current flowing through the transistor T6 out of the 2 × I current flowing through T25 increases. At this time, the comparator output current flowing through the transistor T6 to the transistor T4 also increases at the same rate. When a current flows into the transistor T4 of the differential amplifier 11, the voltage at the output node 18 increases and the output voltage Vo decreases.

  When the high potential side limiting operation is functioning, most of the output current I of the constant current circuit 16 flows to the transistor T3 on the input side of the current mirror circuit 17 via the transistor T1. In order to limit the output voltage Vo to the high potential side limit voltage VH regardless of the voltage ΔVinh (or the differential input voltage ΔVin), the comparator 13 has a current output capability for outputting a current larger than at least I to the transistor T4. I have.

  The comparator 13 that performs such a high potential side limiting operation actually outputs a current from a point just before the voltage ΔVinh becomes a positive value, as shown by a solid line in FIG. That is, the high-potential side limiting operation gradually starts to function from the time when the voltage Vo at the output terminal 19 is slightly lower than the high-potential side limiting voltage VH. Thereafter, the magnitude of the comparator output current becomes I when the voltage Vo coincides with the high potential side limit voltage VH (voltage ΔVinh = 0). Thus, the transistor T6 of the comparator 13 outputs a current having the same magnitude as the output current I of the constant current circuit 16 to the transistor T4 when the voltage Vo coincides with the high potential side limit voltage VH. , T6 is driven by a 2 × I current flowing through the transistor T25, the current I (= 2 × I−I) also flows through the transistor T5. That is, since the same current flows to the left and right of the differential pair, the offset voltage at the time of clamping (voltage error when the voltage Vo is clamped to the high potential side limit voltage VH) can be reduced.

  FIG. 5 shows the output current characteristic of the comparator 14. In FIG. 5, a characteristic curve roughly expressed for explaining the overall operation of the comparator 14 is indicated by a broken line, and a partial operation thereof (near the voltage Vo coincides with a low potential side limit voltage VL described later). The characteristic curve expressed in detail for explaining the operation of (2) is shown by a solid line. As shown by a broken line in FIG. 5, as the differential input voltage ΔVin becomes negative and the voltage ΔVinl of the output terminal 19 having the low potential side limit voltage VL (0.4 V) as a reference potential increases in the negative direction, the transistor Of the 2 × I current flowing through T27, the ratio of the comparator output current flowing through the transistor T10 to the transistor T3 increases. When a current flows into the transistor T3 of the differential amplifier 11, the voltage at the output node 18 decreases and the output voltage Vo increases.

  When the low potential side limiting operation is functioning, the output current I of the constant current circuit 16 hardly flows to the transistor T1 and can flow through the transistor T2. In order to limit the output voltage Vo to the low potential side limit voltage VL regardless of the voltage ΔVinl (or the differential input voltage ΔVin), the comparator 14 has a current output capability for outputting a current larger than at least I to the transistor T3. I have.

  The comparator 14 that performs such a low potential side limiting operation actually outputs a current from a point just before the voltage ΔVinl becomes a negative value, as shown by a solid line in FIG. That is, the low potential side limiting operation starts to function gradually from the time when the voltage Vo of the output terminal 19 is slightly lower than the low potential side limiting voltage VL. Thereafter, the magnitude of the comparator output current becomes I when the voltage Vo coincides with the low potential side limit voltage VL (voltage ΔVinl = 0). Thus, the transistor T10 of the comparator 14 outputs a current having the same magnitude as the output current I of the constant current circuit 16 to the transistor T3 when the voltage Vo coincides with the low potential side limit voltage VL. , T10 is driven by a current of 2 × I flowing through the transistor T27, so that a current I (= 2 × II) also flows through the transistor T9. That is, since the same current flows to the left and right of the differential pair, the offset voltage at the time of clamping (voltage error when the voltage Vo is clamped to the low potential side limit voltage VL) can be reduced.

  FIG. 6 shows input / output characteristics of the physical quantity sensor unit 2. The horizontal axis indicates the physical quantity (pressure), and the vertical axis indicates the output voltage Vo of the operational amplifier 10. The output voltage Vo changes in proportion to the physical quantity and is clamped by the high potential side limit voltage VH and the low potential side limit voltage VL.

  As described above, the operational amplifier 10 of the present embodiment controls the current of the current mirror circuit 17 constituting the differential amplifier 11 to clamp the output voltage Vo, so that the differential amplification that changes according to the current control The output of the unit 11 is output after being subjected to an integrating action by the capacitor 20 of the inverting DC amplification unit 12. As a result, compared with the conventional configuration in which the base of the output transistor T16 is directly controlled, oscillation is less likely to occur and a stable voltage limiting operation is possible.

  In this case, the comparator 13 that restricts the high potential side and the comparator 14 that restricts the low potential side can output a current larger than the output current I of the constant current circuit 16 constituting the differential amplifying unit 11. The output voltage Vo can be reliably clamped regardless of the magnitude of the voltage ΔVin.

  The maximum output current of the comparators 13 and 14 is set to a value twice the current I flowing from the constant current circuit 16 to the differential pair 15. According to such a current ratio of 1: 2, the above-described current condition can be satisfied with a current setting as small as possible. Of course, the resistors 23, 27, and 30 may be set as appropriate to obtain a current ratio of 1: k (k> 1). Note that the output voltage Vo can be limited even when k <2 at a current ratio of 1: k (k> 1). However, if the offset voltage at the time of clamping and its temperature characteristics are taken into consideration, the current ratio of 1: 2 It is preferable that

(Second Embodiment)
Next, a second embodiment of the present invention will be described with reference to FIG.
FIG. 7 is a circuit diagram of an operational amplifier composed of MOSFETs. The first to fourth and ninth to sixteenth transistors in the present invention are represented by M1 to M4 and M9 to M16. This operational amplifier 31 is also used in the physical quantity sensor system shown in FIG.

  The operational amplifier 31 includes a differential amplifier 32, an inverted DC amplifier 33, a first comparator 34 that clamps the output voltage Vo on the high potential side, a second comparator 35 that clamps the output voltage Vo on the low potential side, and a bias. The circuit 36 is configured. The differential amplifying unit 32 includes a differential pair 37 including a transistor M1 on the inverting input side and a transistor M2 on the non-inverting input side, a transistor M17 (corresponding to a constant current circuit) that supplies a constant current to the differential pair 37, and A current mirror circuit 38 including transistors M3 and M4 is provided.

  The inverting DC amplification unit 33 is connected between the output node 39 of the differential amplification unit 32 and the output terminal 40 of the operational amplifier 31 and is fed back by an impedance element 42 including a phase compensation capacitor 41. . The inverting DC amplifying unit 33 includes a buffer circuit 43 and an output circuit 44. The buffer circuit 43 includes a transistor M18 that operates as a constant current circuit, and a transistor M19 having a gate connected to the output node 39. The output circuit 44 includes transistors M15, M16, M20, and M21 and a resistor 45, similarly to the output circuit 22 shown in FIG. The transistors M20 and M21 constitute a current mirror circuit 46.

  The bias circuit 36 includes a transistor M22, a resistor 47, and a transistor M23 connected in series between the power supply lines 3 and 4, and generates a bias current I. Each circuit in the operational amplifier 31 operates using this bias current I.

  The comparator 34 includes a differential pair 48 including transistors M11 and M12. The high potential side limiting voltage VH is applied to the gate of the transistor M11, and the output voltage Vo is applied to the gate of the transistor M12. A transistor M25 is connected between the common source of the transistors M11 and M12 and the power supply line 4. The transistor M25 and the transistor M23 of the bias circuit 36 constitute a current mirror circuit. Since two transistors of the same size are connected in parallel, a constant current of 2 × I is supplied to the transistors M11 and M12.

  The transistors M13 and M14 constitute a current mirror circuit 49. The input side transistor M13 is connected between the power supply line 3 and the drain of the transistor M12, and the output side transistor M14 is connected between the power supply line 3 and the drain of the transistor M4 (the output node 18 of the differential amplifier 11). It is connected to the. A transistor M26 is connected between the power supply line 3 and the drain of the transistor M11.

  The comparator 35 includes transistors M9, M10, M27, and M28 in substantially the same manner as the comparator 35 shown in FIG. The transistors M9 and M10 constitute a differential pair 50. The transistor M27 and the transistor M22 of the bias circuit 36 constitute a current mirror circuit. Since two transistors of the same size are connected in parallel, a constant current of 2 × I is supplied to the transistors M9 and M10.

  In the above configuration, 2 × I flowing through the transistor M25 of the comparator 34 as the differential input voltage ΔVin becomes positive and the voltage ΔVinh of the output terminal 40 having the high potential side limit voltage VH as a reference potential increases in the positive direction. The ratio of the current flowing through the transistors M13 and M12 becomes larger. At this time, the comparator output current flowing to the transistor M4 via the transistor M14 also increases at the same rate. When a current flows into the transistor M4 of the differential amplifying unit 32, the voltage at the output node 39 increases, the output voltage Vo decreases, and is clamped at the high potential side limit voltage VH. The operation of the comparator 35 is the same as the operation of the comparator 14 and is therefore omitted.

  Also according to this embodiment, the same effect as that of the first embodiment can be obtained, oscillation is hardly generated, and a stable voltage limiting operation is possible. Further, as described in the first embodiment, the comparators 34 and 35 are required to output a current larger than the output current of the transistor M17 (constant current circuit) included in the differential amplifier 32. In the operational amplifier 31, the magnitude of the current is set according to the number of parallel connections of basic transistors of the same size based on the current flowing through the transistors M22 and M23, so that the transistors M25 and M27 are connected in parallel as shown in FIG. By setting the number of connections to 2, the above current condition can be satisfied with a current setting as small as possible.

(Third embodiment)
Next, a third embodiment of the present invention will be described with reference to FIGS.
In addition, the same code | symbol is attached | subjected about the part which is the same as that of 1st Embodiment, or an equivalent part, and the description is abbreviate | omitted. FIG. 8 shows a basic configuration of an operational amplifier (operational amplifier) according to this embodiment, and FIG. 9 shows a specific circuit configuration thereof. In these drawings, the seventeenth to twenty-seventh transistors referred to in the present invention are represented by T31 to T41, respectively.

  As shown in FIG. 8, the operational amplifier 61 includes comparators 62 and 63 instead of the comparators 13 and 14. The comparators 62 and 63 are current output type comparators that can output a current larger than the current I output from the constant current circuit 16 to the differential pair 15. The first comparator 62 outputs a source current to the transistor T4 when the voltage Vo at the output terminal 19 is higher than the high-potential side limit voltage VH, and the second comparator 63 has a low potential at the voltage Vo at the output terminal 19. When the voltage is lower than the side limit voltage VL, a sink current is output to the transistor T4. Note that the source current and the sink current in this specification are currents when the comparator is mainly used, and the flowing directions are indicated by arrows in the drawing.

  As shown in FIG. 9, the bias circuit 64 included in the operational amplifier 61 is different from the bias circuit 26 of the first embodiment in that a resistor 65 is provided instead of the resistor 27. As a result, the bias circuit 64 generates a bias current 4 × I used in the comparators 62 and 63. The comparator 62 is different from the comparator 13 of the first embodiment in that transistors T31 to T36 are provided instead of the transistor T26. The transistor T25 forms a current mirror circuit together with the transistor T23 of the bias circuit 64, and functions as a current output circuit that supplies a constant current of 4 × I to the transistors T5 and T6.

  Between the other collectors of the transistors T5 and T6 and the power supply line 4, transistors T31 and T32 forming the input side and the output side of the current mirror circuit 66 are connected. The other collector of the transistor T5 is connected to the power supply line 4 via a diode-connected transistor T33, and the other collector of the transistor T6 is connected to the power supply line 4 via a diode-connected transistor T34. Yes. Between the power supply line 3 and the power supply line 4, a transistor T36 and a transistor T35 which forms a current mirror circuit 67 together with the transistor T34 are connected in order. The multi-collector type transistor T36 has two collectors, and the base and one collector are connected in common. The other collector of the transistor T36 is connected to the collector of the transistor T4 of the differential amplifier 11.

  The comparator 63 is different from the comparator 14 of the first embodiment in that transistors T37 to T41 are provided instead of the transistor T28. A resistor 68 and a transistor T27 are connected in series between the power supply line 3 and the common emitter of the transistors T9 and T10. The transistor T27 forms a current mirror circuit together with the transistor T24 of the bias circuit 64, and operates as a current output circuit that supplies a constant current of 4 × I to the transistors T9 and T10.

  Between the collectors of the transistors T9 and T10 and the power supply line 4, transistors T37 and T38 forming the input side and output side of the current mirror circuit 69 are connected. The collector of the transistor T9 is connected to the power supply line 4 via a diode-connected transistor T39, and the collector of the transistor T10 is connected to the power supply line 4 via a diode-connected transistor T40. The transistor T41 constitutes a current mirror circuit 70 together with the transistor T40, and the collector thereof is connected to the collector of the transistor T4 of the differential amplifying unit 11.

Next, operations and effects of the present embodiment will be described with reference to FIGS.
FIG. 10 shows the output current characteristic of the comparator 62, which is equivalent to FIG. 4 in the first embodiment. As indicated by a broken line in FIG. 10, as the voltage ΔVinh of the output terminal 19 having the high potential side limit voltage VH as a reference potential increases in the positive direction, the current flows through the transistor T6 out of the 4 × I current flowing through the transistor T25. The ratio of current increases, and the current flowing through each of the transistors T31 and T33 (current obtained by dividing the current flowing through the transistor T5 into two equal parts) decreases. Then, the current starts to flow through the transistor T34 when the current flowing through the transistor T6 exceeds the current flowing through the transistor T31. Along with this, current starts to flow to the transistor T4 via the transistor T36. Thus, when a current flows into the transistor T4 of the differential amplifier 11, the voltage at the output node 18 rises, the output voltage Vo falls, and is clamped at the high potential side limit voltage VH.

  When the high potential side limiting operation is functioning, most of the output current I of the constant current circuit 16 flows to the transistor T3 on the input side of the current mirror circuit 17 via the transistor T1. In order to limit the output voltage Vo to the high-potential side limiting voltage VH regardless of the voltage ΔVinh (or the differential input voltage ΔVin), the comparator 62 has a current output capability for outputting a source current larger than at least I to the transistor T4. It has. Therefore, during the period when the high potential side limiting operation functions, the output voltage Vo is mainly composed of the comparator 62 (second differential amplifier), not the differential amplifier 11 (first differential amplifier). Is in a state (corresponding to a voltage follower) in which a control operation is performed so as to coincide with the high potential side limit voltage VH.

  The comparator 62 that performs such a high potential side limiting operation actually outputs a current from the time immediately before the voltage ΔVinh becomes a positive value, as shown by a solid line in FIG. That is, the high potential side limiting operation starts to function from the time when the voltage Vo of the output terminal 19 is slightly lower than the high potential side limiting voltage VH. Thereafter, when the voltage Vo coincides with the high potential side limit voltage VH (voltage ΔVinh = 0), that is, when a current of 2 × I flows through each of the transistors T5 and T6, each of the currents of I flows through the transistors T31 to T34. Flowing. As a result, the magnitude of the comparator output current (the collector current of the transistor T36) becomes I. Thus, the comparator 62 outputs a current having the same magnitude as the output current I of the constant current circuit 16 to the transistor T4 when the voltage Vo coincides with the high potential side limit voltage VH, so that the offset voltage (voltage Vo Can be reduced) when the voltage is clamped to the high potential side limit voltage VH.

  FIG. 11 shows the output current characteristic of the comparator 63, which corresponds to FIG. 5 in the first embodiment. As indicated by the solid line in FIG. 11, as the voltage ΔVinl of the output terminal 19 having the low potential side limit voltage VL as the reference potential increases in the negative direction, the current flows through the transistor T10 out of the 4 × I current flowing through the transistor T27. The ratio of the current increases, and the current flowing through each of the transistors T37 and T39 (current obtained by dividing the current flowing through the transistor T9 into two equal parts) decreases. Then, the current starts to flow through the transistor T40 when the current flowing through the transistor T10 exceeds the current flowing through the transistor T37. Accordingly, the current that has been flowing from the transistor T2 to the transistor T4 starts to flow to the transistor T41. When the current is sucked from the transistor T2 of the differential amplifying unit 11 in this way, the voltage at the output node 18 decreases, the output voltage Vo increases, and is clamped to the low potential side limit voltage VL.

  When the low potential side limiting operation is functioning, the output current I of the constant current circuit 16 hardly flows to the transistor T1 and can flow through the transistor T2. In order to limit the output voltage Vo to the low-potential side limit voltage VL regardless of the voltage ΔVinl (or the differential input voltage ΔVin), the comparator 63 has a current output capability that outputs at least a sink current larger than I to the transistor T3. It has. Therefore, during the period in which the low potential side limiting operation functions, the output voltage Vo is mainly composed of the comparator 63 (second differential amplifier), not the differential amplifier 11 (first differential amplifier). Is in a state (corresponding to a voltage follower) in which a control operation is performed so as to match the low potential side limit voltage VL.

  The comparator 63 that performs such a low potential side limiting operation actually outputs a current immediately before the voltage ΔVinl becomes a negative value, as shown by a solid line in FIG. That is, the low-potential side limiting operation starts to function from the time when the voltage Vo of the output terminal 19 is slightly higher than the low-potential side limiting voltage VL. Thereafter, when the voltage Vo coincides with the low potential side limit voltage VL (voltage ΔVinl = 0), that is, when a current of 2 × I flows through each of the transistors T9 and T10, a current of I flows through each of the transistors T37 to T40. Flowing. As a result, the magnitude of the comparator output current (the collector current of the transistor T41) becomes I. Thus, the comparator 63 outputs a current having the same magnitude as the output current I of the constant current circuit 16 to the transistor T3 when the voltage Vo coincides with the low potential side limit voltage VL. Therefore, the offset voltage (voltage Vo Can be reduced) when the voltage is clamped to the low potential side limit voltage VL.

  FIG. 12 shows an enlarged view of the input / output characteristics of the physical quantity sensor unit 2 where the output voltage Vo is in the vicinity of the low potential limit voltage VL. The horizontal axis represents the physical quantity (pressure), and the vertical axis represents the output voltage Vo. In FIG. 12, a solid line represents a characteristic curve when the operational amplifier 61 of the present embodiment is used, and a broken line represents a characteristic curve when the operational amplifier 10 of the first embodiment is used.

  As shown by the broken line in FIG. 12, when the operational amplifier 10 is used in the physical quantity sensor unit 2, the low potential side limiting operation starts to function gradually from the time when the output voltage Vo is slightly higher than the low potential side limiting voltage VL. Vo is gently clamped at the lower potential limit voltage VL. On the other hand, as shown by the solid line in FIG. 12, when the operational amplifier 61 is used in the physical quantity sensor unit 2, the low potential side limiting operation starts to function from the time when the output voltage Vo is slightly higher than the low potential side limiting voltage VL. . For this reason, when the operational amplifier 61 is used, the voltage Vo is clamped after approaching the low potential side limit voltage VL, compared to the case where the operational amplifier 10 is used. Although not shown, the characteristics of the portion where the output voltage Vo is in the vicinity of the high potential side limit voltage VH are the same as those in the case of the vicinity of the low potential side limit voltage VL. That is, according to the present embodiment, the range in which the relationship between the physical quantity and the output voltage Vo is linear is widened as compared with the first embodiment.

  Also according to this embodiment, the same effect as that of the first embodiment can be obtained, oscillation is hardly generated, and a stable voltage limiting operation is possible. The maximum output current of the comparators 62 and 63 is set to a value four times the current I flowing from the constant current circuit 16 to the differential pair 15, and the transistor T33 includes transistors T31 and T32 constituting a current mirror circuit. Assuming the same characteristics, the transistor T39 is assumed to have the same characteristics as the transistors T37 and T38 constituting the current mirror circuit. According to such a current ratio of 1: 4, the above-described current condition can be satisfied with a current setting as small as possible. Of course, the resistors 23, 65, and 68 may be appropriately set to obtain a current ratio of 1: k (k> 1). Note that the output voltage Vo can be limited even when k <4 at a current ratio of 1: k (k> 1). However, if the offset voltage at the time of clamping and its temperature characteristics are taken into consideration, the current ratio of 1: 4 It is preferable that Furthermore, according to the present embodiment, the range in which the relationship between the physical quantity and the output voltage Vo is linear is expanded, so that the physical quantity sensor unit 2 can obtain an output with less error with respect to the input physical quantity. There is an effect of widening.

(Fourth embodiment)
Next, a fourth embodiment of the present invention will be described with reference to FIG.
FIG. 13 is a circuit diagram in the case where the operational amplifier 61 shown in FIGS. 8 and 9 is configured by a MOSFET. Note that the same or corresponding parts as those of the operational amplifier 31 of the second embodiment shown in FIG. The first to fourth, ninth to sixteenth, twenty-third to twenty-seventh, and twenty-ninth to thirty-first transistors referred to in the present invention are represented by M1 to M4, M9 to M16, M37 to M41, and M49 to M51.

  As shown in FIG. 13, the operational amplifier 71 is different from the operational amplifier 31 in that comparators 72 and 73 are provided instead of the comparators 34 and 35. The comparator 72 is different from the comparator 34 in that a transistor M48 is provided instead of the transistor M25 and a transistor M49 to M51 is provided instead of the transistor M26.

  The transistor M48 forms a current mirror circuit together with the transistor M23 of the bias circuit 36. The transistor M48 functions as a current output circuit for supplying a 4 × I constant current to the transistors M11 and M12 because four transistors of the same size are connected in parallel. Transistors M49 and M50 forming the input side and the output side of the current mirror circuit 74 are connected between the power supply line 3 and the drains of the transistors M11 and M12. The drain of the transistor M11 is connected to the power supply line 3 via a diode-connected transistor M51.

  The comparator 73 includes transistors M9, M10, M37 to M41, and M52 in substantially the same manner as the comparator 63 shown in FIG. The transistor M52 forms a current mirror circuit together with the transistor M22 of the bias circuit 36. The transistor M52 functions as a current output circuit for supplying a constant current of 4 × I to the transistors M9 and M10 because four transistors of the same size are connected in parallel.

  In the above configuration, as the voltage ΔVinh of the output terminal 40 having the high potential side limit voltage VH as the reference potential increases in the positive direction, the current flowing to the transistor M12 out of the 4 × I current flowing to the transistor M48 of the comparator 72. And the current flowing through each of the transistors M49 and M51 (current obtained by dividing the current flowing through the transistor M11 into two equal parts) decreases. Then, the current starts to flow through the transistor M13 when the current flowing through the transistor M12 exceeds the current flowing through the transistor M49. Along with this, a current starts to flow to the transistor M4 via the transistor M14. Thus, when a current flows into the transistor M4 of the differential amplifying unit 32, the voltage at the output node 39 rises, the output voltage Vo falls, and is clamped at the high potential side limit voltage VH. Since the operation of the comparator 73 is the same as that of the comparator 63, a description thereof will be omitted.

  Also according to the present embodiment, the same operation as that of the third embodiment can be obtained, oscillation is hardly generated, and a stable voltage limiting operation is possible. Further, as described in the third embodiment, the comparators 72 and 73 need to output a current that is larger than the output current of the transistor M17 (constant current circuit) included in the differential amplifier 32. In the operational amplifier 71, the magnitude of the current is set according to the number of parallel connections of the basic transistors of the same size based on the current flowing through the transistors M22 and M23, so that the transistors M48 and M52 are connected in parallel as shown in FIG. By setting the number of connections to 4, the above current condition can be satisfied with a current setting as small as possible.

(Fifth embodiment)
Next, a fifth embodiment of the present invention will be described with reference to FIGS.
In addition, the same code | symbol is attached | subjected about the same or equivalent part as said each embodiment, and the description is abbreviate | omitted. FIG. 14 shows a basic configuration of an operational amplifier (operational amplifier) according to this embodiment, and FIG. 15 shows a specific circuit configuration thereof.

  As shown in FIG. 14, the operational amplifier 81 includes comparators 82 and 63 instead of the comparators 13 and 14. The comparator 82 is a current output type comparator capable of outputting a current larger than the current I output from the constant current circuit 16 to the differential pair 15. The first comparator 82 outputs a sink current to the transistor T3 when the voltage Vo at the output terminal 19 is higher than the high potential side limit voltage VH.

  As shown in FIG. 15, the comparator 82 differs from the comparator 62 of the third embodiment in that the transistor T36 is deleted. The collector of the transistor T35 is connected to the collector of the transistor T3 of the differential amplifying unit 11.

Next, the operation and effect of this embodiment will be described.
In the above configuration, as the voltage ΔVinh at the output terminal 19 having the high potential side limit voltage VH as the reference potential increases in the positive direction, the ratio of the current flowing through the transistor T6 out of the 4 × I current flowing through the transistor T25 increases. The current increases and the current flowing through each of the transistors T31 and T33 decreases. Then, the current starts to flow through the transistor T34 when the current flowing through the transistor T6 exceeds the current flowing through the transistor T31. Along with this, the current flowing from the transistor T1 to the transistor T3 starts to flow to the transistor T35. When the current is sucked in from the transistor T1 of the differential amplifying unit 11 in this way, the current flowing through the transistors T3 and T4 constituting the current mirror circuit is decreased and the voltage at the output node 18 is increased. Decreases and is clamped to the high potential side limit voltage VH.

  As in the comparator 62 of the third embodiment, the comparator 82 that performs such a high potential side limiting operation outputs the output current I of the constant current circuit 16 when the voltage Vo matches the high potential side limiting voltage VH. Is output to the transistor T3, the offset voltage can be reduced. As described above, according to the present embodiment, the same operation as that of the third embodiment is obtained, oscillation is not easily generated, and a stable voltage limiting operation is possible.

(Sixth embodiment)
Next, a sixth embodiment of the present invention will be described with reference to FIGS.
In addition, the same code | symbol is attached | subjected about the same or equivalent part as said each embodiment, and the description is abbreviate | omitted. FIG. 16 shows a basic configuration of an operational amplifier (operational amplifier) according to this embodiment, and FIG. 17 shows a specific circuit configuration thereof.

  As shown in FIG. 16, the operational amplifier 91 includes comparators 82 and 92 instead of the comparators 13 and 14. The comparator 92 is a current output type comparator capable of outputting a current larger than the current I output from the constant current circuit 16 to the differential pair 15. The second comparator 92 outputs a source current to the transistor T3 when the voltage Vo at the output terminal 19 is lower than the low potential side limit voltage VL.

  The inverting input terminal of the comparator 82 and the non-inverting input terminal of the comparator 92 are supplied with a high potential side limiting voltage VH and a low potential side limiting voltage VL through impedance elements Z1 and Z2, respectively. The voltage Vo of the output terminal 19 is applied to the non-inverting input terminal of the comparator 82 and the inverting input terminal of the comparator 92 via impedance elements Z3 and Z4, respectively. The output terminals of the comparators 82 and 92 are connected to the collector of the transistor T3 via impedance elements Z5 and Z6, respectively. The impedance elements Z1 to Z6 are, for example, resistance elements. In FIG. 17, the resistance values of the impedance elements Z1 to Z6 are set to zero and are not shown.

  As shown in FIG. 17, the comparator 92 is different from the comparator 63 of the third embodiment in that a transistor T42 (equivalent to a 28th transistor) is added. Between the power supply line 3 and the power supply line 4, a transistor T42 and a transistor T41 are sequentially connected. The multi-collector type transistor T42 has two collectors, and the base and one collector are connected in common. The other collector of the transistor T42 is connected to the collector of the transistor T3 of the differential amplifier 11.

Next, the operation and effect of this embodiment will be described.
In the above configuration, as the voltage ΔVinl at the output terminal 19 having the low potential side limit voltage VL as the reference potential increases in the negative direction, the proportion of the current flowing through the transistor T10 out of the 4 × I current flowing through the transistor T27 increases. The current increases and the current flowing through each of the transistors T37 and T39 decreases. Then, the current starts to flow through the transistor T40 when the current flowing through the transistor T10 exceeds the current flowing through the transistor T37. Along with this, current starts to flow to the transistor T3 via the transistor T42. Thus, when a current flows into the transistor T3 of the differential amplifying unit 11, the voltage at the output node 18 decreases, the output voltage Vo increases, and is clamped to the low potential side limit voltage VL.

  The comparator 92 that performs such a low-potential side limiting operation, like the comparator 63 of the third embodiment, outputs the output current I of the constant current circuit 16 when the voltage Vo matches the low-potential side limiting voltage VL. Is output to the transistor T3, the offset voltage can be reduced. As described above, according to the present embodiment, the same operation as that of the third embodiment is obtained, oscillation is not easily generated, and a stable voltage limiting operation is possible.

  The comparators 82 and 92 are configured to input signals via the impedance elements Z1 to Z4 and to output signals via the impedance elements Z5 and Z6. The resistance values of these impedance elements Z1 to Z6 can be adjusted to function as a damping resistor. Further, when the operational amplifier 91 is configured as a semiconductor integrated circuit, if these impedance elements Z1 to Z6 are formed as diffused resistors, the wirings can be crossed without using aluminum wiring. In the first to fifth embodiments, these impedance elements Z1 to Z6 may be used.

(Other embodiments)
The present invention is not limited to the embodiments described above and shown in the drawings, and can be modified or expanded as follows, for example.
In the first embodiment, only one of the comparators 13 and 14 may be provided.
In the second embodiment, only one of the comparators 34 and 35 may be provided.
In the third embodiment, only one of the comparators 62 and 63 may be provided.
In the fourth embodiment, only one of the comparators 72 and 73 may be provided.
In the fifth embodiment, only one of the comparators 82 and 63 may be provided.
In the sixth embodiment, only one of the comparators 82 and 92 may be provided.
A resistance may be added to the impedance elements 21 and 42.
In the first embodiment, the currents flowing through the constant current circuit 16 and the comparators 13 and 14 of the differential amplifying unit 11 are set by the resistors 23, 27, and 30. However, as in the second embodiment, the basics of the same size are used. The current may be set according to the number of transistors connected in parallel.

The current mirror circuit is not limited to the circuit configuration shown in each embodiment. For example, the current mirror circuit composed of bipolar transistors may have a configuration including a base current compensation circuit (configuration composed of three transistors).
In each of the above embodiments, the differential pair of the differential amplifier unit is configured by a PNP type or P channel type transistor. However, the differential pair of the differential amplifier unit may be configured by an NPN type or N channel type transistor. Good. However, in that case, when the output voltage Vo is higher than the high-potential side limit voltage VH, the first comparator can output a current in a direction that suppresses the voltage drop of the output node of the differential amplifier. It is necessary to change the polarity of the transistor or change the connection. In addition, the polarity of the transistors of each circuit is set so that the second comparator can output a current in a direction that suppresses the voltage increase at the output node of the differential amplifier when the output voltage Vo is lower than the low potential side limit voltage VL. It is necessary to change the connection or connection.
The impedance elements Z3 and Z4 may be combined into one if possible. That is, if the input terminals of the first and second comparators are connected in common, one impedance element may be provided in front of the common connection node. Similarly to the impedance elements Z3 and Z4, the impedance elements Z5 and Z6 may be combined into one.

  In the drawing, 3 is a high potential side power line, 4 is a low potential side power line, 10, 31, 61, 71, 81 and 91 are operational amplifiers (operational amplifiers), 11 and 32 are differential amplifiers, and 12 and 33 are Inverted DC amplifier, 13, 34, 62, 72, 82 are first comparators, 14, 35, 63, 73, 92 are second comparators, 15, 29, 37, 48, 50 are differential pairs, 16 Is a constant current circuit, 17, 24, 38, 46, 49, 66, 67, 69, 70, 74 to 76 are current mirror circuits, 18, 39 are output nodes, 19, 40 are output terminals, and 20, 41 are capacitors. , 21 and 42 are impedance elements, 22 and 44 are output circuits, 25 and 45 are resistors, T1 to T10, T15 and T16, and T31 to T42 are 1st to 10th, 15th, 16th, 17th to 28th. Transistor, T19 is a transistor (Buffer circuit), T25, T27, M25, M27, M48, and M52 are transistors (current output circuits), M1 to M4, M9 to M16, M37 to M41, and M49 to M51 are first to fourth, ninth to ninth. The 16th, 23rd to 27th, 29th to 31st transistors, and M17, are transistors (constant current circuits).

Claims (16)

A first transistor on the inverting input side and a second transistor on the non-inverting input side constituting the differential pair, and an input side and an output side of the current mirror circuit are respectively connected to the first and second transistors. A differential amplifying unit comprising third and fourth transistors and a constant current circuit for supplying a constant current to the differential pair and the current mirror circuit;
An inverting DC amplifier connected between an output node and an output terminal of the differential amplifier, and fed back by an impedance element including a capacitor;
A first comparator capable of outputting a current larger than the output current of the constant current circuit;
The first comparator outputs a current in a direction to suppress a voltage drop at the output node to the third transistor when the voltage at the output terminal is higher than a high-potential-side limit voltage, and the output terminal An operational amplifier comprising: one of comparators that outputs to the fourth transistor a current directed to suppress a voltage drop at the output node when the voltage is higher than a high-potential-side limiting voltage. . A first transistor on the inverting input side and a second transistor on the non-inverting input side constituting the differential pair, and an input side and an output side of the current mirror circuit are respectively connected to the first and second transistors. A differential amplifying unit comprising third and fourth transistors and a constant current circuit for supplying a constant current to the differential pair and the current mirror circuit;
An inverting DC amplifier connected between an output node and an output terminal of the differential amplifier, and fed back by an impedance element including a capacitor;
A second comparator capable of outputting a current larger than the output current of the constant current circuit;
The second comparator outputs a current directed to the third transistor to suppress an increase in voltage at the output node when the voltage at the output terminal is lower than a low-side limit voltage, and the output terminal An operational amplifier comprising: one of comparators that outputs to the fourth transistor a current directed to suppress an increase in the voltage at the output node when the voltage is lower than a low potential side limit voltage. . A first transistor on the inverting input side and a second transistor on the non-inverting input side constituting the differential pair, and an input side and an output side of the current mirror circuit are respectively connected to the first and second transistors. A differential amplifying unit comprising third and fourth transistors and a constant current circuit for supplying a constant current to the differential pair and the current mirror circuit;
An inverting DC amplifier connected between an output node and an output terminal of the differential amplifier, and fed back by an impedance element including a capacitor;
A first comparator capable of outputting a current larger than an output current of the constant current circuit;
A second comparator capable of outputting a current larger than the output current of the constant current circuit;
The first comparator outputs a current in a direction to suppress a voltage drop at the output node to the third transistor when the voltage at the output terminal is higher than a high-potential-side limit voltage, and the output terminal It is constituted by any one of comparators that output a current directed to suppress the voltage drop of the output node to the fourth transistor when the voltage is higher than the high-potential side limit voltage,
The second comparator outputs a current directed to the third transistor to suppress an increase in voltage at the output node when the voltage at the output terminal is lower than a low-side limit voltage, and the output terminal An operational amplifier comprising: one of comparators that outputs to the fourth transistor a current directed to suppress an increase in the voltage at the output node when the voltage is lower than a low potential side limit voltage. . In the differential amplifier, the constant current circuit, the first and second transistors, and the third and fourth transistors are connected between a pair of high-potential-side power lines and low-potential-side power lines. Configured,
When the first comparator is composed of a comparator that outputs current to the fourth transistor, the comparator
A pair of multi-collector transistors, each of which has a collector and a base connected to each other;
The seventh and eighth terminals are respectively connected between the high-potential-side power supply line and the emitters of the fifth and sixth transistors, and the high-potential-side limiting voltage and the voltage of the output terminal are applied to the base. A transistor,
A current output circuit capable of outputting a current larger than an output current of the constant current circuit and connected between a common connection node of the fifth and sixth transistors and the low-potential-side power line; ,
4. The operational amplifier according to claim 1, wherein another collector of the sixth transistor is connected to a collector of the fourth transistor. In the differential amplifier, the constant current circuit, the first and second transistors, and the third and fourth transistors are connected between a pair of high-potential-side power lines and low-potential-side power lines. Configured,
When the second comparator is composed of a comparator that outputs current to the third transistor, the comparator
Ninth and tenth transistors constituting a differential pair and having the low-potential-side limiting voltage and the output terminal voltage applied to the base;
A current output circuit capable of outputting a current larger than an output current of the constant current circuit and connected between the high potential side power supply line and the emitters of the ninth and tenth transistors;
4. The operational amplifier according to claim 2, wherein the collector of the tenth transistor is connected to the collector of the third transistor. In the differential amplifier, the constant current circuit, the first and second transistors, and the third and fourth transistors are connected between a pair of high-potential-side power lines and low-potential-side power lines. Configured,
When the first comparator is composed of a comparator that outputs current to the fourth transistor, the comparator
An eleventh transistor and a twelfth transistor that constitute a differential pair and have the gates applied with the high-potential-side limiting voltage and the output terminal voltage;
Input side and output side transistors constituting a current mirror circuit, the thirteenth transistor and the high potential side power supply line connected between the high potential side power supply line and the drain of the twelfth transistor, A fourteenth transistor connected between the drain of the fourth transistor;
A current output circuit capable of outputting a current larger than the output current of the constant current circuit and connected between the sources of the eleventh and twelfth transistors and the low-potential-side power line; The operational amplifier according to claim 1 or 3, wherein In the differential amplifier, the constant current circuit, the first and second transistors, and the third and fourth transistors are connected between a pair of high-potential-side power lines and low-potential-side power lines. Configured,
When the second comparator is composed of a comparator that outputs current to the third transistor, the comparator
Ninth and tenth transistors constituting a differential pair and having the gate thereof applied with the low-potential-side limiting voltage and the output terminal voltage;
A current output circuit capable of outputting a current larger than an output current of the constant current circuit and connected between the high-potential-side power line and the sources of the ninth and tenth transistors;
4. The operational amplifier according to claim 2, wherein the drain of the tenth transistor is connected to the drain of the third transistor.   8. The operational amplifier according to claim 4, wherein an output current ratio between the constant current circuit and the current output circuit is set to 1: 2. In the differential amplifier, the constant current circuit, the first and second transistors, and the third and fourth transistors are connected between a pair of high-potential-side power lines and low-potential-side power lines. Configured,
When the first comparator is composed of a comparator that outputs current to the fourth transistor, the comparator
A pair of multi-collector transistors, each of which has a collector and a base connected to each other;
The seventh and eighth terminals are respectively connected between the high-potential-side power supply line and the emitters of the fifth and sixth transistors, and the high-potential-side limiting voltage and the voltage of the output terminal are applied to the base. A transistor,
A current output circuit capable of outputting a current larger than an output current of the constant current circuit and connected between a common connection node of the fifth and sixth transistors and the low-potential-side power line;
Seventeenth and eighteenth transistors connected between another collector of the fifth and sixth transistors and the low-potential side power supply line, respectively, and forming the input side and the output side of the current mirror circuit;
A nineteenth transistor in the form of a diode connection connected between another collector of the fifth transistor and the low-potential side power line;
A twentieth transistor in the form of a diode connection connected between another collector of the sixth transistor and the low-potential side power line;
A twenty-first transistor that is grounded to the low-potential-side power line and forms a current mirror circuit together with the twentieth transistor;
A multi-collector transistor connected between the high-potential-side power line and the twenty-first transistor, wherein one collector is commonly connected to a base and the other collector is connected to the fourth transistor. 4. The operational amplifier according to claim 1, further comprising a twenty-second transistor connected to the collector. In the differential amplifier, the constant current circuit, the first and second transistors, and the third and fourth transistors are connected between a pair of high-potential-side power lines and low-potential-side power lines. Configured,
When the first comparator is composed of a comparator that outputs current to the third transistor, the comparator
A pair of multi-collector transistors, each of which has a collector and a base connected to each other;
The seventh and eighth terminals are respectively connected between the high-potential-side power supply line and the emitters of the fifth and sixth transistors, and the high-potential-side limiting voltage and the voltage of the output terminal are applied to the base. A transistor,
A current output circuit capable of outputting a current larger than an output current of the constant current circuit and connected between a common connection node of the fifth and sixth transistors and the low-potential-side power line;
Seventeenth and eighteenth transistors connected between another collector of the fifth and sixth transistors and the low-potential side power supply line, respectively, and forming the input side and the output side of the current mirror circuit;
A nineteenth transistor in the form of a diode connection connected between another collector of the fifth transistor and the low-potential side power line;
A twentieth transistor in the form of a diode connection connected between another collector of the sixth transistor and the low-potential side power line;
And a twenty-first transistor connected to the collector of the third transistor. The twenty-first transistor forms a current mirror circuit together with the twentieth transistor. The operational amplifier according to claim 1 or 3. In the differential amplifier, the constant current circuit, the first and second transistors, and the third and fourth transistors are connected between a pair of high-potential-side power lines and low-potential-side power lines. Configured,
When the second comparator is composed of a comparator that outputs current to the fourth transistor, the comparator
Ninth and tenth transistors constituting a differential pair and having the low-potential-side limiting voltage and the output terminal voltage applied to the base;
A current output circuit capable of outputting a current larger than an output current of the constant current circuit and connected between the high-potential side power supply line and the emitters of the ninth and tenth transistors;
23rd and 24th transistors connected between the collectors of the 9th and 10th transistors and the low potential side power supply line, respectively, and forming the input side and the output side of the current mirror circuit;
A 25th transistor in the form of a diode connection connected between the collector of the ninth transistor and the low potential side power line;
A twenty-sixth transistor in the form of a diode connection connected between the collector of the tenth transistor and the low-potential-side power line;
And a twenty-seventh transistor having a collector connected to the collector of the fourth transistor. The twenty-sixth transistor forms a current mirror circuit together with the twenty-sixth transistor. The operational amplifier according to claim 2 or 3. In the differential amplifier, the constant current circuit, the first and second transistors, and the third and fourth transistors are connected between a pair of high-potential-side power lines and low-potential-side power lines. Configured,
When the second comparator is composed of a comparator that outputs current to the third transistor, the comparator
Ninth and tenth transistors constituting a differential pair and having the low-potential-side limiting voltage and the output terminal voltage applied to the base;
A current output circuit capable of outputting a current larger than an output current of the constant current circuit and connected between the high-potential side power supply line and the emitters of the ninth and tenth transistors;
23rd and 24th transistors connected between the collectors of the 9th and 10th transistors and the low potential side power supply line, respectively, and forming the input side and the output side of the current mirror circuit;
A 25th transistor in the form of a diode connection connected between the collector of the ninth transistor and the low potential side power line;
A twenty-sixth transistor in the form of a diode connection connected between the collector of the tenth transistor and the low-potential-side power line;
A twenty-seventh transistor that is grounded to the low-potential-side power line and forms a current mirror circuit together with the twenty-sixth transistor;
A multi-collector transistor connected between the high-potential side power supply line and the 27th transistor, wherein one collector is connected in common with the base, and the other collector is connected to the third transistor. The operational amplifier according to claim 2, further comprising a twenty-eighth transistor connected to the collector. In the differential amplifier, the constant current circuit, the first and second transistors, and the third and fourth transistors are connected between a pair of high-potential-side power lines and low-potential-side power lines. Configured,
When the first comparator is composed of a comparator that outputs current to the fourth transistor, the comparator
An eleventh transistor and a twelfth transistor that constitute a differential pair and have the gates applied with the high-potential-side limiting voltage and the output terminal voltage;
Input side and output side transistors constituting a current mirror circuit, the thirteenth transistor and the high potential side power supply line connected between the high potential side power supply line and the drain of the twelfth transistor, A fourteenth transistor connected between the drain of the fourth transistor;
A current output circuit capable of outputting a current larger than the output current of the constant current circuit and connected between the sources of the eleventh and twelfth transistors and the low-potential-side power line;
29th and 30th transistors connected between the high potential side power supply line and the drains of the 11th and 12th transistors, respectively, forming the input side and the output side of the current mirror circuit;
4. The operational amplifier according to claim 1, further comprising a thirty-first transistor having a diode connection connected between the high-potential side power supply line and a drain of the eleventh transistor. . In the differential amplifier, the constant current circuit, the first and second transistors, and the third and fourth transistors are connected between a pair of high-potential-side power lines and low-potential-side power lines. Configured,
When the second comparator is composed of a comparator that outputs current to the fourth transistor, the comparator
Ninth and tenth transistors constituting a differential pair and having the gate thereof applied with the low-potential-side limiting voltage and the output terminal voltage;
A current output circuit capable of outputting a current larger than an output current of the constant current circuit and connected between the high potential side power supply line and the sources of the ninth and tenth transistors;
23rd and 24th transistors respectively connected between the drains of the ninth and tenth transistors and the low-potential-side power supply line and forming the input side and the output side of the current mirror circuit;
A 25th transistor in the form of a diode connection connected between the drain of the ninth transistor and the low potential side power line;
A twenty-sixth transistor in the form of a diode connection connected between the drain of the tenth transistor and the low potential side power line;
And a twenty-seventh transistor having a drain connected to the drain of the fourth transistor. The twenty-sixth transistor forms a current mirror circuit together with the twenty-sixth transistor. The operational amplifier according to claim 2 or 3.   15. The operational amplifier according to claim 9, wherein an output current ratio between the constant current circuit and the current output circuit is set to 1: 4. The inverting DC amplification unit is composed of a buffer circuit and an output circuit,
The output circuit is
A current mirror circuit having the output terminal as an output node;
A resistor and a fifteenth transistor connected between the high potential side power supply line and an input node of the current mirror circuit;
16. The operational amplifier according to claim 4, comprising: a sixteenth transistor connected between the high potential side power supply line and an output node of the current mirror circuit.

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