JP2010114275A - Solid-state imaging device, drive method of solid-state imaging device, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state imaging device which achieves fine pixel size and increases a saturation charge amount (Qs) and sensitivity, a drive method of the solid-state imaging device, and an electronic apparatus using the solid-state imaging device. <P>SOLUTION: The solid-state imaging device includes: plural photodiodes PD formed in different depths in a substrate 10 while respectively having a junction surface between a first conductivity type impurity region and a second conductivity type impurity region. Further, the solid-state imaging device has a vertical transistor Tr formed along the depth for reading out signal charge accumulated in the photodiodes PD. The solid-state imaging device has an overflow path 21 for connecting a plurality of photodiodes (for example, a first photodiode PD1 and a second photodiode PD2) to each other and a photodiodes PD and a floating diffusion region 16 to each other when electric charge is accumulated in the photodiodes PD. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device, a driving method for the solid-state imaging device, and an electronic apparatus including the solid-state imaging device.

  As a solid-state imaging device, a CMOS type solid-state imaging device is known. In this CMOS type solid-state imaging device, one pixel is constituted by a photodiode and a plurality of MOS transistors. A solid-state imaging device having a plurality of pixels is configured by arranging a plurality of pixels in a required pattern. This photodiode is a photoelectric conversion element that generates and accumulates signal charges according to the amount of received light, and the plurality of MOS transistors are elements for transferring signal charges from the photodiodes.

  In recent years, pixel size miniaturization has been promoted in CMOS-type solid-state imaging devices. However, in a CMOS type solid-state imaging device, in each pixel region, a plurality of MOS transistors such as photodiodes and charge readout transistors are arranged on the same plane. There is a tendency for the area to increase. For this reason, it is difficult to reduce the pixel size, and when the pixel size is reduced, the area of the photodiode is reduced, which leads to a decrease in saturation charge amount and a decrease in sensitivity. There was a problem.

  Patent Document 1 below describes a configuration in which a pn junction formed between high-concentration regions of a photodiode is provided inside a semiconductor substrate. Here, the channel portion of the charge readout transistor for reading out the signal charge is formed in the depth direction with respect to the semiconductor substrate surface, and the bottom portion of the gate electrode and the gate insulating film of the readout transistor is the depth of the pn junction. It is formed at a position higher than this. In Patent Document 1, by using such a configuration, even if the pixel area is reduced, the area of the photodiode can be maintained large, and the saturation charge amount is not reduced.

However, in the solid-state imaging device of Patent Document 1, the potential for complete transfer to one photodiode that accumulates signal charges is determined in one pixel, and the saturation charge amount (Qs) cannot be increased beyond a certain level. . That is, a configuration in which the pixel size can be miniaturized and the saturation charge amount (Qs) can be improved at a time cannot be achieved.
Japanese Patent Laying-Open No. 2005-223084

  In view of the above-described points, the present invention provides a solid-state imaging device in which the pixel size can be reduced, the saturation charge amount (Qs) is increased, and the sensitivity is improved, and a driving method of the solid-state imaging device. It is to provide. In addition, the present invention provides an electronic device using the solid-state imaging device.

  In order to solve the above-mentioned problems and achieve the object of the present invention, the solid-state imaging device of the present invention has a junction surface between the first conductivity type impurity region and the second conductivity type impurity region at different depths in the semiconductor substrate. A plurality of photodiodes are formed. A vertical transistor including a gate insulating film, a read gate electrode, a transfer channel, and a floating diffusion region is included. The charge readout gate electrode is formed through a gate insulating film in the depth direction from the surface of the semiconductor substrate. The transfer channel transfers signal charges read from a plurality of photodiodes. The floating diffusion region is a region for accumulating signal charges transferred by the transfer channel. Furthermore, the solid-state imaging device of the present invention has an overflow path that connects between a plurality of photodiodes and between the photodiodes and the floating diffusion region during charge accumulation in the photodiodes.

  In the solid-state imaging device of the present invention, when the signal charge is accumulated, the signal charge exceeding the saturation charge amount of one photodiode is transferred to the other photodiode or the floating diffusion region through the overflow path. In addition, since the plurality of photodiodes are provided, the total saturation charge amount can be increased. Further, since the plurality of photodiodes are formed in the depth direction of the semiconductor substrate, the pixel size can be reduced.

  In the driving method of the solid-state imaging device of the present invention, first, signal charges are accumulated in the photodiode by irradiating light to a plurality of photodiodes formed in the depth direction in the semiconductor substrate. When the signal charge is accumulated, the signal charge that exceeds the saturation charge amount in one photodiode is transferred to another photodiode or floating diffusion region via the overflow path. When the signal charge accumulation is completed, the signal charges accumulated in the plurality of photodiodes are simultaneously transferred to the floating diffusion region.

  In the driving method of the solid-state imaging device of the present invention, the signal charge exceeding the saturation charge amount of one photodiode can be transferred to the other photodiode or the floating diffusion region when the signal charge is accumulated. As a result, the saturation charge amount of the entire photodiode is improved, and the dynamic range can be increased.

The electronic device of the present invention includes an optical lens, a solid-state imaging device, and a signal processing circuit. The solid-state imaging device includes a plurality of photodiodes formed at different depths in the semiconductor substrate and having a junction surface between the first conductivity type impurity region and the second conductivity type impurity region. A vertical transistor including a gate insulating film, a read gate electrode, a transfer channel, and a floating diffusion region is included. The charge readout gate electrode is formed through a gate insulating film in the depth direction from the surface of the semiconductor substrate. The transfer channel transfers signal charges read from a plurality of photodiodes. The floating diffusion region is a region for accumulating signal charges transferred by the transfer channel. Furthermore, the solid-state imaging device of the present invention has an overflow path that connects between a plurality of photodiodes and between the photodiodes and the floating diffusion region during charge accumulation in the photodiodes.
The signal processing circuit processes an output signal of the solid-state imaging device.

  In the electronic device according to the present invention, when the signal charge is accumulated in the solid-state imaging device, the signal charge exceeding the saturation charge amount of one photodiode is transferred to the other photodiode or the floating diffusion region through the overflow path. Is done. In addition, since the plurality of photodiodes are provided, the total saturation charge amount can be increased.

  According to the present invention, it is possible to obtain a solid-state imaging device in which the saturation charge amount (Qs) is increased, the sensitivity is improved, and the pixel size is easily miniaturized. In addition, according to the present invention, an electronic device with higher image quality can be obtained by using a solid-state imaging device capable of improving the saturation charge amount (Qs) and sensitivity and capable of reducing the pixel size. Can do.

  Hereinafter, an embodiment of the present invention will be described with reference to FIGS.

[Overall structure of solid-state imaging device]
First, the overall structure of a CMOS solid-state imaging device, that is, a CMOS image sensor to which the first and second embodiments described below are applied will be described with reference to FIG.

  A solid-state imaging device 1 shown in FIG. 1 includes an imaging region 3 composed of a plurality of pixels 2 arranged on a substrate 30 made of Si, a vertical drive circuit 4 as a peripheral circuit of the imaging region 3, and column signal processing. The circuit 5 includes a horizontal drive circuit 6, an output circuit 7, a control circuit 8, and the like.

  The pixels 2 are composed of photodiodes that are photoelectric conversion elements and a plurality of MOS transistors, and a plurality of pixels 2 are regularly arranged in a two-dimensional array on the substrate 30.

  The imaging region 3 is composed of pixels 2 regularly arranged in a two-dimensional array. The imaging area 3 is an optical area that is actually received light and can store signal charges generated by photoelectric conversion, and an optical area that is formed around the effective pixel area and serves as a reference for the black level. And a black reference pixel region for outputting black.

  The control circuit 8 generates a clock signal, a control signal, and the like that serve as a reference for operations of the vertical drive circuit 4, the column signal processing circuit 5, the horizontal drive circuit 6, and the like based on the vertical synchronization signal, the horizontal synchronization signal, and the master clock. To do. The clock signal and control signal generated by the control circuit 8 are input to the vertical drive circuit 4, the column signal processing circuit 5, the horizontal drive circuit 6, and the like.

  The vertical drive circuit 4 is configured by a shift register, for example, and selectively scans each pixel 2 in the imaging region 3 in the vertical direction sequentially in units of rows. Then, the pixel signal based on the signal charge generated according to the amount of light received in the photodiode of each pixel 2 is supplied to the column signal processing circuit 5 through the vertical signal line.

  The column signal processing circuit 5 is arranged, for example, for each column of the pixels 2, and a signal output from the pixels 2 for one row is sent to the black reference pixel region (not shown, but around the effective pixel region) for each pixel column. Signal processing such as noise removal and signal amplification. A horizontal selection switch (not shown) is provided between the output stage of the column signal processing circuit 5 and the horizontal signal line 31.

  The horizontal drive circuit 6 is constituted by, for example, a shift register, and sequentially outputs horizontal scanning pulses to select each of the column signal processing circuits 5 in order, and the pixel signal is output from each of the column signal processing circuits 5 to the horizontal signal line. 31 to output.

The output circuit 7 performs signal processing and outputs the signals sequentially supplied from each of the column signal processing circuits 5 through the horizontal signal line 31.
The solid-state imaging device described below constitutes the solid-state imaging device 1 in FIG. 1, and particularly shows a cross-sectional configuration of pixels in an effective imaging region.

<First Embodiment>
[Configuration of solid-state imaging device]
FIG. 2 shows a schematic cross-sectional configuration of the solid-state imaging device according to the first embodiment of the present invention. FIG. 2 shows a cross-sectional configuration for one pixel.

[Constitution]
The solid-state imaging device according to the present embodiment has a junction surface between a p-type impurity region of the first conductivity type and an n-type impurity region of the second conductivity type at different depths in the semiconductor substrate 10. The photodiode includes a plurality of stacked layers, a vertical transistor Tr, and an overflow path 21.
Hereinafter, the configuration of the solid-state imaging device according to the present embodiment will be described in detail.

The semiconductor substrate 10 is made of a semiconductor material made of a p-type impurity region (p).
The photodiode PD includes an n-type low-concentration impurity region (hereinafter referred to as an n ⁻ region) 11 formed in the semiconductor substrate 10 and a first n-type impurity region sequentially stacked on the surface side of the n ⁻ region 11. 12, a first p-type high concentration impurity region 13, a second n-type impurity region 14, and a second p-type high concentration impurity region 15. The photodiode PD has a junction surface between the first n-type impurity region 12 and the first p-type high-concentration impurity region 13 to constitute the first photodiode PD1. Further, the second photodiode PD2 is formed having a junction surface between the second n-type impurity region 14 and the second p-type high concentration impurity region 15. As described above, in this embodiment, the photodiode PD including the first photodiode PD1 and the second photodiode PD2 is configured in the depth direction in the semiconductor substrate 10.

  The vertical transistor includes a read gate electrode 18 formed via a gate insulating film 17, a floating diffusion region 16, and a transfer channel 20.

The read gate electrode 18 is formed in a column shape at a depth reaching the first p-type high concentration impurity region 13 constituting the first photodiode PD1 from the surface of the semiconductor substrate 10. That is, the read gate electrode 18 is formed vertically from the surface of the semiconductor substrate 10 to the second photodiode PD2 and the first photodiode PD1 formed in the depth direction. As can be seen from the planar configuration of each layer shown in FIG. 3, in this embodiment, the readout gate electrode 18 is formed at the center of the first photodiode PD1 and the second photodiode PD2 constituting the pixel. . The gate insulating film 17 is formed to extend between the read gate electrode 18 and the semiconductor substrate 10 and on the surface of the semiconductor substrate 10.
The readout gate electrode 18 formed in a columnar shape has a groove formed in a columnar shape at a depth reaching the first p-type high-concentration impurity region 13 from the surface side of the semiconductor substrate 10 via a gate insulating film 17. It is formed by embedding polysilicon. As the gate insulating film 17, a silicon oxide film or the like can be used.

The floating diffusion region 16 is formed of an n-type high concentration impurity region (n ⁺ ) and is formed on the surface of the semiconductor substrate 10.

The transfer channel 20 is composed of an n-type low-concentration impurity region (n ⁻ ), and is formed in a part along the read gate electrode 18 formed in the semiconductor substrate 10 via the gate insulating film 17. The transfer channel 20 is formed so as to be in contact with the floating diffusion region 16 and the first and second n-type impurity regions 12 and 14 constituting the first and second photodiodes PD1 and PD2. The second n-type impurity region 14 is provided so as to be closer to the read gate electrode 18 in the transfer channel 20 region. When the second n-type impurity region 14 is completely in contact with the read gate electrode 18 via the gate insulating film 17, the junction capacitance increases, and the efficiency is improved when the signal charge is transferred through the transfer channel 20. Go down. However, it is possible to further increase the saturation charge amount of the second photodiode PD2 by configuring the second n-type impurity region 14 close to the read gate electrode 18 without contacting it.

  In this vertical transistor Tr, the potential of the transfer channel 20 changes when a positive voltage is applied to the read gate electrode 18. Therefore, the signal charges accumulated in the first and second photodiodes PD1 and PD2 constituting the photodiode PD are transferred through the transfer channel 20 and read out to the floating diffusion region 16.

  FIG. 4 shows the impurity concentrations of the first photodiode PD1, the second photodiode PD2, and the floating diffusion region 16 of the solid-state imaging device according to this embodiment. The horizontal axis in FIG. 4 is the depth from the surface of the semiconductor substrate 10, and the vertical axis is the impurity concentration.

As shown in FIG. 4, the impurity concentration of the first n-type impurity region (n) 12 constituting the first photodiode PD1 is 10 ¹⁷ / cm ³ . The impurity concentration of the first p-type high concentration impurity region (p ⁺ ) 13 constituting the first photodiode PD1 is 10 ¹⁷ to 10 ¹⁸ / cm ³ . The impurity concentration of the second n-type impurity region (n) 14 constituting the second photodiode PD2 is 10 ¹⁷ / cm ³ . The impurity concentration of the second p-type high concentration impurity region (p ⁺ ) 15 constituting the second photodiode PD2 is 10 ¹⁸ to 10 ¹⁹ / cm ³ . The impurity concentration of the n-type high concentration impurity region (n ⁺ ) constituting the floating diffusion region 16 is 10 ²⁰ / cm ³ or more. Since the impurity concentration shown in FIG. 4 is expressed in logarithm, the order of the first n-type impurity region 12 and the second n-type impurity region 14 is the same. The impurity concentration in the region 14 is about twice as high.

  With the impurity concentration distribution shown in FIG. 4, the second n-type impurity region 14 is completely depleted. By adopting an impurity concentration distribution that can completely deplete the second n-type impurity region 14, the second n-type impurity region 14 is transferred when the signal charge accumulated in the second n-type impurity region 14 is transferred. Can be completely depleted again, so that all signal charges can be transferred. Thus, by completely depleting the second n-type impurity region 14, the residual signal charge is not mixed with the signal charge accumulated next, and the afterimage can be eliminated.

  Further, by making the concentration distribution shown in FIG. 4, the signal charges accumulated in the first and second photodiodes PD <b> 1 and PD <b> 2 formed in the depth direction of the semiconductor substrate 10 are read out to the floating diffusion region 16. Efficiency can be improved.

  Further, when a plurality of layers of p-type impurity regions and n-type impurity regions are formed by ion implantation, the impurity regions at deep positions of the semiconductor substrate 10 tend to spread and the concentration tends to be low. Therefore, the impurity concentration distribution as in this embodiment is easy to manufacture.

  In addition, by forming the second n-type impurity region 14 constituting the second photodiode PD2 so as to be closer to the read gate electrode 18, the impurity concentration near the read gate electrode 18 is increased. For this reason, electrons can be accumulated near the readout gate electrode 18 and transfer is facilitated.

In this embodiment, the transfer channel 20 also serves as the overflow path 21. The overflow path 21 is a path for transferring the signal charge exceeding the saturation charge amount of one photodiode to the other photodiode or the floating diffusion region 16 when the signal charge is accumulated in the photodiode PD. It is used as That is, the overflow path 21 electrically connects the first and second photodiodes PD1 and PD2 and the floating diffusion region 16 when the signal charge is accumulated in the photodiode PD.
Here, in the present embodiment example, when one photodiode is the first photodiode PD1, the other photodiode can be regarded as the second photodiode PD2.

On the surface of the semiconductor substrate 10, source / drain regions of other MOS transistors constituting one pixel are formed by n-type high concentration impurity regions (n ⁺ ) 19. Examples of the MOS transistor include a selection transistor, a reset transistor, and an amplification transistor. In FIG. 2, only one source / drain region constituting a MOS transistor formed in one pixel is representatively shown.

  The solid-state imaging device of this embodiment may be used as a back-illuminated solid-state imaging device or a front-illuminated solid-state imaging device. FIG. 5 shows a schematic cross-sectional configuration in the case of a back-illuminated solid-state imaging device.

As shown in FIG. 5, a desired wiring layer is formed on the surface side of the semiconductor substrate 10 with an interlayer insulating film 29 interposed therebetween. In the example shown in FIG. 5, three layers of wirings 1M to 3M are formed. Further, desired wirings are connected to each other through the contact portion.
A p-type high concentration impurity region 25 is formed on the back side of the semiconductor substrate 10 so as to be in contact with the n ⁻ region 11 constituting the photodiode PD. Further, on the back side of the semiconductor substrate 10, for example, a passivation film 26 made of SiN, a color filter 27, and an on-chip lens 28 are formed in this order.

[Driving method]
Hereinafter, the driving method will be described by taking as an example a case where the solid-state imaging device of the present embodiment is a back-illuminated type.

  First, the light L is irradiated from the back surface side of the solid-state imaging device shown in FIG. Then, the light collected by the on-chip lens 28 is incident on the photodiode PD via the color filter 27.

The light incident on the photodiode PD is photoelectrically converted in the n ⁻ region 11, the first photodiode PD1, and the second photodiode PD2, and signal charges are generated. The generated signal charge is accumulated in the first n-type impurity region 12 constituting the first photodiode PD1 or the second n-type impurity region 14 constituting the second photodiode PD2. In the solid-state imaging device according to the present embodiment, the bottom of the readout gate electrode 18 is configured to be in contact with the first p-type high-concentration impurity region 13 through the gate insulating film 17, and readout is performed when signal charges are accumulated. A negative voltage is applied to the gate electrode 18 in advance. By doing so, holes are pinned at the bottom of the read gate electrode 18 via the gate insulating film 17. As described above, the pinning of holes, or the occurrence of hole pinning, causes dark current noise entering from the bottoms of the read gate electrode 18 and the gate insulating film 17 during the accumulation of signal charges to the first p-type high concentration impurity region. 13 can be confined. As a result, dark current reaching the first photodiode PD1 and the second photodiode PD2 can be reduced.

  6A to 6E show potential distribution diagrams along the line PP ′ in FIG. 2, and the potential formed by the first n-type impurity region 12 and the second n-type impurity region 14 during signal charge accumulation. The state of signal charges accumulated in each well is shown. In the solid-state imaging device of this embodiment, as shown in FIGS. 6A to E, the first photodiode PD1 formed on the deep side of the semiconductor substrate 10 has a higher potential than the second photodiode PD2. . The potential well formed by the first photodiode PD1 is shallower than the potential well formed by the second photodiode PD2.

  As shown in FIG. 6A, the signal charge generated by photoelectric conversion in the photodiode PD is first accumulated in a potential well formed by the first n-type impurity region 12. When intense light is irradiated, the generated signal charge increases and exceeds the saturation charge amount of the first n-type impurity region 12. In such a case, as shown in FIG. 6B, the signal charge e overflowing from the potential well formed by the first n-type impurity region 12 passes through the overflow path 21 in the second n-type impurity region 14. It is transferred to the configured potential well. 6A to 6E, the signal charge e exceeding the saturation charge amount of the first n-type impurity region 12 is completely transferred to the second n-type impurity region 14.

  Then, as shown in FIG. 6C, the signal charge e exceeding the saturation charge amount of the potential well constituted by the first n-type impurity region 12 is transferred to the floating diffusion region 16. Then, as shown in FIG. 6D, the signal charge e transferred to the floating diffusion region 16 is reset by the reset voltage applied to the floating diffusion region 16. That is, in the present embodiment, the signal charge e exceeding the saturation charge amount of the first and second photodiodes PD1 and PD2 is transferred to the floating diffusion region 16 and reset there.

  After the signal charge is accumulated, a positive voltage is applied to the read gate electrode 18. Then, as shown in FIG. 6E, the potential of the transfer channel 20 that also serves as the overflow path 21 becomes deeper. As a result, the signal charges accumulated in the first n-type impurity region 12 and the second n-type impurity region 14 are transferred through the transfer channel 20 and simultaneously read out to the floating diffusion region 16.

  The subsequent driving method is the same as that of a normal solid-state imaging device. That is, the signal charge is transferred to the floating diffusion region 16, and the voltage change in the floating diffusion region 16 is amplified by an amplification transistor (not shown) and output.

In the solid-state imaging device according to the present embodiment, two photodiodes including the first and second photodiodes PD1 and PD2 are formed in the depth direction of the semiconductor substrate 10. An overflow path 21 is formed between the first photodiode PD1, the second photodiode PD2, and the floating diffusion region 16 so that signal charges can be transferred during signal accumulation. As a result, the signal charge overflowing beyond the saturation charge amount of one photodiode is accumulated in the other photodiode. With such a configuration, the saturation charge amount of the entire photodiode PD increases. For this reason, it becomes possible to improve the sensitivity of a solid-state imaging device.
If the signal charge overflows due to another photodiode, it is transferred to the floating diffusion region 16 and reset by applying a reset voltage.

  In the solid-state imaging device according to the present embodiment, the vertical transistor Tr having the readout gate electrode 18 embedded in the depth direction of the photodiode PD is configured. As a result, the signal charges accumulated in the first and second photodiodes PD1 and PD2 formed in the depth direction of the semiconductor substrate 10 can be completely transferred to the floating diffusion region 16.

  In the solid-state imaging device according to the present embodiment, the example is configured by two photodiodes including the first photodiode PD1 and the second photodiode PD2, but a desired number of two or more photodiodes are provided. A plurality of layers can be stacked. Even when the pixel size is miniaturized, the saturation charge amount (Qs) can be increased and the sensitivity can be improved by stacking a plurality of photodiodes. Therefore, it is easy to reduce the pixel size while increasing the saturation charge amount and improving the sensitivity, and the structure of this embodiment is advantageous for reducing the pixel size. Further, the saturation charge amount can be increased and the dynamic range can be increased, so that the contrast can be improved.

  Furthermore, in the case of a back-illuminated solid-state imaging device, the side on which a plurality of pixel transistors constituting the solid-state imaging device are configured and the light incident side are on the opposite side. In the case of the surface irradiation type, since an opening area is necessary on the surface of the semiconductor substrate 10, the formation position of the pixel transistor formed on the surface of the semiconductor substrate 10 is limited. However, in the case of a back-illuminated solid-state imaging device, since the pixel transistors and wirings are not arranged on the light incident side, the area of the photodiode PD can be increased, and when the pixel size is reduced, the design rule Not affected. Furthermore, since the photodiode on the surface side can be formed deep in the semiconductor substrate 10, the influence of the defect level on the surface of the semiconductor substrate 10 can be reduced.

  In the solid-state imaging device of the present embodiment, the bottoms of the readout gate electrode 18 and the gate insulating film 17 are formed to a depth reaching the first p-type high concentration impurity region. However, the read gate electrode 18 only needs to be formed to a depth that allows the signal charge accumulated in the first photodiode PD1 to be read. For example, the first n-type impurity region 12 and the first p-type high-concentration impurity region 13 can be formed to reach the junction surface. However, when the read gate electrode 18 and the n-type impurity region are in contact with each other, the reading capacity is lowered when the signal charge is read, so that the coupling capacitance increases. As in this embodiment, the read efficiency can be improved by configuring the read gate electrode 18 and the bottom of the gate insulating film 17 so as not to contact the n-type impurity region.

  In this embodiment, as shown in FIG. 7, in the photodiode PD formed in the depth direction of the semiconductor substrate 10, the second n-type impurity region 14 is replaced with the first and second p-type regions. It may be formed by separating the read gate electrode 18 from the read gate electrode 18 by the same distance as the high concentration impurity regions 13 and 15.

<Second actual form>
[Configuration of solid-state imaging device]
FIG. 8 shows a schematic cross-sectional configuration of a solid-state imaging device according to the second embodiment of the present invention. In FIG. 8, parts corresponding to those in FIG.

  In the solid-state imaging device according to the present embodiment, the overflow path 22 is configured by an n-type impurity region formed in part of the first p-type high concentration impurity region 13 and the second p-type high concentration impurity region 15. It is an example. The overflow path 22 is formed by ion-implanting n-type impurities into part of the first and second p-type high concentration impurity regions 13. The n-type impurity region formed in the first p-type high-concentration impurity region electrically connects the first n-type impurity region 12 and the second n-type impurity region 14. The n-type impurity region formed in the second p-type high-concentration impurity region 15 electrically connects the second n-type impurity region 14 and the floating diffusion region 16.

  In the solid-state imaging device according to the present embodiment, the signal charge overflowing from the potential well formed by the first n-type impurity region 12 is formed in the first p-type high-concentration impurity region 13 when the signal charge is accumulated. It is accumulated in the second n-type impurity region 14 through the overflow path 22 formed. Then, the signal charge that overflows also in the potential well formed by the second n-type impurity region 14 passes through the overflow path 22 formed in the second p-type high-concentration impurity region 15, and then the floating diffusion region 16. And reset here.

  Then, after accumulating signal charges, a positive voltage is applied to the read gate electrode 18. Then, as in the first embodiment, the potential of the transfer channel 20 that also serves as the overflow path 21 becomes deeper. As a result, the signal charges accumulated in the first n-type impurity region 12 and the second n-type impurity region 14 are transferred through the transfer channel 20 and simultaneously read out to the floating diffusion region 16.

  Also in the solid-state imaging device according to this embodiment, the same effects as those of the first embodiment can be obtained. In the present embodiment, the overflow path 22 is configured as an n-type impurity region. However, any region having a potential capable of transferring an overflowing signal charge during charge signal accumulation may be used. A low impurity region can also be used.

  The configuration of the overflow path of the present invention is not limited to the configuration of the overflow path in the first embodiment and the second embodiment described above. Any signal charge may be used as long as the signal charge overflows beyond the saturation charge amount of each photodiode during the accumulation of the signal charge.

  In the above-described embodiment of the solid-state imaging device, the case where the present invention is applied to an image sensor in which unit pixels that detect signal charges corresponding to the amount of visible light as physical quantities are arranged in a matrix has been described as an example. However, the present invention is not limited to application to an image sensor, and can be applied to all column-type solid-state imaging devices in which a column circuit is arranged for each pixel column of a pixel array section.

In addition, the present invention is not limited to application to a solid-state imaging device that detects the distribution of the amount of incident light of visible light and captures an image as an image. It can be applied to an imaging device. In a broad sense, the present invention can be applied to all solid-state imaging devices (physical quantity distribution detection devices) such as a fingerprint detection sensor that senses other physical quantity distributions such as pressure and capacitance and captures images as images.
Furthermore, the present invention is not limited to a solid-state imaging device that sequentially scans each unit pixel of the pixel array unit in units of rows and reads a pixel signal from each unit pixel. For example, the present invention can also be applied to an XY address type solid-state imaging device that selects an arbitrary pixel in pixel units and reads a signal from the selected pixel in pixel units.
Note that the solid-state imaging device may be formed as a single chip, or may be in a modular form having an imaging function in which an imaging unit and a signal processing unit or an optical system are packaged together. Good.

  In addition, the present invention is not limited to application to a solid-state imaging device, but can also be applied to an imaging device. Here, the imaging apparatus refers to a camera system such as a digital still camera or a video camera, or an electronic device having an imaging function such as a mobile phone. Note that the above-described module form mounted on an electronic device, that is, a camera module may be used as an imaging device.

<Third Embodiment>
[Electronics]
Hereinafter, an embodiment in which the above-described solid-state imaging device of the present invention is used in an electronic apparatus will be described. In the following description, an example in which the solid-state imaging device described in the first embodiment or the second embodiment is used as a camera will be described as an example.

FIG. 9 shows a schematic cross-sectional configuration of a camera according to the third embodiment of the present invention. The camera according to the present embodiment is an example of a video camera that can shoot a still image or a moving image.
The camera according to this embodiment includes a solid-state imaging device 1, an optical lens 110, a shutter device 111, a drive circuit 112, and a signal processing circuit 113.

The optical lens 110 forms image light (incident light) from the subject on the imaging surface of the solid-state imaging device 1. As a result, the signal charge is accumulated in the solid-state imaging device 1 for a certain period. The optical lens 110 may be an optical lens system including a plurality of optical lenses.
The shutter device 111 controls a light irradiation period and a light shielding period for the solid-state imaging device 1.
The drive circuit 112 supplies a drive signal that controls the transfer operation of the solid-state imaging device 1 and the shutter operation of the shutter device 111. Signal transfer of the solid-state imaging device 1 is performed by a drive signal (timing signal) supplied from the drive circuit 112. The signal processing circuit 113 performs various signal processing. The video signal subjected to the signal processing is stored in a storage medium such as a memory or output to a monitor.

  Conventionally, as the pixel size is reduced, the saturation charge amount of the photodiode due to the decrease in the aperture ratio is reduced, and the downsizing of the electronic device and the improvement in the image quality are contradictory. However, in the camera according to this embodiment, the pixel size can be reduced in the solid-state imaging device while increasing the saturation charge amount (Qs) and improving the sensitivity. For this reason, the electronic device can be reduced in size and an electronic device with higher image quality can be obtained. That is, it is possible to reduce the size, increase the resolution, and improve the image quality of the electronic device.

  In the above-described solid-state imaging devices according to the first to third embodiments, the present invention is applied to the solid-state imaging device whose signal charge is an electron. However, the solid-state imaging device whose signal charge is a hole. It can also be applied to. In that case, the above-described example can be implemented with the first conductivity type being n-type and the second conductivity type being p-type.

1 is a schematic diagram illustrating an overall configuration of a solid-state imaging device according to an embodiment of the present invention. 1 is a cross-sectional configuration diagram of a solid-state imaging device according to a first embodiment of the present invention. It is a block diagram when seeing the plane which follows each cross section of the solid-state imaging device which concerns on AD. It is an impurity concentration distribution map of the solid-state imaging device concerning a 1st embodiment of the present invention. It is a figure at the time of applying the solid-state imaging device concerning the 1st Embodiment of this invention to a back irradiation type. FIGS. 3A to 3D are diagrams schematically showing potentials and accumulated signal charges as seen in the p-p ′ cross section of FIG. 2. 4 shows another example of the solid-state imaging device according to the first embodiment. It is a cross-sectional block diagram of the solid-state imaging device which concerns on the 2nd Embodiment of this invention. It is a schematic block diagram of the electronic device (camera) which concerns on the 3rd Embodiment of this invention.

Explanation of symbols

  1 .... Solid-state imaging device 2 .... Pixel 3 .... Imaging area 4 .... Vertical drive circuit 5 .... Column signal processing circuit 6 .... Horizontal drive circuit 7 .... Output circuit 8 .... Control Circuit 9... Vertical signal line 31.. Horizontal signal line 10... Semiconductor substrate 11... N-region 12... First n-type impurity region 13. Impurity region, 14... Second n-type impurity region, 15... Second p-type high concentration impurity region, PD 1... First photodiode, PD 2... Second photodiode, 17. Membrane, 18 ... Read gate electrode, 20 ... Transfer channel, 21 ... Overflow path

Claims (10)

A plurality of photodiodes having a junction surface between the first conductivity type impurity region and the second conductivity type impurity region at different depths in the semiconductor substrate;
A vertical charge readout gate electrode formed in the depth direction from the surface of the semiconductor substrate via a gate insulating film; a transfer channel for transferring signal charges read from the plurality of photodiodes; and the transfer channel A vertical transistor composed of a floating diffusion region for storing the signal charge transferred by
An overflow path connecting between the plurality of photodiodes and between the photodiodes and the floating diffusion region, when storing charges in the photodiodes;
A solid-state imaging device.   The solid-state imaging device according to claim 1, wherein the transfer channel also serves as an overflow path.   The solid-state imaging device according to claim 2, wherein the plurality of photodiodes are formed by alternately stacking a plurality of first conductivity type impurity regions and second conductivity type impurity regions in the semiconductor substrate.   The transfer channel is formed of a second conductivity type impurity region, and is formed so as to be in contact with all the second conductivity type impurity regions constituting the floating diffusion and the photodiode along the readout gate electrode. Item 6. The solid-state imaging device according to Item 3.   5. The solid-state imaging device according to claim 4, wherein the gate insulating film at the bottom of the readout gate electrode is formed so as to be in contact with a first conductivity type impurity region constituting a lowermost photodiode formed in the semiconductor substrate.   The solid-state imaging device according to claim 1, wherein the overflow path is formed in a part of a first conductivity type impurity region constituting the photodiode.   The solid-state imaging device according to claim 1, further comprising a color filter and an on-chip lens on a back surface side of the semiconductor substrate, wherein light is incident from the back surface side of the semiconductor substrate. By irradiating light to a plurality of photodiodes formed in the depth direction in the semiconductor substrate, signal charges are accumulated in the photodiodes,
When the signal charge is accumulated, the signal charge that exceeds the saturation charge amount in one photodiode is transferred to another photodiode or floating diffusion region through an overflow path,
A method for driving a solid-state imaging device, wherein when the signal charge accumulation is completed, the signal charges accumulated in the plurality of photodiodes are simultaneously transferred to the floating diffusion region.   The signal charge accumulated in the floating diffusion region is reset by applying a reset voltage to the floating diffusion region when the signal charge is transferred to the floating diffusion region during the accumulation of the signal charge. A driving method of the solid-state imaging device. An optical lens,
A plurality of photodiodes having a junction surface of a first conductivity type impurity region and a second conductivity type impurity region at different depths in a semiconductor substrate, and gate insulation in a depth direction from the surface of the semiconductor substrate A vertical charge readout gate electrode formed through a film, a transfer channel for transferring signal charges read from the plurality of photodiodes, and a floating diffusion region for storing signal charges transferred by the transfer channels A solid-state imaging device comprising: a vertical transistor comprising: an overflow path connecting between the plurality of photodiodes and between the photodiode and the floating diffusion region when charge is accumulated in the photodiode; ,
An electronic device comprising: a signal processing circuit that processes an output signal of the solid-state imaging device.

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